Intrinsics.gen
//===- TableGen'erated file -------------------------------------*- C++ -*-===//
//
// Intrinsic Function Source Fragment
//
// Automatically generated file, do not edit!
//
//===----------------------------------------------------------------------===//
// VisualStudio defines setjmp as _setjmp
#if defined(_MSC_VER) && defined(setjmp) && \
!defined(setjmp_undefined_for_msvc)
# pragma push_macro("setjmp")
# undef setjmp
# define setjmp_undefined_for_msvc
#endif
// Enum values for Intrinsics.h
#ifdef GET_INTRINSIC_ENUM_VALUES
CNOT, // llvm.CNOT
Fredkin, // llvm.Fredkin
H, // llvm.H
MeasX, // llvm.MeasX
MeasZ, // llvm.MeasZ
NOT, // llvm.rkqc.NOT
PrepX, // llvm.PrepX
PrepZ, // llvm.PrepZ
Rx, // llvm.Rx
Ry, // llvm.Ry
Rz, // llvm.Rz
S, // llvm.S
Sdag, // llvm.Sdag
T, // llvm.T
Tdag, // llvm.Tdag
Toffoli, // llvm.Toffoli
X, // llvm.X
Y, // llvm.Y
Z, // llvm.Z
a_eq_a_minus_b, // llvm.rkqc.a_eq_a_minus_b
a_eq_a_plus_b, // llvm.rkqc.a_eq_a_plus_b
a_eq_a_plus_b_times_c, // llvm.rkqc.a_eq_a_plus_b_times_c
a_swap_b, // llvm.rkqc.a_swap_b
adjust_trampoline, // llvm.adjust.trampoline
annotation, // llvm.annotation
arm_cdp, // llvm.arm.cdp
arm_cdp2, // llvm.arm.cdp2
arm_get_fpscr, // llvm.arm.get.fpscr
arm_ldrexd, // llvm.arm.ldrexd
arm_mcr, // llvm.arm.mcr
arm_mcr2, // llvm.arm.mcr2
arm_mcrr, // llvm.arm.mcrr
arm_mcrr2, // llvm.arm.mcrr2
arm_mrc, // llvm.arm.mrc
arm_mrc2, // llvm.arm.mrc2
arm_neon_vabds, // llvm.arm.neon.vabds
arm_neon_vabdu, // llvm.arm.neon.vabdu
arm_neon_vabs, // llvm.arm.neon.vabs
arm_neon_vacged, // llvm.arm.neon.vacged
arm_neon_vacgeq, // llvm.arm.neon.vacgeq
arm_neon_vacgtd, // llvm.arm.neon.vacgtd
arm_neon_vacgtq, // llvm.arm.neon.vacgtq
arm_neon_vaddhn, // llvm.arm.neon.vaddhn
arm_neon_vcls, // llvm.arm.neon.vcls
arm_neon_vclz, // llvm.arm.neon.vclz
arm_neon_vcnt, // llvm.arm.neon.vcnt
arm_neon_vcvtfp2fxs, // llvm.arm.neon.vcvtfp2fxs
arm_neon_vcvtfp2fxu, // llvm.arm.neon.vcvtfp2fxu
arm_neon_vcvtfp2hf, // llvm.arm.neon.vcvtfp2hf
arm_neon_vcvtfxs2fp, // llvm.arm.neon.vcvtfxs2fp
arm_neon_vcvtfxu2fp, // llvm.arm.neon.vcvtfxu2fp
arm_neon_vcvthf2fp, // llvm.arm.neon.vcvthf2fp
arm_neon_vhadds, // llvm.arm.neon.vhadds
arm_neon_vhaddu, // llvm.arm.neon.vhaddu
arm_neon_vhsubs, // llvm.arm.neon.vhsubs
arm_neon_vhsubu, // llvm.arm.neon.vhsubu
arm_neon_vld1, // llvm.arm.neon.vld1
arm_neon_vld2, // llvm.arm.neon.vld2
arm_neon_vld2lane, // llvm.arm.neon.vld2lane
arm_neon_vld3, // llvm.arm.neon.vld3
arm_neon_vld3lane, // llvm.arm.neon.vld3lane
arm_neon_vld4, // llvm.arm.neon.vld4
arm_neon_vld4lane, // llvm.arm.neon.vld4lane
arm_neon_vmaxs, // llvm.arm.neon.vmaxs
arm_neon_vmaxu, // llvm.arm.neon.vmaxu
arm_neon_vmins, // llvm.arm.neon.vmins
arm_neon_vminu, // llvm.arm.neon.vminu
arm_neon_vmullp, // llvm.arm.neon.vmullp
arm_neon_vmulls, // llvm.arm.neon.vmulls
arm_neon_vmullu, // llvm.arm.neon.vmullu
arm_neon_vmulp, // llvm.arm.neon.vmulp
arm_neon_vpadals, // llvm.arm.neon.vpadals
arm_neon_vpadalu, // llvm.arm.neon.vpadalu
arm_neon_vpadd, // llvm.arm.neon.vpadd
arm_neon_vpaddls, // llvm.arm.neon.vpaddls
arm_neon_vpaddlu, // llvm.arm.neon.vpaddlu
arm_neon_vpmaxs, // llvm.arm.neon.vpmaxs
arm_neon_vpmaxu, // llvm.arm.neon.vpmaxu
arm_neon_vpmins, // llvm.arm.neon.vpmins
arm_neon_vpminu, // llvm.arm.neon.vpminu
arm_neon_vqabs, // llvm.arm.neon.vqabs
arm_neon_vqadds, // llvm.arm.neon.vqadds
arm_neon_vqaddu, // llvm.arm.neon.vqaddu
arm_neon_vqdmlal, // llvm.arm.neon.vqdmlal
arm_neon_vqdmlsl, // llvm.arm.neon.vqdmlsl
arm_neon_vqdmulh, // llvm.arm.neon.vqdmulh
arm_neon_vqdmull, // llvm.arm.neon.vqdmull
arm_neon_vqmovns, // llvm.arm.neon.vqmovns
arm_neon_vqmovnsu, // llvm.arm.neon.vqmovnsu
arm_neon_vqmovnu, // llvm.arm.neon.vqmovnu
arm_neon_vqneg, // llvm.arm.neon.vqneg
arm_neon_vqrdmulh, // llvm.arm.neon.vqrdmulh
arm_neon_vqrshiftns, // llvm.arm.neon.vqrshiftns
arm_neon_vqrshiftnsu, // llvm.arm.neon.vqrshiftnsu
arm_neon_vqrshiftnu, // llvm.arm.neon.vqrshiftnu
arm_neon_vqrshifts, // llvm.arm.neon.vqrshifts
arm_neon_vqrshiftu, // llvm.arm.neon.vqrshiftu
arm_neon_vqshiftns, // llvm.arm.neon.vqshiftns
arm_neon_vqshiftnsu, // llvm.arm.neon.vqshiftnsu
arm_neon_vqshiftnu, // llvm.arm.neon.vqshiftnu
arm_neon_vqshifts, // llvm.arm.neon.vqshifts
arm_neon_vqshiftsu, // llvm.arm.neon.vqshiftsu
arm_neon_vqshiftu, // llvm.arm.neon.vqshiftu
arm_neon_vqsubs, // llvm.arm.neon.vqsubs
arm_neon_vqsubu, // llvm.arm.neon.vqsubu
arm_neon_vraddhn, // llvm.arm.neon.vraddhn
arm_neon_vrecpe, // llvm.arm.neon.vrecpe
arm_neon_vrecps, // llvm.arm.neon.vrecps
arm_neon_vrhadds, // llvm.arm.neon.vrhadds
arm_neon_vrhaddu, // llvm.arm.neon.vrhaddu
arm_neon_vrshiftn, // llvm.arm.neon.vrshiftn
arm_neon_vrshifts, // llvm.arm.neon.vrshifts
arm_neon_vrshiftu, // llvm.arm.neon.vrshiftu
arm_neon_vrsqrte, // llvm.arm.neon.vrsqrte
arm_neon_vrsqrts, // llvm.arm.neon.vrsqrts
arm_neon_vrsubhn, // llvm.arm.neon.vrsubhn
arm_neon_vshiftins, // llvm.arm.neon.vshiftins
arm_neon_vshiftls, // llvm.arm.neon.vshiftls
arm_neon_vshiftlu, // llvm.arm.neon.vshiftlu
arm_neon_vshiftn, // llvm.arm.neon.vshiftn
arm_neon_vshifts, // llvm.arm.neon.vshifts
arm_neon_vshiftu, // llvm.arm.neon.vshiftu
arm_neon_vst1, // llvm.arm.neon.vst1
arm_neon_vst2, // llvm.arm.neon.vst2
arm_neon_vst2lane, // llvm.arm.neon.vst2lane
arm_neon_vst3, // llvm.arm.neon.vst3
arm_neon_vst3lane, // llvm.arm.neon.vst3lane
arm_neon_vst4, // llvm.arm.neon.vst4
arm_neon_vst4lane, // llvm.arm.neon.vst4lane
arm_neon_vsubhn, // llvm.arm.neon.vsubhn
arm_neon_vtbl1, // llvm.arm.neon.vtbl1
arm_neon_vtbl2, // llvm.arm.neon.vtbl2
arm_neon_vtbl3, // llvm.arm.neon.vtbl3
arm_neon_vtbl4, // llvm.arm.neon.vtbl4
arm_neon_vtbx1, // llvm.arm.neon.vtbx1
arm_neon_vtbx2, // llvm.arm.neon.vtbx2
arm_neon_vtbx3, // llvm.arm.neon.vtbx3
arm_neon_vtbx4, // llvm.arm.neon.vtbx4
arm_qadd, // llvm.arm.qadd
arm_qsub, // llvm.arm.qsub
arm_set_fpscr, // llvm.arm.set.fpscr
arm_ssat, // llvm.arm.ssat
arm_strexd, // llvm.arm.strexd
arm_thread_pointer, // llvm.arm.thread.pointer
arm_usat, // llvm.arm.usat
arm_vcvtr, // llvm.arm.vcvtr
arm_vcvtru, // llvm.arm.vcvtru
assign_value_of_0_to_a, // llvm.rkqc.assign_value_of_0_to_a
assign_value_of_1_to_a, // llvm.rkqc.assign_value_of_1_to_a
assign_value_of_b_to_a, // llvm.rkqc.assign_value_of_b_to_a
bswap, // llvm.bswap
cnot, // llvm.rkqc.cnot
convert_from_fp16, // llvm.convert.from.fp16
convert_to_fp16, // llvm.convert.to.fp16
convertff, // llvm.convertff
convertfsi, // llvm.convertfsi
convertfui, // llvm.convertfui
convertsif, // llvm.convertsif
convertss, // llvm.convertss
convertsu, // llvm.convertsu
convertuif, // llvm.convertuif
convertus, // llvm.convertus
convertuu, // llvm.convertuu
cos, // llvm.cos
ctlz, // llvm.ctlz
ctpop, // llvm.ctpop
cttz, // llvm.cttz
dbg_declare, // llvm.dbg.declare
dbg_value, // llvm.dbg.value
eh_dwarf_cfa, // llvm.eh.dwarf.cfa
eh_return_i32, // llvm.eh.return.i32
eh_return_i64, // llvm.eh.return.i64
eh_sjlj_callsite, // llvm.eh.sjlj.callsite
eh_sjlj_functioncontext, // llvm.eh.sjlj.functioncontext
eh_sjlj_longjmp, // llvm.eh.sjlj.longjmp
eh_sjlj_lsda, // llvm.eh.sjlj.lsda
eh_sjlj_setjmp, // llvm.eh.sjlj.setjmp
eh_typeid_for, // llvm.eh.typeid.for
eh_unwind_init, // llvm.eh.unwind.init
exp, // llvm.exp
exp2, // llvm.exp2
expect, // llvm.expect
flt_rounds, // llvm.flt.rounds
fma, // llvm.fma
frameaddress, // llvm.frameaddress
gcread, // llvm.gcread
gcroot, // llvm.gcroot
gcwrite, // llvm.gcwrite
hexagon_A2_abs, // llvm.hexagon.A2.abs
hexagon_A2_absp, // llvm.hexagon.A2.absp
hexagon_A2_abssat, // llvm.hexagon.A2.abssat
hexagon_A2_add, // llvm.hexagon.A2.add
hexagon_A2_addh_h16_hh, // llvm.hexagon.A2.addh.h16.hh
hexagon_A2_addh_h16_hl, // llvm.hexagon.A2.addh.h16.hl
hexagon_A2_addh_h16_lh, // llvm.hexagon.A2.addh.h16.lh
hexagon_A2_addh_h16_ll, // llvm.hexagon.A2.addh.h16.ll
hexagon_A2_addh_h16_sat_hh, // llvm.hexagon.A2.addh.h16.sat.hh
hexagon_A2_addh_h16_sat_hl, // llvm.hexagon.A2.addh.h16.sat.hl
hexagon_A2_addh_h16_sat_lh, // llvm.hexagon.A2.addh.h16.sat.lh
hexagon_A2_addh_h16_sat_ll, // llvm.hexagon.A2.addh.h16.sat.ll
hexagon_A2_addh_l16_hh, // llvm.hexagon.A2.addh.l16.hh
hexagon_A2_addh_l16_hl, // llvm.hexagon.A2.addh.l16.hl
hexagon_A2_addh_l16_lh, // llvm.hexagon.A2.addh.l16.lh
hexagon_A2_addh_l16_ll, // llvm.hexagon.A2.addh.l16.ll
hexagon_A2_addh_l16_sat_hh, // llvm.hexagon.A2.addh.l16.sat.hh
hexagon_A2_addh_l16_sat_hl, // llvm.hexagon.A2.addh.l16.sat.hl
hexagon_A2_addh_l16_sat_lh, // llvm.hexagon.A2.addh.l16.sat.lh
hexagon_A2_addh_l16_sat_ll, // llvm.hexagon.A2.addh.l16.sat.ll
hexagon_A2_addi, // llvm.hexagon.A2.addi
hexagon_A2_addp, // llvm.hexagon.A2.addp
hexagon_A2_addpsat, // llvm.hexagon.A2.addpsat
hexagon_A2_addsat, // llvm.hexagon.A2.addsat
hexagon_A2_addsp, // llvm.hexagon.A2.addsp
hexagon_A2_and, // llvm.hexagon.A2.and
hexagon_A2_andir, // llvm.hexagon.A2.andir
hexagon_A2_andp, // llvm.hexagon.A2.andp
hexagon_A2_aslh, // llvm.hexagon.A2.aslh
hexagon_A2_asrh, // llvm.hexagon.A2.asrh
hexagon_A2_combine_hh, // llvm.hexagon.A2.combine.hh
hexagon_A2_combine_hl, // llvm.hexagon.A2.combine.hl
hexagon_A2_combine_lh, // llvm.hexagon.A2.combine.lh
hexagon_A2_combine_ll, // llvm.hexagon.A2.combine.ll
hexagon_A2_combineii, // llvm.hexagon.A2.combineii
hexagon_A2_combinew, // llvm.hexagon.A2.combinew
hexagon_A2_max, // llvm.hexagon.A2.max
hexagon_A2_maxp, // llvm.hexagon.A2.maxp
hexagon_A2_maxu, // llvm.hexagon.A2.maxu
hexagon_A2_maxup, // llvm.hexagon.A2.maxup
hexagon_A2_min, // llvm.hexagon.A2.min
hexagon_A2_minp, // llvm.hexagon.A2.minp
hexagon_A2_minu, // llvm.hexagon.A2.minu
hexagon_A2_minup, // llvm.hexagon.A2.minup
hexagon_A2_neg, // llvm.hexagon.A2.neg
hexagon_A2_negp, // llvm.hexagon.A2.negp
hexagon_A2_negsat, // llvm.hexagon.A2.negsat
hexagon_A2_not, // llvm.hexagon.A2.not
hexagon_A2_notp, // llvm.hexagon.A2.notp
hexagon_A2_or, // llvm.hexagon.A2.or
hexagon_A2_orir, // llvm.hexagon.A2.orir
hexagon_A2_orp, // llvm.hexagon.A2.orp
hexagon_A2_sat, // llvm.hexagon.A2.sat
hexagon_A2_satb, // llvm.hexagon.A2.satb
hexagon_A2_sath, // llvm.hexagon.A2.sath
hexagon_A2_satub, // llvm.hexagon.A2.satub
hexagon_A2_satuh, // llvm.hexagon.A2.satuh
hexagon_A2_sub, // llvm.hexagon.A2.sub
hexagon_A2_subh_h16_hh, // llvm.hexagon.A2.subh.h16.hh
hexagon_A2_subh_h16_hl, // llvm.hexagon.A2.subh.h16.hl
hexagon_A2_subh_h16_lh, // llvm.hexagon.A2.subh.h16.lh
hexagon_A2_subh_h16_ll, // llvm.hexagon.A2.subh.h16.ll
hexagon_A2_subh_h16_sat_hh, // llvm.hexagon.A2.subh.h16.sat.hh
hexagon_A2_subh_h16_sat_hl, // llvm.hexagon.A2.subh.h16.sat.hl
hexagon_A2_subh_h16_sat_lh, // llvm.hexagon.A2.subh.h16.sat.lh
hexagon_A2_subh_h16_sat_ll, // llvm.hexagon.A2.subh.h16.sat.ll
hexagon_A2_subh_l16_hl, // llvm.hexagon.A2.subh.l16.hl
hexagon_A2_subh_l16_ll, // llvm.hexagon.A2.subh.l16.ll
hexagon_A2_subh_l16_sat_hl, // llvm.hexagon.A2.subh.l16.sat.hl
hexagon_A2_subh_l16_sat_ll, // llvm.hexagon.A2.subh.l16.sat.ll
hexagon_A2_subp, // llvm.hexagon.A2.subp
hexagon_A2_subri, // llvm.hexagon.A2.subri
hexagon_A2_subsat, // llvm.hexagon.A2.subsat
hexagon_A2_svaddh, // llvm.hexagon.A2.svaddh
hexagon_A2_svaddhs, // llvm.hexagon.A2.svaddhs
hexagon_A2_svadduhs, // llvm.hexagon.A2.svadduhs
hexagon_A2_svavgh, // llvm.hexagon.A2.svavgh
hexagon_A2_svavghs, // llvm.hexagon.A2.svavghs
hexagon_A2_svnavgh, // llvm.hexagon.A2.svnavgh
hexagon_A2_svsubh, // llvm.hexagon.A2.svsubh
hexagon_A2_svsubhs, // llvm.hexagon.A2.svsubhs
hexagon_A2_svsubuhs, // llvm.hexagon.A2.svsubuhs
hexagon_A2_swiz, // llvm.hexagon.A2.swiz
hexagon_A2_sxtb, // llvm.hexagon.A2.sxtb
hexagon_A2_sxth, // llvm.hexagon.A2.sxth
hexagon_A2_sxtw, // llvm.hexagon.A2.sxtw
hexagon_A2_tfr, // llvm.hexagon.A2.tfr
hexagon_A2_tfrih, // llvm.hexagon.A2.tfrih
hexagon_A2_tfril, // llvm.hexagon.A2.tfril
hexagon_A2_tfrp, // llvm.hexagon.A2.tfrp
hexagon_A2_tfrpi, // llvm.hexagon.A2.tfrpi
hexagon_A2_tfrsi, // llvm.hexagon.A2.tfrsi
hexagon_A2_vabsh, // llvm.hexagon.A2.vabsh
hexagon_A2_vabshsat, // llvm.hexagon.A2.vabshsat
hexagon_A2_vabsw, // llvm.hexagon.A2.vabsw
hexagon_A2_vabswsat, // llvm.hexagon.A2.vabswsat
hexagon_A2_vaddh, // llvm.hexagon.A2.vaddh
hexagon_A2_vaddhs, // llvm.hexagon.A2.vaddhs
hexagon_A2_vaddub, // llvm.hexagon.A2.vaddub
hexagon_A2_vaddubs, // llvm.hexagon.A2.vaddubs
hexagon_A2_vadduhs, // llvm.hexagon.A2.vadduhs
hexagon_A2_vaddw, // llvm.hexagon.A2.vaddw
hexagon_A2_vaddws, // llvm.hexagon.A2.vaddws
hexagon_A2_vavgh, // llvm.hexagon.A2.vavgh
hexagon_A2_vavghcr, // llvm.hexagon.A2.vavghcr
hexagon_A2_vavghr, // llvm.hexagon.A2.vavghr
hexagon_A2_vavgub, // llvm.hexagon.A2.vavgub
hexagon_A2_vavgubr, // llvm.hexagon.A2.vavgubr
hexagon_A2_vavguh, // llvm.hexagon.A2.vavguh
hexagon_A2_vavguhr, // llvm.hexagon.A2.vavguhr
hexagon_A2_vavguw, // llvm.hexagon.A2.vavguw
hexagon_A2_vavguwr, // llvm.hexagon.A2.vavguwr
hexagon_A2_vavgw, // llvm.hexagon.A2.vavgw
hexagon_A2_vavgwcr, // llvm.hexagon.A2.vavgwcr
hexagon_A2_vavgwr, // llvm.hexagon.A2.vavgwr
hexagon_A2_vcmpbeq, // llvm.hexagon.A2.vcmpbeq
hexagon_A2_vcmpbgtu, // llvm.hexagon.A2.vcmpbgtu
hexagon_A2_vcmpheq, // llvm.hexagon.A2.vcmpheq
hexagon_A2_vcmphgt, // llvm.hexagon.A2.vcmphgt
hexagon_A2_vcmphgtu, // llvm.hexagon.A2.vcmphgtu
hexagon_A2_vcmpweq, // llvm.hexagon.A2.vcmpweq
hexagon_A2_vcmpwgt, // llvm.hexagon.A2.vcmpwgt
hexagon_A2_vcmpwgtu, // llvm.hexagon.A2.vcmpwgtu
hexagon_A2_vconj, // llvm.hexagon.A2.vconj
hexagon_A2_vmaxh, // llvm.hexagon.A2.vmaxh
hexagon_A2_vmaxub, // llvm.hexagon.A2.vmaxub
hexagon_A2_vmaxuh, // llvm.hexagon.A2.vmaxuh
hexagon_A2_vmaxuw, // llvm.hexagon.A2.vmaxuw
hexagon_A2_vmaxw, // llvm.hexagon.A2.vmaxw
hexagon_A2_vminh, // llvm.hexagon.A2.vminh
hexagon_A2_vminub, // llvm.hexagon.A2.vminub
hexagon_A2_vminuh, // llvm.hexagon.A2.vminuh
hexagon_A2_vminuw, // llvm.hexagon.A2.vminuw
hexagon_A2_vminw, // llvm.hexagon.A2.vminw
hexagon_A2_vnavgh, // llvm.hexagon.A2.vnavgh
hexagon_A2_vnavghcr, // llvm.hexagon.A2.vnavghcr
hexagon_A2_vnavghr, // llvm.hexagon.A2.vnavghr
hexagon_A2_vnavgw, // llvm.hexagon.A2.vnavgw
hexagon_A2_vnavgwcr, // llvm.hexagon.A2.vnavgwcr
hexagon_A2_vnavgwr, // llvm.hexagon.A2.vnavgwr
hexagon_A2_vraddub, // llvm.hexagon.A2.vraddub
hexagon_A2_vraddub_acc, // llvm.hexagon.A2.vraddub.acc
hexagon_A2_vrsadub, // llvm.hexagon.A2.vrsadub
hexagon_A2_vrsadub_acc, // llvm.hexagon.A2.vrsadub.acc
hexagon_A2_vsubh, // llvm.hexagon.A2.vsubh
hexagon_A2_vsubhs, // llvm.hexagon.A2.vsubhs
hexagon_A2_vsubub, // llvm.hexagon.A2.vsubub
hexagon_A2_vsububs, // llvm.hexagon.A2.vsububs
hexagon_A2_vsubuhs, // llvm.hexagon.A2.vsubuhs
hexagon_A2_vsubw, // llvm.hexagon.A2.vsubw
hexagon_A2_vsubws, // llvm.hexagon.A2.vsubws
hexagon_A2_xor, // llvm.hexagon.A2.xor
hexagon_A2_xorp, // llvm.hexagon.A2.xorp
hexagon_A2_zxtb, // llvm.hexagon.A2.zxtb
hexagon_A2_zxth, // llvm.hexagon.A2.zxth
hexagon_A4_andn, // llvm.hexagon.A4.andn
hexagon_A4_andnp, // llvm.hexagon.A4.andnp
hexagon_A4_combineir, // llvm.hexagon.A4.combineir
hexagon_A4_combineri, // llvm.hexagon.A4.combineri
hexagon_A4_cround_ri, // llvm.hexagon.A4.cround.ri
hexagon_A4_cround_rr, // llvm.hexagon.A4.cround.rr
hexagon_A4_modwrapu, // llvm.hexagon.A4.modwrapu
hexagon_A4_orn, // llvm.hexagon.A4.orn
hexagon_A4_ornp, // llvm.hexagon.A4.ornp
hexagon_A4_rcmpeq, // llvm.hexagon.A4.rcmpeq
hexagon_A4_rcmpeqi, // llvm.hexagon.A4.rcmpeqi
hexagon_A4_rcmpneq, // llvm.hexagon.A4.rcmpneq
hexagon_A4_rcmpneqi, // llvm.hexagon.A4.rcmpneqi
hexagon_A4_round_ri, // llvm.hexagon.A4.round.ri
hexagon_A4_round_ri_sat, // llvm.hexagon.A4.round.ri.sat
hexagon_A4_round_rr, // llvm.hexagon.A4.round.rr
hexagon_A4_round_rr_sat, // llvm.hexagon.A4.round.rr.sat
hexagon_C2_all8, // llvm.hexagon.C2.all8
hexagon_C2_and, // llvm.hexagon.C2.and
hexagon_C2_andn, // llvm.hexagon.C2.andn
hexagon_C2_any8, // llvm.hexagon.C2.any8
hexagon_C2_bitsclr, // llvm.hexagon.C2.bitsclr
hexagon_C2_bitsclri, // llvm.hexagon.C2.bitsclri
hexagon_C2_bitsset, // llvm.hexagon.C2.bitsset
hexagon_C2_cmpeq, // llvm.hexagon.C2.cmpeq
hexagon_C2_cmpeqi, // llvm.hexagon.C2.cmpeqi
hexagon_C2_cmpeqp, // llvm.hexagon.C2.cmpeqp
hexagon_C2_cmpgei, // llvm.hexagon.C2.cmpgei
hexagon_C2_cmpgeui, // llvm.hexagon.C2.cmpgeui
hexagon_C2_cmpgt, // llvm.hexagon.C2.cmpgt
hexagon_C2_cmpgti, // llvm.hexagon.C2.cmpgti
hexagon_C2_cmpgtp, // llvm.hexagon.C2.cmpgtp
hexagon_C2_cmpgtu, // llvm.hexagon.C2.cmpgtu
hexagon_C2_cmpgtui, // llvm.hexagon.C2.cmpgtui
hexagon_C2_cmpgtup, // llvm.hexagon.C2.cmpgtup
hexagon_C2_cmplt, // llvm.hexagon.C2.cmplt
hexagon_C2_cmpltu, // llvm.hexagon.C2.cmpltu
hexagon_C2_mask, // llvm.hexagon.C2.mask
hexagon_C2_mux, // llvm.hexagon.C2.mux
hexagon_C2_muxii, // llvm.hexagon.C2.muxii
hexagon_C2_muxir, // llvm.hexagon.C2.muxir
hexagon_C2_muxri, // llvm.hexagon.C2.muxri
hexagon_C2_not, // llvm.hexagon.C2.not
hexagon_C2_or, // llvm.hexagon.C2.or
hexagon_C2_orn, // llvm.hexagon.C2.orn
hexagon_C2_pxfer_map, // llvm.hexagon.C2.pxfer.map
hexagon_C2_tfrpr, // llvm.hexagon.C2.tfrpr
hexagon_C2_tfrrp, // llvm.hexagon.C2.tfrrp
hexagon_C2_vitpack, // llvm.hexagon.C2.vitpack
hexagon_C2_vmux, // llvm.hexagon.C2.vmux
hexagon_C2_xor, // llvm.hexagon.C2.xor
hexagon_C4_and_and, // llvm.hexagon.C4.and.and
hexagon_C4_and_andn, // llvm.hexagon.C4.and.andn
hexagon_C4_and_or, // llvm.hexagon.C4.and.or
hexagon_C4_and_orn, // llvm.hexagon.C4.and.orn
hexagon_C4_cmplte, // llvm.hexagon.C4.cmplte
hexagon_C4_cmpltei, // llvm.hexagon.C4.cmpltei
hexagon_C4_cmplteu, // llvm.hexagon.C4.cmplteu
hexagon_C4_cmplteui, // llvm.hexagon.C4.cmplteui
hexagon_C4_cmpneq, // llvm.hexagon.C4.cmpneq
hexagon_C4_cmpneqi, // llvm.hexagon.C4.cmpneqi
hexagon_C4_fastcorner9, // llvm.hexagon.C4.fastcorner9
hexagon_C4_fastcorner9_not, // llvm.hexagon.C4.fastcorner9.not
hexagon_C4_or_and, // llvm.hexagon.C4.or.and
hexagon_C4_or_andn, // llvm.hexagon.C4.or.andn
hexagon_C4_or_or, // llvm.hexagon.C4.or.or
hexagon_C4_or_orn, // llvm.hexagon.C4.or.orn
hexagon_M2_acci, // llvm.hexagon.M2.acci
hexagon_M2_accii, // llvm.hexagon.M2.accii
hexagon_M2_cmaci_s0, // llvm.hexagon.M2.cmaci.s0
hexagon_M2_cmacr_s0, // llvm.hexagon.M2.cmacr.s0
hexagon_M2_cmacs_s0, // llvm.hexagon.M2.cmacs.s0
hexagon_M2_cmacs_s1, // llvm.hexagon.M2.cmacs.s1
hexagon_M2_cmacsc_s0, // llvm.hexagon.M2.cmacsc.s0
hexagon_M2_cmacsc_s1, // llvm.hexagon.M2.cmacsc.s1
hexagon_M2_cmpyi_s0, // llvm.hexagon.M2.cmpyi.s0
hexagon_M2_cmpyr_s0, // llvm.hexagon.M2.cmpyr.s0
hexagon_M2_cmpyrs_s0, // llvm.hexagon.M2.cmpyrs.s0
hexagon_M2_cmpyrs_s1, // llvm.hexagon.M2.cmpyrs.s1
hexagon_M2_cmpyrsc_s0, // llvm.hexagon.M2.cmpyrsc.s0
hexagon_M2_cmpyrsc_s1, // llvm.hexagon.M2.cmpyrsc.s1
hexagon_M2_cmpys_s0, // llvm.hexagon.M2.cmpys.s0
hexagon_M2_cmpys_s1, // llvm.hexagon.M2.cmpys.s1
hexagon_M2_cmpysc_s0, // llvm.hexagon.M2.cmpysc.s0
hexagon_M2_cmpysc_s1, // llvm.hexagon.M2.cmpysc.s1
hexagon_M2_cnacs_s0, // llvm.hexagon.M2.cnacs.s0
hexagon_M2_cnacs_s1, // llvm.hexagon.M2.cnacs.s1
hexagon_M2_cnacsc_s0, // llvm.hexagon.M2.cnacsc.s0
hexagon_M2_cnacsc_s1, // llvm.hexagon.M2.cnacsc.s1
hexagon_M2_dpmpyss_acc_s0, // llvm.hexagon.M2.dpmpyss.acc.s0
hexagon_M2_dpmpyss_nac_s0, // llvm.hexagon.M2.dpmpyss.nac.s0
hexagon_M2_dpmpyss_rnd_s0, // llvm.hexagon.M2.dpmpyss.rnd.s0
hexagon_M2_dpmpyss_s0, // llvm.hexagon.M2.dpmpyss.s0
hexagon_M2_dpmpyuu_acc_s0, // llvm.hexagon.M2.dpmpyuu.acc.s0
hexagon_M2_dpmpyuu_nac_s0, // llvm.hexagon.M2.dpmpyuu.nac.s0
hexagon_M2_dpmpyuu_s0, // llvm.hexagon.M2.dpmpyuu.s0
hexagon_M2_hmmpyh_rs1, // llvm.hexagon.M2.hmmpyh.rs1
hexagon_M2_hmmpyl_rs1, // llvm.hexagon.M2.hmmpyl.rs1
hexagon_M2_maci, // llvm.hexagon.M2.maci
hexagon_M2_macsin, // llvm.hexagon.M2.macsin
hexagon_M2_macsip, // llvm.hexagon.M2.macsip
hexagon_M2_mmachs_rs0, // llvm.hexagon.M2.mmachs.rs0
hexagon_M2_mmachs_rs1, // llvm.hexagon.M2.mmachs.rs1
hexagon_M2_mmachs_s0, // llvm.hexagon.M2.mmachs.s0
hexagon_M2_mmachs_s1, // llvm.hexagon.M2.mmachs.s1
hexagon_M2_mmacls_rs0, // llvm.hexagon.M2.mmacls.rs0
hexagon_M2_mmacls_rs1, // llvm.hexagon.M2.mmacls.rs1
hexagon_M2_mmacls_s0, // llvm.hexagon.M2.mmacls.s0
hexagon_M2_mmacls_s1, // llvm.hexagon.M2.mmacls.s1
hexagon_M2_mmacuhs_rs0, // llvm.hexagon.M2.mmacuhs.rs0
hexagon_M2_mmacuhs_rs1, // llvm.hexagon.M2.mmacuhs.rs1
hexagon_M2_mmacuhs_s0, // llvm.hexagon.M2.mmacuhs.s0
hexagon_M2_mmacuhs_s1, // llvm.hexagon.M2.mmacuhs.s1
hexagon_M2_mmaculs_rs0, // llvm.hexagon.M2.mmaculs.rs0
hexagon_M2_mmaculs_rs1, // llvm.hexagon.M2.mmaculs.rs1
hexagon_M2_mmaculs_s0, // llvm.hexagon.M2.mmaculs.s0
hexagon_M2_mmaculs_s1, // llvm.hexagon.M2.mmaculs.s1
hexagon_M2_mmpyh_rs0, // llvm.hexagon.M2.mmpyh.rs0
hexagon_M2_mmpyh_rs1, // llvm.hexagon.M2.mmpyh.rs1
hexagon_M2_mmpyh_s0, // llvm.hexagon.M2.mmpyh.s0
hexagon_M2_mmpyh_s1, // llvm.hexagon.M2.mmpyh.s1
hexagon_M2_mmpyl_rs0, // llvm.hexagon.M2.mmpyl.rs0
hexagon_M2_mmpyl_rs1, // llvm.hexagon.M2.mmpyl.rs1
hexagon_M2_mmpyl_s0, // llvm.hexagon.M2.mmpyl.s0
hexagon_M2_mmpyl_s1, // llvm.hexagon.M2.mmpyl.s1
hexagon_M2_mmpyuh_rs0, // llvm.hexagon.M2.mmpyuh.rs0
hexagon_M2_mmpyuh_rs1, // llvm.hexagon.M2.mmpyuh.rs1
hexagon_M2_mmpyuh_s0, // llvm.hexagon.M2.mmpyuh.s0
hexagon_M2_mmpyuh_s1, // llvm.hexagon.M2.mmpyuh.s1
hexagon_M2_mmpyul_rs0, // llvm.hexagon.M2.mmpyul.rs0
hexagon_M2_mmpyul_rs1, // llvm.hexagon.M2.mmpyul.rs1
hexagon_M2_mmpyul_s0, // llvm.hexagon.M2.mmpyul.s0
hexagon_M2_mmpyul_s1, // llvm.hexagon.M2.mmpyul.s1
hexagon_M2_mpy_acc_hh_s0, // llvm.hexagon.M2.mpy.acc.hh.s0
hexagon_M2_mpy_acc_hh_s1, // llvm.hexagon.M2.mpy.acc.hh.s1
hexagon_M2_mpy_acc_hl_s0, // llvm.hexagon.M2.mpy.acc.hl.s0
hexagon_M2_mpy_acc_hl_s1, // llvm.hexagon.M2.mpy.acc.hl.s1
hexagon_M2_mpy_acc_lh_s0, // llvm.hexagon.M2.mpy.acc.lh.s0
hexagon_M2_mpy_acc_lh_s1, // llvm.hexagon.M2.mpy.acc.lh.s1
hexagon_M2_mpy_acc_ll_s0, // llvm.hexagon.M2.mpy.acc.ll.s0
hexagon_M2_mpy_acc_ll_s1, // llvm.hexagon.M2.mpy.acc.ll.s1
hexagon_M2_mpy_acc_sat_hh_s0, // llvm.hexagon.M2.mpy.acc.sat.hh.s0
hexagon_M2_mpy_acc_sat_hh_s1, // llvm.hexagon.M2.mpy.acc.sat.hh.s1
hexagon_M2_mpy_acc_sat_hl_s0, // llvm.hexagon.M2.mpy.acc.sat.hl.s0
hexagon_M2_mpy_acc_sat_hl_s1, // llvm.hexagon.M2.mpy.acc.sat.hl.s1
hexagon_M2_mpy_acc_sat_lh_s0, // llvm.hexagon.M2.mpy.acc.sat.lh.s0
hexagon_M2_mpy_acc_sat_lh_s1, // llvm.hexagon.M2.mpy.acc.sat.lh.s1
hexagon_M2_mpy_acc_sat_ll_s0, // llvm.hexagon.M2.mpy.acc.sat.ll.s0
hexagon_M2_mpy_acc_sat_ll_s1, // llvm.hexagon.M2.mpy.acc.sat.ll.s1
hexagon_M2_mpy_hh_s0, // llvm.hexagon.M2.mpy.hh.s0
hexagon_M2_mpy_hh_s1, // llvm.hexagon.M2.mpy.hh.s1
hexagon_M2_mpy_hl_s0, // llvm.hexagon.M2.mpy.hl.s0
hexagon_M2_mpy_hl_s1, // llvm.hexagon.M2.mpy.hl.s1
hexagon_M2_mpy_lh_s0, // llvm.hexagon.M2.mpy.lh.s0
hexagon_M2_mpy_lh_s1, // llvm.hexagon.M2.mpy.lh.s1
hexagon_M2_mpy_ll_s0, // llvm.hexagon.M2.mpy.ll.s0
hexagon_M2_mpy_ll_s1, // llvm.hexagon.M2.mpy.ll.s1
hexagon_M2_mpy_nac_hh_s0, // llvm.hexagon.M2.mpy.nac.hh.s0
hexagon_M2_mpy_nac_hh_s1, // llvm.hexagon.M2.mpy.nac.hh.s1
hexagon_M2_mpy_nac_hl_s0, // llvm.hexagon.M2.mpy.nac.hl.s0
hexagon_M2_mpy_nac_hl_s1, // llvm.hexagon.M2.mpy.nac.hl.s1
hexagon_M2_mpy_nac_lh_s0, // llvm.hexagon.M2.mpy.nac.lh.s0
hexagon_M2_mpy_nac_lh_s1, // llvm.hexagon.M2.mpy.nac.lh.s1
hexagon_M2_mpy_nac_ll_s0, // llvm.hexagon.M2.mpy.nac.ll.s0
hexagon_M2_mpy_nac_ll_s1, // llvm.hexagon.M2.mpy.nac.ll.s1
hexagon_M2_mpy_nac_sat_hh_s0, // llvm.hexagon.M2.mpy.nac.sat.hh.s0
hexagon_M2_mpy_nac_sat_hh_s1, // llvm.hexagon.M2.mpy.nac.sat.hh.s1
hexagon_M2_mpy_nac_sat_hl_s0, // llvm.hexagon.M2.mpy.nac.sat.hl.s0
hexagon_M2_mpy_nac_sat_hl_s1, // llvm.hexagon.M2.mpy.nac.sat.hl.s1
hexagon_M2_mpy_nac_sat_lh_s0, // llvm.hexagon.M2.mpy.nac.sat.lh.s0
hexagon_M2_mpy_nac_sat_lh_s1, // llvm.hexagon.M2.mpy.nac.sat.lh.s1
hexagon_M2_mpy_nac_sat_ll_s0, // llvm.hexagon.M2.mpy.nac.sat.ll.s0
hexagon_M2_mpy_nac_sat_ll_s1, // llvm.hexagon.M2.mpy.nac.sat.ll.s1
hexagon_M2_mpy_rnd_hh_s0, // llvm.hexagon.M2.mpy.rnd.hh.s0
hexagon_M2_mpy_rnd_hh_s1, // llvm.hexagon.M2.mpy.rnd.hh.s1
hexagon_M2_mpy_rnd_hl_s0, // llvm.hexagon.M2.mpy.rnd.hl.s0
hexagon_M2_mpy_rnd_hl_s1, // llvm.hexagon.M2.mpy.rnd.hl.s1
hexagon_M2_mpy_rnd_lh_s0, // llvm.hexagon.M2.mpy.rnd.lh.s0
hexagon_M2_mpy_rnd_lh_s1, // llvm.hexagon.M2.mpy.rnd.lh.s1
hexagon_M2_mpy_rnd_ll_s0, // llvm.hexagon.M2.mpy.rnd.ll.s0
hexagon_M2_mpy_rnd_ll_s1, // llvm.hexagon.M2.mpy.rnd.ll.s1
hexagon_M2_mpy_sat_hh_s0, // llvm.hexagon.M2.mpy.sat.hh.s0
hexagon_M2_mpy_sat_hh_s1, // llvm.hexagon.M2.mpy.sat.hh.s1
hexagon_M2_mpy_sat_hl_s0, // llvm.hexagon.M2.mpy.sat.hl.s0
hexagon_M2_mpy_sat_hl_s1, // llvm.hexagon.M2.mpy.sat.hl.s1
hexagon_M2_mpy_sat_lh_s0, // llvm.hexagon.M2.mpy.sat.lh.s0
hexagon_M2_mpy_sat_lh_s1, // llvm.hexagon.M2.mpy.sat.lh.s1
hexagon_M2_mpy_sat_ll_s0, // llvm.hexagon.M2.mpy.sat.ll.s0
hexagon_M2_mpy_sat_ll_s1, // llvm.hexagon.M2.mpy.sat.ll.s1
hexagon_M2_mpy_sat_rnd_hh_s0, // llvm.hexagon.M2.mpy.sat.rnd.hh.s0
hexagon_M2_mpy_sat_rnd_hh_s1, // llvm.hexagon.M2.mpy.sat.rnd.hh.s1
hexagon_M2_mpy_sat_rnd_hl_s0, // llvm.hexagon.M2.mpy.sat.rnd.hl.s0
hexagon_M2_mpy_sat_rnd_hl_s1, // llvm.hexagon.M2.mpy.sat.rnd.hl.s1
hexagon_M2_mpy_sat_rnd_lh_s0, // llvm.hexagon.M2.mpy.sat.rnd.lh.s0
hexagon_M2_mpy_sat_rnd_lh_s1, // llvm.hexagon.M2.mpy.sat.rnd.lh.s1
hexagon_M2_mpy_sat_rnd_ll_s0, // llvm.hexagon.M2.mpy.sat.rnd.ll.s0
hexagon_M2_mpy_sat_rnd_ll_s1, // llvm.hexagon.M2.mpy.sat.rnd.ll.s1
hexagon_M2_mpy_up, // llvm.hexagon.M2.mpy.up
hexagon_M2_mpyd_acc_hh_s0, // llvm.hexagon.M2.mpyd.acc.hh.s0
hexagon_M2_mpyd_acc_hh_s1, // llvm.hexagon.M2.mpyd.acc.hh.s1
hexagon_M2_mpyd_acc_hl_s0, // llvm.hexagon.M2.mpyd.acc.hl.s0
hexagon_M2_mpyd_acc_hl_s1, // llvm.hexagon.M2.mpyd.acc.hl.s1
hexagon_M2_mpyd_acc_lh_s0, // llvm.hexagon.M2.mpyd.acc.lh.s0
hexagon_M2_mpyd_acc_lh_s1, // llvm.hexagon.M2.mpyd.acc.lh.s1
hexagon_M2_mpyd_acc_ll_s0, // llvm.hexagon.M2.mpyd.acc.ll.s0
hexagon_M2_mpyd_acc_ll_s1, // llvm.hexagon.M2.mpyd.acc.ll.s1
hexagon_M2_mpyd_hh_s0, // llvm.hexagon.M2.mpyd.hh.s0
hexagon_M2_mpyd_hh_s1, // llvm.hexagon.M2.mpyd.hh.s1
hexagon_M2_mpyd_hl_s0, // llvm.hexagon.M2.mpyd.hl.s0
hexagon_M2_mpyd_hl_s1, // llvm.hexagon.M2.mpyd.hl.s1
hexagon_M2_mpyd_lh_s0, // llvm.hexagon.M2.mpyd.lh.s0
hexagon_M2_mpyd_lh_s1, // llvm.hexagon.M2.mpyd.lh.s1
hexagon_M2_mpyd_ll_s0, // llvm.hexagon.M2.mpyd.ll.s0
hexagon_M2_mpyd_ll_s1, // llvm.hexagon.M2.mpyd.ll.s1
hexagon_M2_mpyd_nac_hh_s0, // llvm.hexagon.M2.mpyd.nac.hh.s0
hexagon_M2_mpyd_nac_hh_s1, // llvm.hexagon.M2.mpyd.nac.hh.s1
hexagon_M2_mpyd_nac_hl_s0, // llvm.hexagon.M2.mpyd.nac.hl.s0
hexagon_M2_mpyd_nac_hl_s1, // llvm.hexagon.M2.mpyd.nac.hl.s1
hexagon_M2_mpyd_nac_lh_s0, // llvm.hexagon.M2.mpyd.nac.lh.s0
hexagon_M2_mpyd_nac_lh_s1, // llvm.hexagon.M2.mpyd.nac.lh.s1
hexagon_M2_mpyd_nac_ll_s0, // llvm.hexagon.M2.mpyd.nac.ll.s0
hexagon_M2_mpyd_nac_ll_s1, // llvm.hexagon.M2.mpyd.nac.ll.s1
hexagon_M2_mpyd_rnd_hh_s0, // llvm.hexagon.M2.mpyd.rnd.hh.s0
hexagon_M2_mpyd_rnd_hh_s1, // llvm.hexagon.M2.mpyd.rnd.hh.s1
hexagon_M2_mpyd_rnd_hl_s0, // llvm.hexagon.M2.mpyd.rnd.hl.s0
hexagon_M2_mpyd_rnd_hl_s1, // llvm.hexagon.M2.mpyd.rnd.hl.s1
hexagon_M2_mpyd_rnd_lh_s0, // llvm.hexagon.M2.mpyd.rnd.lh.s0
hexagon_M2_mpyd_rnd_lh_s1, // llvm.hexagon.M2.mpyd.rnd.lh.s1
hexagon_M2_mpyd_rnd_ll_s0, // llvm.hexagon.M2.mpyd.rnd.ll.s0
hexagon_M2_mpyd_rnd_ll_s1, // llvm.hexagon.M2.mpyd.rnd.ll.s1
hexagon_M2_mpyi, // llvm.hexagon.M2.mpyi
hexagon_M2_mpysmi, // llvm.hexagon.M2.mpysmi
hexagon_M2_mpyu_acc_hh_s0, // llvm.hexagon.M2.mpyu.acc.hh.s0
hexagon_M2_mpyu_acc_hh_s1, // llvm.hexagon.M2.mpyu.acc.hh.s1
hexagon_M2_mpyu_acc_hl_s0, // llvm.hexagon.M2.mpyu.acc.hl.s0
hexagon_M2_mpyu_acc_hl_s1, // llvm.hexagon.M2.mpyu.acc.hl.s1
hexagon_M2_mpyu_acc_lh_s0, // llvm.hexagon.M2.mpyu.acc.lh.s0
hexagon_M2_mpyu_acc_lh_s1, // llvm.hexagon.M2.mpyu.acc.lh.s1
hexagon_M2_mpyu_acc_ll_s0, // llvm.hexagon.M2.mpyu.acc.ll.s0
hexagon_M2_mpyu_acc_ll_s1, // llvm.hexagon.M2.mpyu.acc.ll.s1
hexagon_M2_mpyu_hh_s0, // llvm.hexagon.M2.mpyu.hh.s0
hexagon_M2_mpyu_hh_s1, // llvm.hexagon.M2.mpyu.hh.s1
hexagon_M2_mpyu_hl_s0, // llvm.hexagon.M2.mpyu.hl.s0
hexagon_M2_mpyu_hl_s1, // llvm.hexagon.M2.mpyu.hl.s1
hexagon_M2_mpyu_lh_s0, // llvm.hexagon.M2.mpyu.lh.s0
hexagon_M2_mpyu_lh_s1, // llvm.hexagon.M2.mpyu.lh.s1
hexagon_M2_mpyu_ll_s0, // llvm.hexagon.M2.mpyu.ll.s0
hexagon_M2_mpyu_ll_s1, // llvm.hexagon.M2.mpyu.ll.s1
hexagon_M2_mpyu_nac_hh_s0, // llvm.hexagon.M2.mpyu.nac.hh.s0
hexagon_M2_mpyu_nac_hh_s1, // llvm.hexagon.M2.mpyu.nac.hh.s1
hexagon_M2_mpyu_nac_hl_s0, // llvm.hexagon.M2.mpyu.nac.hl.s0
hexagon_M2_mpyu_nac_hl_s1, // llvm.hexagon.M2.mpyu.nac.hl.s1
hexagon_M2_mpyu_nac_lh_s0, // llvm.hexagon.M2.mpyu.nac.lh.s0
hexagon_M2_mpyu_nac_lh_s1, // llvm.hexagon.M2.mpyu.nac.lh.s1
hexagon_M2_mpyu_nac_ll_s0, // llvm.hexagon.M2.mpyu.nac.ll.s0
hexagon_M2_mpyu_nac_ll_s1, // llvm.hexagon.M2.mpyu.nac.ll.s1
hexagon_M2_mpyu_up, // llvm.hexagon.M2.mpyu.up
hexagon_M2_mpyud_acc_hh_s0, // llvm.hexagon.M2.mpyud.acc.hh.s0
hexagon_M2_mpyud_acc_hh_s1, // llvm.hexagon.M2.mpyud.acc.hh.s1
hexagon_M2_mpyud_acc_hl_s0, // llvm.hexagon.M2.mpyud.acc.hl.s0
hexagon_M2_mpyud_acc_hl_s1, // llvm.hexagon.M2.mpyud.acc.hl.s1
hexagon_M2_mpyud_acc_lh_s0, // llvm.hexagon.M2.mpyud.acc.lh.s0
hexagon_M2_mpyud_acc_lh_s1, // llvm.hexagon.M2.mpyud.acc.lh.s1
hexagon_M2_mpyud_acc_ll_s0, // llvm.hexagon.M2.mpyud.acc.ll.s0
hexagon_M2_mpyud_acc_ll_s1, // llvm.hexagon.M2.mpyud.acc.ll.s1
hexagon_M2_mpyud_hh_s0, // llvm.hexagon.M2.mpyud.hh.s0
hexagon_M2_mpyud_hh_s1, // llvm.hexagon.M2.mpyud.hh.s1
hexagon_M2_mpyud_hl_s0, // llvm.hexagon.M2.mpyud.hl.s0
hexagon_M2_mpyud_hl_s1, // llvm.hexagon.M2.mpyud.hl.s1
hexagon_M2_mpyud_lh_s0, // llvm.hexagon.M2.mpyud.lh.s0
hexagon_M2_mpyud_lh_s1, // llvm.hexagon.M2.mpyud.lh.s1
hexagon_M2_mpyud_ll_s0, // llvm.hexagon.M2.mpyud.ll.s0
hexagon_M2_mpyud_ll_s1, // llvm.hexagon.M2.mpyud.ll.s1
hexagon_M2_mpyud_nac_hh_s0, // llvm.hexagon.M2.mpyud.nac.hh.s0
hexagon_M2_mpyud_nac_hh_s1, // llvm.hexagon.M2.mpyud.nac.hh.s1
hexagon_M2_mpyud_nac_hl_s0, // llvm.hexagon.M2.mpyud.nac.hl.s0
hexagon_M2_mpyud_nac_hl_s1, // llvm.hexagon.M2.mpyud.nac.hl.s1
hexagon_M2_mpyud_nac_lh_s0, // llvm.hexagon.M2.mpyud.nac.lh.s0
hexagon_M2_mpyud_nac_lh_s1, // llvm.hexagon.M2.mpyud.nac.lh.s1
hexagon_M2_mpyud_nac_ll_s0, // llvm.hexagon.M2.mpyud.nac.ll.s0
hexagon_M2_mpyud_nac_ll_s1, // llvm.hexagon.M2.mpyud.nac.ll.s1
hexagon_M2_mpyui, // llvm.hexagon.M2.mpyui
hexagon_M2_nacci, // llvm.hexagon.M2.nacci
hexagon_M2_naccii, // llvm.hexagon.M2.naccii
hexagon_M2_subacc, // llvm.hexagon.M2.subacc
hexagon_M2_vabsdiffh, // llvm.hexagon.M2.vabsdiffh
hexagon_M2_vabsdiffw, // llvm.hexagon.M2.vabsdiffw
hexagon_M2_vcmac_s0_sat_i, // llvm.hexagon.M2.vcmac.s0.sat.i
hexagon_M2_vcmac_s0_sat_r, // llvm.hexagon.M2.vcmac.s0.sat.r
hexagon_M2_vcmpy_s0_sat_i, // llvm.hexagon.M2.vcmpy.s0.sat.i
hexagon_M2_vcmpy_s0_sat_r, // llvm.hexagon.M2.vcmpy.s0.sat.r
hexagon_M2_vcmpy_s1_sat_i, // llvm.hexagon.M2.vcmpy.s1.sat.i
hexagon_M2_vcmpy_s1_sat_r, // llvm.hexagon.M2.vcmpy.s1.sat.r
hexagon_M2_vdmacs_s0, // llvm.hexagon.M2.vdmacs.s0
hexagon_M2_vdmacs_s1, // llvm.hexagon.M2.vdmacs.s1
hexagon_M2_vdmpyrs_s0, // llvm.hexagon.M2.vdmpyrs.s0
hexagon_M2_vdmpyrs_s1, // llvm.hexagon.M2.vdmpyrs.s1
hexagon_M2_vdmpys_s0, // llvm.hexagon.M2.vdmpys.s0
hexagon_M2_vdmpys_s1, // llvm.hexagon.M2.vdmpys.s1
hexagon_M2_vmac2, // llvm.hexagon.M2.vmac2
hexagon_M2_vmac2es, // llvm.hexagon.M2.vmac2es
hexagon_M2_vmac2es_s0, // llvm.hexagon.M2.vmac2es.s0
hexagon_M2_vmac2es_s1, // llvm.hexagon.M2.vmac2es.s1
hexagon_M2_vmac2s_s0, // llvm.hexagon.M2.vmac2s.s0
hexagon_M2_vmac2s_s1, // llvm.hexagon.M2.vmac2s.s1
hexagon_M2_vmpy2es_s0, // llvm.hexagon.M2.vmpy2es.s0
hexagon_M2_vmpy2es_s1, // llvm.hexagon.M2.vmpy2es.s1
hexagon_M2_vmpy2s_s0, // llvm.hexagon.M2.vmpy2s.s0
hexagon_M2_vmpy2s_s0pack, // llvm.hexagon.M2.vmpy2s.s0pack
hexagon_M2_vmpy2s_s1, // llvm.hexagon.M2.vmpy2s.s1
hexagon_M2_vmpy2s_s1pack, // llvm.hexagon.M2.vmpy2s.s1pack
hexagon_M2_vradduh, // llvm.hexagon.M2.vradduh
hexagon_M2_vrcmaci_s0, // llvm.hexagon.M2.vrcmaci.s0
hexagon_M2_vrcmaci_s0c, // llvm.hexagon.M2.vrcmaci.s0c
hexagon_M2_vrcmacr_s0, // llvm.hexagon.M2.vrcmacr.s0
hexagon_M2_vrcmacr_s0c, // llvm.hexagon.M2.vrcmacr.s0c
hexagon_M2_vrcmpyi_s0, // llvm.hexagon.M2.vrcmpyi.s0
hexagon_M2_vrcmpyi_s0c, // llvm.hexagon.M2.vrcmpyi.s0c
hexagon_M2_vrcmpyr_s0, // llvm.hexagon.M2.vrcmpyr.s0
hexagon_M2_vrcmpyr_s0c, // llvm.hexagon.M2.vrcmpyr.s0c
hexagon_M2_vrcmpys_acc_s1, // llvm.hexagon.M2.vrcmpys.acc.s1
hexagon_M2_vrcmpys_s1, // llvm.hexagon.M2.vrcmpys.s1
hexagon_M2_vrcmpys_s1rp, // llvm.hexagon.M2.vrcmpys.s1rp
hexagon_M2_vrmac_s0, // llvm.hexagon.M2.vrmac.s0
hexagon_M2_vrmpy_s0, // llvm.hexagon.M2.vrmpy.s0
hexagon_M2_xor_xacc, // llvm.hexagon.M2.xor.xacc
hexagon_M4_and_and, // llvm.hexagon.M4.and.and
hexagon_M4_and_andn, // llvm.hexagon.M4.and.andn
hexagon_M4_and_or, // llvm.hexagon.M4.and.or
hexagon_M4_and_xor, // llvm.hexagon.M4.and.xor
hexagon_M4_or_and, // llvm.hexagon.M4.or.and
hexagon_M4_or_andn, // llvm.hexagon.M4.or.andn
hexagon_M4_or_or, // llvm.hexagon.M4.or.or
hexagon_M4_or_xor, // llvm.hexagon.M4.or.xor
hexagon_M4_xor_and, // llvm.hexagon.M4.xor.and
hexagon_M4_xor_andn, // llvm.hexagon.M4.xor.andn
hexagon_M4_xor_or, // llvm.hexagon.M4.xor.or
hexagon_M4_xor_xacc, // llvm.hexagon.M4.xor.xacc
hexagon_S2_addasl_rrri, // llvm.hexagon.S2.addasl.rrri
hexagon_S2_asl_i_p, // llvm.hexagon.S2.asl.i.p
hexagon_S2_asl_i_p_acc, // llvm.hexagon.S2.asl.i.p.acc
hexagon_S2_asl_i_p_and, // llvm.hexagon.S2.asl.i.p.and
hexagon_S2_asl_i_p_nac, // llvm.hexagon.S2.asl.i.p.nac
hexagon_S2_asl_i_p_or, // llvm.hexagon.S2.asl.i.p.or
hexagon_S2_asl_i_p_xacc, // llvm.hexagon.S2.asl.i.p.xacc
hexagon_S2_asl_i_r, // llvm.hexagon.S2.asl.i.r
hexagon_S2_asl_i_r_acc, // llvm.hexagon.S2.asl.i.r.acc
hexagon_S2_asl_i_r_and, // llvm.hexagon.S2.asl.i.r.and
hexagon_S2_asl_i_r_nac, // llvm.hexagon.S2.asl.i.r.nac
hexagon_S2_asl_i_r_or, // llvm.hexagon.S2.asl.i.r.or
hexagon_S2_asl_i_r_sat, // llvm.hexagon.S2.asl.i.r.sat
hexagon_S2_asl_i_r_xacc, // llvm.hexagon.S2.asl.i.r.xacc
hexagon_S2_asl_i_vh, // llvm.hexagon.S2.asl.i.vh
hexagon_S2_asl_i_vw, // llvm.hexagon.S2.asl.i.vw
hexagon_S2_asl_r_p, // llvm.hexagon.S2.asl.r.p
hexagon_S2_asl_r_p_acc, // llvm.hexagon.S2.asl.r.p.acc
hexagon_S2_asl_r_p_and, // llvm.hexagon.S2.asl.r.p.and
hexagon_S2_asl_r_p_nac, // llvm.hexagon.S2.asl.r.p.nac
hexagon_S2_asl_r_p_or, // llvm.hexagon.S2.asl.r.p.or
hexagon_S2_asl_r_r, // llvm.hexagon.S2.asl.r.r
hexagon_S2_asl_r_r_acc, // llvm.hexagon.S2.asl.r.r.acc
hexagon_S2_asl_r_r_and, // llvm.hexagon.S2.asl.r.r.and
hexagon_S2_asl_r_r_nac, // llvm.hexagon.S2.asl.r.r.nac
hexagon_S2_asl_r_r_or, // llvm.hexagon.S2.asl.r.r.or
hexagon_S2_asl_r_r_sat, // llvm.hexagon.S2.asl.r.r.sat
hexagon_S2_asl_r_vh, // llvm.hexagon.S2.asl.r.vh
hexagon_S2_asl_r_vw, // llvm.hexagon.S2.asl.r.vw
hexagon_S2_asr_i_p, // llvm.hexagon.S2.asr.i.p
hexagon_S2_asr_i_p_acc, // llvm.hexagon.S2.asr.i.p.acc
hexagon_S2_asr_i_p_and, // llvm.hexagon.S2.asr.i.p.and
hexagon_S2_asr_i_p_nac, // llvm.hexagon.S2.asr.i.p.nac
hexagon_S2_asr_i_p_or, // llvm.hexagon.S2.asr.i.p.or
hexagon_S2_asr_i_r, // llvm.hexagon.S2.asr.i.r
hexagon_S2_asr_i_r_acc, // llvm.hexagon.S2.asr.i.r.acc
hexagon_S2_asr_i_r_and, // llvm.hexagon.S2.asr.i.r.and
hexagon_S2_asr_i_r_nac, // llvm.hexagon.S2.asr.i.r.nac
hexagon_S2_asr_i_r_or, // llvm.hexagon.S2.asr.i.r.or
hexagon_S2_asr_i_r_rnd, // llvm.hexagon.S2.asr.i.r.rnd
hexagon_S2_asr_i_r_rnd_goodsyntax, // llvm.hexagon.S2.asr.i.r.rnd.goodsyntax
hexagon_S2_asr_i_svw_trun, // llvm.hexagon.S2.asr.i.svw.trun
hexagon_S2_asr_i_vh, // llvm.hexagon.S2.asr.i.vh
hexagon_S2_asr_i_vw, // llvm.hexagon.S2.asr.i.vw
hexagon_S2_asr_r_p, // llvm.hexagon.S2.asr.r.p
hexagon_S2_asr_r_p_acc, // llvm.hexagon.S2.asr.r.p.acc
hexagon_S2_asr_r_p_and, // llvm.hexagon.S2.asr.r.p.and
hexagon_S2_asr_r_p_nac, // llvm.hexagon.S2.asr.r.p.nac
hexagon_S2_asr_r_p_or, // llvm.hexagon.S2.asr.r.p.or
hexagon_S2_asr_r_r, // llvm.hexagon.S2.asr.r.r
hexagon_S2_asr_r_r_acc, // llvm.hexagon.S2.asr.r.r.acc
hexagon_S2_asr_r_r_and, // llvm.hexagon.S2.asr.r.r.and
hexagon_S2_asr_r_r_nac, // llvm.hexagon.S2.asr.r.r.nac
hexagon_S2_asr_r_r_or, // llvm.hexagon.S2.asr.r.r.or
hexagon_S2_asr_r_r_sat, // llvm.hexagon.S2.asr.r.r.sat
hexagon_S2_asr_r_svw_trun, // llvm.hexagon.S2.asr.r.svw.trun
hexagon_S2_asr_r_vh, // llvm.hexagon.S2.asr.r.vh
hexagon_S2_asr_r_vw, // llvm.hexagon.S2.asr.r.vw
hexagon_S2_brev, // llvm.hexagon.S2.brev
hexagon_S2_cl0, // llvm.hexagon.S2.cl0
hexagon_S2_cl0p, // llvm.hexagon.S2.cl0p
hexagon_S2_cl1, // llvm.hexagon.S2.cl1
hexagon_S2_cl1p, // llvm.hexagon.S2.cl1p
hexagon_S2_clb, // llvm.hexagon.S2.clb
hexagon_S2_clbnorm, // llvm.hexagon.S2.clbnorm
hexagon_S2_clbp, // llvm.hexagon.S2.clbp
hexagon_S2_clrbit_i, // llvm.hexagon.S2.clrbit.i
hexagon_S2_clrbit_r, // llvm.hexagon.S2.clrbit.r
hexagon_S2_ct0, // llvm.hexagon.S2.ct0
hexagon_S2_ct1, // llvm.hexagon.S2.ct1
hexagon_S2_deinterleave, // llvm.hexagon.S2.deinterleave
hexagon_S2_extractu, // llvm.hexagon.S2.extractu
hexagon_S2_extractu_rp, // llvm.hexagon.S2.extractu.rp
hexagon_S2_extractup, // llvm.hexagon.S2.extractup
hexagon_S2_extractup_rp, // llvm.hexagon.S2.extractup.rp
hexagon_S2_insert, // llvm.hexagon.S2.insert
hexagon_S2_insert_rp, // llvm.hexagon.S2.insert.rp
hexagon_S2_insertp, // llvm.hexagon.S2.insertp
hexagon_S2_insertp_rp, // llvm.hexagon.S2.insertp.rp
hexagon_S2_interleave, // llvm.hexagon.S2.interleave
hexagon_S2_lfsp, // llvm.hexagon.S2.lfsp
hexagon_S2_lsl_r_p, // llvm.hexagon.S2.lsl.r.p
hexagon_S2_lsl_r_p_acc, // llvm.hexagon.S2.lsl.r.p.acc
hexagon_S2_lsl_r_p_and, // llvm.hexagon.S2.lsl.r.p.and
hexagon_S2_lsl_r_p_nac, // llvm.hexagon.S2.lsl.r.p.nac
hexagon_S2_lsl_r_p_or, // llvm.hexagon.S2.lsl.r.p.or
hexagon_S2_lsl_r_r, // llvm.hexagon.S2.lsl.r.r
hexagon_S2_lsl_r_r_acc, // llvm.hexagon.S2.lsl.r.r.acc
hexagon_S2_lsl_r_r_and, // llvm.hexagon.S2.lsl.r.r.and
hexagon_S2_lsl_r_r_nac, // llvm.hexagon.S2.lsl.r.r.nac
hexagon_S2_lsl_r_r_or, // llvm.hexagon.S2.lsl.r.r.or
hexagon_S2_lsl_r_vh, // llvm.hexagon.S2.lsl.r.vh
hexagon_S2_lsl_r_vw, // llvm.hexagon.S2.lsl.r.vw
hexagon_S2_lsr_i_p, // llvm.hexagon.S2.lsr.i.p
hexagon_S2_lsr_i_p_acc, // llvm.hexagon.S2.lsr.i.p.acc
hexagon_S2_lsr_i_p_and, // llvm.hexagon.S2.lsr.i.p.and
hexagon_S2_lsr_i_p_nac, // llvm.hexagon.S2.lsr.i.p.nac
hexagon_S2_lsr_i_p_or, // llvm.hexagon.S2.lsr.i.p.or
hexagon_S2_lsr_i_p_xacc, // llvm.hexagon.S2.lsr.i.p.xacc
hexagon_S2_lsr_i_r, // llvm.hexagon.S2.lsr.i.r
hexagon_S2_lsr_i_r_acc, // llvm.hexagon.S2.lsr.i.r.acc
hexagon_S2_lsr_i_r_and, // llvm.hexagon.S2.lsr.i.r.and
hexagon_S2_lsr_i_r_nac, // llvm.hexagon.S2.lsr.i.r.nac
hexagon_S2_lsr_i_r_or, // llvm.hexagon.S2.lsr.i.r.or
hexagon_S2_lsr_i_r_xacc, // llvm.hexagon.S2.lsr.i.r.xacc
hexagon_S2_lsr_i_vh, // llvm.hexagon.S2.lsr.i.vh
hexagon_S2_lsr_i_vw, // llvm.hexagon.S2.lsr.i.vw
hexagon_S2_lsr_r_p, // llvm.hexagon.S2.lsr.r.p
hexagon_S2_lsr_r_p_acc, // llvm.hexagon.S2.lsr.r.p.acc
hexagon_S2_lsr_r_p_and, // llvm.hexagon.S2.lsr.r.p.and
hexagon_S2_lsr_r_p_nac, // llvm.hexagon.S2.lsr.r.p.nac
hexagon_S2_lsr_r_p_or, // llvm.hexagon.S2.lsr.r.p.or
hexagon_S2_lsr_r_r, // llvm.hexagon.S2.lsr.r.r
hexagon_S2_lsr_r_r_acc, // llvm.hexagon.S2.lsr.r.r.acc
hexagon_S2_lsr_r_r_and, // llvm.hexagon.S2.lsr.r.r.and
hexagon_S2_lsr_r_r_nac, // llvm.hexagon.S2.lsr.r.r.nac
hexagon_S2_lsr_r_r_or, // llvm.hexagon.S2.lsr.r.r.or
hexagon_S2_lsr_r_vh, // llvm.hexagon.S2.lsr.r.vh
hexagon_S2_lsr_r_vw, // llvm.hexagon.S2.lsr.r.vw
hexagon_S2_packhl, // llvm.hexagon.S2.packhl
hexagon_S2_parityp, // llvm.hexagon.S2.parityp
hexagon_S2_setbit_i, // llvm.hexagon.S2.setbit.i
hexagon_S2_setbit_r, // llvm.hexagon.S2.setbit.r
hexagon_S2_shuffeb, // llvm.hexagon.S2.shuffeb
hexagon_S2_shuffeh, // llvm.hexagon.S2.shuffeh
hexagon_S2_shuffob, // llvm.hexagon.S2.shuffob
hexagon_S2_shuffoh, // llvm.hexagon.S2.shuffoh
hexagon_S2_svsathb, // llvm.hexagon.S2.svsathb
hexagon_S2_svsathub, // llvm.hexagon.S2.svsathub
hexagon_S2_tableidxb_goodsyntax, // llvm.hexagon.S2.tableidxb.goodsyntax
hexagon_S2_tableidxd_goodsyntax, // llvm.hexagon.S2.tableidxd.goodsyntax
hexagon_S2_tableidxh_goodsyntax, // llvm.hexagon.S2.tableidxh.goodsyntax
hexagon_S2_tableidxw_goodsyntax, // llvm.hexagon.S2.tableidxw.goodsyntax
hexagon_S2_togglebit_i, // llvm.hexagon.S2.togglebit.i
hexagon_S2_togglebit_r, // llvm.hexagon.S2.togglebit.r
hexagon_S2_tstbit_i, // llvm.hexagon.S2.tstbit.i
hexagon_S2_tstbit_r, // llvm.hexagon.S2.tstbit.r
hexagon_S2_valignib, // llvm.hexagon.S2.valignib
hexagon_S2_valignrb, // llvm.hexagon.S2.valignrb
hexagon_S2_vcrotate, // llvm.hexagon.S2.vcrotate
hexagon_S2_vrndpackwh, // llvm.hexagon.S2.vrndpackwh
hexagon_S2_vrndpackwhs, // llvm.hexagon.S2.vrndpackwhs
hexagon_S2_vsathb, // llvm.hexagon.S2.vsathb
hexagon_S2_vsathb_nopack, // llvm.hexagon.S2.vsathb.nopack
hexagon_S2_vsathub, // llvm.hexagon.S2.vsathub
hexagon_S2_vsathub_nopack, // llvm.hexagon.S2.vsathub.nopack
hexagon_S2_vsatwh, // llvm.hexagon.S2.vsatwh
hexagon_S2_vsatwh_nopack, // llvm.hexagon.S2.vsatwh.nopack
hexagon_S2_vsatwuh, // llvm.hexagon.S2.vsatwuh
hexagon_S2_vsatwuh_nopack, // llvm.hexagon.S2.vsatwuh.nopack
hexagon_S2_vsplatrb, // llvm.hexagon.S2.vsplatrb
hexagon_S2_vsplatrh, // llvm.hexagon.S2.vsplatrh
hexagon_S2_vspliceib, // llvm.hexagon.S2.vspliceib
hexagon_S2_vsplicerb, // llvm.hexagon.S2.vsplicerb
hexagon_S2_vsxtbh, // llvm.hexagon.S2.vsxtbh
hexagon_S2_vsxthw, // llvm.hexagon.S2.vsxthw
hexagon_S2_vtrunehb, // llvm.hexagon.S2.vtrunehb
hexagon_S2_vtrunewh, // llvm.hexagon.S2.vtrunewh
hexagon_S2_vtrunohb, // llvm.hexagon.S2.vtrunohb
hexagon_S2_vtrunowh, // llvm.hexagon.S2.vtrunowh
hexagon_S2_vzxtbh, // llvm.hexagon.S2.vzxtbh
hexagon_S2_vzxthw, // llvm.hexagon.S2.vzxthw
hexagon_S4_addaddi, // llvm.hexagon.S4.addaddi
hexagon_S4_andnp, // llvm.hexagon.S4.andnp
hexagon_S4_or_andi, // llvm.hexagon.S4.or.andi
hexagon_S4_or_andix, // llvm.hexagon.S4.or.andix
hexagon_S4_or_ori, // llvm.hexagon.S4.or.ori
hexagon_S4_ornp, // llvm.hexagon.S4.ornp
hexagon_S4_subaddi, // llvm.hexagon.S4.subaddi
hexagon_SI_to_SXTHI_asrh, // llvm.hexagon.SI.to.SXTHI.asrh
init_trampoline, // llvm.init.trampoline
invariant_end, // llvm.invariant.end
invariant_start, // llvm.invariant.start
lifetime_end, // llvm.lifetime.end
lifetime_start, // llvm.lifetime.start
log, // llvm.log
log10, // llvm.log10
log2, // llvm.log2
longjmp, // llvm.longjmp
memcpy, // llvm.memcpy
memmove, // llvm.memmove
memset, // llvm.memset
objectsize, // llvm.objectsize
pcmarker, // llvm.pcmarker
pow, // llvm.pow
powi, // llvm.powi
ppc_altivec_dss, // llvm.ppc.altivec.dss
ppc_altivec_dssall, // llvm.ppc.altivec.dssall
ppc_altivec_dst, // llvm.ppc.altivec.dst
ppc_altivec_dstst, // llvm.ppc.altivec.dstst
ppc_altivec_dststt, // llvm.ppc.altivec.dststt
ppc_altivec_dstt, // llvm.ppc.altivec.dstt
ppc_altivec_lvebx, // llvm.ppc.altivec.lvebx
ppc_altivec_lvehx, // llvm.ppc.altivec.lvehx
ppc_altivec_lvewx, // llvm.ppc.altivec.lvewx
ppc_altivec_lvsl, // llvm.ppc.altivec.lvsl
ppc_altivec_lvsr, // llvm.ppc.altivec.lvsr
ppc_altivec_lvx, // llvm.ppc.altivec.lvx
ppc_altivec_lvxl, // llvm.ppc.altivec.lvxl
ppc_altivec_mfvscr, // llvm.ppc.altivec.mfvscr
ppc_altivec_mtvscr, // llvm.ppc.altivec.mtvscr
ppc_altivec_stvebx, // llvm.ppc.altivec.stvebx
ppc_altivec_stvehx, // llvm.ppc.altivec.stvehx
ppc_altivec_stvewx, // llvm.ppc.altivec.stvewx
ppc_altivec_stvx, // llvm.ppc.altivec.stvx
ppc_altivec_stvxl, // llvm.ppc.altivec.stvxl
ppc_altivec_vaddcuw, // llvm.ppc.altivec.vaddcuw
ppc_altivec_vaddsbs, // llvm.ppc.altivec.vaddsbs
ppc_altivec_vaddshs, // llvm.ppc.altivec.vaddshs
ppc_altivec_vaddsws, // llvm.ppc.altivec.vaddsws
ppc_altivec_vaddubs, // llvm.ppc.altivec.vaddubs
ppc_altivec_vadduhs, // llvm.ppc.altivec.vadduhs
ppc_altivec_vadduws, // llvm.ppc.altivec.vadduws
ppc_altivec_vavgsb, // llvm.ppc.altivec.vavgsb
ppc_altivec_vavgsh, // llvm.ppc.altivec.vavgsh
ppc_altivec_vavgsw, // llvm.ppc.altivec.vavgsw
ppc_altivec_vavgub, // llvm.ppc.altivec.vavgub
ppc_altivec_vavguh, // llvm.ppc.altivec.vavguh
ppc_altivec_vavguw, // llvm.ppc.altivec.vavguw
ppc_altivec_vcfsx, // llvm.ppc.altivec.vcfsx
ppc_altivec_vcfux, // llvm.ppc.altivec.vcfux
ppc_altivec_vcmpbfp, // llvm.ppc.altivec.vcmpbfp
ppc_altivec_vcmpbfp_p, // llvm.ppc.altivec.vcmpbfp.p
ppc_altivec_vcmpeqfp, // llvm.ppc.altivec.vcmpeqfp
ppc_altivec_vcmpeqfp_p, // llvm.ppc.altivec.vcmpeqfp.p
ppc_altivec_vcmpequb, // llvm.ppc.altivec.vcmpequb
ppc_altivec_vcmpequb_p, // llvm.ppc.altivec.vcmpequb.p
ppc_altivec_vcmpequh, // llvm.ppc.altivec.vcmpequh
ppc_altivec_vcmpequh_p, // llvm.ppc.altivec.vcmpequh.p
ppc_altivec_vcmpequw, // llvm.ppc.altivec.vcmpequw
ppc_altivec_vcmpequw_p, // llvm.ppc.altivec.vcmpequw.p
ppc_altivec_vcmpgefp, // llvm.ppc.altivec.vcmpgefp
ppc_altivec_vcmpgefp_p, // llvm.ppc.altivec.vcmpgefp.p
ppc_altivec_vcmpgtfp, // llvm.ppc.altivec.vcmpgtfp
ppc_altivec_vcmpgtfp_p, // llvm.ppc.altivec.vcmpgtfp.p
ppc_altivec_vcmpgtsb, // llvm.ppc.altivec.vcmpgtsb
ppc_altivec_vcmpgtsb_p, // llvm.ppc.altivec.vcmpgtsb.p
ppc_altivec_vcmpgtsh, // llvm.ppc.altivec.vcmpgtsh
ppc_altivec_vcmpgtsh_p, // llvm.ppc.altivec.vcmpgtsh.p
ppc_altivec_vcmpgtsw, // llvm.ppc.altivec.vcmpgtsw
ppc_altivec_vcmpgtsw_p, // llvm.ppc.altivec.vcmpgtsw.p
ppc_altivec_vcmpgtub, // llvm.ppc.altivec.vcmpgtub
ppc_altivec_vcmpgtub_p, // llvm.ppc.altivec.vcmpgtub.p
ppc_altivec_vcmpgtuh, // llvm.ppc.altivec.vcmpgtuh
ppc_altivec_vcmpgtuh_p, // llvm.ppc.altivec.vcmpgtuh.p
ppc_altivec_vcmpgtuw, // llvm.ppc.altivec.vcmpgtuw
ppc_altivec_vcmpgtuw_p, // llvm.ppc.altivec.vcmpgtuw.p
ppc_altivec_vctsxs, // llvm.ppc.altivec.vctsxs
ppc_altivec_vctuxs, // llvm.ppc.altivec.vctuxs
ppc_altivec_vexptefp, // llvm.ppc.altivec.vexptefp
ppc_altivec_vlogefp, // llvm.ppc.altivec.vlogefp
ppc_altivec_vmaddfp, // llvm.ppc.altivec.vmaddfp
ppc_altivec_vmaxfp, // llvm.ppc.altivec.vmaxfp
ppc_altivec_vmaxsb, // llvm.ppc.altivec.vmaxsb
ppc_altivec_vmaxsh, // llvm.ppc.altivec.vmaxsh
ppc_altivec_vmaxsw, // llvm.ppc.altivec.vmaxsw
ppc_altivec_vmaxub, // llvm.ppc.altivec.vmaxub
ppc_altivec_vmaxuh, // llvm.ppc.altivec.vmaxuh
ppc_altivec_vmaxuw, // llvm.ppc.altivec.vmaxuw
ppc_altivec_vmhaddshs, // llvm.ppc.altivec.vmhaddshs
ppc_altivec_vmhraddshs, // llvm.ppc.altivec.vmhraddshs
ppc_altivec_vminfp, // llvm.ppc.altivec.vminfp
ppc_altivec_vminsb, // llvm.ppc.altivec.vminsb
ppc_altivec_vminsh, // llvm.ppc.altivec.vminsh
ppc_altivec_vminsw, // llvm.ppc.altivec.vminsw
ppc_altivec_vminub, // llvm.ppc.altivec.vminub
ppc_altivec_vminuh, // llvm.ppc.altivec.vminuh
ppc_altivec_vminuw, // llvm.ppc.altivec.vminuw
ppc_altivec_vmladduhm, // llvm.ppc.altivec.vmladduhm
ppc_altivec_vmsummbm, // llvm.ppc.altivec.vmsummbm
ppc_altivec_vmsumshm, // llvm.ppc.altivec.vmsumshm
ppc_altivec_vmsumshs, // llvm.ppc.altivec.vmsumshs
ppc_altivec_vmsumubm, // llvm.ppc.altivec.vmsumubm
ppc_altivec_vmsumuhm, // llvm.ppc.altivec.vmsumuhm
ppc_altivec_vmsumuhs, // llvm.ppc.altivec.vmsumuhs
ppc_altivec_vmulesb, // llvm.ppc.altivec.vmulesb
ppc_altivec_vmulesh, // llvm.ppc.altivec.vmulesh
ppc_altivec_vmuleub, // llvm.ppc.altivec.vmuleub
ppc_altivec_vmuleuh, // llvm.ppc.altivec.vmuleuh
ppc_altivec_vmulosb, // llvm.ppc.altivec.vmulosb
ppc_altivec_vmulosh, // llvm.ppc.altivec.vmulosh
ppc_altivec_vmuloub, // llvm.ppc.altivec.vmuloub
ppc_altivec_vmulouh, // llvm.ppc.altivec.vmulouh
ppc_altivec_vnmsubfp, // llvm.ppc.altivec.vnmsubfp
ppc_altivec_vperm, // llvm.ppc.altivec.vperm
ppc_altivec_vpkpx, // llvm.ppc.altivec.vpkpx
ppc_altivec_vpkshss, // llvm.ppc.altivec.vpkshss
ppc_altivec_vpkshus, // llvm.ppc.altivec.vpkshus
ppc_altivec_vpkswss, // llvm.ppc.altivec.vpkswss
ppc_altivec_vpkswus, // llvm.ppc.altivec.vpkswus
ppc_altivec_vpkuhus, // llvm.ppc.altivec.vpkuhus
ppc_altivec_vpkuwus, // llvm.ppc.altivec.vpkuwus
ppc_altivec_vrefp, // llvm.ppc.altivec.vrefp
ppc_altivec_vrfim, // llvm.ppc.altivec.vrfim
ppc_altivec_vrfin, // llvm.ppc.altivec.vrfin
ppc_altivec_vrfip, // llvm.ppc.altivec.vrfip
ppc_altivec_vrfiz, // llvm.ppc.altivec.vrfiz
ppc_altivec_vrlb, // llvm.ppc.altivec.vrlb
ppc_altivec_vrlh, // llvm.ppc.altivec.vrlh
ppc_altivec_vrlw, // llvm.ppc.altivec.vrlw
ppc_altivec_vrsqrtefp, // llvm.ppc.altivec.vrsqrtefp
ppc_altivec_vsel, // llvm.ppc.altivec.vsel
ppc_altivec_vsl, // llvm.ppc.altivec.vsl
ppc_altivec_vslb, // llvm.ppc.altivec.vslb
ppc_altivec_vslh, // llvm.ppc.altivec.vslh
ppc_altivec_vslo, // llvm.ppc.altivec.vslo
ppc_altivec_vslw, // llvm.ppc.altivec.vslw
ppc_altivec_vsr, // llvm.ppc.altivec.vsr
ppc_altivec_vsrab, // llvm.ppc.altivec.vsrab
ppc_altivec_vsrah, // llvm.ppc.altivec.vsrah
ppc_altivec_vsraw, // llvm.ppc.altivec.vsraw
ppc_altivec_vsrb, // llvm.ppc.altivec.vsrb
ppc_altivec_vsrh, // llvm.ppc.altivec.vsrh
ppc_altivec_vsro, // llvm.ppc.altivec.vsro
ppc_altivec_vsrw, // llvm.ppc.altivec.vsrw
ppc_altivec_vsubcuw, // llvm.ppc.altivec.vsubcuw
ppc_altivec_vsubsbs, // llvm.ppc.altivec.vsubsbs
ppc_altivec_vsubshs, // llvm.ppc.altivec.vsubshs
ppc_altivec_vsubsws, // llvm.ppc.altivec.vsubsws
ppc_altivec_vsububs, // llvm.ppc.altivec.vsububs
ppc_altivec_vsubuhs, // llvm.ppc.altivec.vsubuhs
ppc_altivec_vsubuws, // llvm.ppc.altivec.vsubuws
ppc_altivec_vsum2sws, // llvm.ppc.altivec.vsum2sws
ppc_altivec_vsum4sbs, // llvm.ppc.altivec.vsum4sbs
ppc_altivec_vsum4shs, // llvm.ppc.altivec.vsum4shs
ppc_altivec_vsum4ubs, // llvm.ppc.altivec.vsum4ubs
ppc_altivec_vsumsws, // llvm.ppc.altivec.vsumsws
ppc_altivec_vupkhpx, // llvm.ppc.altivec.vupkhpx
ppc_altivec_vupkhsb, // llvm.ppc.altivec.vupkhsb
ppc_altivec_vupkhsh, // llvm.ppc.altivec.vupkhsh
ppc_altivec_vupklpx, // llvm.ppc.altivec.vupklpx
ppc_altivec_vupklsb, // llvm.ppc.altivec.vupklsb
ppc_altivec_vupklsh, // llvm.ppc.altivec.vupklsh
ppc_dcba, // llvm.ppc.dcba
ppc_dcbf, // llvm.ppc.dcbf
ppc_dcbi, // llvm.ppc.dcbi
ppc_dcbst, // llvm.ppc.dcbst
ppc_dcbt, // llvm.ppc.dcbt
ppc_dcbtst, // llvm.ppc.dcbtst
ppc_dcbz, // llvm.ppc.dcbz
ppc_dcbzl, // llvm.ppc.dcbzl
ppc_sync, // llvm.ppc.sync
prefetch, // llvm.prefetch
ptr_annotation, // llvm.ptr.annotation
ptx_bar_sync, // llvm.ptx.bar.sync
ptx_read_clock, // llvm.ptx.read.clock
ptx_read_clock64, // llvm.ptx.read.clock64
ptx_read_ctaid_w, // llvm.ptx.read.ctaid.w
ptx_read_ctaid_x, // llvm.ptx.read.ctaid.x
ptx_read_ctaid_y, // llvm.ptx.read.ctaid.y
ptx_read_ctaid_z, // llvm.ptx.read.ctaid.z
ptx_read_gridid, // llvm.ptx.read.gridid
ptx_read_laneid, // llvm.ptx.read.laneid
ptx_read_lanemask_eq, // llvm.ptx.read.lanemask.eq
ptx_read_lanemask_ge, // llvm.ptx.read.lanemask.ge
ptx_read_lanemask_gt, // llvm.ptx.read.lanemask.gt
ptx_read_lanemask_le, // llvm.ptx.read.lanemask.le
ptx_read_lanemask_lt, // llvm.ptx.read.lanemask.lt
ptx_read_nctaid_w, // llvm.ptx.read.nctaid.w
ptx_read_nctaid_x, // llvm.ptx.read.nctaid.x
ptx_read_nctaid_y, // llvm.ptx.read.nctaid.y
ptx_read_nctaid_z, // llvm.ptx.read.nctaid.z
ptx_read_nsmid, // llvm.ptx.read.nsmid
ptx_read_ntid_w, // llvm.ptx.read.ntid.w
ptx_read_ntid_x, // llvm.ptx.read.ntid.x
ptx_read_ntid_y, // llvm.ptx.read.ntid.y
ptx_read_ntid_z, // llvm.ptx.read.ntid.z
ptx_read_nwarpid, // llvm.ptx.read.nwarpid
ptx_read_pm0, // llvm.ptx.read.pm0
ptx_read_pm1, // llvm.ptx.read.pm1
ptx_read_pm2, // llvm.ptx.read.pm2
ptx_read_pm3, // llvm.ptx.read.pm3
ptx_read_smid, // llvm.ptx.read.smid
ptx_read_tid_w, // llvm.ptx.read.tid.w
ptx_read_tid_x, // llvm.ptx.read.tid.x
ptx_read_tid_y, // llvm.ptx.read.tid.y
ptx_read_tid_z, // llvm.ptx.read.tid.z
ptx_read_warpid, // llvm.ptx.read.warpid
readcyclecounter, // llvm.readcyclecounter
returnaddress, // llvm.returnaddress
sadd_with_overflow, // llvm.sadd.with.overflow
setjmp, // llvm.setjmp
siglongjmp, // llvm.siglongjmp
sigsetjmp, // llvm.sigsetjmp
sin, // llvm.sin
smul_with_overflow, // llvm.smul.with.overflow
spu_si_a, // llvm.spu.si.a
spu_si_addx, // llvm.spu.si.addx
spu_si_ah, // llvm.spu.si.ah
spu_si_ahi, // llvm.spu.si.ahi
spu_si_ai, // llvm.spu.si.ai
spu_si_and, // llvm.spu.si.and
spu_si_andbi, // llvm.spu.si.andbi
spu_si_andc, // llvm.spu.si.andc
spu_si_andhi, // llvm.spu.si.andhi
spu_si_andi, // llvm.spu.si.andi
spu_si_bg, // llvm.spu.si.bg
spu_si_bgx, // llvm.spu.si.bgx
spu_si_ceq, // llvm.spu.si.ceq
spu_si_ceqb, // llvm.spu.si.ceqb
spu_si_ceqbi, // llvm.spu.si.ceqbi
spu_si_ceqh, // llvm.spu.si.ceqh
spu_si_ceqhi, // llvm.spu.si.ceqhi
spu_si_ceqi, // llvm.spu.si.ceqi
spu_si_cg, // llvm.spu.si.cg
spu_si_cgt, // llvm.spu.si.cgt
spu_si_cgtb, // llvm.spu.si.cgtb
spu_si_cgtbi, // llvm.spu.si.cgtbi
spu_si_cgth, // llvm.spu.si.cgth
spu_si_cgthi, // llvm.spu.si.cgthi
spu_si_cgti, // llvm.spu.si.cgti
spu_si_cgx, // llvm.spu.si.cgx
spu_si_clgt, // llvm.spu.si.clgt
spu_si_clgtb, // llvm.spu.si.clgtb
spu_si_clgtbi, // llvm.spu.si.clgtbi
spu_si_clgth, // llvm.spu.si.clgth
spu_si_clgthi, // llvm.spu.si.clgthi
spu_si_clgti, // llvm.spu.si.clgti
spu_si_dfa, // llvm.spu.si.dfa
spu_si_dfm, // llvm.spu.si.dfm
spu_si_dfma, // llvm.spu.si.dfma
spu_si_dfms, // llvm.spu.si.dfms
spu_si_dfnma, // llvm.spu.si.dfnma
spu_si_dfnms, // llvm.spu.si.dfnms
spu_si_dfs, // llvm.spu.si.dfs
spu_si_fa, // llvm.spu.si.fa
spu_si_fceq, // llvm.spu.si.fceq
spu_si_fcgt, // llvm.spu.si.fcgt
spu_si_fcmeq, // llvm.spu.si.fcmeq
spu_si_fcmgt, // llvm.spu.si.fcmgt
spu_si_fm, // llvm.spu.si.fm
spu_si_fma, // llvm.spu.si.fma
spu_si_fms, // llvm.spu.si.fms
spu_si_fnms, // llvm.spu.si.fnms
spu_si_fs, // llvm.spu.si.fs
spu_si_fsmbi, // llvm.spu.si.fsmbi
spu_si_mpy, // llvm.spu.si.mpy
spu_si_mpya, // llvm.spu.si.mpya
spu_si_mpyh, // llvm.spu.si.mpyh
spu_si_mpyhh, // llvm.spu.si.mpyhh
spu_si_mpyhha, // llvm.spu.si.mpyhha
spu_si_mpyhhau, // llvm.spu.si.mpyhhau
spu_si_mpyhhu, // llvm.spu.si.mpyhhu
spu_si_mpyi, // llvm.spu.si.mpyi
spu_si_mpys, // llvm.spu.si.mpys
spu_si_mpyu, // llvm.spu.si.mpyu
spu_si_mpyui, // llvm.spu.si.mpyui
spu_si_nand, // llvm.spu.si.nand
spu_si_nor, // llvm.spu.si.nor
spu_si_or, // llvm.spu.si.or
spu_si_orbi, // llvm.spu.si.orbi
spu_si_orc, // llvm.spu.si.orc
spu_si_orhi, // llvm.spu.si.orhi
spu_si_ori, // llvm.spu.si.ori
spu_si_sf, // llvm.spu.si.sf
spu_si_sfh, // llvm.spu.si.sfh
spu_si_sfhi, // llvm.spu.si.sfhi
spu_si_sfi, // llvm.spu.si.sfi
spu_si_sfx, // llvm.spu.si.sfx
spu_si_shli, // llvm.spu.si.shli
spu_si_shlqbi, // llvm.spu.si.shlqbi
spu_si_shlqbii, // llvm.spu.si.shlqbii
spu_si_shlqby, // llvm.spu.si.shlqby
spu_si_shlqbyi, // llvm.spu.si.shlqbyi
spu_si_xor, // llvm.spu.si.xor
spu_si_xorbi, // llvm.spu.si.xorbi
spu_si_xorhi, // llvm.spu.si.xorhi
spu_si_xori, // llvm.spu.si.xori
sqrt, // llvm.sqrt
ssub_with_overflow, // llvm.ssub.with.overflow
stackprotector, // llvm.stackprotector
stackrestore, // llvm.stackrestore
stacksave, // llvm.stacksave
toffoli, // llvm.rkqc.toffoli
trap, // llvm.trap
uadd_with_overflow, // llvm.uadd.with.overflow
umul_with_overflow, // llvm.umul.with.overflow
usub_with_overflow, // llvm.usub.with.overflow
vacopy, // llvm.va_copy
vaend, // llvm.va_end
var_annotation, // llvm.var.annotation
vastart, // llvm.va_start
x86_3dnow_pavgusb, // llvm.x86.3dnow.pavgusb
x86_3dnow_pf2id, // llvm.x86.3dnow.pf2id
x86_3dnow_pfacc, // llvm.x86.3dnow.pfacc
x86_3dnow_pfadd, // llvm.x86.3dnow.pfadd
x86_3dnow_pfcmpeq, // llvm.x86.3dnow.pfcmpeq
x86_3dnow_pfcmpge, // llvm.x86.3dnow.pfcmpge
x86_3dnow_pfcmpgt, // llvm.x86.3dnow.pfcmpgt
x86_3dnow_pfmax, // llvm.x86.3dnow.pfmax
x86_3dnow_pfmin, // llvm.x86.3dnow.pfmin
x86_3dnow_pfmul, // llvm.x86.3dnow.pfmul
x86_3dnow_pfrcp, // llvm.x86.3dnow.pfrcp
x86_3dnow_pfrcpit1, // llvm.x86.3dnow.pfrcpit1
x86_3dnow_pfrcpit2, // llvm.x86.3dnow.pfrcpit2
x86_3dnow_pfrsqit1, // llvm.x86.3dnow.pfrsqit1
x86_3dnow_pfrsqrt, // llvm.x86.3dnow.pfrsqrt
x86_3dnow_pfsub, // llvm.x86.3dnow.pfsub
x86_3dnow_pfsubr, // llvm.x86.3dnow.pfsubr
x86_3dnow_pi2fd, // llvm.x86.3dnow.pi2fd
x86_3dnow_pmulhrw, // llvm.x86.3dnow.pmulhrw
x86_3dnowa_pf2iw, // llvm.x86.3dnowa.pf2iw
x86_3dnowa_pfnacc, // llvm.x86.3dnowa.pfnacc
x86_3dnowa_pfpnacc, // llvm.x86.3dnowa.pfpnacc
x86_3dnowa_pi2fw, // llvm.x86.3dnowa.pi2fw
x86_3dnowa_pswapd, // llvm.x86.3dnowa.pswapd
x86_aesni_aesdec, // llvm.x86.aesni.aesdec
x86_aesni_aesdeclast, // llvm.x86.aesni.aesdeclast
x86_aesni_aesenc, // llvm.x86.aesni.aesenc
x86_aesni_aesenclast, // llvm.x86.aesni.aesenclast
x86_aesni_aesimc, // llvm.x86.aesni.aesimc
x86_aesni_aeskeygenassist, // llvm.x86.aesni.aeskeygenassist
x86_avx2_maskload_d, // llvm.x86.avx2.maskload.d
x86_avx2_maskload_d_256, // llvm.x86.avx2.maskload.d.256
x86_avx2_maskload_q, // llvm.x86.avx2.maskload.q
x86_avx2_maskload_q_256, // llvm.x86.avx2.maskload.q.256
x86_avx2_maskstore_d, // llvm.x86.avx2.maskstore.d
x86_avx2_maskstore_d_256, // llvm.x86.avx2.maskstore.d.256
x86_avx2_maskstore_q, // llvm.x86.avx2.maskstore.q
x86_avx2_maskstore_q_256, // llvm.x86.avx2.maskstore.q.256
x86_avx2_movntdqa, // llvm.x86.avx2.movntdqa
x86_avx2_mpsadbw, // llvm.x86.avx2.mpsadbw
x86_avx2_pabs_b, // llvm.x86.avx2.pabs.b
x86_avx2_pabs_d, // llvm.x86.avx2.pabs.d
x86_avx2_pabs_w, // llvm.x86.avx2.pabs.w
x86_avx2_packssdw, // llvm.x86.avx2.packssdw
x86_avx2_packsswb, // llvm.x86.avx2.packsswb
x86_avx2_packusdw, // llvm.x86.avx2.packusdw
x86_avx2_packuswb, // llvm.x86.avx2.packuswb
x86_avx2_padds_b, // llvm.x86.avx2.padds.b
x86_avx2_padds_w, // llvm.x86.avx2.padds.w
x86_avx2_paddus_b, // llvm.x86.avx2.paddus.b
x86_avx2_paddus_w, // llvm.x86.avx2.paddus.w
x86_avx2_pavg_b, // llvm.x86.avx2.pavg.b
x86_avx2_pavg_w, // llvm.x86.avx2.pavg.w
x86_avx2_pblendd_128, // llvm.x86.avx2.pblendd.128
x86_avx2_pblendd_256, // llvm.x86.avx2.pblendd.256
x86_avx2_pblendvb, // llvm.x86.avx2.pblendvb
x86_avx2_pblendw, // llvm.x86.avx2.pblendw
x86_avx2_pbroadcastb_128, // llvm.x86.avx2.pbroadcastb.128
x86_avx2_pbroadcastb_256, // llvm.x86.avx2.pbroadcastb.256
x86_avx2_pbroadcastd_128, // llvm.x86.avx2.pbroadcastd.128
x86_avx2_pbroadcastd_256, // llvm.x86.avx2.pbroadcastd.256
x86_avx2_pbroadcastq_128, // llvm.x86.avx2.pbroadcastq.128
x86_avx2_pbroadcastq_256, // llvm.x86.avx2.pbroadcastq.256
x86_avx2_pbroadcastw_128, // llvm.x86.avx2.pbroadcastw.128
x86_avx2_pbroadcastw_256, // llvm.x86.avx2.pbroadcastw.256
x86_avx2_permd, // llvm.x86.avx2.permd
x86_avx2_permps, // llvm.x86.avx2.permps
x86_avx2_phadd_d, // llvm.x86.avx2.phadd.d
x86_avx2_phadd_sw, // llvm.x86.avx2.phadd.sw
x86_avx2_phadd_w, // llvm.x86.avx2.phadd.w
x86_avx2_phsub_d, // llvm.x86.avx2.phsub.d
x86_avx2_phsub_sw, // llvm.x86.avx2.phsub.sw
x86_avx2_phsub_w, // llvm.x86.avx2.phsub.w
x86_avx2_pmadd_ub_sw, // llvm.x86.avx2.pmadd.ub.sw
x86_avx2_pmadd_wd, // llvm.x86.avx2.pmadd.wd
x86_avx2_pmaxs_b, // llvm.x86.avx2.pmaxs.b
x86_avx2_pmaxs_d, // llvm.x86.avx2.pmaxs.d
x86_avx2_pmaxs_w, // llvm.x86.avx2.pmaxs.w
x86_avx2_pmaxu_b, // llvm.x86.avx2.pmaxu.b
x86_avx2_pmaxu_d, // llvm.x86.avx2.pmaxu.d
x86_avx2_pmaxu_w, // llvm.x86.avx2.pmaxu.w
x86_avx2_pmins_b, // llvm.x86.avx2.pmins.b
x86_avx2_pmins_d, // llvm.x86.avx2.pmins.d
x86_avx2_pmins_w, // llvm.x86.avx2.pmins.w
x86_avx2_pminu_b, // llvm.x86.avx2.pminu.b
x86_avx2_pminu_d, // llvm.x86.avx2.pminu.d
x86_avx2_pminu_w, // llvm.x86.avx2.pminu.w
x86_avx2_pmovmskb, // llvm.x86.avx2.pmovmskb
x86_avx2_pmovsxbd, // llvm.x86.avx2.pmovsxbd
x86_avx2_pmovsxbq, // llvm.x86.avx2.pmovsxbq
x86_avx2_pmovsxbw, // llvm.x86.avx2.pmovsxbw
x86_avx2_pmovsxdq, // llvm.x86.avx2.pmovsxdq
x86_avx2_pmovsxwd, // llvm.x86.avx2.pmovsxwd
x86_avx2_pmovsxwq, // llvm.x86.avx2.pmovsxwq
x86_avx2_pmovzxbd, // llvm.x86.avx2.pmovzxbd
x86_avx2_pmovzxbq, // llvm.x86.avx2.pmovzxbq
x86_avx2_pmovzxbw, // llvm.x86.avx2.pmovzxbw
x86_avx2_pmovzxdq, // llvm.x86.avx2.pmovzxdq
x86_avx2_pmovzxwd, // llvm.x86.avx2.pmovzxwd
x86_avx2_pmovzxwq, // llvm.x86.avx2.pmovzxwq
x86_avx2_pmul_dq, // llvm.x86.avx2.pmul.dq
x86_avx2_pmul_hr_sw, // llvm.x86.avx2.pmul.hr.sw
x86_avx2_pmulh_w, // llvm.x86.avx2.pmulh.w
x86_avx2_pmulhu_w, // llvm.x86.avx2.pmulhu.w
x86_avx2_pmulu_dq, // llvm.x86.avx2.pmulu.dq
x86_avx2_psad_bw, // llvm.x86.avx2.psad.bw
x86_avx2_pshuf_b, // llvm.x86.avx2.pshuf.b
x86_avx2_psign_b, // llvm.x86.avx2.psign.b
x86_avx2_psign_d, // llvm.x86.avx2.psign.d
x86_avx2_psign_w, // llvm.x86.avx2.psign.w
x86_avx2_psll_d, // llvm.x86.avx2.psll.d
x86_avx2_psll_dq, // llvm.x86.avx2.psll.dq
x86_avx2_psll_dq_bs, // llvm.x86.avx2.psll.dq.bs
x86_avx2_psll_q, // llvm.x86.avx2.psll.q
x86_avx2_psll_w, // llvm.x86.avx2.psll.w
x86_avx2_pslli_d, // llvm.x86.avx2.pslli.d
x86_avx2_pslli_q, // llvm.x86.avx2.pslli.q
x86_avx2_pslli_w, // llvm.x86.avx2.pslli.w
x86_avx2_psllv_d, // llvm.x86.avx2.psllv.d
x86_avx2_psllv_d_256, // llvm.x86.avx2.psllv.d.256
x86_avx2_psllv_q, // llvm.x86.avx2.psllv.q
x86_avx2_psllv_q_256, // llvm.x86.avx2.psllv.q.256
x86_avx2_psra_d, // llvm.x86.avx2.psra.d
x86_avx2_psra_w, // llvm.x86.avx2.psra.w
x86_avx2_psrai_d, // llvm.x86.avx2.psrai.d
x86_avx2_psrai_w, // llvm.x86.avx2.psrai.w
x86_avx2_psrav_d, // llvm.x86.avx2.psrav.d
x86_avx2_psrav_d_256, // llvm.x86.avx2.psrav.d.256
x86_avx2_psrl_d, // llvm.x86.avx2.psrl.d
x86_avx2_psrl_dq, // llvm.x86.avx2.psrl.dq
x86_avx2_psrl_dq_bs, // llvm.x86.avx2.psrl.dq.bs
x86_avx2_psrl_q, // llvm.x86.avx2.psrl.q
x86_avx2_psrl_w, // llvm.x86.avx2.psrl.w
x86_avx2_psrli_d, // llvm.x86.avx2.psrli.d
x86_avx2_psrli_q, // llvm.x86.avx2.psrli.q
x86_avx2_psrli_w, // llvm.x86.avx2.psrli.w
x86_avx2_psrlv_d, // llvm.x86.avx2.psrlv.d
x86_avx2_psrlv_d_256, // llvm.x86.avx2.psrlv.d.256
x86_avx2_psrlv_q, // llvm.x86.avx2.psrlv.q
x86_avx2_psrlv_q_256, // llvm.x86.avx2.psrlv.q.256
x86_avx2_psubs_b, // llvm.x86.avx2.psubs.b
x86_avx2_psubs_w, // llvm.x86.avx2.psubs.w
x86_avx2_psubus_b, // llvm.x86.avx2.psubus.b
x86_avx2_psubus_w, // llvm.x86.avx2.psubus.w
x86_avx2_vbroadcast_sd_pd_256, // llvm.x86.avx2.vbroadcast.sd.pd.256
x86_avx2_vbroadcast_ss_ps, // llvm.x86.avx2.vbroadcast.ss.ps
x86_avx2_vbroadcast_ss_ps_256, // llvm.x86.avx2.vbroadcast.ss.ps.256
x86_avx2_vbroadcasti128, // llvm.x86.avx2.vbroadcasti128
x86_avx2_vextracti128, // llvm.x86.avx2.vextracti128
x86_avx2_vinserti128, // llvm.x86.avx2.vinserti128
x86_avx2_vperm2i128, // llvm.x86.avx2.vperm2i128
x86_avx_addsub_pd_256, // llvm.x86.avx.addsub.pd.256
x86_avx_addsub_ps_256, // llvm.x86.avx.addsub.ps.256
x86_avx_blend_pd_256, // llvm.x86.avx.blend.pd.256
x86_avx_blend_ps_256, // llvm.x86.avx.blend.ps.256
x86_avx_blendv_pd_256, // llvm.x86.avx.blendv.pd.256
x86_avx_blendv_ps_256, // llvm.x86.avx.blendv.ps.256
x86_avx_cmp_pd_256, // llvm.x86.avx.cmp.pd.256
x86_avx_cmp_ps_256, // llvm.x86.avx.cmp.ps.256
x86_avx_cvt_pd2_ps_256, // llvm.x86.avx.cvt.pd2.ps.256
x86_avx_cvt_pd2dq_256, // llvm.x86.avx.cvt.pd2dq.256
x86_avx_cvt_ps2_pd_256, // llvm.x86.avx.cvt.ps2.pd.256
x86_avx_cvt_ps2dq_256, // llvm.x86.avx.cvt.ps2dq.256
x86_avx_cvtdq2_pd_256, // llvm.x86.avx.cvtdq2.pd.256
x86_avx_cvtdq2_ps_256, // llvm.x86.avx.cvtdq2.ps.256
x86_avx_cvtt_pd2dq_256, // llvm.x86.avx.cvtt.pd2dq.256
x86_avx_cvtt_ps2dq_256, // llvm.x86.avx.cvtt.ps2dq.256
x86_avx_dp_ps_256, // llvm.x86.avx.dp.ps.256
x86_avx_hadd_pd_256, // llvm.x86.avx.hadd.pd.256
x86_avx_hadd_ps_256, // llvm.x86.avx.hadd.ps.256
x86_avx_hsub_pd_256, // llvm.x86.avx.hsub.pd.256
x86_avx_hsub_ps_256, // llvm.x86.avx.hsub.ps.256
x86_avx_ldu_dq_256, // llvm.x86.avx.ldu.dq.256
x86_avx_maskload_pd, // llvm.x86.avx.maskload.pd
x86_avx_maskload_pd_256, // llvm.x86.avx.maskload.pd.256
x86_avx_maskload_ps, // llvm.x86.avx.maskload.ps
x86_avx_maskload_ps_256, // llvm.x86.avx.maskload.ps.256
x86_avx_maskstore_pd, // llvm.x86.avx.maskstore.pd
x86_avx_maskstore_pd_256, // llvm.x86.avx.maskstore.pd.256
x86_avx_maskstore_ps, // llvm.x86.avx.maskstore.ps
x86_avx_maskstore_ps_256, // llvm.x86.avx.maskstore.ps.256
x86_avx_max_pd_256, // llvm.x86.avx.max.pd.256
x86_avx_max_ps_256, // llvm.x86.avx.max.ps.256
x86_avx_min_pd_256, // llvm.x86.avx.min.pd.256
x86_avx_min_ps_256, // llvm.x86.avx.min.ps.256
x86_avx_movmsk_pd_256, // llvm.x86.avx.movmsk.pd.256
x86_avx_movmsk_ps_256, // llvm.x86.avx.movmsk.ps.256
x86_avx_movnt_dq_256, // llvm.x86.avx.movnt.dq.256
x86_avx_movnt_pd_256, // llvm.x86.avx.movnt.pd.256
x86_avx_movnt_ps_256, // llvm.x86.avx.movnt.ps.256
x86_avx_ptestc_256, // llvm.x86.avx.ptestc.256
x86_avx_ptestnzc_256, // llvm.x86.avx.ptestnzc.256
x86_avx_ptestz_256, // llvm.x86.avx.ptestz.256
x86_avx_rcp_ps_256, // llvm.x86.avx.rcp.ps.256
x86_avx_round_pd_256, // llvm.x86.avx.round.pd.256
x86_avx_round_ps_256, // llvm.x86.avx.round.ps.256
x86_avx_rsqrt_ps_256, // llvm.x86.avx.rsqrt.ps.256
x86_avx_sqrt_pd_256, // llvm.x86.avx.sqrt.pd.256
x86_avx_sqrt_ps_256, // llvm.x86.avx.sqrt.ps.256
x86_avx_storeu_dq_256, // llvm.x86.avx.storeu.dq.256
x86_avx_storeu_pd_256, // llvm.x86.avx.storeu.pd.256
x86_avx_storeu_ps_256, // llvm.x86.avx.storeu.ps.256
x86_avx_vbroadcast_sd_256, // llvm.x86.avx.vbroadcast.sd.256
x86_avx_vbroadcast_ss, // llvm.x86.avx.vbroadcast.ss
x86_avx_vbroadcast_ss_256, // llvm.x86.avx.vbroadcast.ss.256
x86_avx_vbroadcastf128_pd_256, // llvm.x86.avx.vbroadcastf128.pd.256
x86_avx_vbroadcastf128_ps_256, // llvm.x86.avx.vbroadcastf128.ps.256
x86_avx_vextractf128_pd_256, // llvm.x86.avx.vextractf128.pd.256
x86_avx_vextractf128_ps_256, // llvm.x86.avx.vextractf128.ps.256
x86_avx_vextractf128_si_256, // llvm.x86.avx.vextractf128.si.256
x86_avx_vinsertf128_pd_256, // llvm.x86.avx.vinsertf128.pd.256
x86_avx_vinsertf128_ps_256, // llvm.x86.avx.vinsertf128.ps.256
x86_avx_vinsertf128_si_256, // llvm.x86.avx.vinsertf128.si.256
x86_avx_vperm2f128_pd_256, // llvm.x86.avx.vperm2f128.pd.256
x86_avx_vperm2f128_ps_256, // llvm.x86.avx.vperm2f128.ps.256
x86_avx_vperm2f128_si_256, // llvm.x86.avx.vperm2f128.si.256
x86_avx_vpermilvar_pd, // llvm.x86.avx.vpermilvar.pd
x86_avx_vpermilvar_pd_256, // llvm.x86.avx.vpermilvar.pd.256
x86_avx_vpermilvar_ps, // llvm.x86.avx.vpermilvar.ps
x86_avx_vpermilvar_ps_256, // llvm.x86.avx.vpermilvar.ps.256
x86_avx_vtestc_pd, // llvm.x86.avx.vtestc.pd
x86_avx_vtestc_pd_256, // llvm.x86.avx.vtestc.pd.256
x86_avx_vtestc_ps, // llvm.x86.avx.vtestc.ps
x86_avx_vtestc_ps_256, // llvm.x86.avx.vtestc.ps.256
x86_avx_vtestnzc_pd, // llvm.x86.avx.vtestnzc.pd
x86_avx_vtestnzc_pd_256, // llvm.x86.avx.vtestnzc.pd.256
x86_avx_vtestnzc_ps, // llvm.x86.avx.vtestnzc.ps
x86_avx_vtestnzc_ps_256, // llvm.x86.avx.vtestnzc.ps.256
x86_avx_vtestz_pd, // llvm.x86.avx.vtestz.pd
x86_avx_vtestz_pd_256, // llvm.x86.avx.vtestz.pd.256
x86_avx_vtestz_ps, // llvm.x86.avx.vtestz.ps
x86_avx_vtestz_ps_256, // llvm.x86.avx.vtestz.ps.256
x86_avx_vzeroall, // llvm.x86.avx.vzeroall
x86_avx_vzeroupper, // llvm.x86.avx.vzeroupper
x86_bmi_bextr_32, // llvm.x86.bmi.bextr.32
x86_bmi_bextr_64, // llvm.x86.bmi.bextr.64
x86_bmi_bzhi_32, // llvm.x86.bmi.bzhi.32
x86_bmi_bzhi_64, // llvm.x86.bmi.bzhi.64
x86_bmi_pdep_32, // llvm.x86.bmi.pdep.32
x86_bmi_pdep_64, // llvm.x86.bmi.pdep.64
x86_bmi_pext_32, // llvm.x86.bmi.pext.32
x86_bmi_pext_64, // llvm.x86.bmi.pext.64
x86_fma4_vfmadd_pd, // llvm.x86.fma4.vfmadd.pd
x86_fma4_vfmadd_pd_256, // llvm.x86.fma4.vfmadd.pd.256
x86_fma4_vfmadd_ps, // llvm.x86.fma4.vfmadd.ps
x86_fma4_vfmadd_ps_256, // llvm.x86.fma4.vfmadd.ps.256
x86_fma4_vfmadd_sd, // llvm.x86.fma4.vfmadd.sd
x86_fma4_vfmadd_ss, // llvm.x86.fma4.vfmadd.ss
x86_fma4_vfmaddsub_pd, // llvm.x86.fma4.vfmaddsub.pd
x86_fma4_vfmaddsub_pd_256, // llvm.x86.fma4.vfmaddsub.pd.256
x86_fma4_vfmaddsub_ps, // llvm.x86.fma4.vfmaddsub.ps
x86_fma4_vfmaddsub_ps_256, // llvm.x86.fma4.vfmaddsub.ps.256
x86_fma4_vfmsub_pd, // llvm.x86.fma4.vfmsub.pd
x86_fma4_vfmsub_pd_256, // llvm.x86.fma4.vfmsub.pd.256
x86_fma4_vfmsub_ps, // llvm.x86.fma4.vfmsub.ps
x86_fma4_vfmsub_ps_256, // llvm.x86.fma4.vfmsub.ps.256
x86_fma4_vfmsub_sd, // llvm.x86.fma4.vfmsub.sd
x86_fma4_vfmsub_ss, // llvm.x86.fma4.vfmsub.ss
x86_fma4_vfmsubadd_pd, // llvm.x86.fma4.vfmsubadd.pd
x86_fma4_vfmsubadd_pd_256, // llvm.x86.fma4.vfmsubadd.pd.256
x86_fma4_vfmsubadd_ps, // llvm.x86.fma4.vfmsubadd.ps
x86_fma4_vfmsubadd_ps_256, // llvm.x86.fma4.vfmsubadd.ps.256
x86_fma4_vfnmadd_pd, // llvm.x86.fma4.vfnmadd.pd
x86_fma4_vfnmadd_pd_256, // llvm.x86.fma4.vfnmadd.pd.256
x86_fma4_vfnmadd_ps, // llvm.x86.fma4.vfnmadd.ps
x86_fma4_vfnmadd_ps_256, // llvm.x86.fma4.vfnmadd.ps.256
x86_fma4_vfnmadd_sd, // llvm.x86.fma4.vfnmadd.sd
x86_fma4_vfnmadd_ss, // llvm.x86.fma4.vfnmadd.ss
x86_fma4_vfnmsub_pd, // llvm.x86.fma4.vfnmsub.pd
x86_fma4_vfnmsub_pd_256, // llvm.x86.fma4.vfnmsub.pd.256
x86_fma4_vfnmsub_ps, // llvm.x86.fma4.vfnmsub.ps
x86_fma4_vfnmsub_ps_256, // llvm.x86.fma4.vfnmsub.ps.256
x86_fma4_vfnmsub_sd, // llvm.x86.fma4.vfnmsub.sd
x86_fma4_vfnmsub_ss, // llvm.x86.fma4.vfnmsub.ss
x86_int, // llvm.x86.int
x86_mmx_emms, // llvm.x86.mmx.emms
x86_mmx_femms, // llvm.x86.mmx.femms
x86_mmx_maskmovq, // llvm.x86.mmx.maskmovq
x86_mmx_movnt_dq, // llvm.x86.mmx.movnt.dq
x86_mmx_packssdw, // llvm.x86.mmx.packssdw
x86_mmx_packsswb, // llvm.x86.mmx.packsswb
x86_mmx_packuswb, // llvm.x86.mmx.packuswb
x86_mmx_padd_b, // llvm.x86.mmx.padd.b
x86_mmx_padd_d, // llvm.x86.mmx.padd.d
x86_mmx_padd_q, // llvm.x86.mmx.padd.q
x86_mmx_padd_w, // llvm.x86.mmx.padd.w
x86_mmx_padds_b, // llvm.x86.mmx.padds.b
x86_mmx_padds_w, // llvm.x86.mmx.padds.w
x86_mmx_paddus_b, // llvm.x86.mmx.paddus.b
x86_mmx_paddus_w, // llvm.x86.mmx.paddus.w
x86_mmx_palignr_b, // llvm.x86.mmx.palignr.b
x86_mmx_pand, // llvm.x86.mmx.pand
x86_mmx_pandn, // llvm.x86.mmx.pandn
x86_mmx_pavg_b, // llvm.x86.mmx.pavg.b
x86_mmx_pavg_w, // llvm.x86.mmx.pavg.w
x86_mmx_pcmpeq_b, // llvm.x86.mmx.pcmpeq.b
x86_mmx_pcmpeq_d, // llvm.x86.mmx.pcmpeq.d
x86_mmx_pcmpeq_w, // llvm.x86.mmx.pcmpeq.w
x86_mmx_pcmpgt_b, // llvm.x86.mmx.pcmpgt.b
x86_mmx_pcmpgt_d, // llvm.x86.mmx.pcmpgt.d
x86_mmx_pcmpgt_w, // llvm.x86.mmx.pcmpgt.w
x86_mmx_pextr_w, // llvm.x86.mmx.pextr.w
x86_mmx_pinsr_w, // llvm.x86.mmx.pinsr.w
x86_mmx_pmadd_wd, // llvm.x86.mmx.pmadd.wd
x86_mmx_pmaxs_w, // llvm.x86.mmx.pmaxs.w
x86_mmx_pmaxu_b, // llvm.x86.mmx.pmaxu.b
x86_mmx_pmins_w, // llvm.x86.mmx.pmins.w
x86_mmx_pminu_b, // llvm.x86.mmx.pminu.b
x86_mmx_pmovmskb, // llvm.x86.mmx.pmovmskb
x86_mmx_pmulh_w, // llvm.x86.mmx.pmulh.w
x86_mmx_pmulhu_w, // llvm.x86.mmx.pmulhu.w
x86_mmx_pmull_w, // llvm.x86.mmx.pmull.w
x86_mmx_pmulu_dq, // llvm.x86.mmx.pmulu.dq
x86_mmx_por, // llvm.x86.mmx.por
x86_mmx_psad_bw, // llvm.x86.mmx.psad.bw
x86_mmx_psll_d, // llvm.x86.mmx.psll.d
x86_mmx_psll_q, // llvm.x86.mmx.psll.q
x86_mmx_psll_w, // llvm.x86.mmx.psll.w
x86_mmx_pslli_d, // llvm.x86.mmx.pslli.d
x86_mmx_pslli_q, // llvm.x86.mmx.pslli.q
x86_mmx_pslli_w, // llvm.x86.mmx.pslli.w
x86_mmx_psra_d, // llvm.x86.mmx.psra.d
x86_mmx_psra_w, // llvm.x86.mmx.psra.w
x86_mmx_psrai_d, // llvm.x86.mmx.psrai.d
x86_mmx_psrai_w, // llvm.x86.mmx.psrai.w
x86_mmx_psrl_d, // llvm.x86.mmx.psrl.d
x86_mmx_psrl_q, // llvm.x86.mmx.psrl.q
x86_mmx_psrl_w, // llvm.x86.mmx.psrl.w
x86_mmx_psrli_d, // llvm.x86.mmx.psrli.d
x86_mmx_psrli_q, // llvm.x86.mmx.psrli.q
x86_mmx_psrli_w, // llvm.x86.mmx.psrli.w
x86_mmx_psub_b, // llvm.x86.mmx.psub.b
x86_mmx_psub_d, // llvm.x86.mmx.psub.d
x86_mmx_psub_q, // llvm.x86.mmx.psub.q
x86_mmx_psub_w, // llvm.x86.mmx.psub.w
x86_mmx_psubs_b, // llvm.x86.mmx.psubs.b
x86_mmx_psubs_w, // llvm.x86.mmx.psubs.w
x86_mmx_psubus_b, // llvm.x86.mmx.psubus.b
x86_mmx_psubus_w, // llvm.x86.mmx.psubus.w
x86_mmx_punpckhbw, // llvm.x86.mmx.punpckhbw
x86_mmx_punpckhdq, // llvm.x86.mmx.punpckhdq
x86_mmx_punpckhwd, // llvm.x86.mmx.punpckhwd
x86_mmx_punpcklbw, // llvm.x86.mmx.punpcklbw
x86_mmx_punpckldq, // llvm.x86.mmx.punpckldq
x86_mmx_punpcklwd, // llvm.x86.mmx.punpcklwd
x86_mmx_pxor, // llvm.x86.mmx.pxor
x86_rdfsbase_32, // llvm.x86.rdfsbase.32
x86_rdfsbase_64, // llvm.x86.rdfsbase.64
x86_rdgsbase_32, // llvm.x86.rdgsbase.32
x86_rdgsbase_64, // llvm.x86.rdgsbase.64
x86_sse2_add_sd, // llvm.x86.sse2.add.sd
x86_sse2_clflush, // llvm.x86.sse2.clflush
x86_sse2_cmp_pd, // llvm.x86.sse2.cmp.pd
x86_sse2_cmp_sd, // llvm.x86.sse2.cmp.sd
x86_sse2_comieq_sd, // llvm.x86.sse2.comieq.sd
x86_sse2_comige_sd, // llvm.x86.sse2.comige.sd
x86_sse2_comigt_sd, // llvm.x86.sse2.comigt.sd
x86_sse2_comile_sd, // llvm.x86.sse2.comile.sd
x86_sse2_comilt_sd, // llvm.x86.sse2.comilt.sd
x86_sse2_comineq_sd, // llvm.x86.sse2.comineq.sd
x86_sse2_cvtdq2pd, // llvm.x86.sse2.cvtdq2pd
x86_sse2_cvtdq2ps, // llvm.x86.sse2.cvtdq2ps
x86_sse2_cvtpd2dq, // llvm.x86.sse2.cvtpd2dq
x86_sse2_cvtpd2ps, // llvm.x86.sse2.cvtpd2ps
x86_sse2_cvtps2dq, // llvm.x86.sse2.cvtps2dq
x86_sse2_cvtps2pd, // llvm.x86.sse2.cvtps2pd
x86_sse2_cvtsd2si, // llvm.x86.sse2.cvtsd2si
x86_sse2_cvtsd2si64, // llvm.x86.sse2.cvtsd2si64
x86_sse2_cvtsd2ss, // llvm.x86.sse2.cvtsd2ss
x86_sse2_cvtsi2sd, // llvm.x86.sse2.cvtsi2sd
x86_sse2_cvtsi642sd, // llvm.x86.sse2.cvtsi642sd
x86_sse2_cvtss2sd, // llvm.x86.sse2.cvtss2sd
x86_sse2_cvttpd2dq, // llvm.x86.sse2.cvttpd2dq
x86_sse2_cvttps2dq, // llvm.x86.sse2.cvttps2dq
x86_sse2_cvttsd2si, // llvm.x86.sse2.cvttsd2si
x86_sse2_cvttsd2si64, // llvm.x86.sse2.cvttsd2si64
x86_sse2_div_sd, // llvm.x86.sse2.div.sd
x86_sse2_lfence, // llvm.x86.sse2.lfence
x86_sse2_maskmov_dqu, // llvm.x86.sse2.maskmov.dqu
x86_sse2_max_pd, // llvm.x86.sse2.max.pd
x86_sse2_max_sd, // llvm.x86.sse2.max.sd
x86_sse2_mfence, // llvm.x86.sse2.mfence
x86_sse2_min_pd, // llvm.x86.sse2.min.pd
x86_sse2_min_sd, // llvm.x86.sse2.min.sd
x86_sse2_movmsk_pd, // llvm.x86.sse2.movmsk.pd
x86_sse2_mul_sd, // llvm.x86.sse2.mul.sd
x86_sse2_packssdw_128, // llvm.x86.sse2.packssdw.128
x86_sse2_packsswb_128, // llvm.x86.sse2.packsswb.128
x86_sse2_packuswb_128, // llvm.x86.sse2.packuswb.128
x86_sse2_padds_b, // llvm.x86.sse2.padds.b
x86_sse2_padds_w, // llvm.x86.sse2.padds.w
x86_sse2_paddus_b, // llvm.x86.sse2.paddus.b
x86_sse2_paddus_w, // llvm.x86.sse2.paddus.w
x86_sse2_pavg_b, // llvm.x86.sse2.pavg.b
x86_sse2_pavg_w, // llvm.x86.sse2.pavg.w
x86_sse2_pmadd_wd, // llvm.x86.sse2.pmadd.wd
x86_sse2_pmaxs_w, // llvm.x86.sse2.pmaxs.w
x86_sse2_pmaxu_b, // llvm.x86.sse2.pmaxu.b
x86_sse2_pmins_w, // llvm.x86.sse2.pmins.w
x86_sse2_pminu_b, // llvm.x86.sse2.pminu.b
x86_sse2_pmovmskb_128, // llvm.x86.sse2.pmovmskb.128
x86_sse2_pmulh_w, // llvm.x86.sse2.pmulh.w
x86_sse2_pmulhu_w, // llvm.x86.sse2.pmulhu.w
x86_sse2_pmulu_dq, // llvm.x86.sse2.pmulu.dq
x86_sse2_psad_bw, // llvm.x86.sse2.psad.bw
x86_sse2_psll_d, // llvm.x86.sse2.psll.d
x86_sse2_psll_dq, // llvm.x86.sse2.psll.dq
x86_sse2_psll_dq_bs, // llvm.x86.sse2.psll.dq.bs
x86_sse2_psll_q, // llvm.x86.sse2.psll.q
x86_sse2_psll_w, // llvm.x86.sse2.psll.w
x86_sse2_pslli_d, // llvm.x86.sse2.pslli.d
x86_sse2_pslli_q, // llvm.x86.sse2.pslli.q
x86_sse2_pslli_w, // llvm.x86.sse2.pslli.w
x86_sse2_psra_d, // llvm.x86.sse2.psra.d
x86_sse2_psra_w, // llvm.x86.sse2.psra.w
x86_sse2_psrai_d, // llvm.x86.sse2.psrai.d
x86_sse2_psrai_w, // llvm.x86.sse2.psrai.w
x86_sse2_psrl_d, // llvm.x86.sse2.psrl.d
x86_sse2_psrl_dq, // llvm.x86.sse2.psrl.dq
x86_sse2_psrl_dq_bs, // llvm.x86.sse2.psrl.dq.bs
x86_sse2_psrl_q, // llvm.x86.sse2.psrl.q
x86_sse2_psrl_w, // llvm.x86.sse2.psrl.w
x86_sse2_psrli_d, // llvm.x86.sse2.psrli.d
x86_sse2_psrli_q, // llvm.x86.sse2.psrli.q
x86_sse2_psrli_w, // llvm.x86.sse2.psrli.w
x86_sse2_psubs_b, // llvm.x86.sse2.psubs.b
x86_sse2_psubs_w, // llvm.x86.sse2.psubs.w
x86_sse2_psubus_b, // llvm.x86.sse2.psubus.b
x86_sse2_psubus_w, // llvm.x86.sse2.psubus.w
x86_sse2_sqrt_pd, // llvm.x86.sse2.sqrt.pd
x86_sse2_sqrt_sd, // llvm.x86.sse2.sqrt.sd
x86_sse2_storel_dq, // llvm.x86.sse2.storel.dq
x86_sse2_storeu_dq, // llvm.x86.sse2.storeu.dq
x86_sse2_storeu_pd, // llvm.x86.sse2.storeu.pd
x86_sse2_sub_sd, // llvm.x86.sse2.sub.sd
x86_sse2_ucomieq_sd, // llvm.x86.sse2.ucomieq.sd
x86_sse2_ucomige_sd, // llvm.x86.sse2.ucomige.sd
x86_sse2_ucomigt_sd, // llvm.x86.sse2.ucomigt.sd
x86_sse2_ucomile_sd, // llvm.x86.sse2.ucomile.sd
x86_sse2_ucomilt_sd, // llvm.x86.sse2.ucomilt.sd
x86_sse2_ucomineq_sd, // llvm.x86.sse2.ucomineq.sd
x86_sse3_addsub_pd, // llvm.x86.sse3.addsub.pd
x86_sse3_addsub_ps, // llvm.x86.sse3.addsub.ps
x86_sse3_hadd_pd, // llvm.x86.sse3.hadd.pd
x86_sse3_hadd_ps, // llvm.x86.sse3.hadd.ps
x86_sse3_hsub_pd, // llvm.x86.sse3.hsub.pd
x86_sse3_hsub_ps, // llvm.x86.sse3.hsub.ps
x86_sse3_ldu_dq, // llvm.x86.sse3.ldu.dq
x86_sse3_monitor, // llvm.x86.sse3.monitor
x86_sse3_mwait, // llvm.x86.sse3.mwait
x86_sse41_blendpd, // llvm.x86.sse41.blendpd
x86_sse41_blendps, // llvm.x86.sse41.blendps
x86_sse41_blendvpd, // llvm.x86.sse41.blendvpd
x86_sse41_blendvps, // llvm.x86.sse41.blendvps
x86_sse41_dppd, // llvm.x86.sse41.dppd
x86_sse41_dpps, // llvm.x86.sse41.dpps
x86_sse41_extractps, // llvm.x86.sse41.extractps
x86_sse41_insertps, // llvm.x86.sse41.insertps
x86_sse41_movntdqa, // llvm.x86.sse41.movntdqa
x86_sse41_mpsadbw, // llvm.x86.sse41.mpsadbw
x86_sse41_packusdw, // llvm.x86.sse41.packusdw
x86_sse41_pblendvb, // llvm.x86.sse41.pblendvb
x86_sse41_pblendw, // llvm.x86.sse41.pblendw
x86_sse41_pextrb, // llvm.x86.sse41.pextrb
x86_sse41_pextrd, // llvm.x86.sse41.pextrd
x86_sse41_pextrq, // llvm.x86.sse41.pextrq
x86_sse41_phminposuw, // llvm.x86.sse41.phminposuw
x86_sse41_pmaxsb, // llvm.x86.sse41.pmaxsb
x86_sse41_pmaxsd, // llvm.x86.sse41.pmaxsd
x86_sse41_pmaxud, // llvm.x86.sse41.pmaxud
x86_sse41_pmaxuw, // llvm.x86.sse41.pmaxuw
x86_sse41_pminsb, // llvm.x86.sse41.pminsb
x86_sse41_pminsd, // llvm.x86.sse41.pminsd
x86_sse41_pminud, // llvm.x86.sse41.pminud
x86_sse41_pminuw, // llvm.x86.sse41.pminuw
x86_sse41_pmovsxbd, // llvm.x86.sse41.pmovsxbd
x86_sse41_pmovsxbq, // llvm.x86.sse41.pmovsxbq
x86_sse41_pmovsxbw, // llvm.x86.sse41.pmovsxbw
x86_sse41_pmovsxdq, // llvm.x86.sse41.pmovsxdq
x86_sse41_pmovsxwd, // llvm.x86.sse41.pmovsxwd
x86_sse41_pmovsxwq, // llvm.x86.sse41.pmovsxwq
x86_sse41_pmovzxbd, // llvm.x86.sse41.pmovzxbd
x86_sse41_pmovzxbq, // llvm.x86.sse41.pmovzxbq
x86_sse41_pmovzxbw, // llvm.x86.sse41.pmovzxbw
x86_sse41_pmovzxdq, // llvm.x86.sse41.pmovzxdq
x86_sse41_pmovzxwd, // llvm.x86.sse41.pmovzxwd
x86_sse41_pmovzxwq, // llvm.x86.sse41.pmovzxwq
x86_sse41_pmuldq, // llvm.x86.sse41.pmuldq
x86_sse41_ptestc, // llvm.x86.sse41.ptestc
x86_sse41_ptestnzc, // llvm.x86.sse41.ptestnzc
x86_sse41_ptestz, // llvm.x86.sse41.ptestz
x86_sse41_round_pd, // llvm.x86.sse41.round.pd
x86_sse41_round_ps, // llvm.x86.sse41.round.ps
x86_sse41_round_sd, // llvm.x86.sse41.round.sd
x86_sse41_round_ss, // llvm.x86.sse41.round.ss
x86_sse42_crc32_32_16, // llvm.x86.sse42.crc32.32.16
x86_sse42_crc32_32_32, // llvm.x86.sse42.crc32.32.32
x86_sse42_crc32_32_8, // llvm.x86.sse42.crc32.32.8
x86_sse42_crc32_64_64, // llvm.x86.sse42.crc32.64.64
x86_sse42_crc32_64_8, // llvm.x86.sse42.crc32.64.8
x86_sse42_pcmpestri128, // llvm.x86.sse42.pcmpestri128
x86_sse42_pcmpestria128, // llvm.x86.sse42.pcmpestria128
x86_sse42_pcmpestric128, // llvm.x86.sse42.pcmpestric128
x86_sse42_pcmpestrio128, // llvm.x86.sse42.pcmpestrio128
x86_sse42_pcmpestris128, // llvm.x86.sse42.pcmpestris128
x86_sse42_pcmpestriz128, // llvm.x86.sse42.pcmpestriz128
x86_sse42_pcmpestrm128, // llvm.x86.sse42.pcmpestrm128
x86_sse42_pcmpistri128, // llvm.x86.sse42.pcmpistri128
x86_sse42_pcmpistria128, // llvm.x86.sse42.pcmpistria128
x86_sse42_pcmpistric128, // llvm.x86.sse42.pcmpistric128
x86_sse42_pcmpistrio128, // llvm.x86.sse42.pcmpistrio128
x86_sse42_pcmpistris128, // llvm.x86.sse42.pcmpistris128
x86_sse42_pcmpistriz128, // llvm.x86.sse42.pcmpistriz128
x86_sse42_pcmpistrm128, // llvm.x86.sse42.pcmpistrm128
x86_sse_add_ss, // llvm.x86.sse.add.ss
x86_sse_cmp_ps, // llvm.x86.sse.cmp.ps
x86_sse_cmp_ss, // llvm.x86.sse.cmp.ss
x86_sse_comieq_ss, // llvm.x86.sse.comieq.ss
x86_sse_comige_ss, // llvm.x86.sse.comige.ss
x86_sse_comigt_ss, // llvm.x86.sse.comigt.ss
x86_sse_comile_ss, // llvm.x86.sse.comile.ss
x86_sse_comilt_ss, // llvm.x86.sse.comilt.ss
x86_sse_comineq_ss, // llvm.x86.sse.comineq.ss
x86_sse_cvtpd2pi, // llvm.x86.sse.cvtpd2pi
x86_sse_cvtpi2pd, // llvm.x86.sse.cvtpi2pd
x86_sse_cvtpi2ps, // llvm.x86.sse.cvtpi2ps
x86_sse_cvtps2pi, // llvm.x86.sse.cvtps2pi
x86_sse_cvtsi2ss, // llvm.x86.sse.cvtsi2ss
x86_sse_cvtsi642ss, // llvm.x86.sse.cvtsi642ss
x86_sse_cvtss2si, // llvm.x86.sse.cvtss2si
x86_sse_cvtss2si64, // llvm.x86.sse.cvtss2si64
x86_sse_cvttpd2pi, // llvm.x86.sse.cvttpd2pi
x86_sse_cvttps2pi, // llvm.x86.sse.cvttps2pi
x86_sse_cvttss2si, // llvm.x86.sse.cvttss2si
x86_sse_cvttss2si64, // llvm.x86.sse.cvttss2si64
x86_sse_div_ss, // llvm.x86.sse.div.ss
x86_sse_ldmxcsr, // llvm.x86.sse.ldmxcsr
x86_sse_max_ps, // llvm.x86.sse.max.ps
x86_sse_max_ss, // llvm.x86.sse.max.ss
x86_sse_min_ps, // llvm.x86.sse.min.ps
x86_sse_min_ss, // llvm.x86.sse.min.ss
x86_sse_movmsk_ps, // llvm.x86.sse.movmsk.ps
x86_sse_mul_ss, // llvm.x86.sse.mul.ss
x86_sse_pshuf_w, // llvm.x86.sse.pshuf.w
x86_sse_rcp_ps, // llvm.x86.sse.rcp.ps
x86_sse_rcp_ss, // llvm.x86.sse.rcp.ss
x86_sse_rsqrt_ps, // llvm.x86.sse.rsqrt.ps
x86_sse_rsqrt_ss, // llvm.x86.sse.rsqrt.ss
x86_sse_sfence, // llvm.x86.sse.sfence
x86_sse_sqrt_ps, // llvm.x86.sse.sqrt.ps
x86_sse_sqrt_ss, // llvm.x86.sse.sqrt.ss
x86_sse_stmxcsr, // llvm.x86.sse.stmxcsr
x86_sse_storeu_ps, // llvm.x86.sse.storeu.ps
x86_sse_sub_ss, // llvm.x86.sse.sub.ss
x86_sse_ucomieq_ss, // llvm.x86.sse.ucomieq.ss
x86_sse_ucomige_ss, // llvm.x86.sse.ucomige.ss
x86_sse_ucomigt_ss, // llvm.x86.sse.ucomigt.ss
x86_sse_ucomile_ss, // llvm.x86.sse.ucomile.ss
x86_sse_ucomilt_ss, // llvm.x86.sse.ucomilt.ss
x86_sse_ucomineq_ss, // llvm.x86.sse.ucomineq.ss
x86_ssse3_pabs_b, // llvm.x86.ssse3.pabs.b
x86_ssse3_pabs_b_128, // llvm.x86.ssse3.pabs.b.128
x86_ssse3_pabs_d, // llvm.x86.ssse3.pabs.d
x86_ssse3_pabs_d_128, // llvm.x86.ssse3.pabs.d.128
x86_ssse3_pabs_w, // llvm.x86.ssse3.pabs.w
x86_ssse3_pabs_w_128, // llvm.x86.ssse3.pabs.w.128
x86_ssse3_phadd_d, // llvm.x86.ssse3.phadd.d
x86_ssse3_phadd_d_128, // llvm.x86.ssse3.phadd.d.128
x86_ssse3_phadd_sw, // llvm.x86.ssse3.phadd.sw
x86_ssse3_phadd_sw_128, // llvm.x86.ssse3.phadd.sw.128
x86_ssse3_phadd_w, // llvm.x86.ssse3.phadd.w
x86_ssse3_phadd_w_128, // llvm.x86.ssse3.phadd.w.128
x86_ssse3_phsub_d, // llvm.x86.ssse3.phsub.d
x86_ssse3_phsub_d_128, // llvm.x86.ssse3.phsub.d.128
x86_ssse3_phsub_sw, // llvm.x86.ssse3.phsub.sw
x86_ssse3_phsub_sw_128, // llvm.x86.ssse3.phsub.sw.128
x86_ssse3_phsub_w, // llvm.x86.ssse3.phsub.w
x86_ssse3_phsub_w_128, // llvm.x86.ssse3.phsub.w.128
x86_ssse3_pmadd_ub_sw, // llvm.x86.ssse3.pmadd.ub.sw
x86_ssse3_pmadd_ub_sw_128, // llvm.x86.ssse3.pmadd.ub.sw.128
x86_ssse3_pmul_hr_sw, // llvm.x86.ssse3.pmul.hr.sw
x86_ssse3_pmul_hr_sw_128, // llvm.x86.ssse3.pmul.hr.sw.128
x86_ssse3_pshuf_b, // llvm.x86.ssse3.pshuf.b
x86_ssse3_pshuf_b_128, // llvm.x86.ssse3.pshuf.b.128
x86_ssse3_psign_b, // llvm.x86.ssse3.psign.b
x86_ssse3_psign_b_128, // llvm.x86.ssse3.psign.b.128
x86_ssse3_psign_d, // llvm.x86.ssse3.psign.d
x86_ssse3_psign_d_128, // llvm.x86.ssse3.psign.d.128
x86_ssse3_psign_w, // llvm.x86.ssse3.psign.w
x86_ssse3_psign_w_128, // llvm.x86.ssse3.psign.w.128
x86_vcvtph2ps_128, // llvm.x86.vcvtph2ps.128
x86_vcvtph2ps_256, // llvm.x86.vcvtph2ps.256
x86_vcvtps2ph_128, // llvm.x86.vcvtps2ph.128
x86_vcvtps2ph_256, // llvm.x86.vcvtps2ph.256
x86_wrfsbase_32, // llvm.x86.wrfsbase.32
x86_wrfsbase_64, // llvm.x86.wrfsbase.64
x86_wrgsbase_32, // llvm.x86.wrgsbase.32
x86_wrgsbase_64, // llvm.x86.wrgsbase.64
x86_xop_vfrcz_pd, // llvm.x86.xop.vfrcz.pd
x86_xop_vfrcz_pd_256, // llvm.x86.xop.vfrcz.pd.256
x86_xop_vfrcz_ps, // llvm.x86.xop.vfrcz.ps
x86_xop_vfrcz_ps_256, // llvm.x86.xop.vfrcz.ps.256
x86_xop_vfrcz_sd, // llvm.x86.xop.vfrcz.sd
x86_xop_vfrcz_ss, // llvm.x86.xop.vfrcz.ss
x86_xop_vpcmov, // llvm.x86.xop.vpcmov
x86_xop_vpcmov_256, // llvm.x86.xop.vpcmov.256
x86_xop_vpcomeqb, // llvm.x86.xop.vpcomeqb
x86_xop_vpcomeqd, // llvm.x86.xop.vpcomeqd
x86_xop_vpcomeqq, // llvm.x86.xop.vpcomeqq
x86_xop_vpcomequb, // llvm.x86.xop.vpcomequb
x86_xop_vpcomequd, // llvm.x86.xop.vpcomequd
x86_xop_vpcomequq, // llvm.x86.xop.vpcomequq
x86_xop_vpcomequw, // llvm.x86.xop.vpcomequw
x86_xop_vpcomeqw, // llvm.x86.xop.vpcomeqw
x86_xop_vpcomfalseb, // llvm.x86.xop.vpcomfalseb
x86_xop_vpcomfalsed, // llvm.x86.xop.vpcomfalsed
x86_xop_vpcomfalseq, // llvm.x86.xop.vpcomfalseq
x86_xop_vpcomfalseub, // llvm.x86.xop.vpcomfalseub
x86_xop_vpcomfalseud, // llvm.x86.xop.vpcomfalseud
x86_xop_vpcomfalseuq, // llvm.x86.xop.vpcomfalseuq
x86_xop_vpcomfalseuw, // llvm.x86.xop.vpcomfalseuw
x86_xop_vpcomfalsew, // llvm.x86.xop.vpcomfalsew
x86_xop_vpcomgeb, // llvm.x86.xop.vpcomgeb
x86_xop_vpcomged, // llvm.x86.xop.vpcomged
x86_xop_vpcomgeq, // llvm.x86.xop.vpcomgeq
x86_xop_vpcomgeub, // llvm.x86.xop.vpcomgeub
x86_xop_vpcomgeud, // llvm.x86.xop.vpcomgeud
x86_xop_vpcomgeuq, // llvm.x86.xop.vpcomgeuq
x86_xop_vpcomgeuw, // llvm.x86.xop.vpcomgeuw
x86_xop_vpcomgew, // llvm.x86.xop.vpcomgew
x86_xop_vpcomgtb, // llvm.x86.xop.vpcomgtb
x86_xop_vpcomgtd, // llvm.x86.xop.vpcomgtd
x86_xop_vpcomgtq, // llvm.x86.xop.vpcomgtq
x86_xop_vpcomgtub, // llvm.x86.xop.vpcomgtub
x86_xop_vpcomgtud, // llvm.x86.xop.vpcomgtud
x86_xop_vpcomgtuq, // llvm.x86.xop.vpcomgtuq
x86_xop_vpcomgtuw, // llvm.x86.xop.vpcomgtuw
x86_xop_vpcomgtw, // llvm.x86.xop.vpcomgtw
x86_xop_vpcomleb, // llvm.x86.xop.vpcomleb
x86_xop_vpcomled, // llvm.x86.xop.vpcomled
x86_xop_vpcomleq, // llvm.x86.xop.vpcomleq
x86_xop_vpcomleub, // llvm.x86.xop.vpcomleub
x86_xop_vpcomleud, // llvm.x86.xop.vpcomleud
x86_xop_vpcomleuq, // llvm.x86.xop.vpcomleuq
x86_xop_vpcomleuw, // llvm.x86.xop.vpcomleuw
x86_xop_vpcomlew, // llvm.x86.xop.vpcomlew
x86_xop_vpcomltb, // llvm.x86.xop.vpcomltb
x86_xop_vpcomltd, // llvm.x86.xop.vpcomltd
x86_xop_vpcomltq, // llvm.x86.xop.vpcomltq
x86_xop_vpcomltub, // llvm.x86.xop.vpcomltub
x86_xop_vpcomltud, // llvm.x86.xop.vpcomltud
x86_xop_vpcomltuq, // llvm.x86.xop.vpcomltuq
x86_xop_vpcomltuw, // llvm.x86.xop.vpcomltuw
x86_xop_vpcomltw, // llvm.x86.xop.vpcomltw
x86_xop_vpcomneb, // llvm.x86.xop.vpcomneb
x86_xop_vpcomned, // llvm.x86.xop.vpcomned
x86_xop_vpcomneq, // llvm.x86.xop.vpcomneq
x86_xop_vpcomneub, // llvm.x86.xop.vpcomneub
x86_xop_vpcomneud, // llvm.x86.xop.vpcomneud
x86_xop_vpcomneuq, // llvm.x86.xop.vpcomneuq
x86_xop_vpcomneuw, // llvm.x86.xop.vpcomneuw
x86_xop_vpcomnew, // llvm.x86.xop.vpcomnew
x86_xop_vpcomtrueb, // llvm.x86.xop.vpcomtrueb
x86_xop_vpcomtrued, // llvm.x86.xop.vpcomtrued
x86_xop_vpcomtrueq, // llvm.x86.xop.vpcomtrueq
x86_xop_vpcomtrueub, // llvm.x86.xop.vpcomtrueub
x86_xop_vpcomtrueud, // llvm.x86.xop.vpcomtrueud
x86_xop_vpcomtrueuq, // llvm.x86.xop.vpcomtrueuq
x86_xop_vpcomtrueuw, // llvm.x86.xop.vpcomtrueuw
x86_xop_vpcomtruew, // llvm.x86.xop.vpcomtruew
x86_xop_vpermil2pd, // llvm.x86.xop.vpermil2pd
x86_xop_vpermil2pd_256, // llvm.x86.xop.vpermil2pd.256
x86_xop_vpermil2ps, // llvm.x86.xop.vpermil2ps
x86_xop_vpermil2ps_256, // llvm.x86.xop.vpermil2ps.256
x86_xop_vphaddbd, // llvm.x86.xop.vphaddbd
x86_xop_vphaddbq, // llvm.x86.xop.vphaddbq
x86_xop_vphaddbw, // llvm.x86.xop.vphaddbw
x86_xop_vphadddq, // llvm.x86.xop.vphadddq
x86_xop_vphaddubd, // llvm.x86.xop.vphaddubd
x86_xop_vphaddubq, // llvm.x86.xop.vphaddubq
x86_xop_vphaddubw, // llvm.x86.xop.vphaddubw
x86_xop_vphaddudq, // llvm.x86.xop.vphaddudq
x86_xop_vphadduwd, // llvm.x86.xop.vphadduwd
x86_xop_vphadduwq, // llvm.x86.xop.vphadduwq
x86_xop_vphaddwd, // llvm.x86.xop.vphaddwd
x86_xop_vphaddwq, // llvm.x86.xop.vphaddwq
x86_xop_vphsubbw, // llvm.x86.xop.vphsubbw
x86_xop_vphsubdq, // llvm.x86.xop.vphsubdq
x86_xop_vphsubwd, // llvm.x86.xop.vphsubwd
x86_xop_vpmacsdd, // llvm.x86.xop.vpmacsdd
x86_xop_vpmacsdqh, // llvm.x86.xop.vpmacsdqh
x86_xop_vpmacsdql, // llvm.x86.xop.vpmacsdql
x86_xop_vpmacssdd, // llvm.x86.xop.vpmacssdd
x86_xop_vpmacssdqh, // llvm.x86.xop.vpmacssdqh
x86_xop_vpmacssdql, // llvm.x86.xop.vpmacssdql
x86_xop_vpmacsswd, // llvm.x86.xop.vpmacsswd
x86_xop_vpmacssww, // llvm.x86.xop.vpmacssww
x86_xop_vpmacswd, // llvm.x86.xop.vpmacswd
x86_xop_vpmacsww, // llvm.x86.xop.vpmacsww
x86_xop_vpmadcsswd, // llvm.x86.xop.vpmadcsswd
x86_xop_vpmadcswd, // llvm.x86.xop.vpmadcswd
x86_xop_vpperm, // llvm.x86.xop.vpperm
x86_xop_vprotb, // llvm.x86.xop.vprotb
x86_xop_vprotd, // llvm.x86.xop.vprotd
x86_xop_vprotq, // llvm.x86.xop.vprotq
x86_xop_vprotw, // llvm.x86.xop.vprotw
x86_xop_vpshab, // llvm.x86.xop.vpshab
x86_xop_vpshad, // llvm.x86.xop.vpshad
x86_xop_vpshaq, // llvm.x86.xop.vpshaq
x86_xop_vpshaw, // llvm.x86.xop.vpshaw
x86_xop_vpshlb, // llvm.x86.xop.vpshlb
x86_xop_vpshld, // llvm.x86.xop.vpshld
x86_xop_vpshlq, // llvm.x86.xop.vpshlq
x86_xop_vpshlw, // llvm.x86.xop.vpshlw
xcore_bitrev, // llvm.xcore.bitrev
xcore_checkevent, // llvm.xcore.checkevent
xcore_chkct, // llvm.xcore.chkct
xcore_clre, // llvm.xcore.clre
xcore_clrsr, // llvm.xcore.clrsr
xcore_crc32, // llvm.xcore.crc32
xcore_crc8, // llvm.xcore.crc8
xcore_eeu, // llvm.xcore.eeu
xcore_endin, // llvm.xcore.endin
xcore_freer, // llvm.xcore.freer
xcore_geted, // llvm.xcore.geted
xcore_getet, // llvm.xcore.getet
xcore_getid, // llvm.xcore.getid
xcore_getps, // llvm.xcore.getps
xcore_getr, // llvm.xcore.getr
xcore_getst, // llvm.xcore.getst
xcore_getts, // llvm.xcore.getts
xcore_in, // llvm.xcore.in
xcore_inct, // llvm.xcore.inct
xcore_initcp, // llvm.xcore.initcp
xcore_initdp, // llvm.xcore.initdp
xcore_initlr, // llvm.xcore.initlr
xcore_initpc, // llvm.xcore.initpc
xcore_initsp, // llvm.xcore.initsp
xcore_inshr, // llvm.xcore.inshr
xcore_int, // llvm.xcore.int
xcore_mjoin, // llvm.xcore.mjoin
xcore_msync, // llvm.xcore.msync
xcore_out, // llvm.xcore.out
xcore_outct, // llvm.xcore.outct
xcore_outshr, // llvm.xcore.outshr
xcore_outt, // llvm.xcore.outt
xcore_peek, // llvm.xcore.peek
xcore_setc, // llvm.xcore.setc
xcore_setclk, // llvm.xcore.setclk
xcore_setd, // llvm.xcore.setd
xcore_setev, // llvm.xcore.setev
xcore_setps, // llvm.xcore.setps
xcore_setpsc, // llvm.xcore.setpsc
xcore_setpt, // llvm.xcore.setpt
xcore_setrdy, // llvm.xcore.setrdy
xcore_setsr, // llvm.xcore.setsr
xcore_settw, // llvm.xcore.settw
xcore_setv, // llvm.xcore.setv
xcore_sext, // llvm.xcore.sext
xcore_ssync, // llvm.xcore.ssync
xcore_syncr, // llvm.xcore.syncr
xcore_testct, // llvm.xcore.testct
xcore_testwct, // llvm.xcore.testwct
xcore_waitevent, // llvm.xcore.waitevent
xcore_zext // llvm.xcore.zext
#endif
// Intrinsic ID to name table
#ifdef GET_INTRINSIC_NAME_TABLE
// Note that entry #0 is the invalid intrinsic!
"llvm.CNOT",
"llvm.Fredkin",
"llvm.H",
"llvm.MeasX",
"llvm.MeasZ",
"llvm.rkqc.NOT",
"llvm.PrepX",
"llvm.PrepZ",
"llvm.Rx",
"llvm.Ry",
"llvm.Rz",
"llvm.S",
"llvm.Sdag",
"llvm.T",
"llvm.Tdag",
"llvm.Toffoli",
"llvm.X",
"llvm.Y",
"llvm.Z",
"llvm.rkqc.a_eq_a_minus_b",
"llvm.rkqc.a_eq_a_plus_b",
"llvm.rkqc.a_eq_a_plus_b_times_c",
"llvm.rkqc.a_swap_b",
"llvm.adjust.trampoline",
"llvm.annotation",
"llvm.arm.cdp",
"llvm.arm.cdp2",
"llvm.arm.get.fpscr",
"llvm.arm.ldrexd",
"llvm.arm.mcr",
"llvm.arm.mcr2",
"llvm.arm.mcrr",
"llvm.arm.mcrr2",
"llvm.arm.mrc",
"llvm.arm.mrc2",
"llvm.arm.neon.vabds",
"llvm.arm.neon.vabdu",
"llvm.arm.neon.vabs",
"llvm.arm.neon.vacged",
"llvm.arm.neon.vacgeq",
"llvm.arm.neon.vacgtd",
"llvm.arm.neon.vacgtq",
"llvm.arm.neon.vaddhn",
"llvm.arm.neon.vcls",
"llvm.arm.neon.vclz",
"llvm.arm.neon.vcnt",
"llvm.arm.neon.vcvtfp2fxs",
"llvm.arm.neon.vcvtfp2fxu",
"llvm.arm.neon.vcvtfp2hf",
"llvm.arm.neon.vcvtfxs2fp",
"llvm.arm.neon.vcvtfxu2fp",
"llvm.arm.neon.vcvthf2fp",
"llvm.arm.neon.vhadds",
"llvm.arm.neon.vhaddu",
"llvm.arm.neon.vhsubs",
"llvm.arm.neon.vhsubu",
"llvm.arm.neon.vld1",
"llvm.arm.neon.vld2",
"llvm.arm.neon.vld2lane",
"llvm.arm.neon.vld3",
"llvm.arm.neon.vld3lane",
"llvm.arm.neon.vld4",
"llvm.arm.neon.vld4lane",
"llvm.arm.neon.vmaxs",
"llvm.arm.neon.vmaxu",
"llvm.arm.neon.vmins",
"llvm.arm.neon.vminu",
"llvm.arm.neon.vmullp",
"llvm.arm.neon.vmulls",
"llvm.arm.neon.vmullu",
"llvm.arm.neon.vmulp",
"llvm.arm.neon.vpadals",
"llvm.arm.neon.vpadalu",
"llvm.arm.neon.vpadd",
"llvm.arm.neon.vpaddls",
"llvm.arm.neon.vpaddlu",
"llvm.arm.neon.vpmaxs",
"llvm.arm.neon.vpmaxu",
"llvm.arm.neon.vpmins",
"llvm.arm.neon.vpminu",
"llvm.arm.neon.vqabs",
"llvm.arm.neon.vqadds",
"llvm.arm.neon.vqaddu",
"llvm.arm.neon.vqdmlal",
"llvm.arm.neon.vqdmlsl",
"llvm.arm.neon.vqdmulh",
"llvm.arm.neon.vqdmull",
"llvm.arm.neon.vqmovns",
"llvm.arm.neon.vqmovnsu",
"llvm.arm.neon.vqmovnu",
"llvm.arm.neon.vqneg",
"llvm.arm.neon.vqrdmulh",
"llvm.arm.neon.vqrshiftns",
"llvm.arm.neon.vqrshiftnsu",
"llvm.arm.neon.vqrshiftnu",
"llvm.arm.neon.vqrshifts",
"llvm.arm.neon.vqrshiftu",
"llvm.arm.neon.vqshiftns",
"llvm.arm.neon.vqshiftnsu",
"llvm.arm.neon.vqshiftnu",
"llvm.arm.neon.vqshifts",
"llvm.arm.neon.vqshiftsu",
"llvm.arm.neon.vqshiftu",
"llvm.arm.neon.vqsubs",
"llvm.arm.neon.vqsubu",
"llvm.arm.neon.vraddhn",
"llvm.arm.neon.vrecpe",
"llvm.arm.neon.vrecps",
"llvm.arm.neon.vrhadds",
"llvm.arm.neon.vrhaddu",
"llvm.arm.neon.vrshiftn",
"llvm.arm.neon.vrshifts",
"llvm.arm.neon.vrshiftu",
"llvm.arm.neon.vrsqrte",
"llvm.arm.neon.vrsqrts",
"llvm.arm.neon.vrsubhn",
"llvm.arm.neon.vshiftins",
"llvm.arm.neon.vshiftls",
"llvm.arm.neon.vshiftlu",
"llvm.arm.neon.vshiftn",
"llvm.arm.neon.vshifts",
"llvm.arm.neon.vshiftu",
"llvm.arm.neon.vst1",
"llvm.arm.neon.vst2",
"llvm.arm.neon.vst2lane",
"llvm.arm.neon.vst3",
"llvm.arm.neon.vst3lane",
"llvm.arm.neon.vst4",
"llvm.arm.neon.vst4lane",
"llvm.arm.neon.vsubhn",
"llvm.arm.neon.vtbl1",
"llvm.arm.neon.vtbl2",
"llvm.arm.neon.vtbl3",
"llvm.arm.neon.vtbl4",
"llvm.arm.neon.vtbx1",
"llvm.arm.neon.vtbx2",
"llvm.arm.neon.vtbx3",
"llvm.arm.neon.vtbx4",
"llvm.arm.qadd",
"llvm.arm.qsub",
"llvm.arm.set.fpscr",
"llvm.arm.ssat",
"llvm.arm.strexd",
"llvm.arm.thread.pointer",
"llvm.arm.usat",
"llvm.arm.vcvtr",
"llvm.arm.vcvtru",
"llvm.rkqc.assign_value_of_0_to_a",
"llvm.rkqc.assign_value_of_1_to_a",
"llvm.rkqc.assign_value_of_b_to_a",
"llvm.bswap",
"llvm.rkqc.cnot",
"llvm.convert.from.fp16",
"llvm.convert.to.fp16",
"llvm.convertff",
"llvm.convertfsi",
"llvm.convertfui",
"llvm.convertsif",
"llvm.convertss",
"llvm.convertsu",
"llvm.convertuif",
"llvm.convertus",
"llvm.convertuu",
"llvm.cos",
"llvm.ctlz",
"llvm.ctpop",
"llvm.cttz",
"llvm.dbg.declare",
"llvm.dbg.value",
"llvm.eh.dwarf.cfa",
"llvm.eh.return.i32",
"llvm.eh.return.i64",
"llvm.eh.sjlj.callsite",
"llvm.eh.sjlj.functioncontext",
"llvm.eh.sjlj.longjmp",
"llvm.eh.sjlj.lsda",
"llvm.eh.sjlj.setjmp",
"llvm.eh.typeid.for",
"llvm.eh.unwind.init",
"llvm.exp",
"llvm.exp2",
"llvm.expect",
"llvm.flt.rounds",
"llvm.fma",
"llvm.frameaddress",
"llvm.gcread",
"llvm.gcroot",
"llvm.gcwrite",
"llvm.hexagon.A2.abs",
"llvm.hexagon.A2.absp",
"llvm.hexagon.A2.abssat",
"llvm.hexagon.A2.add",
"llvm.hexagon.A2.addh.h16.hh",
"llvm.hexagon.A2.addh.h16.hl",
"llvm.hexagon.A2.addh.h16.lh",
"llvm.hexagon.A2.addh.h16.ll",
"llvm.hexagon.A2.addh.h16.sat.hh",
"llvm.hexagon.A2.addh.h16.sat.hl",
"llvm.hexagon.A2.addh.h16.sat.lh",
"llvm.hexagon.A2.addh.h16.sat.ll",
"llvm.hexagon.A2.addh.l16.hh",
"llvm.hexagon.A2.addh.l16.hl",
"llvm.hexagon.A2.addh.l16.lh",
"llvm.hexagon.A2.addh.l16.ll",
"llvm.hexagon.A2.addh.l16.sat.hh",
"llvm.hexagon.A2.addh.l16.sat.hl",
"llvm.hexagon.A2.addh.l16.sat.lh",
"llvm.hexagon.A2.addh.l16.sat.ll",
"llvm.hexagon.A2.addi",
"llvm.hexagon.A2.addp",
"llvm.hexagon.A2.addpsat",
"llvm.hexagon.A2.addsat",
"llvm.hexagon.A2.addsp",
"llvm.hexagon.A2.and",
"llvm.hexagon.A2.andir",
"llvm.hexagon.A2.andp",
"llvm.hexagon.A2.aslh",
"llvm.hexagon.A2.asrh",
"llvm.hexagon.A2.combine.hh",
"llvm.hexagon.A2.combine.hl",
"llvm.hexagon.A2.combine.lh",
"llvm.hexagon.A2.combine.ll",
"llvm.hexagon.A2.combineii",
"llvm.hexagon.A2.combinew",
"llvm.hexagon.A2.max",
"llvm.hexagon.A2.maxp",
"llvm.hexagon.A2.maxu",
"llvm.hexagon.A2.maxup",
"llvm.hexagon.A2.min",
"llvm.hexagon.A2.minp",
"llvm.hexagon.A2.minu",
"llvm.hexagon.A2.minup",
"llvm.hexagon.A2.neg",
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"llvm.x86.sse42.pcmpestria128",
"llvm.x86.sse42.pcmpestric128",
"llvm.x86.sse42.pcmpestrio128",
"llvm.x86.sse42.pcmpestris128",
"llvm.x86.sse42.pcmpestriz128",
"llvm.x86.sse42.pcmpestrm128",
"llvm.x86.sse42.pcmpistri128",
"llvm.x86.sse42.pcmpistria128",
"llvm.x86.sse42.pcmpistric128",
"llvm.x86.sse42.pcmpistrio128",
"llvm.x86.sse42.pcmpistris128",
"llvm.x86.sse42.pcmpistriz128",
"llvm.x86.sse42.pcmpistrm128",
"llvm.x86.sse.add.ss",
"llvm.x86.sse.cmp.ps",
"llvm.x86.sse.cmp.ss",
"llvm.x86.sse.comieq.ss",
"llvm.x86.sse.comige.ss",
"llvm.x86.sse.comigt.ss",
"llvm.x86.sse.comile.ss",
"llvm.x86.sse.comilt.ss",
"llvm.x86.sse.comineq.ss",
"llvm.x86.sse.cvtpd2pi",
"llvm.x86.sse.cvtpi2pd",
"llvm.x86.sse.cvtpi2ps",
"llvm.x86.sse.cvtps2pi",
"llvm.x86.sse.cvtsi2ss",
"llvm.x86.sse.cvtsi642ss",
"llvm.x86.sse.cvtss2si",
"llvm.x86.sse.cvtss2si64",
"llvm.x86.sse.cvttpd2pi",
"llvm.x86.sse.cvttps2pi",
"llvm.x86.sse.cvttss2si",
"llvm.x86.sse.cvttss2si64",
"llvm.x86.sse.div.ss",
"llvm.x86.sse.ldmxcsr",
"llvm.x86.sse.max.ps",
"llvm.x86.sse.max.ss",
"llvm.x86.sse.min.ps",
"llvm.x86.sse.min.ss",
"llvm.x86.sse.movmsk.ps",
"llvm.x86.sse.mul.ss",
"llvm.x86.sse.pshuf.w",
"llvm.x86.sse.rcp.ps",
"llvm.x86.sse.rcp.ss",
"llvm.x86.sse.rsqrt.ps",
"llvm.x86.sse.rsqrt.ss",
"llvm.x86.sse.sfence",
"llvm.x86.sse.sqrt.ps",
"llvm.x86.sse.sqrt.ss",
"llvm.x86.sse.stmxcsr",
"llvm.x86.sse.storeu.ps",
"llvm.x86.sse.sub.ss",
"llvm.x86.sse.ucomieq.ss",
"llvm.x86.sse.ucomige.ss",
"llvm.x86.sse.ucomigt.ss",
"llvm.x86.sse.ucomile.ss",
"llvm.x86.sse.ucomilt.ss",
"llvm.x86.sse.ucomineq.ss",
"llvm.x86.ssse3.pabs.b",
"llvm.x86.ssse3.pabs.b.128",
"llvm.x86.ssse3.pabs.d",
"llvm.x86.ssse3.pabs.d.128",
"llvm.x86.ssse3.pabs.w",
"llvm.x86.ssse3.pabs.w.128",
"llvm.x86.ssse3.phadd.d",
"llvm.x86.ssse3.phadd.d.128",
"llvm.x86.ssse3.phadd.sw",
"llvm.x86.ssse3.phadd.sw.128",
"llvm.x86.ssse3.phadd.w",
"llvm.x86.ssse3.phadd.w.128",
"llvm.x86.ssse3.phsub.d",
"llvm.x86.ssse3.phsub.d.128",
"llvm.x86.ssse3.phsub.sw",
"llvm.x86.ssse3.phsub.sw.128",
"llvm.x86.ssse3.phsub.w",
"llvm.x86.ssse3.phsub.w.128",
"llvm.x86.ssse3.pmadd.ub.sw",
"llvm.x86.ssse3.pmadd.ub.sw.128",
"llvm.x86.ssse3.pmul.hr.sw",
"llvm.x86.ssse3.pmul.hr.sw.128",
"llvm.x86.ssse3.pshuf.b",
"llvm.x86.ssse3.pshuf.b.128",
"llvm.x86.ssse3.psign.b",
"llvm.x86.ssse3.psign.b.128",
"llvm.x86.ssse3.psign.d",
"llvm.x86.ssse3.psign.d.128",
"llvm.x86.ssse3.psign.w",
"llvm.x86.ssse3.psign.w.128",
"llvm.x86.vcvtph2ps.128",
"llvm.x86.vcvtph2ps.256",
"llvm.x86.vcvtps2ph.128",
"llvm.x86.vcvtps2ph.256",
"llvm.x86.wrfsbase.32",
"llvm.x86.wrfsbase.64",
"llvm.x86.wrgsbase.32",
"llvm.x86.wrgsbase.64",
"llvm.x86.xop.vfrcz.pd",
"llvm.x86.xop.vfrcz.pd.256",
"llvm.x86.xop.vfrcz.ps",
"llvm.x86.xop.vfrcz.ps.256",
"llvm.x86.xop.vfrcz.sd",
"llvm.x86.xop.vfrcz.ss",
"llvm.x86.xop.vpcmov",
"llvm.x86.xop.vpcmov.256",
"llvm.x86.xop.vpcomeqb",
"llvm.x86.xop.vpcomeqd",
"llvm.x86.xop.vpcomeqq",
"llvm.x86.xop.vpcomequb",
"llvm.x86.xop.vpcomequd",
"llvm.x86.xop.vpcomequq",
"llvm.x86.xop.vpcomequw",
"llvm.x86.xop.vpcomeqw",
"llvm.x86.xop.vpcomfalseb",
"llvm.x86.xop.vpcomfalsed",
"llvm.x86.xop.vpcomfalseq",
"llvm.x86.xop.vpcomfalseub",
"llvm.x86.xop.vpcomfalseud",
"llvm.x86.xop.vpcomfalseuq",
"llvm.x86.xop.vpcomfalseuw",
"llvm.x86.xop.vpcomfalsew",
"llvm.x86.xop.vpcomgeb",
"llvm.x86.xop.vpcomged",
"llvm.x86.xop.vpcomgeq",
"llvm.x86.xop.vpcomgeub",
"llvm.x86.xop.vpcomgeud",
"llvm.x86.xop.vpcomgeuq",
"llvm.x86.xop.vpcomgeuw",
"llvm.x86.xop.vpcomgew",
"llvm.x86.xop.vpcomgtb",
"llvm.x86.xop.vpcomgtd",
"llvm.x86.xop.vpcomgtq",
"llvm.x86.xop.vpcomgtub",
"llvm.x86.xop.vpcomgtud",
"llvm.x86.xop.vpcomgtuq",
"llvm.x86.xop.vpcomgtuw",
"llvm.x86.xop.vpcomgtw",
"llvm.x86.xop.vpcomleb",
"llvm.x86.xop.vpcomled",
"llvm.x86.xop.vpcomleq",
"llvm.x86.xop.vpcomleub",
"llvm.x86.xop.vpcomleud",
"llvm.x86.xop.vpcomleuq",
"llvm.x86.xop.vpcomleuw",
"llvm.x86.xop.vpcomlew",
"llvm.x86.xop.vpcomltb",
"llvm.x86.xop.vpcomltd",
"llvm.x86.xop.vpcomltq",
"llvm.x86.xop.vpcomltub",
"llvm.x86.xop.vpcomltud",
"llvm.x86.xop.vpcomltuq",
"llvm.x86.xop.vpcomltuw",
"llvm.x86.xop.vpcomltw",
"llvm.x86.xop.vpcomneb",
"llvm.x86.xop.vpcomned",
"llvm.x86.xop.vpcomneq",
"llvm.x86.xop.vpcomneub",
"llvm.x86.xop.vpcomneud",
"llvm.x86.xop.vpcomneuq",
"llvm.x86.xop.vpcomneuw",
"llvm.x86.xop.vpcomnew",
"llvm.x86.xop.vpcomtrueb",
"llvm.x86.xop.vpcomtrued",
"llvm.x86.xop.vpcomtrueq",
"llvm.x86.xop.vpcomtrueub",
"llvm.x86.xop.vpcomtrueud",
"llvm.x86.xop.vpcomtrueuq",
"llvm.x86.xop.vpcomtrueuw",
"llvm.x86.xop.vpcomtruew",
"llvm.x86.xop.vpermil2pd",
"llvm.x86.xop.vpermil2pd.256",
"llvm.x86.xop.vpermil2ps",
"llvm.x86.xop.vpermil2ps.256",
"llvm.x86.xop.vphaddbd",
"llvm.x86.xop.vphaddbq",
"llvm.x86.xop.vphaddbw",
"llvm.x86.xop.vphadddq",
"llvm.x86.xop.vphaddubd",
"llvm.x86.xop.vphaddubq",
"llvm.x86.xop.vphaddubw",
"llvm.x86.xop.vphaddudq",
"llvm.x86.xop.vphadduwd",
"llvm.x86.xop.vphadduwq",
"llvm.x86.xop.vphaddwd",
"llvm.x86.xop.vphaddwq",
"llvm.x86.xop.vphsubbw",
"llvm.x86.xop.vphsubdq",
"llvm.x86.xop.vphsubwd",
"llvm.x86.xop.vpmacsdd",
"llvm.x86.xop.vpmacsdqh",
"llvm.x86.xop.vpmacsdql",
"llvm.x86.xop.vpmacssdd",
"llvm.x86.xop.vpmacssdqh",
"llvm.x86.xop.vpmacssdql",
"llvm.x86.xop.vpmacsswd",
"llvm.x86.xop.vpmacssww",
"llvm.x86.xop.vpmacswd",
"llvm.x86.xop.vpmacsww",
"llvm.x86.xop.vpmadcsswd",
"llvm.x86.xop.vpmadcswd",
"llvm.x86.xop.vpperm",
"llvm.x86.xop.vprotb",
"llvm.x86.xop.vprotd",
"llvm.x86.xop.vprotq",
"llvm.x86.xop.vprotw",
"llvm.x86.xop.vpshab",
"llvm.x86.xop.vpshad",
"llvm.x86.xop.vpshaq",
"llvm.x86.xop.vpshaw",
"llvm.x86.xop.vpshlb",
"llvm.x86.xop.vpshld",
"llvm.x86.xop.vpshlq",
"llvm.x86.xop.vpshlw",
"llvm.xcore.bitrev",
"llvm.xcore.checkevent",
"llvm.xcore.chkct",
"llvm.xcore.clre",
"llvm.xcore.clrsr",
"llvm.xcore.crc32",
"llvm.xcore.crc8",
"llvm.xcore.eeu",
"llvm.xcore.endin",
"llvm.xcore.freer",
"llvm.xcore.geted",
"llvm.xcore.getet",
"llvm.xcore.getid",
"llvm.xcore.getps",
"llvm.xcore.getr",
"llvm.xcore.getst",
"llvm.xcore.getts",
"llvm.xcore.in",
"llvm.xcore.inct",
"llvm.xcore.initcp",
"llvm.xcore.initdp",
"llvm.xcore.initlr",
"llvm.xcore.initpc",
"llvm.xcore.initsp",
"llvm.xcore.inshr",
"llvm.xcore.int",
"llvm.xcore.mjoin",
"llvm.xcore.msync",
"llvm.xcore.out",
"llvm.xcore.outct",
"llvm.xcore.outshr",
"llvm.xcore.outt",
"llvm.xcore.peek",
"llvm.xcore.setc",
"llvm.xcore.setclk",
"llvm.xcore.setd",
"llvm.xcore.setev",
"llvm.xcore.setps",
"llvm.xcore.setpsc",
"llvm.xcore.setpt",
"llvm.xcore.setrdy",
"llvm.xcore.setsr",
"llvm.xcore.settw",
"llvm.xcore.setv",
"llvm.xcore.sext",
"llvm.xcore.ssync",
"llvm.xcore.syncr",
"llvm.xcore.testct",
"llvm.xcore.testwct",
"llvm.xcore.waitevent",
"llvm.xcore.zext",
#endif
// Intrinsic ID to overload bitset
#ifdef GET_INTRINSIC_OVERLOAD_TABLE
static const uint8_t OTable[] = {
0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<1),
0 | (1<<4) | (1<<5) | (1<<6),
0 | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<2) | (1<<3) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2),
0,
0 | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0,
0 | (1<<4) | (1<<5) | (1<<6),
0 | (1<<0),
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0 | (1<<1) | (1<<2) | (1<<3) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<2) | (1<<3),
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0 | (1<<1),
0,
0,
0,
0 | (1<<6),
0 | (1<<2) | (1<<3),
0,
0,
0,
0,
0,
0,
0,
0,
0,
0 | (1<<6) | (1<<7),
0 | (1<<3) | (1<<5) | (1<<6) | (1<<7),
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0 | (1<<0) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
0 | (1<<0) | (1<<1) | (1<<2) | (1<<4) | (1<<5) | (1<<6),
0 | (1<<0) | (1<<1) | (1<<4) | (1<<5) | (1<<6),
0
};
return (OTable[id/8] & (1 << (id%8))) != 0;
#endif
// Function name -> enum value recognizer code.
#ifdef GET_FUNCTION_RECOGNIZER
StringRef NameR(Name+6, Len-6); // Skip over 'llvm.'
switch (Name[5]) { // Dispatch on first letter.
default: break;
case 'C':
if (NameR.startswith("NOT.")) return Intrinsic::CNOT;
break; // end of 'C' case.
case 'F':
if (NameR.startswith("redkin.")) return Intrinsic::Fredkin;
break; // end of 'F' case.
case 'H':
if (NameR.startswith(".")) return Intrinsic::H;
break; // end of 'H' case.
case 'M':
if (NameR.startswith("easX.")) return Intrinsic::MeasX;
if (NameR.startswith("easZ.")) return Intrinsic::MeasZ;
break; // end of 'M' case.
case 'P':
if (NameR.startswith("repX.")) return Intrinsic::PrepX;
if (NameR.startswith("repZ.")) return Intrinsic::PrepZ;
break; // end of 'P' case.
case 'R':
if (NameR.startswith("x.")) return Intrinsic::Rx;
if (NameR.startswith("y.")) return Intrinsic::Ry;
if (NameR.startswith("z.")) return Intrinsic::Rz;
break; // end of 'R' case.
case 'S':
if (NameR.startswith(".")) return Intrinsic::S;
if (NameR.startswith("dag.")) return Intrinsic::Sdag;
break; // end of 'S' case.
case 'T':
if (NameR.startswith(".")) return Intrinsic::T;
if (NameR.startswith("dag.")) return Intrinsic::Tdag;
if (NameR.startswith("offoli.")) return Intrinsic::Toffoli;
break; // end of 'T' case.
case 'X':
if (NameR.startswith(".")) return Intrinsic::X;
break; // end of 'X' case.
case 'Y':
if (NameR.startswith(".")) return Intrinsic::Y;
break; // end of 'Y' case.
case 'Z':
if (NameR.startswith(".")) return Intrinsic::Z;
break; // end of 'Z' case.
case 'a':
if (NameR.startswith("nnotation.")) return Intrinsic::annotation;
if (NameR.startswith("rm.neon.vabds.")) return Intrinsic::arm_neon_vabds;
if (NameR.startswith("rm.neon.vabdu.")) return Intrinsic::arm_neon_vabdu;
if (NameR.startswith("rm.neon.vabs.")) return Intrinsic::arm_neon_vabs;
if (NameR.startswith("rm.neon.vaddhn.")) return Intrinsic::arm_neon_vaddhn;
if (NameR.startswith("rm.neon.vcls.")) return Intrinsic::arm_neon_vcls;
if (NameR.startswith("rm.neon.vclz.")) return Intrinsic::arm_neon_vclz;
if (NameR.startswith("rm.neon.vcnt.")) return Intrinsic::arm_neon_vcnt;
if (NameR.startswith("rm.neon.vcvtfp2fxs.")) return Intrinsic::arm_neon_vcvtfp2fxs;
if (NameR.startswith("rm.neon.vcvtfp2fxu.")) return Intrinsic::arm_neon_vcvtfp2fxu;
if (NameR.startswith("rm.neon.vcvtfxs2fp.")) return Intrinsic::arm_neon_vcvtfxs2fp;
if (NameR.startswith("rm.neon.vcvtfxu2fp.")) return Intrinsic::arm_neon_vcvtfxu2fp;
if (NameR.startswith("rm.neon.vhadds.")) return Intrinsic::arm_neon_vhadds;
if (NameR.startswith("rm.neon.vhaddu.")) return Intrinsic::arm_neon_vhaddu;
if (NameR.startswith("rm.neon.vhsubs.")) return Intrinsic::arm_neon_vhsubs;
if (NameR.startswith("rm.neon.vhsubu.")) return Intrinsic::arm_neon_vhsubu;
if (NameR.startswith("rm.neon.vld1.")) return Intrinsic::arm_neon_vld1;
if (NameR.startswith("rm.neon.vld2.")) return Intrinsic::arm_neon_vld2;
if (NameR.startswith("rm.neon.vld2lane.")) return Intrinsic::arm_neon_vld2lane;
if (NameR.startswith("rm.neon.vld3.")) return Intrinsic::arm_neon_vld3;
if (NameR.startswith("rm.neon.vld3lane.")) return Intrinsic::arm_neon_vld3lane;
if (NameR.startswith("rm.neon.vld4.")) return Intrinsic::arm_neon_vld4;
if (NameR.startswith("rm.neon.vld4lane.")) return Intrinsic::arm_neon_vld4lane;
if (NameR.startswith("rm.neon.vmaxs.")) return Intrinsic::arm_neon_vmaxs;
if (NameR.startswith("rm.neon.vmaxu.")) return Intrinsic::arm_neon_vmaxu;
if (NameR.startswith("rm.neon.vmins.")) return Intrinsic::arm_neon_vmins;
if (NameR.startswith("rm.neon.vminu.")) return Intrinsic::arm_neon_vminu;
if (NameR.startswith("rm.neon.vmullp.")) return Intrinsic::arm_neon_vmullp;
if (NameR.startswith("rm.neon.vmulls.")) return Intrinsic::arm_neon_vmulls;
if (NameR.startswith("rm.neon.vmullu.")) return Intrinsic::arm_neon_vmullu;
if (NameR.startswith("rm.neon.vmulp.")) return Intrinsic::arm_neon_vmulp;
if (NameR.startswith("rm.neon.vpadals.")) return Intrinsic::arm_neon_vpadals;
if (NameR.startswith("rm.neon.vpadalu.")) return Intrinsic::arm_neon_vpadalu;
if (NameR.startswith("rm.neon.vpadd.")) return Intrinsic::arm_neon_vpadd;
if (NameR.startswith("rm.neon.vpaddls.")) return Intrinsic::arm_neon_vpaddls;
if (NameR.startswith("rm.neon.vpaddlu.")) return Intrinsic::arm_neon_vpaddlu;
if (NameR.startswith("rm.neon.vpmaxs.")) return Intrinsic::arm_neon_vpmaxs;
if (NameR.startswith("rm.neon.vpmaxu.")) return Intrinsic::arm_neon_vpmaxu;
if (NameR.startswith("rm.neon.vpmins.")) return Intrinsic::arm_neon_vpmins;
if (NameR.startswith("rm.neon.vpminu.")) return Intrinsic::arm_neon_vpminu;
if (NameR.startswith("rm.neon.vqabs.")) return Intrinsic::arm_neon_vqabs;
if (NameR.startswith("rm.neon.vqadds.")) return Intrinsic::arm_neon_vqadds;
if (NameR.startswith("rm.neon.vqaddu.")) return Intrinsic::arm_neon_vqaddu;
if (NameR.startswith("rm.neon.vqdmlal.")) return Intrinsic::arm_neon_vqdmlal;
if (NameR.startswith("rm.neon.vqdmlsl.")) return Intrinsic::arm_neon_vqdmlsl;
if (NameR.startswith("rm.neon.vqdmulh.")) return Intrinsic::arm_neon_vqdmulh;
if (NameR.startswith("rm.neon.vqdmull.")) return Intrinsic::arm_neon_vqdmull;
if (NameR.startswith("rm.neon.vqmovns.")) return Intrinsic::arm_neon_vqmovns;
if (NameR.startswith("rm.neon.vqmovnsu.")) return Intrinsic::arm_neon_vqmovnsu;
if (NameR.startswith("rm.neon.vqmovnu.")) return Intrinsic::arm_neon_vqmovnu;
if (NameR.startswith("rm.neon.vqneg.")) return Intrinsic::arm_neon_vqneg;
if (NameR.startswith("rm.neon.vqrdmulh.")) return Intrinsic::arm_neon_vqrdmulh;
if (NameR.startswith("rm.neon.vqrshiftns.")) return Intrinsic::arm_neon_vqrshiftns;
if (NameR.startswith("rm.neon.vqrshiftnsu.")) return Intrinsic::arm_neon_vqrshiftnsu;
if (NameR.startswith("rm.neon.vqrshiftnu.")) return Intrinsic::arm_neon_vqrshiftnu;
if (NameR.startswith("rm.neon.vqrshifts.")) return Intrinsic::arm_neon_vqrshifts;
if (NameR.startswith("rm.neon.vqrshiftu.")) return Intrinsic::arm_neon_vqrshiftu;
if (NameR.startswith("rm.neon.vqshiftns.")) return Intrinsic::arm_neon_vqshiftns;
if (NameR.startswith("rm.neon.vqshiftnsu.")) return Intrinsic::arm_neon_vqshiftnsu;
if (NameR.startswith("rm.neon.vqshiftnu.")) return Intrinsic::arm_neon_vqshiftnu;
if (NameR.startswith("rm.neon.vqshifts.")) return Intrinsic::arm_neon_vqshifts;
if (NameR.startswith("rm.neon.vqshiftsu.")) return Intrinsic::arm_neon_vqshiftsu;
if (NameR.startswith("rm.neon.vqshiftu.")) return Intrinsic::arm_neon_vqshiftu;
if (NameR.startswith("rm.neon.vqsubs.")) return Intrinsic::arm_neon_vqsubs;
if (NameR.startswith("rm.neon.vqsubu.")) return Intrinsic::arm_neon_vqsubu;
if (NameR.startswith("rm.neon.vraddhn.")) return Intrinsic::arm_neon_vraddhn;
if (NameR.startswith("rm.neon.vrecpe.")) return Intrinsic::arm_neon_vrecpe;
if (NameR.startswith("rm.neon.vrecps.")) return Intrinsic::arm_neon_vrecps;
if (NameR.startswith("rm.neon.vrhadds.")) return Intrinsic::arm_neon_vrhadds;
if (NameR.startswith("rm.neon.vrhaddu.")) return Intrinsic::arm_neon_vrhaddu;
if (NameR.startswith("rm.neon.vrshiftn.")) return Intrinsic::arm_neon_vrshiftn;
if (NameR.startswith("rm.neon.vrshifts.")) return Intrinsic::arm_neon_vrshifts;
if (NameR.startswith("rm.neon.vrshiftu.")) return Intrinsic::arm_neon_vrshiftu;
if (NameR.startswith("rm.neon.vrsqrte.")) return Intrinsic::arm_neon_vrsqrte;
if (NameR.startswith("rm.neon.vrsqrts.")) return Intrinsic::arm_neon_vrsqrts;
if (NameR.startswith("rm.neon.vrsubhn.")) return Intrinsic::arm_neon_vrsubhn;
if (NameR.startswith("rm.neon.vshiftins.")) return Intrinsic::arm_neon_vshiftins;
if (NameR.startswith("rm.neon.vshiftls.")) return Intrinsic::arm_neon_vshiftls;
if (NameR.startswith("rm.neon.vshiftlu.")) return Intrinsic::arm_neon_vshiftlu;
if (NameR.startswith("rm.neon.vshiftn.")) return Intrinsic::arm_neon_vshiftn;
if (NameR.startswith("rm.neon.vshifts.")) return Intrinsic::arm_neon_vshifts;
if (NameR.startswith("rm.neon.vshiftu.")) return Intrinsic::arm_neon_vshiftu;
if (NameR.startswith("rm.neon.vst1.")) return Intrinsic::arm_neon_vst1;
if (NameR.startswith("rm.neon.vst2.")) return Intrinsic::arm_neon_vst2;
if (NameR.startswith("rm.neon.vst2lane.")) return Intrinsic::arm_neon_vst2lane;
if (NameR.startswith("rm.neon.vst3.")) return Intrinsic::arm_neon_vst3;
if (NameR.startswith("rm.neon.vst3lane.")) return Intrinsic::arm_neon_vst3lane;
if (NameR.startswith("rm.neon.vst4.")) return Intrinsic::arm_neon_vst4;
if (NameR.startswith("rm.neon.vst4lane.")) return Intrinsic::arm_neon_vst4lane;
if (NameR.startswith("rm.neon.vsubhn.")) return Intrinsic::arm_neon_vsubhn;
if (NameR.startswith("rm.vcvtr.")) return Intrinsic::arm_vcvtr;
if (NameR.startswith("rm.vcvtru.")) return Intrinsic::arm_vcvtru;
switch (NameR.size()) {
default: break;
case 6: // 3 strings to match.
if (NameR.substr(0, 3) != "rm.")
break;
switch (NameR[3]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(4, 2) != "dp")
break;
return Intrinsic::arm_cdp; // "rm.cdp"
case 'm': // 2 strings to match.
switch (NameR[4]) {
default: break;
case 'c': // 1 string to match.
if (NameR[5] != 'r')
break;
return Intrinsic::arm_mcr; // "rm.mcr"
case 'r': // 1 string to match.
if (NameR[5] != 'c')
break;
return Intrinsic::arm_mrc; // "rm.mrc"
}
break;
}
break;
case 7: // 8 strings to match.
if (NameR.substr(0, 3) != "rm.")
break;
switch (NameR[3]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(4, 3) != "dp2")
break;
return Intrinsic::arm_cdp2; // "rm.cdp2"
case 'm': // 3 strings to match.
switch (NameR[4]) {
default: break;
case 'c': // 2 strings to match.
if (NameR[5] != 'r')
break;
switch (NameR[6]) {
default: break;
case '2': // 1 string to match.
return Intrinsic::arm_mcr2; // "rm.mcr2"
case 'r': // 1 string to match.
return Intrinsic::arm_mcrr; // "rm.mcrr"
}
break;
case 'r': // 1 string to match.
if (NameR.substr(5, 2) != "c2")
break;
return Intrinsic::arm_mrc2; // "rm.mrc2"
}
break;
case 'q': // 2 strings to match.
switch (NameR[4]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(5, 2) != "dd")
break;
return Intrinsic::arm_qadd; // "rm.qadd"
case 's': // 1 string to match.
if (NameR.substr(5, 2) != "ub")
break;
return Intrinsic::arm_qsub; // "rm.qsub"
}
break;
case 's': // 1 string to match.
if (NameR.substr(4, 3) != "sat")
break;
return Intrinsic::arm_ssat; // "rm.ssat"
case 'u': // 1 string to match.
if (NameR.substr(4, 3) != "sat")
break;
return Intrinsic::arm_usat; // "rm.usat"
}
break;
case 8: // 1 string to match.
if (NameR.substr(0, 8) != "rm.mcrr2")
break;
return Intrinsic::arm_mcrr2; // "rm.mcrr2"
case 9: // 2 strings to match.
if (NameR.substr(0, 3) != "rm.")
break;
switch (NameR[3]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(4, 5) != "drexd")
break;
return Intrinsic::arm_ldrexd; // "rm.ldrexd"
case 's': // 1 string to match.
if (NameR.substr(4, 5) != "trexd")
break;
return Intrinsic::arm_strexd; // "rm.strexd"
}
break;
case 12: // 2 strings to match.
if (NameR.substr(0, 3) != "rm.")
break;
switch (NameR[3]) {
default: break;
case 'g': // 1 string to match.
if (NameR.substr(4, 8) != "et.fpscr")
break;
return Intrinsic::arm_get_fpscr; // "rm.get.fpscr"
case 's': // 1 string to match.
if (NameR.substr(4, 8) != "et.fpscr")
break;
return Intrinsic::arm_set_fpscr; // "rm.set.fpscr"
}
break;
case 13: // 8 strings to match.
if (NameR.substr(0, 11) != "rm.neon.vtb")
break;
switch (NameR[11]) {
default: break;
case 'l': // 4 strings to match.
switch (NameR[12]) {
default: break;
case '1': // 1 string to match.
return Intrinsic::arm_neon_vtbl1; // "rm.neon.vtbl1"
case '2': // 1 string to match.
return Intrinsic::arm_neon_vtbl2; // "rm.neon.vtbl2"
case '3': // 1 string to match.
return Intrinsic::arm_neon_vtbl3; // "rm.neon.vtbl3"
case '4': // 1 string to match.
return Intrinsic::arm_neon_vtbl4; // "rm.neon.vtbl4"
}
break;
case 'x': // 4 strings to match.
switch (NameR[12]) {
default: break;
case '1': // 1 string to match.
return Intrinsic::arm_neon_vtbx1; // "rm.neon.vtbx1"
case '2': // 1 string to match.
return Intrinsic::arm_neon_vtbx2; // "rm.neon.vtbx2"
case '3': // 1 string to match.
return Intrinsic::arm_neon_vtbx3; // "rm.neon.vtbx3"
case '4': // 1 string to match.
return Intrinsic::arm_neon_vtbx4; // "rm.neon.vtbx4"
}
break;
}
break;
case 14: // 4 strings to match.
if (NameR.substr(0, 12) != "rm.neon.vacg")
break;
switch (NameR[12]) {
default: break;
case 'e': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::arm_neon_vacged; // "rm.neon.vacged"
case 'q': // 1 string to match.
return Intrinsic::arm_neon_vacgeq; // "rm.neon.vacgeq"
}
break;
case 't': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::arm_neon_vacgtd; // "rm.neon.vacgtd"
case 'q': // 1 string to match.
return Intrinsic::arm_neon_vacgtq; // "rm.neon.vacgtq"
}
break;
}
break;
case 16: // 1 string to match.
if (NameR.substr(0, 16) != "djust.trampoline")
break;
return Intrinsic::adjust_trampoline; // "djust.trampoline"
case 17: // 3 strings to match.
if (NameR.substr(0, 3) != "rm.")
break;
switch (NameR[3]) {
default: break;
case 'n': // 2 strings to match.
if (NameR.substr(4, 8) != "eon.vcvt")
break;
switch (NameR[12]) {
default: break;
case 'f': // 1 string to match.
if (NameR.substr(13, 4) != "p2hf")
break;
return Intrinsic::arm_neon_vcvtfp2hf; // "rm.neon.vcvtfp2hf"
case 'h': // 1 string to match.
if (NameR.substr(13, 4) != "f2fp")
break;
return Intrinsic::arm_neon_vcvthf2fp; // "rm.neon.vcvthf2fp"
}
break;
case 't': // 1 string to match.
if (NameR.substr(4, 13) != "hread.pointer")
break;
return Intrinsic::arm_thread_pointer; // "rm.thread.pointer"
}
break;
}
break; // end of 'a' case.
case 'b':
if (NameR.startswith("swap.")) return Intrinsic::bswap;
break; // end of 'b' case.
case 'c':
if (NameR.startswith("onvertff.")) return Intrinsic::convertff;
if (NameR.startswith("onvertfsi.")) return Intrinsic::convertfsi;
if (NameR.startswith("onvertfui.")) return Intrinsic::convertfui;
if (NameR.startswith("onvertsif.")) return Intrinsic::convertsif;
if (NameR.startswith("onvertss.")) return Intrinsic::convertss;
if (NameR.startswith("onvertsu.")) return Intrinsic::convertsu;
if (NameR.startswith("onvertuif.")) return Intrinsic::convertuif;
if (NameR.startswith("onvertus.")) return Intrinsic::convertus;
if (NameR.startswith("onvertuu.")) return Intrinsic::convertuu;
if (NameR.startswith("os.")) return Intrinsic::cos;
if (NameR.startswith("tlz.")) return Intrinsic::ctlz;
if (NameR.startswith("tpop.")) return Intrinsic::ctpop;
if (NameR.startswith("ttz.")) return Intrinsic::cttz;
switch (NameR.size()) {
default: break;
case 14: // 1 string to match.
if (NameR.substr(0, 14) != "onvert.to.fp16")
break;
return Intrinsic::convert_to_fp16; // "onvert.to.fp16"
case 16: // 1 string to match.
if (NameR.substr(0, 16) != "onvert.from.fp16")
break;
return Intrinsic::convert_from_fp16; // "onvert.from.fp16"
}
break; // end of 'c' case.
case 'd':
switch (NameR.size()) {
default: break;
case 8: // 1 string to match.
if (NameR.substr(0, 8) != "bg.value")
break;
return Intrinsic::dbg_value; // "bg.value"
case 10: // 1 string to match.
if (NameR.substr(0, 10) != "bg.declare")
break;
return Intrinsic::dbg_declare; // "bg.declare"
}
break; // end of 'd' case.
case 'e':
if (NameR.startswith("xp.")) return Intrinsic::exp;
if (NameR.startswith("xp2.")) return Intrinsic::exp2;
if (NameR.startswith("xpect.")) return Intrinsic::expect;
switch (NameR.size()) {
default: break;
case 11: // 2 strings to match.
if (NameR.substr(0, 2) != "h.")
break;
switch (NameR[2]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(3, 8) != "warf.cfa")
break;
return Intrinsic::eh_dwarf_cfa; // "h.dwarf.cfa"
case 's': // 1 string to match.
if (NameR.substr(3, 8) != "jlj.lsda")
break;
return Intrinsic::eh_sjlj_lsda; // "h.sjlj.lsda"
}
break;
case 12: // 3 strings to match.
if (NameR.substr(0, 2) != "h.")
break;
switch (NameR[2]) {
default: break;
case 'r': // 2 strings to match.
if (NameR.substr(3, 7) != "eturn.i")
break;
switch (NameR[10]) {
default: break;
case '3': // 1 string to match.
if (NameR[11] != '2')
break;
return Intrinsic::eh_return_i32; // "h.return.i32"
case '6': // 1 string to match.
if (NameR[11] != '4')
break;
return Intrinsic::eh_return_i64; // "h.return.i64"
}
break;
case 't': // 1 string to match.
if (NameR.substr(3, 9) != "ypeid.for")
break;
return Intrinsic::eh_typeid_for; // "h.typeid.for"
}
break;
case 13: // 2 strings to match.
if (NameR.substr(0, 2) != "h.")
break;
switch (NameR[2]) {
default: break;
case 's': // 1 string to match.
if (NameR.substr(3, 10) != "jlj.setjmp")
break;
return Intrinsic::eh_sjlj_setjmp; // "h.sjlj.setjmp"
case 'u': // 1 string to match.
if (NameR.substr(3, 10) != "nwind.init")
break;
return Intrinsic::eh_unwind_init; // "h.unwind.init"
}
break;
case 14: // 1 string to match.
if (NameR.substr(0, 14) != "h.sjlj.longjmp")
break;
return Intrinsic::eh_sjlj_longjmp; // "h.sjlj.longjmp"
case 15: // 1 string to match.
if (NameR.substr(0, 15) != "h.sjlj.callsite")
break;
return Intrinsic::eh_sjlj_callsite; // "h.sjlj.callsite"
case 22: // 1 string to match.
if (NameR.substr(0, 22) != "h.sjlj.functioncontext")
break;
return Intrinsic::eh_sjlj_functioncontext; // "h.sjlj.functioncontext"
}
break; // end of 'e' case.
case 'f':
if (NameR.startswith("ma.")) return Intrinsic::fma;
switch (NameR.size()) {
default: break;
case 9: // 1 string to match.
if (NameR.substr(0, 9) != "lt.rounds")
break;
return Intrinsic::flt_rounds; // "lt.rounds"
case 11: // 1 string to match.
if (NameR.substr(0, 11) != "rameaddress")
break;
return Intrinsic::frameaddress; // "rameaddress"
}
break; // end of 'f' case.
case 'g':
switch (NameR.size()) {
default: break;
case 5: // 2 strings to match.
if (NameR.substr(0, 2) != "cr")
break;
switch (NameR[2]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(3, 2) != "ad")
break;
return Intrinsic::gcread; // "cread"
case 'o': // 1 string to match.
if (NameR.substr(3, 2) != "ot")
break;
return Intrinsic::gcroot; // "croot"
}
break;
case 6: // 1 string to match.
if (NameR.substr(0, 6) != "cwrite")
break;
return Intrinsic::gcwrite; // "cwrite"
}
break; // end of 'g' case.
case 'h':
switch (NameR.size()) {
default: break;
case 12: // 2 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 1 string to match.
if (NameR.substr(8, 4) != "2.or")
break;
return Intrinsic::hexagon_A2_or; // "exagon.A2.or"
case 'C': // 1 string to match.
if (NameR.substr(8, 4) != "2.or")
break;
return Intrinsic::hexagon_C2_or; // "exagon.C2.or"
}
break;
case 13: // 23 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 13 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 12 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 3 strings to match.
switch (NameR[11]) {
default: break;
case 'b': // 1 string to match.
if (NameR[12] != 's')
break;
return Intrinsic::hexagon_A2_abs; // "exagon.A2.abs"
case 'd': // 1 string to match.
if (NameR[12] != 'd')
break;
return Intrinsic::hexagon_A2_add; // "exagon.A2.add"
case 'n': // 1 string to match.
if (NameR[12] != 'd')
break;
return Intrinsic::hexagon_A2_and; // "exagon.A2.and"
}
break;
case 'm': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 1 string to match.
if (NameR[12] != 'x')
break;
return Intrinsic::hexagon_A2_max; // "exagon.A2.max"
case 'i': // 1 string to match.
if (NameR[12] != 'n')
break;
return Intrinsic::hexagon_A2_min; // "exagon.A2.min"
}
break;
case 'n': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'e': // 1 string to match.
if (NameR[12] != 'g')
break;
return Intrinsic::hexagon_A2_neg; // "exagon.A2.neg"
case 'o': // 1 string to match.
if (NameR[12] != 't')
break;
return Intrinsic::hexagon_A2_not; // "exagon.A2.not"
}
break;
case 'o': // 1 string to match.
if (NameR.substr(11, 2) != "rp")
break;
return Intrinsic::hexagon_A2_orp; // "exagon.A2.orp"
case 's': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 1 string to match.
if (NameR[12] != 't')
break;
return Intrinsic::hexagon_A2_sat; // "exagon.A2.sat"
case 'u': // 1 string to match.
if (NameR[12] != 'b')
break;
return Intrinsic::hexagon_A2_sub; // "exagon.A2.sub"
}
break;
case 't': // 1 string to match.
if (NameR.substr(11, 2) != "fr")
break;
return Intrinsic::hexagon_A2_tfr; // "exagon.A2.tfr"
case 'x': // 1 string to match.
if (NameR.substr(11, 2) != "or")
break;
return Intrinsic::hexagon_A2_xor; // "exagon.A2.xor"
}
break;
case '4': // 1 string to match.
if (NameR.substr(9, 4) != ".orn")
break;
return Intrinsic::hexagon_A4_orn; // "exagon.A4.orn"
}
break;
case 'C': // 5 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 2) != "nd")
break;
return Intrinsic::hexagon_C2_and; // "exagon.C2.and"
case 'm': // 1 string to match.
if (NameR.substr(11, 2) != "ux")
break;
return Intrinsic::hexagon_C2_mux; // "exagon.C2.mux"
case 'n': // 1 string to match.
if (NameR.substr(11, 2) != "ot")
break;
return Intrinsic::hexagon_C2_not; // "exagon.C2.not"
case 'o': // 1 string to match.
if (NameR.substr(11, 2) != "rn")
break;
return Intrinsic::hexagon_C2_orn; // "exagon.C2.orn"
case 'x': // 1 string to match.
if (NameR.substr(11, 2) != "or")
break;
return Intrinsic::hexagon_C2_xor; // "exagon.C2.xor"
}
break;
case 'S': // 5 strings to match.
if (NameR.substr(8, 3) != "2.c")
break;
switch (NameR[11]) {
default: break;
case 'l': // 3 strings to match.
switch (NameR[12]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_S2_cl0; // "exagon.S2.cl0"
case '1': // 1 string to match.
return Intrinsic::hexagon_S2_cl1; // "exagon.S2.cl1"
case 'b': // 1 string to match.
return Intrinsic::hexagon_S2_clb; // "exagon.S2.clb"
}
break;
case 't': // 2 strings to match.
switch (NameR[12]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_S2_ct0; // "exagon.S2.ct0"
case '1': // 1 string to match.
return Intrinsic::hexagon_S2_ct1; // "exagon.S2.ct1"
}
break;
}
break;
}
break;
case 14: // 40 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 26 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 24 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 6 strings to match.
switch (NameR[11]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(12, 2) != "sp")
break;
return Intrinsic::hexagon_A2_absp; // "exagon.A2.absp"
case 'd': // 2 strings to match.
if (NameR[12] != 'd')
break;
switch (NameR[13]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_A2_addi; // "exagon.A2.addi"
case 'p': // 1 string to match.
return Intrinsic::hexagon_A2_addp; // "exagon.A2.addp"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(12, 2) != "dp")
break;
return Intrinsic::hexagon_A2_andp; // "exagon.A2.andp"
case 's': // 2 strings to match.
switch (NameR[12]) {
default: break;
case 'l': // 1 string to match.
if (NameR[13] != 'h')
break;
return Intrinsic::hexagon_A2_aslh; // "exagon.A2.aslh"
case 'r': // 1 string to match.
if (NameR[13] != 'h')
break;
return Intrinsic::hexagon_A2_asrh; // "exagon.A2.asrh"
}
break;
}
break;
case 'm': // 4 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[12] != 'x')
break;
switch (NameR[13]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_A2_maxp; // "exagon.A2.maxp"
case 'u': // 1 string to match.
return Intrinsic::hexagon_A2_maxu; // "exagon.A2.maxu"
}
break;
case 'i': // 2 strings to match.
if (NameR[12] != 'n')
break;
switch (NameR[13]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_A2_minp; // "exagon.A2.minp"
case 'u': // 1 string to match.
return Intrinsic::hexagon_A2_minu; // "exagon.A2.minu"
}
break;
}
break;
case 'n': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(12, 2) != "gp")
break;
return Intrinsic::hexagon_A2_negp; // "exagon.A2.negp"
case 'o': // 1 string to match.
if (NameR.substr(12, 2) != "tp")
break;
return Intrinsic::hexagon_A2_notp; // "exagon.A2.notp"
}
break;
case 'o': // 1 string to match.
if (NameR.substr(11, 3) != "rir")
break;
return Intrinsic::hexagon_A2_orir; // "exagon.A2.orir"
case 's': // 7 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[12] != 't')
break;
switch (NameR[13]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_satb; // "exagon.A2.satb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_sath; // "exagon.A2.sath"
}
break;
case 'u': // 1 string to match.
if (NameR.substr(12, 2) != "bp")
break;
return Intrinsic::hexagon_A2_subp; // "exagon.A2.subp"
case 'w': // 1 string to match.
if (NameR.substr(12, 2) != "iz")
break;
return Intrinsic::hexagon_A2_swiz; // "exagon.A2.swiz"
case 'x': // 3 strings to match.
if (NameR[12] != 't')
break;
switch (NameR[13]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_sxtb; // "exagon.A2.sxtb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_sxth; // "exagon.A2.sxth"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_sxtw; // "exagon.A2.sxtw"
}
break;
}
break;
case 't': // 1 string to match.
if (NameR.substr(11, 3) != "frp")
break;
return Intrinsic::hexagon_A2_tfrp; // "exagon.A2.tfrp"
case 'x': // 1 string to match.
if (NameR.substr(11, 3) != "orp")
break;
return Intrinsic::hexagon_A2_xorp; // "exagon.A2.xorp"
case 'z': // 2 strings to match.
if (NameR.substr(11, 2) != "xt")
break;
switch (NameR[13]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_zxtb; // "exagon.A2.zxtb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_zxth; // "exagon.A2.zxth"
}
break;
}
break;
case '4': // 2 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 3) != "ndn")
break;
return Intrinsic::hexagon_A4_andn; // "exagon.A4.andn"
case 'o': // 1 string to match.
if (NameR.substr(11, 3) != "rnp")
break;
return Intrinsic::hexagon_A4_ornp; // "exagon.A4.ornp"
}
break;
}
break;
case 'C': // 5 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'a': // 3 strings to match.
switch (NameR[11]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(12, 2) != "l8")
break;
return Intrinsic::hexagon_C2_all8; // "exagon.C2.all8"
case 'n': // 2 strings to match.
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR[13] != 'n')
break;
return Intrinsic::hexagon_C2_andn; // "exagon.C2.andn"
case 'y': // 1 string to match.
if (NameR[13] != '8')
break;
return Intrinsic::hexagon_C2_any8; // "exagon.C2.any8"
}
break;
}
break;
case 'm': // 1 string to match.
if (NameR.substr(11, 3) != "ask")
break;
return Intrinsic::hexagon_C2_mask; // "exagon.C2.mask"
case 'v': // 1 string to match.
if (NameR.substr(11, 3) != "mux")
break;
return Intrinsic::hexagon_C2_vmux; // "exagon.C2.vmux"
}
break;
case 'M': // 3 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 3) != "cci")
break;
return Intrinsic::hexagon_M2_acci; // "exagon.M2.acci"
case 'm': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(12, 2) != "ci")
break;
return Intrinsic::hexagon_M2_maci; // "exagon.M2.maci"
case 'p': // 1 string to match.
if (NameR.substr(12, 2) != "yi")
break;
return Intrinsic::hexagon_M2_mpyi; // "exagon.M2.mpyi"
}
break;
}
break;
case 'S': // 6 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 5 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(11, 3) != "rev")
break;
return Intrinsic::hexagon_S2_brev; // "exagon.S2.brev"
case 'c': // 3 strings to match.
if (NameR[11] != 'l')
break;
switch (NameR[12]) {
default: break;
case '0': // 1 string to match.
if (NameR[13] != 'p')
break;
return Intrinsic::hexagon_S2_cl0p; // "exagon.S2.cl0p"
case '1': // 1 string to match.
if (NameR[13] != 'p')
break;
return Intrinsic::hexagon_S2_cl1p; // "exagon.S2.cl1p"
case 'b': // 1 string to match.
if (NameR[13] != 'p')
break;
return Intrinsic::hexagon_S2_clbp; // "exagon.S2.clbp"
}
break;
case 'l': // 1 string to match.
if (NameR.substr(11, 3) != "fsp")
break;
return Intrinsic::hexagon_S2_lfsp; // "exagon.S2.lfsp"
}
break;
case '4': // 1 string to match.
if (NameR.substr(9, 5) != ".ornp")
break;
return Intrinsic::hexagon_S4_ornp; // "exagon.S4.ornp"
}
break;
}
break;
case 15: // 40 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 25 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 24 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(12, 3) != "dsp")
break;
return Intrinsic::hexagon_A2_addsp; // "exagon.A2.addsp"
case 'n': // 1 string to match.
if (NameR.substr(12, 3) != "dir")
break;
return Intrinsic::hexagon_A2_andir; // "exagon.A2.andir"
}
break;
case 'm': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(12, 3) != "xup")
break;
return Intrinsic::hexagon_A2_maxup; // "exagon.A2.maxup"
case 'i': // 1 string to match.
if (NameR.substr(12, 3) != "nup")
break;
return Intrinsic::hexagon_A2_minup; // "exagon.A2.minup"
}
break;
case 's': // 3 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 2) != "tu")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_satub; // "exagon.A2.satub"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_satuh; // "exagon.A2.satuh"
}
break;
case 'u': // 1 string to match.
if (NameR.substr(12, 3) != "bri")
break;
return Intrinsic::hexagon_A2_subri; // "exagon.A2.subri"
}
break;
case 't': // 4 strings to match.
if (NameR.substr(11, 2) != "fr")
break;
switch (NameR[13]) {
default: break;
case 'i': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_tfrih; // "exagon.A2.tfrih"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_tfril; // "exagon.A2.tfril"
}
break;
case 'p': // 1 string to match.
if (NameR[14] != 'i')
break;
return Intrinsic::hexagon_A2_tfrpi; // "exagon.A2.tfrpi"
case 's': // 1 string to match.
if (NameR[14] != 'i')
break;
return Intrinsic::hexagon_A2_tfrsi; // "exagon.A2.tfrsi"
}
break;
case 'v': // 13 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 6 strings to match.
switch (NameR[12]) {
default: break;
case 'b': // 2 strings to match.
if (NameR[13] != 's')
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vabsh; // "exagon.A2.vabsh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vabsw; // "exagon.A2.vabsw"
}
break;
case 'd': // 2 strings to match.
if (NameR[13] != 'd')
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vaddh; // "exagon.A2.vaddh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vaddw; // "exagon.A2.vaddw"
}
break;
case 'v': // 2 strings to match.
if (NameR[13] != 'g')
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vavgh; // "exagon.A2.vavgh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vavgw; // "exagon.A2.vavgw"
}
break;
}
break;
case 'c': // 1 string to match.
if (NameR.substr(12, 3) != "onj")
break;
return Intrinsic::hexagon_A2_vconj; // "exagon.A2.vconj"
case 'm': // 4 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[13] != 'x')
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxh; // "exagon.A2.vmaxh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxw; // "exagon.A2.vmaxw"
}
break;
case 'i': // 2 strings to match.
if (NameR[13] != 'n')
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vminh; // "exagon.A2.vminh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vminw; // "exagon.A2.vminw"
}
break;
}
break;
case 's': // 2 strings to match.
if (NameR.substr(12, 2) != "ub")
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vsubh; // "exagon.A2.vsubh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vsubw; // "exagon.A2.vsubw"
}
break;
}
break;
}
break;
case '4': // 1 string to match.
if (NameR.substr(9, 6) != ".andnp")
break;
return Intrinsic::hexagon_A4_andnp; // "exagon.A4.andnp"
}
break;
case 'C': // 9 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 8 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'c': // 3 strings to match.
if (NameR.substr(11, 2) != "mp")
break;
switch (NameR[13]) {
default: break;
case 'e': // 1 string to match.
if (NameR[14] != 'q')
break;
return Intrinsic::hexagon_C2_cmpeq; // "exagon.C2.cmpeq"
case 'g': // 1 string to match.
if (NameR[14] != 't')
break;
return Intrinsic::hexagon_C2_cmpgt; // "exagon.C2.cmpgt"
case 'l': // 1 string to match.
if (NameR[14] != 't')
break;
return Intrinsic::hexagon_C2_cmplt; // "exagon.C2.cmplt"
}
break;
case 'm': // 3 strings to match.
if (NameR.substr(11, 2) != "ux")
break;
switch (NameR[13]) {
default: break;
case 'i': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C2_muxii; // "exagon.C2.muxii"
case 'r': // 1 string to match.
return Intrinsic::hexagon_C2_muxir; // "exagon.C2.muxir"
}
break;
case 'r': // 1 string to match.
if (NameR[14] != 'i')
break;
return Intrinsic::hexagon_C2_muxri; // "exagon.C2.muxri"
}
break;
case 't': // 2 strings to match.
if (NameR.substr(11, 2) != "fr")
break;
switch (NameR[13]) {
default: break;
case 'p': // 1 string to match.
if (NameR[14] != 'r')
break;
return Intrinsic::hexagon_C2_tfrpr; // "exagon.C2.tfrpr"
case 'r': // 1 string to match.
if (NameR[14] != 'p')
break;
return Intrinsic::hexagon_C2_tfrrp; // "exagon.C2.tfrrp"
}
break;
}
break;
case '4': // 1 string to match.
if (NameR.substr(9, 6) != ".or.or")
break;
return Intrinsic::hexagon_C4_or_or; // "exagon.C4.or.or"
}
break;
case 'M': // 5 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 4 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 4) != "ccii")
break;
return Intrinsic::hexagon_M2_accii; // "exagon.M2.accii"
case 'm': // 1 string to match.
if (NameR.substr(11, 4) != "pyui")
break;
return Intrinsic::hexagon_M2_mpyui; // "exagon.M2.mpyui"
case 'n': // 1 string to match.
if (NameR.substr(11, 4) != "acci")
break;
return Intrinsic::hexagon_M2_nacci; // "exagon.M2.nacci"
case 'v': // 1 string to match.
if (NameR.substr(11, 4) != "mac2")
break;
return Intrinsic::hexagon_M2_vmac2; // "exagon.M2.vmac2"
}
break;
case '4': // 1 string to match.
if (NameR.substr(9, 6) != ".or.or")
break;
return Intrinsic::hexagon_M4_or_or; // "exagon.M4.or.or"
}
break;
case 'S': // 1 string to match.
if (NameR.substr(8, 7) != "4.andnp")
break;
return Intrinsic::hexagon_S4_andnp; // "exagon.S4.andnp"
}
break;
case 16: // 58 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 27 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 26 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(12, 4) != "ssat")
break;
return Intrinsic::hexagon_A2_abssat; // "exagon.A2.abssat"
case 'd': // 1 string to match.
if (NameR.substr(12, 4) != "dsat")
break;
return Intrinsic::hexagon_A2_addsat; // "exagon.A2.addsat"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(11, 5) != "egsat")
break;
return Intrinsic::hexagon_A2_negsat; // "exagon.A2.negsat"
case 's': // 4 strings to match.
switch (NameR[11]) {
default: break;
case 'u': // 1 string to match.
if (NameR.substr(12, 4) != "bsat")
break;
return Intrinsic::hexagon_A2_subsat; // "exagon.A2.subsat"
case 'v': // 3 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(14, 2) != "dh")
break;
return Intrinsic::hexagon_A2_svaddh; // "exagon.A2.svaddh"
case 'v': // 1 string to match.
if (NameR.substr(14, 2) != "gh")
break;
return Intrinsic::hexagon_A2_svavgh; // "exagon.A2.svavgh"
}
break;
case 's': // 1 string to match.
if (NameR.substr(13, 3) != "ubh")
break;
return Intrinsic::hexagon_A2_svsubh; // "exagon.A2.svsubh"
}
break;
}
break;
case 'v': // 19 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 8 strings to match.
switch (NameR[12]) {
default: break;
case 'd': // 3 strings to match.
if (NameR[13] != 'd')
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
if (NameR[15] != 's')
break;
return Intrinsic::hexagon_A2_vaddhs; // "exagon.A2.vaddhs"
case 'u': // 1 string to match.
if (NameR[15] != 'b')
break;
return Intrinsic::hexagon_A2_vaddub; // "exagon.A2.vaddub"
case 'w': // 1 string to match.
if (NameR[15] != 's')
break;
return Intrinsic::hexagon_A2_vaddws; // "exagon.A2.vaddws"
}
break;
case 'v': // 5 strings to match.
if (NameR[13] != 'g')
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
if (NameR[15] != 'r')
break;
return Intrinsic::hexagon_A2_vavghr; // "exagon.A2.vavghr"
case 'u': // 3 strings to match.
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_vavgub; // "exagon.A2.vavgub"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vavguh; // "exagon.A2.vavguh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vavguw; // "exagon.A2.vavguw"
}
break;
case 'w': // 1 string to match.
if (NameR[15] != 'r')
break;
return Intrinsic::hexagon_A2_vavgwr; // "exagon.A2.vavgwr"
}
break;
}
break;
case 'm': // 6 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 3 strings to match.
if (NameR.substr(13, 2) != "xu")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxub; // "exagon.A2.vmaxub"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxuh; // "exagon.A2.vmaxuh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxuw; // "exagon.A2.vmaxuw"
}
break;
case 'i': // 3 strings to match.
if (NameR.substr(13, 2) != "nu")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_vminub; // "exagon.A2.vminub"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vminuh; // "exagon.A2.vminuh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vminuw; // "exagon.A2.vminuw"
}
break;
}
break;
case 'n': // 2 strings to match.
if (NameR.substr(12, 3) != "avg")
break;
switch (NameR[15]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vnavgh; // "exagon.A2.vnavgh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vnavgw; // "exagon.A2.vnavgw"
}
break;
case 's': // 3 strings to match.
if (NameR.substr(12, 2) != "ub")
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
if (NameR[15] != 's')
break;
return Intrinsic::hexagon_A2_vsubhs; // "exagon.A2.vsubhs"
case 'u': // 1 string to match.
if (NameR[15] != 'b')
break;
return Intrinsic::hexagon_A2_vsubub; // "exagon.A2.vsubub"
case 'w': // 1 string to match.
if (NameR[15] != 's')
break;
return Intrinsic::hexagon_A2_vsubws; // "exagon.A2.vsubws"
}
break;
}
break;
}
break;
case '4': // 1 string to match.
if (NameR.substr(9, 7) != ".rcmpeq")
break;
return Intrinsic::hexagon_A4_rcmpeq; // "exagon.A4.rcmpeq"
}
break;
case 'C': // 12 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 7 strings to match.
if (NameR.substr(9, 4) != ".cmp")
break;
switch (NameR[13]) {
default: break;
case 'e': // 2 strings to match.
if (NameR[14] != 'q')
break;
switch (NameR[15]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C2_cmpeqi; // "exagon.C2.cmpeqi"
case 'p': // 1 string to match.
return Intrinsic::hexagon_C2_cmpeqp; // "exagon.C2.cmpeqp"
}
break;
case 'g': // 4 strings to match.
switch (NameR[14]) {
default: break;
case 'e': // 1 string to match.
if (NameR[15] != 'i')
break;
return Intrinsic::hexagon_C2_cmpgei; // "exagon.C2.cmpgei"
case 't': // 3 strings to match.
switch (NameR[15]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgti; // "exagon.C2.cmpgti"
case 'p': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgtp; // "exagon.C2.cmpgtp"
case 'u': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgtu; // "exagon.C2.cmpgtu"
}
break;
}
break;
case 'l': // 1 string to match.
if (NameR.substr(14, 2) != "tu")
break;
return Intrinsic::hexagon_C2_cmpltu; // "exagon.C2.cmpltu"
}
break;
case '4': // 5 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 5) != "nd.or")
break;
return Intrinsic::hexagon_C4_and_or; // "exagon.C4.and.or"
case 'c': // 2 strings to match.
if (NameR.substr(11, 2) != "mp")
break;
switch (NameR[13]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(14, 2) != "te")
break;
return Intrinsic::hexagon_C4_cmplte; // "exagon.C4.cmplte"
case 'n': // 1 string to match.
if (NameR.substr(14, 2) != "eq")
break;
return Intrinsic::hexagon_C4_cmpneq; // "exagon.C4.cmpneq"
}
break;
case 'o': // 2 strings to match.
if (NameR.substr(11, 2) != "r.")
break;
switch (NameR[13]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(14, 2) != "nd")
break;
return Intrinsic::hexagon_C4_or_and; // "exagon.C4.or.and"
case 'o': // 1 string to match.
if (NameR.substr(14, 2) != "rn")
break;
return Intrinsic::hexagon_C4_or_orn; // "exagon.C4.or.orn"
}
break;
}
break;
}
break;
case 'M': // 10 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 6 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'm': // 4 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 3) != "csi")
break;
switch (NameR[15]) {
default: break;
case 'n': // 1 string to match.
return Intrinsic::hexagon_M2_macsin; // "exagon.M2.macsin"
case 'p': // 1 string to match.
return Intrinsic::hexagon_M2_macsip; // "exagon.M2.macsip"
}
break;
case 'p': // 2 strings to match.
if (NameR[12] != 'y')
break;
switch (NameR[13]) {
default: break;
case '.': // 1 string to match.
if (NameR.substr(14, 2) != "up")
break;
return Intrinsic::hexagon_M2_mpy_up; // "exagon.M2.mpy.up"
case 's': // 1 string to match.
if (NameR.substr(14, 2) != "mi")
break;
return Intrinsic::hexagon_M2_mpysmi; // "exagon.M2.mpysmi"
}
break;
}
break;
case 'n': // 1 string to match.
if (NameR.substr(11, 5) != "accii")
break;
return Intrinsic::hexagon_M2_naccii; // "exagon.M2.naccii"
case 's': // 1 string to match.
if (NameR.substr(11, 5) != "ubacc")
break;
return Intrinsic::hexagon_M2_subacc; // "exagon.M2.subacc"
}
break;
case '4': // 4 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 5) != "nd.or")
break;
return Intrinsic::hexagon_M4_and_or; // "exagon.M4.and.or"
case 'o': // 2 strings to match.
if (NameR.substr(11, 2) != "r.")
break;
switch (NameR[13]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(14, 2) != "nd")
break;
return Intrinsic::hexagon_M4_or_and; // "exagon.M4.or.and"
case 'x': // 1 string to match.
if (NameR.substr(14, 2) != "or")
break;
return Intrinsic::hexagon_M4_or_xor; // "exagon.M4.or.xor"
}
break;
case 'x': // 1 string to match.
if (NameR.substr(11, 5) != "or.or")
break;
return Intrinsic::hexagon_M4_xor_or; // "exagon.M4.xor.or"
}
break;
}
break;
case 'S': // 9 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 8 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(11, 5) != "nsert")
break;
return Intrinsic::hexagon_S2_insert; // "exagon.S2.insert"
case 'p': // 1 string to match.
if (NameR.substr(11, 5) != "ackhl")
break;
return Intrinsic::hexagon_S2_packhl; // "exagon.S2.packhl"
case 'v': // 6 strings to match.
switch (NameR[11]) {
default: break;
case 's': // 4 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[13] != 't')
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
if (NameR[15] != 'b')
break;
return Intrinsic::hexagon_S2_vsathb; // "exagon.S2.vsathb"
case 'w': // 1 string to match.
if (NameR[15] != 'h')
break;
return Intrinsic::hexagon_S2_vsatwh; // "exagon.S2.vsatwh"
}
break;
case 'x': // 2 strings to match.
if (NameR[13] != 't')
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
if (NameR[15] != 'h')
break;
return Intrinsic::hexagon_S2_vsxtbh; // "exagon.S2.vsxtbh"
case 'h': // 1 string to match.
if (NameR[15] != 'w')
break;
return Intrinsic::hexagon_S2_vsxthw; // "exagon.S2.vsxthw"
}
break;
}
break;
case 'z': // 2 strings to match.
if (NameR.substr(12, 2) != "xt")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
if (NameR[15] != 'h')
break;
return Intrinsic::hexagon_S2_vzxtbh; // "exagon.S2.vzxtbh"
case 'h': // 1 string to match.
if (NameR[15] != 'w')
break;
return Intrinsic::hexagon_S2_vzxthw; // "exagon.S2.vzxthw"
}
break;
}
break;
}
break;
case '4': // 1 string to match.
if (NameR.substr(9, 7) != ".or.ori")
break;
return Intrinsic::hexagon_S4_or_ori; // "exagon.S4.or.ori"
}
break;
}
break;
case 17: // 71 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 25 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 23 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 6) != "ddpsat")
break;
return Intrinsic::hexagon_A2_addpsat; // "exagon.A2.addpsat"
case 's': // 4 strings to match.
if (NameR[11] != 'v')
break;
switch (NameR[12]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(14, 3) != "dhs")
break;
return Intrinsic::hexagon_A2_svaddhs; // "exagon.A2.svaddhs"
case 'v': // 1 string to match.
if (NameR.substr(14, 3) != "ghs")
break;
return Intrinsic::hexagon_A2_svavghs; // "exagon.A2.svavghs"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(13, 4) != "avgh")
break;
return Intrinsic::hexagon_A2_svnavgh; // "exagon.A2.svnavgh"
case 's': // 1 string to match.
if (NameR.substr(13, 4) != "ubhs")
break;
return Intrinsic::hexagon_A2_svsubhs; // "exagon.A2.svsubhs"
}
break;
case 'v': // 18 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 7 strings to match.
switch (NameR[12]) {
default: break;
case 'd': // 2 strings to match.
if (NameR.substr(13, 2) != "du")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
if (NameR[16] != 's')
break;
return Intrinsic::hexagon_A2_vaddubs; // "exagon.A2.vaddubs"
case 'h': // 1 string to match.
if (NameR[16] != 's')
break;
return Intrinsic::hexagon_A2_vadduhs; // "exagon.A2.vadduhs"
}
break;
case 'v': // 5 strings to match.
if (NameR[13] != 'g')
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(15, 2) != "cr")
break;
return Intrinsic::hexagon_A2_vavghcr; // "exagon.A2.vavghcr"
case 'u': // 3 strings to match.
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
if (NameR[16] != 'r')
break;
return Intrinsic::hexagon_A2_vavgubr; // "exagon.A2.vavgubr"
case 'h': // 1 string to match.
if (NameR[16] != 'r')
break;
return Intrinsic::hexagon_A2_vavguhr; // "exagon.A2.vavguhr"
case 'w': // 1 string to match.
if (NameR[16] != 'r')
break;
return Intrinsic::hexagon_A2_vavguwr; // "exagon.A2.vavguwr"
}
break;
case 'w': // 1 string to match.
if (NameR.substr(15, 2) != "cr")
break;
return Intrinsic::hexagon_A2_vavgwcr; // "exagon.A2.vavgwcr"
}
break;
}
break;
case 'c': // 5 strings to match.
if (NameR.substr(12, 2) != "mp")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(15, 2) != "eq")
break;
return Intrinsic::hexagon_A2_vcmpbeq; // "exagon.A2.vcmpbeq"
case 'h': // 2 strings to match.
switch (NameR[15]) {
default: break;
case 'e': // 1 string to match.
if (NameR[16] != 'q')
break;
return Intrinsic::hexagon_A2_vcmpheq; // "exagon.A2.vcmpheq"
case 'g': // 1 string to match.
if (NameR[16] != 't')
break;
return Intrinsic::hexagon_A2_vcmphgt; // "exagon.A2.vcmphgt"
}
break;
case 'w': // 2 strings to match.
switch (NameR[15]) {
default: break;
case 'e': // 1 string to match.
if (NameR[16] != 'q')
break;
return Intrinsic::hexagon_A2_vcmpweq; // "exagon.A2.vcmpweq"
case 'g': // 1 string to match.
if (NameR[16] != 't')
break;
return Intrinsic::hexagon_A2_vcmpwgt; // "exagon.A2.vcmpwgt"
}
break;
}
break;
case 'n': // 2 strings to match.
if (NameR.substr(12, 3) != "avg")
break;
switch (NameR[15]) {
default: break;
case 'h': // 1 string to match.
if (NameR[16] != 'r')
break;
return Intrinsic::hexagon_A2_vnavghr; // "exagon.A2.vnavghr"
case 'w': // 1 string to match.
if (NameR[16] != 'r')
break;
return Intrinsic::hexagon_A2_vnavgwr; // "exagon.A2.vnavgwr"
}
break;
case 'r': // 2 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(13, 4) != "ddub")
break;
return Intrinsic::hexagon_A2_vraddub; // "exagon.A2.vraddub"
case 's': // 1 string to match.
if (NameR.substr(13, 4) != "adub")
break;
return Intrinsic::hexagon_A2_vrsadub; // "exagon.A2.vrsadub"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(12, 3) != "ubu")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
if (NameR[16] != 's')
break;
return Intrinsic::hexagon_A2_vsububs; // "exagon.A2.vsububs"
case 'h': // 1 string to match.
if (NameR[16] != 's')
break;
return Intrinsic::hexagon_A2_vsubuhs; // "exagon.A2.vsubuhs"
}
break;
}
break;
}
break;
case '4': // 2 strings to match.
if (NameR.substr(9, 5) != ".rcmp")
break;
switch (NameR[14]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(15, 2) != "qi")
break;
return Intrinsic::hexagon_A4_rcmpeqi; // "exagon.A4.rcmpeqi"
case 'n': // 1 string to match.
if (NameR.substr(15, 2) != "eq")
break;
return Intrinsic::hexagon_A4_rcmpneq; // "exagon.A4.rcmpneq"
}
break;
}
break;
case 'C': // 12 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 6 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'b': // 2 strings to match.
if (NameR.substr(11, 3) != "its")
break;
switch (NameR[14]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(15, 2) != "lr")
break;
return Intrinsic::hexagon_C2_bitsclr; // "exagon.C2.bitsclr"
case 's': // 1 string to match.
if (NameR.substr(15, 2) != "et")
break;
return Intrinsic::hexagon_C2_bitsset; // "exagon.C2.bitsset"
}
break;
case 'c': // 3 strings to match.
if (NameR.substr(11, 3) != "mpg")
break;
switch (NameR[14]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(15, 2) != "ui")
break;
return Intrinsic::hexagon_C2_cmpgeui; // "exagon.C2.cmpgeui"
case 't': // 2 strings to match.
if (NameR[15] != 'u')
break;
switch (NameR[16]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgtui; // "exagon.C2.cmpgtui"
case 'p': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgtup; // "exagon.C2.cmpgtup"
}
break;
}
break;
case 'v': // 1 string to match.
if (NameR.substr(11, 6) != "itpack")
break;
return Intrinsic::hexagon_C2_vitpack; // "exagon.C2.vitpack"
}
break;
case '4': // 6 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(11, 3) != "nd.")
break;
switch (NameR[14]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(15, 2) != "nd")
break;
return Intrinsic::hexagon_C4_and_and; // "exagon.C4.and.and"
case 'o': // 1 string to match.
if (NameR.substr(15, 2) != "rn")
break;
return Intrinsic::hexagon_C4_and_orn; // "exagon.C4.and.orn"
}
break;
case 'c': // 3 strings to match.
if (NameR.substr(11, 2) != "mp")
break;
switch (NameR[13]) {
default: break;
case 'l': // 2 strings to match.
if (NameR.substr(14, 2) != "te")
break;
switch (NameR[16]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C4_cmpltei; // "exagon.C4.cmpltei"
case 'u': // 1 string to match.
return Intrinsic::hexagon_C4_cmplteu; // "exagon.C4.cmplteu"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(14, 3) != "eqi")
break;
return Intrinsic::hexagon_C4_cmpneqi; // "exagon.C4.cmpneqi"
}
break;
case 'o': // 1 string to match.
if (NameR.substr(11, 6) != "r.andn")
break;
return Intrinsic::hexagon_C4_or_andn; // "exagon.C4.or.andn"
}
break;
}
break;
case 'M': // 7 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 3 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(11, 6) != "pyu.up")
break;
return Intrinsic::hexagon_M2_mpyu_up; // "exagon.M2.mpyu.up"
case 'v': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(12, 5) != "ac2es")
break;
return Intrinsic::hexagon_M2_vmac2es; // "exagon.M2.vmac2es"
case 'r': // 1 string to match.
if (NameR.substr(12, 5) != "adduh")
break;
return Intrinsic::hexagon_M2_vradduh; // "exagon.M2.vradduh"
}
break;
}
break;
case '4': // 4 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(11, 3) != "nd.")
break;
switch (NameR[14]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(15, 2) != "nd")
break;
return Intrinsic::hexagon_M4_and_and; // "exagon.M4.and.and"
case 'x': // 1 string to match.
if (NameR.substr(15, 2) != "or")
break;
return Intrinsic::hexagon_M4_and_xor; // "exagon.M4.and.xor"
}
break;
case 'o': // 1 string to match.
if (NameR.substr(11, 6) != "r.andn")
break;
return Intrinsic::hexagon_M4_or_andn; // "exagon.M4.or.andn"
case 'x': // 1 string to match.
if (NameR.substr(11, 6) != "or.and")
break;
return Intrinsic::hexagon_M4_xor_and; // "exagon.M4.xor.and"
}
break;
}
break;
case 'S': // 27 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 24 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 8 strings to match.
if (NameR[11] != 's')
break;
switch (NameR[12]) {
default: break;
case 'l': // 4 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_asl_i_p; // "exagon.S2.asl.i.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_asl_i_r; // "exagon.S2.asl.i.r"
}
break;
case 'r': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_asl_r_p; // "exagon.S2.asl.r.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_asl_r_r; // "exagon.S2.asl.r.r"
}
break;
}
break;
case 'r': // 4 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_asr_i_p; // "exagon.S2.asr.i.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_asr_i_r; // "exagon.S2.asr.i.r"
}
break;
case 'r': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_asr_r_p; // "exagon.S2.asr.r.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_asr_r_r; // "exagon.S2.asr.r.r"
}
break;
}
break;
}
break;
case 'c': // 1 string to match.
if (NameR.substr(11, 6) != "lbnorm")
break;
return Intrinsic::hexagon_S2_clbnorm; // "exagon.S2.clbnorm"
case 'i': // 1 string to match.
if (NameR.substr(11, 6) != "nsertp")
break;
return Intrinsic::hexagon_S2_insertp; // "exagon.S2.insertp"
case 'l': // 6 strings to match.
if (NameR[11] != 's')
break;
switch (NameR[12]) {
default: break;
case 'l': // 2 strings to match.
if (NameR.substr(13, 3) != ".r.")
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_lsl_r_p; // "exagon.S2.lsl.r.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_lsl_r_r; // "exagon.S2.lsl.r.r"
}
break;
case 'r': // 4 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_i_p; // "exagon.S2.lsr.i.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_i_r; // "exagon.S2.lsr.i.r"
}
break;
case 'r': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_r_p; // "exagon.S2.lsr.r.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_r_r; // "exagon.S2.lsr.r.r"
}
break;
}
break;
}
break;
case 'p': // 1 string to match.
if (NameR.substr(11, 6) != "arityp")
break;
return Intrinsic::hexagon_S2_parityp; // "exagon.S2.parityp"
case 's': // 5 strings to match.
switch (NameR[11]) {
default: break;
case 'h': // 4 strings to match.
if (NameR.substr(12, 3) != "uff")
break;
switch (NameR[15]) {
default: break;
case 'e': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_S2_shuffeb; // "exagon.S2.shuffeb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_shuffeh; // "exagon.S2.shuffeh"
}
break;
case 'o': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_S2_shuffob; // "exagon.S2.shuffob"
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_shuffoh; // "exagon.S2.shuffoh"
}
break;
}
break;
case 'v': // 1 string to match.
if (NameR.substr(12, 5) != "sathb")
break;
return Intrinsic::hexagon_S2_svsathb; // "exagon.S2.svsathb"
}
break;
case 'v': // 2 strings to match.
if (NameR.substr(11, 3) != "sat")
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(15, 2) != "ub")
break;
return Intrinsic::hexagon_S2_vsathub; // "exagon.S2.vsathub"
case 'w': // 1 string to match.
if (NameR.substr(15, 2) != "uh")
break;
return Intrinsic::hexagon_S2_vsatwuh; // "exagon.S2.vsatwuh"
}
break;
}
break;
case '4': // 3 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 6) != "ddaddi")
break;
return Intrinsic::hexagon_S4_addaddi; // "exagon.S4.addaddi"
case 'o': // 1 string to match.
if (NameR.substr(11, 6) != "r.andi")
break;
return Intrinsic::hexagon_S4_or_andi; // "exagon.S4.or.andi"
case 's': // 1 string to match.
if (NameR.substr(11, 6) != "ubaddi")
break;
return Intrinsic::hexagon_S4_subaddi; // "exagon.S4.subaddi"
}
break;
}
break;
}
break;
case 18: // 69 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 14 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 10 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(11, 7) != "ombinew")
break;
return Intrinsic::hexagon_A2_combinew; // "exagon.A2.combinew"
case 's': // 2 strings to match.
if (NameR[11] != 'v')
break;
switch (NameR[12]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(13, 5) != "dduhs")
break;
return Intrinsic::hexagon_A2_svadduhs; // "exagon.A2.svadduhs"
case 's': // 1 string to match.
if (NameR.substr(13, 5) != "ubuhs")
break;
return Intrinsic::hexagon_A2_svsubuhs; // "exagon.A2.svsubuhs"
}
break;
case 'v': // 7 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 2) != "bs")
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(15, 3) != "sat")
break;
return Intrinsic::hexagon_A2_vabshsat; // "exagon.A2.vabshsat"
case 'w': // 1 string to match.
if (NameR.substr(15, 3) != "sat")
break;
return Intrinsic::hexagon_A2_vabswsat; // "exagon.A2.vabswsat"
}
break;
case 'c': // 3 strings to match.
if (NameR.substr(12, 2) != "mp")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(15, 3) != "gtu")
break;
return Intrinsic::hexagon_A2_vcmpbgtu; // "exagon.A2.vcmpbgtu"
case 'h': // 1 string to match.
if (NameR.substr(15, 3) != "gtu")
break;
return Intrinsic::hexagon_A2_vcmphgtu; // "exagon.A2.vcmphgtu"
case 'w': // 1 string to match.
if (NameR.substr(15, 3) != "gtu")
break;
return Intrinsic::hexagon_A2_vcmpwgtu; // "exagon.A2.vcmpwgtu"
}
break;
case 'n': // 2 strings to match.
if (NameR.substr(12, 3) != "avg")
break;
switch (NameR[15]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(16, 2) != "cr")
break;
return Intrinsic::hexagon_A2_vnavghcr; // "exagon.A2.vnavghcr"
case 'w': // 1 string to match.
if (NameR.substr(16, 2) != "cr")
break;
return Intrinsic::hexagon_A2_vnavgwcr; // "exagon.A2.vnavgwcr"
}
break;
}
break;
}
break;
case '4': // 4 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(11, 7) != "odwrapu")
break;
return Intrinsic::hexagon_A4_modwrapu; // "exagon.A4.modwrapu"
case 'r': // 3 strings to match.
switch (NameR[11]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(12, 6) != "mpneqi")
break;
return Intrinsic::hexagon_A4_rcmpneqi; // "exagon.A4.rcmpneqi"
case 'o': // 2 strings to match.
if (NameR.substr(12, 5) != "und.r")
break;
switch (NameR[17]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_A4_round_ri; // "exagon.A4.round.ri"
case 'r': // 1 string to match.
return Intrinsic::hexagon_A4_round_rr; // "exagon.A4.round.rr"
}
break;
}
break;
}
break;
}
break;
case 'C': // 3 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 1 string to match.
if (NameR.substr(9, 9) != ".bitsclri")
break;
return Intrinsic::hexagon_C2_bitsclri; // "exagon.C2.bitsclri"
case '4': // 2 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 7) != "nd.andn")
break;
return Intrinsic::hexagon_C4_and_andn; // "exagon.C4.and.andn"
case 'c': // 1 string to match.
if (NameR.substr(11, 7) != "mplteui")
break;
return Intrinsic::hexagon_C4_cmplteui; // "exagon.C4.cmplteui"
}
break;
}
break;
case 'M': // 20 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 17 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'c': // 10 strings to match.
switch (NameR[11]) {
default: break;
case 'm': // 8 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 4 strings to match.
if (NameR[13] != 'c')
break;
switch (NameR[14]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(15, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_cmaci_s0; // "exagon.M2.cmaci.s0"
case 'r': // 1 string to match.
if (NameR.substr(15, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_cmacr_s0; // "exagon.M2.cmacr.s0"
case 's': // 2 strings to match.
if (NameR.substr(15, 2) != ".s")
break;
switch (NameR[17]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmacs_s0; // "exagon.M2.cmacs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmacs_s1; // "exagon.M2.cmacs.s1"
}
break;
}
break;
case 'p': // 4 strings to match.
if (NameR[13] != 'y')
break;
switch (NameR[14]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(15, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_cmpyi_s0; // "exagon.M2.cmpyi.s0"
case 'r': // 1 string to match.
if (NameR.substr(15, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_cmpyr_s0; // "exagon.M2.cmpyr.s0"
case 's': // 2 strings to match.
if (NameR.substr(15, 2) != ".s")
break;
switch (NameR[17]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmpys_s0; // "exagon.M2.cmpys.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmpys_s1; // "exagon.M2.cmpys.s1"
}
break;
}
break;
}
break;
case 'n': // 2 strings to match.
if (NameR.substr(12, 5) != "acs.s")
break;
switch (NameR[17]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cnacs_s0; // "exagon.M2.cnacs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cnacs_s1; // "exagon.M2.cnacs.s1"
}
break;
}
break;
case 'm': // 4 strings to match.
if (NameR.substr(11, 3) != "mpy")
break;
switch (NameR[14]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(15, 2) != ".s")
break;
switch (NameR[17]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyh_s0; // "exagon.M2.mmpyh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyh_s1; // "exagon.M2.mmpyh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(15, 2) != ".s")
break;
switch (NameR[17]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyl_s0; // "exagon.M2.mmpyl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyl_s1; // "exagon.M2.mmpyl.s1"
}
break;
}
break;
case 'v': // 2 strings to match.
if (NameR.substr(11, 2) != "rm")
break;
switch (NameR[13]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(14, 4) != "c.s0")
break;
return Intrinsic::hexagon_M2_vrmac_s0; // "exagon.M2.vrmac.s0"
case 'p': // 1 string to match.
if (NameR.substr(14, 4) != "y.s0")
break;
return Intrinsic::hexagon_M2_vrmpy_s0; // "exagon.M2.vrmpy.s0"
}
break;
case 'x': // 1 string to match.
if (NameR.substr(11, 7) != "or.xacc")
break;
return Intrinsic::hexagon_M2_xor_xacc; // "exagon.M2.xor.xacc"
}
break;
case '4': // 3 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 7) != "nd.andn")
break;
return Intrinsic::hexagon_M4_and_andn; // "exagon.M4.and.andn"
case 'x': // 2 strings to match.
if (NameR.substr(11, 3) != "or.")
break;
switch (NameR[14]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(15, 3) != "ndn")
break;
return Intrinsic::hexagon_M4_xor_andn; // "exagon.M4.xor.andn"
case 'x': // 1 string to match.
if (NameR.substr(15, 3) != "acc")
break;
return Intrinsic::hexagon_M4_xor_xacc; // "exagon.M4.xor.xacc"
}
break;
}
break;
}
break;
case 'S': // 32 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 31 strings to match.
if (NameR[9] != '.')
break;
switch (NameR[10]) {
default: break;
case 'a': // 8 strings to match.
if (NameR[11] != 's')
break;
switch (NameR[12]) {
default: break;
case 'l': // 4 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 2 strings to match.
if (NameR.substr(15, 2) != ".v")
break;
switch (NameR[17]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_asl_i_vh; // "exagon.S2.asl.i.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_asl_i_vw; // "exagon.S2.asl.i.vw"
}
break;
case 'r': // 2 strings to match.
if (NameR.substr(15, 2) != ".v")
break;
switch (NameR[17]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_asl_r_vh; // "exagon.S2.asl.r.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_asl_r_vw; // "exagon.S2.asl.r.vw"
}
break;
}
break;
case 'r': // 4 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 2 strings to match.
if (NameR.substr(15, 2) != ".v")
break;
switch (NameR[17]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_asr_i_vh; // "exagon.S2.asr.i.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_asr_i_vw; // "exagon.S2.asr.i.vw"
}
break;
case 'r': // 2 strings to match.
if (NameR.substr(15, 2) != ".v")
break;
switch (NameR[17]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_asr_r_vh; // "exagon.S2.asr.r.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_asr_r_vw; // "exagon.S2.asr.r.vw"
}
break;
}
break;
}
break;
case 'c': // 2 strings to match.
if (NameR.substr(11, 6) != "lrbit.")
break;
switch (NameR[17]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_S2_clrbit_i; // "exagon.S2.clrbit.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_clrbit_r; // "exagon.S2.clrbit.r"
}
break;
case 'e': // 1 string to match.
if (NameR.substr(11, 7) != "xtractu")
break;
return Intrinsic::hexagon_S2_extractu; // "exagon.S2.extractu"
case 'l': // 6 strings to match.
if (NameR[11] != 's')
break;
switch (NameR[12]) {
default: break;
case 'l': // 2 strings to match.
if (NameR.substr(13, 4) != ".r.v")
break;
switch (NameR[17]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_lsl_r_vh; // "exagon.S2.lsl.r.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_lsl_r_vw; // "exagon.S2.lsl.r.vw"
}
break;
case 'r': // 4 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 2 strings to match.
if (NameR.substr(15, 2) != ".v")
break;
switch (NameR[17]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_i_vh; // "exagon.S2.lsr.i.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_i_vw; // "exagon.S2.lsr.i.vw"
}
break;
case 'r': // 2 strings to match.
if (NameR.substr(15, 2) != ".v")
break;
switch (NameR[17]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_r_vh; // "exagon.S2.lsr.r.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_r_vw; // "exagon.S2.lsr.r.vw"
}
break;
}
break;
}
break;
case 's': // 3 strings to match.
switch (NameR[11]) {
default: break;
case 'e': // 2 strings to match.
if (NameR.substr(12, 5) != "tbit.")
break;
switch (NameR[17]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_S2_setbit_i; // "exagon.S2.setbit.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_setbit_r; // "exagon.S2.setbit.r"
}
break;
case 'v': // 1 string to match.
if (NameR.substr(12, 6) != "sathub")
break;
return Intrinsic::hexagon_S2_svsathub; // "exagon.S2.svsathub"
}
break;
case 't': // 2 strings to match.
if (NameR.substr(11, 6) != "stbit.")
break;
switch (NameR[17]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_S2_tstbit_i; // "exagon.S2.tstbit.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_tstbit_r; // "exagon.S2.tstbit.r"
}
break;
case 'v': // 9 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 4) != "lign")
break;
switch (NameR[16]) {
default: break;
case 'i': // 1 string to match.
if (NameR[17] != 'b')
break;
return Intrinsic::hexagon_S2_valignib; // "exagon.S2.valignib"
case 'r': // 1 string to match.
if (NameR[17] != 'b')
break;
return Intrinsic::hexagon_S2_valignrb; // "exagon.S2.valignrb"
}
break;
case 'c': // 1 string to match.
if (NameR.substr(12, 6) != "rotate")
break;
return Intrinsic::hexagon_S2_vcrotate; // "exagon.S2.vcrotate"
case 's': // 2 strings to match.
if (NameR.substr(12, 5) != "platr")
break;
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_S2_vsplatrb; // "exagon.S2.vsplatrb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_vsplatrh; // "exagon.S2.vsplatrh"
}
break;
case 't': // 4 strings to match.
if (NameR.substr(12, 3) != "run")
break;
switch (NameR[15]) {
default: break;
case 'e': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'h': // 1 string to match.
if (NameR[17] != 'b')
break;
return Intrinsic::hexagon_S2_vtrunehb; // "exagon.S2.vtrunehb"
case 'w': // 1 string to match.
if (NameR[17] != 'h')
break;
return Intrinsic::hexagon_S2_vtrunewh; // "exagon.S2.vtrunewh"
}
break;
case 'o': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'h': // 1 string to match.
if (NameR[17] != 'b')
break;
return Intrinsic::hexagon_S2_vtrunohb; // "exagon.S2.vtrunohb"
case 'w': // 1 string to match.
if (NameR[17] != 'h')
break;
return Intrinsic::hexagon_S2_vtrunowh; // "exagon.S2.vtrunowh"
}
break;
}
break;
}
break;
}
break;
case '4': // 1 string to match.
if (NameR.substr(9, 9) != ".or.andix")
break;
return Intrinsic::hexagon_S4_or_andix; // "exagon.S4.or.andix"
}
break;
}
break;
case 19: // 48 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 5 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 1 string to match.
if (NameR.substr(9, 10) != ".combineii")
break;
return Intrinsic::hexagon_A2_combineii; // "exagon.A2.combineii"
case '4': // 4 strings to match.
if (NameR.substr(9, 2) != ".c")
break;
switch (NameR[11]) {
default: break;
case 'o': // 2 strings to match.
if (NameR.substr(12, 5) != "mbine")
break;
switch (NameR[17]) {
default: break;
case 'i': // 1 string to match.
if (NameR[18] != 'r')
break;
return Intrinsic::hexagon_A4_combineir; // "exagon.A4.combineir"
case 'r': // 1 string to match.
if (NameR[18] != 'i')
break;
return Intrinsic::hexagon_A4_combineri; // "exagon.A4.combineri"
}
break;
case 'r': // 2 strings to match.
if (NameR.substr(12, 6) != "ound.r")
break;
switch (NameR[18]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_A4_cround_ri; // "exagon.A4.cround.ri"
case 'r': // 1 string to match.
return Intrinsic::hexagon_A4_cround_rr; // "exagon.A4.cround.rr"
}
break;
}
break;
}
break;
case 'C': // 1 string to match.
if (NameR.substr(8, 11) != "2.pxfer.map")
break;
return Intrinsic::hexagon_C2_pxfer_map; // "exagon.C2.pxfer.map"
case 'M': // 38 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'c': // 8 strings to match.
switch (NameR[11]) {
default: break;
case 'm': // 6 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(13, 5) != "csc.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmacsc_s0; // "exagon.M2.cmacsc.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmacsc_s1; // "exagon.M2.cmacsc.s1"
}
break;
case 'p': // 4 strings to match.
if (NameR[13] != 'y')
break;
switch (NameR[14]) {
default: break;
case 'r': // 2 strings to match.
if (NameR.substr(15, 3) != "s.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmpyrs_s0; // "exagon.M2.cmpyrs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmpyrs_s1; // "exagon.M2.cmpyrs.s1"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(15, 3) != "c.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmpysc_s0; // "exagon.M2.cmpysc.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmpysc_s1; // "exagon.M2.cmpysc.s1"
}
break;
}
break;
}
break;
case 'n': // 2 strings to match.
if (NameR.substr(12, 6) != "acsc.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cnacsc_s0; // "exagon.M2.cnacsc.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cnacsc_s1; // "exagon.M2.cnacsc.s1"
}
break;
}
break;
case 'm': // 20 strings to match.
switch (NameR[11]) {
default: break;
case 'm': // 12 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 4 strings to match.
if (NameR[13] != 'c')
break;
switch (NameR[14]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(15, 3) != "s.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmachs_s0; // "exagon.M2.mmachs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmachs_s1; // "exagon.M2.mmachs.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(15, 3) != "s.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmacls_s0; // "exagon.M2.mmacls.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmacls_s1; // "exagon.M2.mmacls.s1"
}
break;
}
break;
case 'p': // 8 strings to match.
if (NameR[13] != 'y')
break;
switch (NameR[14]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(15, 3) != ".rs")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyh_rs0; // "exagon.M2.mmpyh.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyh_rs1; // "exagon.M2.mmpyh.rs1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(15, 3) != ".rs")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyl_rs0; // "exagon.M2.mmpyl.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyl_rs1; // "exagon.M2.mmpyl.rs1"
}
break;
case 'u': // 4 strings to match.
switch (NameR[15]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(16, 2) != ".s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyuh_s0; // "exagon.M2.mmpyuh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyuh_s1; // "exagon.M2.mmpyuh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(16, 2) != ".s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyul_s0; // "exagon.M2.mmpyul.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyul_s1; // "exagon.M2.mmpyul.s1"
}
break;
}
break;
}
break;
}
break;
case 'p': // 8 strings to match.
if (NameR.substr(12, 2) != "y.")
break;
switch (NameR[14]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[15]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(16, 2) != ".s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_hh_s0; // "exagon.M2.mpy.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_hh_s1; // "exagon.M2.mpy.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(16, 2) != ".s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_hl_s0; // "exagon.M2.mpy.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_hl_s1; // "exagon.M2.mpy.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[15]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(16, 2) != ".s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_lh_s0; // "exagon.M2.mpy.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_lh_s1; // "exagon.M2.mpy.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(16, 2) != ".s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_ll_s0; // "exagon.M2.mpy.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_ll_s1; // "exagon.M2.mpy.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 'v': // 10 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 6) != "bsdiff")
break;
switch (NameR[18]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_M2_vabsdiffh; // "exagon.M2.vabsdiffh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_M2_vabsdiffw; // "exagon.M2.vabsdiffw"
}
break;
case 'd': // 4 strings to match.
if (NameR[12] != 'm')
break;
switch (NameR[13]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(14, 4) != "cs.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vdmacs_s0; // "exagon.M2.vdmacs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vdmacs_s1; // "exagon.M2.vdmacs.s1"
}
break;
case 'p': // 2 strings to match.
if (NameR.substr(14, 4) != "ys.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vdmpys_s0; // "exagon.M2.vdmpys.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vdmpys_s1; // "exagon.M2.vdmpys.s1"
}
break;
}
break;
case 'm': // 4 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(13, 5) != "c2s.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vmac2s_s0; // "exagon.M2.vmac2s.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vmac2s_s1; // "exagon.M2.vmac2s.s1"
}
break;
case 'p': // 2 strings to match.
if (NameR.substr(13, 5) != "y2s.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vmpy2s_s0; // "exagon.M2.vmpy2s.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vmpy2s_s1; // "exagon.M2.vmpy2s.s1"
}
break;
}
break;
}
break;
}
break;
case 'S': // 4 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(11, 8) != "xtractup")
break;
return Intrinsic::hexagon_S2_extractup; // "exagon.S2.extractup"
case 'i': // 1 string to match.
if (NameR.substr(11, 8) != "nsert.rp")
break;
return Intrinsic::hexagon_S2_insert_rp; // "exagon.S2.insert.rp"
case 'v': // 2 strings to match.
if (NameR.substr(11, 6) != "splice")
break;
switch (NameR[17]) {
default: break;
case 'i': // 1 string to match.
if (NameR[18] != 'b')
break;
return Intrinsic::hexagon_S2_vspliceib; // "exagon.S2.vspliceib"
case 'r': // 1 string to match.
if (NameR[18] != 'b')
break;
return Intrinsic::hexagon_S2_vsplicerb; // "exagon.S2.vsplicerb"
}
break;
}
break;
}
break;
case 20: // 66 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 4 strings to match.
if (NameR.substr(8, 10) != "2.combine.")
break;
switch (NameR[18]) {
default: break;
case 'h': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_combine_hh; // "exagon.A2.combine.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_combine_hl; // "exagon.A2.combine.hl"
}
break;
case 'l': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_combine_lh; // "exagon.A2.combine.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_combine_ll; // "exagon.A2.combine.ll"
}
break;
}
break;
case 'M': // 45 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'c': // 2 strings to match.
if (NameR.substr(11, 8) != "mpyrsc.s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmpyrsc_s0; // "exagon.M2.cmpyrsc.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmpyrsc_s1; // "exagon.M2.cmpyrsc.s1"
}
break;
case 'd': // 2 strings to match.
if (NameR.substr(11, 4) != "pmpy")
break;
switch (NameR[15]) {
default: break;
case 's': // 1 string to match.
if (NameR.substr(16, 4) != "s.s0")
break;
return Intrinsic::hexagon_M2_dpmpyss_s0; // "exagon.M2.dpmpyss.s0"
case 'u': // 1 string to match.
if (NameR.substr(16, 4) != "u.s0")
break;
return Intrinsic::hexagon_M2_dpmpyuu_s0; // "exagon.M2.dpmpyuu.s0"
}
break;
case 'h': // 2 strings to match.
if (NameR.substr(11, 4) != "mmpy")
break;
switch (NameR[15]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(16, 4) != ".rs1")
break;
return Intrinsic::hexagon_M2_hmmpyh_rs1; // "exagon.M2.hmmpyh.rs1"
case 'l': // 1 string to match.
if (NameR.substr(16, 4) != ".rs1")
break;
return Intrinsic::hexagon_M2_hmmpyl_rs1; // "exagon.M2.hmmpyl.rs1"
}
break;
case 'm': // 28 strings to match.
switch (NameR[11]) {
default: break;
case 'm': // 12 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 8 strings to match.
if (NameR[13] != 'c')
break;
switch (NameR[14]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(15, 4) != "s.rs")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmachs_rs0; // "exagon.M2.mmachs.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmachs_rs1; // "exagon.M2.mmachs.rs1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(15, 4) != "s.rs")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmacls_rs0; // "exagon.M2.mmacls.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmacls_rs1; // "exagon.M2.mmacls.rs1"
}
break;
case 'u': // 4 strings to match.
switch (NameR[15]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(16, 3) != "s.s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmacuhs_s0; // "exagon.M2.mmacuhs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmacuhs_s1; // "exagon.M2.mmacuhs.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(16, 3) != "s.s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmaculs_s0; // "exagon.M2.mmaculs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmaculs_s1; // "exagon.M2.mmaculs.s1"
}
break;
}
break;
}
break;
case 'p': // 4 strings to match.
if (NameR.substr(13, 2) != "yu")
break;
switch (NameR[15]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(16, 3) != ".rs")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyuh_rs0; // "exagon.M2.mmpyuh.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyuh_rs1; // "exagon.M2.mmpyuh.rs1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(16, 3) != ".rs")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyul_rs0; // "exagon.M2.mmpyul.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyul_rs1; // "exagon.M2.mmpyul.rs1"
}
break;
}
break;
}
break;
case 'p': // 16 strings to match.
if (NameR[12] != 'y')
break;
switch (NameR[13]) {
default: break;
case 'd': // 8 strings to match.
if (NameR[14] != '.')
break;
switch (NameR[15]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[16]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(17, 2) != ".s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_hh_s0; // "exagon.M2.mpyd.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_hh_s1; // "exagon.M2.mpyd.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(17, 2) != ".s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_hl_s0; // "exagon.M2.mpyd.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_hl_s1; // "exagon.M2.mpyd.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[16]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(17, 2) != ".s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_lh_s0; // "exagon.M2.mpyd.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_lh_s1; // "exagon.M2.mpyd.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(17, 2) != ".s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_ll_s0; // "exagon.M2.mpyd.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_ll_s1; // "exagon.M2.mpyd.ll.s1"
}
break;
}
break;
}
break;
case 'u': // 8 strings to match.
if (NameR[14] != '.')
break;
switch (NameR[15]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[16]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(17, 2) != ".s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_hh_s0; // "exagon.M2.mpyu.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_hh_s1; // "exagon.M2.mpyu.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(17, 2) != ".s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_hl_s0; // "exagon.M2.mpyu.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_hl_s1; // "exagon.M2.mpyu.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[16]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(17, 2) != ".s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_lh_s0; // "exagon.M2.mpyu.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_lh_s1; // "exagon.M2.mpyu.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(17, 2) != ".s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_ll_s0; // "exagon.M2.mpyu.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_ll_s1; // "exagon.M2.mpyu.ll.s1"
}
break;
}
break;
}
break;
}
break;
}
break;
case 'v': // 11 strings to match.
switch (NameR[11]) {
default: break;
case 'd': // 2 strings to match.
if (NameR.substr(12, 7) != "mpyrs.s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vdmpyrs_s0; // "exagon.M2.vdmpyrs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vdmpyrs_s1; // "exagon.M2.vdmpyrs.s1"
}
break;
case 'm': // 4 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(13, 6) != "c2es.s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vmac2es_s0; // "exagon.M2.vmac2es.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vmac2es_s1; // "exagon.M2.vmac2es.s1"
}
break;
case 'p': // 2 strings to match.
if (NameR.substr(13, 6) != "y2es.s")
break;
switch (NameR[19]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vmpy2es_s0; // "exagon.M2.vmpy2es.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vmpy2es_s1; // "exagon.M2.vmpy2es.s1"
}
break;
}
break;
case 'r': // 5 strings to match.
if (NameR.substr(12, 2) != "cm")
break;
switch (NameR[14]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[15] != 'c')
break;
switch (NameR[16]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(17, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_vrcmaci_s0; // "exagon.M2.vrcmaci.s0"
case 'r': // 1 string to match.
if (NameR.substr(17, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_vrcmacr_s0; // "exagon.M2.vrcmacr.s0"
}
break;
case 'p': // 3 strings to match.
if (NameR[15] != 'y')
break;
switch (NameR[16]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(17, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_vrcmpyi_s0; // "exagon.M2.vrcmpyi.s0"
case 'r': // 1 string to match.
if (NameR.substr(17, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_vrcmpyr_s0; // "exagon.M2.vrcmpyr.s0"
case 's': // 1 string to match.
if (NameR.substr(17, 3) != ".s1")
break;
return Intrinsic::hexagon_M2_vrcmpys_s1; // "exagon.M2.vrcmpys.s1"
}
break;
}
break;
}
break;
}
break;
case 'S': // 17 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'a': // 8 strings to match.
if (NameR[11] != 's')
break;
switch (NameR[12]) {
default: break;
case 'l': // 4 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asl_i_p_or; // "exagon.S2.asl.i.p.or"
case 'r': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asl_i_r_or; // "exagon.S2.asl.i.r.or"
}
break;
case 'r': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asl_r_p_or; // "exagon.S2.asl.r.p.or"
case 'r': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asl_r_r_or; // "exagon.S2.asl.r.r.or"
}
break;
}
break;
case 'r': // 4 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asr_i_p_or; // "exagon.S2.asr.i.p.or"
case 'r': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asr_i_r_or; // "exagon.S2.asr.i.r.or"
}
break;
case 'r': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asr_r_p_or; // "exagon.S2.asr.r.p.or"
case 'r': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asr_r_r_or; // "exagon.S2.asr.r.r.or"
}
break;
}
break;
}
break;
case 'i': // 2 strings to match.
if (NameR[11] != 'n')
break;
switch (NameR[12]) {
default: break;
case 's': // 1 string to match.
if (NameR.substr(13, 7) != "ertp.rp")
break;
return Intrinsic::hexagon_S2_insertp_rp; // "exagon.S2.insertp.rp"
case 't': // 1 string to match.
if (NameR.substr(13, 7) != "erleave")
break;
return Intrinsic::hexagon_S2_interleave; // "exagon.S2.interleave"
}
break;
case 'l': // 6 strings to match.
if (NameR[11] != 's')
break;
switch (NameR[12]) {
default: break;
case 'l': // 2 strings to match.
if (NameR.substr(13, 3) != ".r.")
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsl_r_p_or; // "exagon.S2.lsl.r.p.or"
case 'r': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsl_r_r_or; // "exagon.S2.lsl.r.r.or"
}
break;
case 'r': // 4 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsr_i_p_or; // "exagon.S2.lsr.i.p.or"
case 'r': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsr_i_r_or; // "exagon.S2.lsr.i.r.or"
}
break;
case 'r': // 2 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsr_r_p_or; // "exagon.S2.lsr.r.p.or"
case 'r': // 1 string to match.
if (NameR.substr(17, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsr_r_r_or; // "exagon.S2.lsr.r.r.or"
}
break;
}
break;
}
break;
case 'v': // 1 string to match.
if (NameR.substr(11, 9) != "rndpackwh")
break;
return Intrinsic::hexagon_S2_vrndpackwh; // "exagon.S2.vrndpackwh"
}
break;
}
break;
case 21: // 84 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 16 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'a': // 8 strings to match.
if (NameR.substr(11, 4) != "ddh.")
break;
switch (NameR[15]) {
default: break;
case 'h': // 4 strings to match.
if (NameR.substr(16, 3) != "16.")
break;
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_hh; // "exagon.A2.addh.h16.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_hl; // "exagon.A2.addh.h16.hl"
}
break;
case 'l': // 2 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_lh; // "exagon.A2.addh.h16.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_ll; // "exagon.A2.addh.h16.ll"
}
break;
}
break;
case 'l': // 4 strings to match.
if (NameR.substr(16, 3) != "16.")
break;
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_hh; // "exagon.A2.addh.l16.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_hl; // "exagon.A2.addh.l16.hl"
}
break;
case 'l': // 2 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_lh; // "exagon.A2.addh.l16.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_ll; // "exagon.A2.addh.l16.ll"
}
break;
}
break;
}
break;
case 's': // 6 strings to match.
if (NameR.substr(11, 4) != "ubh.")
break;
switch (NameR[15]) {
default: break;
case 'h': // 4 strings to match.
if (NameR.substr(16, 3) != "16.")
break;
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_hh; // "exagon.A2.subh.h16.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_hl; // "exagon.A2.subh.h16.hl"
}
break;
case 'l': // 2 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_lh; // "exagon.A2.subh.h16.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_ll; // "exagon.A2.subh.h16.ll"
}
break;
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(16, 3) != "16.")
break;
switch (NameR[19]) {
default: break;
case 'h': // 1 string to match.
if (NameR[20] != 'l')
break;
return Intrinsic::hexagon_A2_subh_l16_hl; // "exagon.A2.subh.l16.hl"
case 'l': // 1 string to match.
if (NameR[20] != 'l')
break;
return Intrinsic::hexagon_A2_subh_l16_ll; // "exagon.A2.subh.l16.ll"
}
break;
}
break;
case 'v': // 2 strings to match.
if (NameR[11] != 'r')
break;
switch (NameR[12]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(13, 8) != "ddub.acc")
break;
return Intrinsic::hexagon_A2_vraddub_acc; // "exagon.A2.vraddub.acc"
case 's': // 1 string to match.
if (NameR.substr(13, 8) != "adub.acc")
break;
return Intrinsic::hexagon_A2_vrsadub_acc; // "exagon.A2.vrsadub.acc"
}
break;
}
break;
case 'C': // 1 string to match.
if (NameR.substr(8, 13) != "4.fastcorner9")
break;
return Intrinsic::hexagon_C4_fastcorner9; // "exagon.C4.fastcorner9"
case 'M': // 16 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'm': // 12 strings to match.
switch (NameR[11]) {
default: break;
case 'm': // 4 strings to match.
if (NameR.substr(12, 3) != "acu")
break;
switch (NameR[15]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(16, 4) != "s.rs")
break;
switch (NameR[20]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmacuhs_rs0; // "exagon.M2.mmacuhs.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmacuhs_rs1; // "exagon.M2.mmacuhs.rs1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(16, 4) != "s.rs")
break;
switch (NameR[20]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmaculs_rs0; // "exagon.M2.mmaculs.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmaculs_rs1; // "exagon.M2.mmaculs.rs1"
}
break;
}
break;
case 'p': // 8 strings to match.
if (NameR.substr(12, 4) != "yud.")
break;
switch (NameR[16]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[17]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(18, 2) != ".s")
break;
switch (NameR[20]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_hh_s0; // "exagon.M2.mpyud.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_hh_s1; // "exagon.M2.mpyud.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(18, 2) != ".s")
break;
switch (NameR[20]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_hl_s0; // "exagon.M2.mpyud.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_hl_s1; // "exagon.M2.mpyud.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[17]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(18, 2) != ".s")
break;
switch (NameR[20]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_lh_s0; // "exagon.M2.mpyud.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_lh_s1; // "exagon.M2.mpyud.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(18, 2) != ".s")
break;
switch (NameR[20]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_ll_s0; // "exagon.M2.mpyud.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_ll_s1; // "exagon.M2.mpyud.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 'v': // 4 strings to match.
if (NameR.substr(11, 3) != "rcm")
break;
switch (NameR[14]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[15] != 'c')
break;
switch (NameR[16]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(17, 4) != ".s0c")
break;
return Intrinsic::hexagon_M2_vrcmaci_s0c; // "exagon.M2.vrcmaci.s0c"
case 'r': // 1 string to match.
if (NameR.substr(17, 4) != ".s0c")
break;
return Intrinsic::hexagon_M2_vrcmacr_s0c; // "exagon.M2.vrcmacr.s0c"
}
break;
case 'p': // 2 strings to match.
if (NameR[15] != 'y')
break;
switch (NameR[16]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(17, 4) != ".s0c")
break;
return Intrinsic::hexagon_M2_vrcmpyi_s0c; // "exagon.M2.vrcmpyi.s0c"
case 'r': // 1 string to match.
if (NameR.substr(17, 4) != ".s0c")
break;
return Intrinsic::hexagon_M2_vrcmpyr_s0c; // "exagon.M2.vrcmpyr.s0c"
}
break;
}
break;
}
break;
case 'S': // 51 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'a': // 29 strings to match.
switch (NameR[11]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(12, 9) != "dasl.rrri")
break;
return Intrinsic::hexagon_S2_addasl_rrri; // "exagon.S2.addasl.rrri"
case 's': // 28 strings to match.
switch (NameR[12]) {
default: break;
case 'l': // 14 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 7 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_asl_i_p_acc; // "exagon.S2.asl.i.p.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_asl_i_p_and; // "exagon.S2.asl.i.p.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asl_i_p_nac; // "exagon.S2.asl.i.p.nac"
}
break;
case 'r': // 4 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_asl_i_r_acc; // "exagon.S2.asl.i.r.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_asl_i_r_and; // "exagon.S2.asl.i.r.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asl_i_r_nac; // "exagon.S2.asl.i.r.nac"
case 's': // 1 string to match.
if (NameR.substr(19, 2) != "at")
break;
return Intrinsic::hexagon_S2_asl_i_r_sat; // "exagon.S2.asl.i.r.sat"
}
break;
}
break;
case 'r': // 7 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_asl_r_p_acc; // "exagon.S2.asl.r.p.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_asl_r_p_and; // "exagon.S2.asl.r.p.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asl_r_p_nac; // "exagon.S2.asl.r.p.nac"
}
break;
case 'r': // 4 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_asl_r_r_acc; // "exagon.S2.asl.r.r.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_asl_r_r_and; // "exagon.S2.asl.r.r.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asl_r_r_nac; // "exagon.S2.asl.r.r.nac"
case 's': // 1 string to match.
if (NameR.substr(19, 2) != "at")
break;
return Intrinsic::hexagon_S2_asl_r_r_sat; // "exagon.S2.asl.r.r.sat"
}
break;
}
break;
}
break;
case 'r': // 14 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 7 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_asr_i_p_acc; // "exagon.S2.asr.i.p.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_asr_i_p_and; // "exagon.S2.asr.i.p.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asr_i_p_nac; // "exagon.S2.asr.i.p.nac"
}
break;
case 'r': // 4 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_asr_i_r_acc; // "exagon.S2.asr.i.r.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_asr_i_r_and; // "exagon.S2.asr.i.r.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asr_i_r_nac; // "exagon.S2.asr.i.r.nac"
case 'r': // 1 string to match.
if (NameR.substr(19, 2) != "nd")
break;
return Intrinsic::hexagon_S2_asr_i_r_rnd; // "exagon.S2.asr.i.r.rnd"
}
break;
}
break;
case 'r': // 7 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_asr_r_p_acc; // "exagon.S2.asr.r.p.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_asr_r_p_and; // "exagon.S2.asr.r.p.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asr_r_p_nac; // "exagon.S2.asr.r.p.nac"
}
break;
case 'r': // 4 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_asr_r_r_acc; // "exagon.S2.asr.r.r.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_asr_r_r_and; // "exagon.S2.asr.r.r.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asr_r_r_nac; // "exagon.S2.asr.r.r.nac"
case 's': // 1 string to match.
if (NameR.substr(19, 2) != "at")
break;
return Intrinsic::hexagon_S2_asr_r_r_sat; // "exagon.S2.asr.r.r.sat"
}
break;
}
break;
}
break;
}
break;
}
break;
case 'e': // 1 string to match.
if (NameR.substr(11, 10) != "xtractu.rp")
break;
return Intrinsic::hexagon_S2_extractu_rp; // "exagon.S2.extractu.rp"
case 'l': // 18 strings to match.
if (NameR[11] != 's')
break;
switch (NameR[12]) {
default: break;
case 'l': // 6 strings to match.
if (NameR.substr(13, 3) != ".r.")
break;
switch (NameR[16]) {
default: break;
case 'p': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_lsl_r_p_acc; // "exagon.S2.lsl.r.p.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_lsl_r_p_and; // "exagon.S2.lsl.r.p.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsl_r_p_nac; // "exagon.S2.lsl.r.p.nac"
}
break;
case 'r': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_lsl_r_r_acc; // "exagon.S2.lsl.r.r.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_lsl_r_r_and; // "exagon.S2.lsl.r.r.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsl_r_r_nac; // "exagon.S2.lsl.r.r.nac"
}
break;
}
break;
case 'r': // 12 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'i': // 6 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_lsr_i_p_acc; // "exagon.S2.lsr.i.p.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_lsr_i_p_and; // "exagon.S2.lsr.i.p.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsr_i_p_nac; // "exagon.S2.lsr.i.p.nac"
}
break;
case 'r': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_lsr_i_r_acc; // "exagon.S2.lsr.i.r.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_lsr_i_r_and; // "exagon.S2.lsr.i.r.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsr_i_r_nac; // "exagon.S2.lsr.i.r.nac"
}
break;
}
break;
case 'r': // 6 strings to match.
if (NameR[15] != '.')
break;
switch (NameR[16]) {
default: break;
case 'p': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_lsr_r_p_acc; // "exagon.S2.lsr.r.p.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_lsr_r_p_and; // "exagon.S2.lsr.r.p.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsr_r_p_nac; // "exagon.S2.lsr.r.p.nac"
}
break;
case 'r': // 3 strings to match.
if (NameR[17] != '.')
break;
switch (NameR[18]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'c': // 1 string to match.
if (NameR[20] != 'c')
break;
return Intrinsic::hexagon_S2_lsr_r_r_acc; // "exagon.S2.lsr.r.r.acc"
case 'n': // 1 string to match.
if (NameR[20] != 'd')
break;
return Intrinsic::hexagon_S2_lsr_r_r_and; // "exagon.S2.lsr.r.r.and"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(19, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsr_r_r_nac; // "exagon.S2.lsr.r.r.nac"
}
break;
}
break;
}
break;
}
break;
case 't': // 2 strings to match.
if (NameR.substr(11, 9) != "ogglebit.")
break;
switch (NameR[20]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_S2_togglebit_i; // "exagon.S2.togglebit.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_togglebit_r; // "exagon.S2.togglebit.r"
}
break;
case 'v': // 1 string to match.
if (NameR.substr(11, 10) != "rndpackwhs")
break;
return Intrinsic::hexagon_S2_vrndpackwhs; // "exagon.S2.vrndpackwhs"
}
break;
}
break;
case 22: // 9 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 2 strings to match.
if (NameR.substr(8, 9) != "4.round.r")
break;
switch (NameR[17]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(18, 4) != ".sat")
break;
return Intrinsic::hexagon_A4_round_ri_sat; // "exagon.A4.round.ri.sat"
case 'r': // 1 string to match.
if (NameR.substr(18, 4) != ".sat")
break;
return Intrinsic::hexagon_A4_round_rr_sat; // "exagon.A4.round.rr.sat"
}
break;
case 'M': // 1 string to match.
if (NameR.substr(8, 14) != "2.vrcmpys.s1rp")
break;
return Intrinsic::hexagon_M2_vrcmpys_s1rp; // "exagon.M2.vrcmpys.s1rp"
case 'S': // 6 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(11, 5) != "sl.i.")
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR.substr(17, 5) != ".xacc")
break;
return Intrinsic::hexagon_S2_asl_i_p_xacc; // "exagon.S2.asl.i.p.xacc"
case 'r': // 1 string to match.
if (NameR.substr(17, 5) != ".xacc")
break;
return Intrinsic::hexagon_S2_asl_i_r_xacc; // "exagon.S2.asl.i.r.xacc"
}
break;
case 'd': // 1 string to match.
if (NameR.substr(11, 11) != "einterleave")
break;
return Intrinsic::hexagon_S2_deinterleave; // "exagon.S2.deinterleave"
case 'e': // 1 string to match.
if (NameR.substr(11, 11) != "xtractup.rp")
break;
return Intrinsic::hexagon_S2_extractup_rp; // "exagon.S2.extractup.rp"
case 'l': // 2 strings to match.
if (NameR.substr(11, 5) != "sr.i.")
break;
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR.substr(17, 5) != ".xacc")
break;
return Intrinsic::hexagon_S2_lsr_i_p_xacc; // "exagon.S2.lsr.i.p.xacc"
case 'r': // 1 string to match.
if (NameR.substr(17, 5) != ".xacc")
break;
return Intrinsic::hexagon_S2_lsr_i_r_xacc; // "exagon.S2.lsr.i.r.xacc"
}
break;
}
break;
}
break;
case 23: // 37 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'M': // 34 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'm': // 32 strings to match.
if (NameR.substr(11, 3) != "py.")
break;
switch (NameR[14]) {
default: break;
case 'a': // 8 strings to match.
if (NameR.substr(15, 3) != "cc.")
break;
switch (NameR[18]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_hh_s0; // "exagon.M2.mpy.acc.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_hh_s1; // "exagon.M2.mpy.acc.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_hl_s0; // "exagon.M2.mpy.acc.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_hl_s1; // "exagon.M2.mpy.acc.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_lh_s0; // "exagon.M2.mpy.acc.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_lh_s1; // "exagon.M2.mpy.acc.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_ll_s0; // "exagon.M2.mpy.acc.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_ll_s1; // "exagon.M2.mpy.acc.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (NameR.substr(15, 3) != "ac.")
break;
switch (NameR[18]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_hh_s0; // "exagon.M2.mpy.nac.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_hh_s1; // "exagon.M2.mpy.nac.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_hl_s0; // "exagon.M2.mpy.nac.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_hl_s1; // "exagon.M2.mpy.nac.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_lh_s0; // "exagon.M2.mpy.nac.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_lh_s1; // "exagon.M2.mpy.nac.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_ll_s0; // "exagon.M2.mpy.nac.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_ll_s1; // "exagon.M2.mpy.nac.ll.s1"
}
break;
}
break;
}
break;
case 'r': // 8 strings to match.
if (NameR.substr(15, 3) != "nd.")
break;
switch (NameR[18]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_hh_s0; // "exagon.M2.mpy.rnd.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_hh_s1; // "exagon.M2.mpy.rnd.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_hl_s0; // "exagon.M2.mpy.rnd.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_hl_s1; // "exagon.M2.mpy.rnd.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_lh_s0; // "exagon.M2.mpy.rnd.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_lh_s1; // "exagon.M2.mpy.rnd.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_ll_s0; // "exagon.M2.mpy.rnd.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_ll_s1; // "exagon.M2.mpy.rnd.ll.s1"
}
break;
}
break;
}
break;
case 's': // 8 strings to match.
if (NameR.substr(15, 3) != "at.")
break;
switch (NameR[18]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_hh_s0; // "exagon.M2.mpy.sat.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_hh_s1; // "exagon.M2.mpy.sat.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_hl_s0; // "exagon.M2.mpy.sat.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_hl_s1; // "exagon.M2.mpy.sat.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[19]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_lh_s0; // "exagon.M2.mpy.sat.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_lh_s1; // "exagon.M2.mpy.sat.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(20, 2) != ".s")
break;
switch (NameR[22]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_ll_s0; // "exagon.M2.mpy.sat.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_ll_s1; // "exagon.M2.mpy.sat.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 'v': // 2 strings to match.
if (NameR.substr(11, 7) != "mpy2s.s")
break;
switch (NameR[18]) {
default: break;
case '0': // 1 string to match.
if (NameR.substr(19, 4) != "pack")
break;
return Intrinsic::hexagon_M2_vmpy2s_s0pack; // "exagon.M2.vmpy2s.s0pack"
case '1': // 1 string to match.
if (NameR.substr(19, 4) != "pack")
break;
return Intrinsic::hexagon_M2_vmpy2s_s1pack; // "exagon.M2.vmpy2s.s1pack"
}
break;
}
break;
case 'S': // 3 strings to match.
switch (NameR[8]) {
default: break;
case '2': // 2 strings to match.
if (NameR.substr(9, 5) != ".vsat")
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(15, 8) != "b.nopack")
break;
return Intrinsic::hexagon_S2_vsathb_nopack; // "exagon.S2.vsathb.nopack"
case 'w': // 1 string to match.
if (NameR.substr(15, 8) != "h.nopack")
break;
return Intrinsic::hexagon_S2_vsatwh_nopack; // "exagon.S2.vsatwh.nopack"
}
break;
case 'I': // 1 string to match.
if (NameR.substr(9, 14) != ".to.SXTHI.asrh")
break;
return Intrinsic::hexagon_SI_to_SXTHI_asrh; // "exagon.SI.to.SXTHI.asrh"
}
break;
}
break;
case 24: // 56 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'M': // 52 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'd': // 5 strings to match.
if (NameR.substr(11, 4) != "pmpy")
break;
switch (NameR[15]) {
default: break;
case 's': // 3 strings to match.
if (NameR.substr(16, 2) != "s.")
break;
switch (NameR[18]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(19, 5) != "cc.s0")
break;
return Intrinsic::hexagon_M2_dpmpyss_acc_s0; // "exagon.M2.dpmpyss.acc.s0"
case 'n': // 1 string to match.
if (NameR.substr(19, 5) != "ac.s0")
break;
return Intrinsic::hexagon_M2_dpmpyss_nac_s0; // "exagon.M2.dpmpyss.nac.s0"
case 'r': // 1 string to match.
if (NameR.substr(19, 5) != "nd.s0")
break;
return Intrinsic::hexagon_M2_dpmpyss_rnd_s0; // "exagon.M2.dpmpyss.rnd.s0"
}
break;
case 'u': // 2 strings to match.
if (NameR.substr(16, 2) != "u.")
break;
switch (NameR[18]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(19, 5) != "cc.s0")
break;
return Intrinsic::hexagon_M2_dpmpyuu_acc_s0; // "exagon.M2.dpmpyuu.acc.s0"
case 'n': // 1 string to match.
if (NameR.substr(19, 5) != "ac.s0")
break;
return Intrinsic::hexagon_M2_dpmpyuu_nac_s0; // "exagon.M2.dpmpyuu.nac.s0"
}
break;
}
break;
case 'm': // 40 strings to match.
if (NameR.substr(11, 2) != "py")
break;
switch (NameR[13]) {
default: break;
case 'd': // 24 strings to match.
if (NameR[14] != '.')
break;
switch (NameR[15]) {
default: break;
case 'a': // 8 strings to match.
if (NameR.substr(16, 3) != "cc.")
break;
switch (NameR[19]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_hh_s0; // "exagon.M2.mpyd.acc.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_hh_s1; // "exagon.M2.mpyd.acc.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_hl_s0; // "exagon.M2.mpyd.acc.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_hl_s1; // "exagon.M2.mpyd.acc.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_lh_s0; // "exagon.M2.mpyd.acc.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_lh_s1; // "exagon.M2.mpyd.acc.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_ll_s0; // "exagon.M2.mpyd.acc.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_ll_s1; // "exagon.M2.mpyd.acc.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (NameR.substr(16, 3) != "ac.")
break;
switch (NameR[19]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_hh_s0; // "exagon.M2.mpyd.nac.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_hh_s1; // "exagon.M2.mpyd.nac.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_hl_s0; // "exagon.M2.mpyd.nac.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_hl_s1; // "exagon.M2.mpyd.nac.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_lh_s0; // "exagon.M2.mpyd.nac.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_lh_s1; // "exagon.M2.mpyd.nac.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_ll_s0; // "exagon.M2.mpyd.nac.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_ll_s1; // "exagon.M2.mpyd.nac.ll.s1"
}
break;
}
break;
}
break;
case 'r': // 8 strings to match.
if (NameR.substr(16, 3) != "nd.")
break;
switch (NameR[19]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_hh_s0; // "exagon.M2.mpyd.rnd.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_hh_s1; // "exagon.M2.mpyd.rnd.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_hl_s0; // "exagon.M2.mpyd.rnd.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_hl_s1; // "exagon.M2.mpyd.rnd.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_lh_s0; // "exagon.M2.mpyd.rnd.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_lh_s1; // "exagon.M2.mpyd.rnd.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_ll_s0; // "exagon.M2.mpyd.rnd.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_ll_s1; // "exagon.M2.mpyd.rnd.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 'u': // 16 strings to match.
if (NameR[14] != '.')
break;
switch (NameR[15]) {
default: break;
case 'a': // 8 strings to match.
if (NameR.substr(16, 3) != "cc.")
break;
switch (NameR[19]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_hh_s0; // "exagon.M2.mpyu.acc.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_hh_s1; // "exagon.M2.mpyu.acc.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_hl_s0; // "exagon.M2.mpyu.acc.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_hl_s1; // "exagon.M2.mpyu.acc.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_lh_s0; // "exagon.M2.mpyu.acc.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_lh_s1; // "exagon.M2.mpyu.acc.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_ll_s0; // "exagon.M2.mpyu.acc.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_ll_s1; // "exagon.M2.mpyu.acc.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (NameR.substr(16, 3) != "ac.")
break;
switch (NameR[19]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_hh_s0; // "exagon.M2.mpyu.nac.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_hh_s1; // "exagon.M2.mpyu.nac.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_hl_s0; // "exagon.M2.mpyu.nac.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_hl_s1; // "exagon.M2.mpyu.nac.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[20]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_lh_s0; // "exagon.M2.mpyu.nac.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_lh_s1; // "exagon.M2.mpyu.nac.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(21, 2) != ".s")
break;
switch (NameR[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_ll_s0; // "exagon.M2.mpyu.nac.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_ll_s1; // "exagon.M2.mpyu.nac.ll.s1"
}
break;
}
break;
}
break;
}
break;
}
break;
case 'v': // 7 strings to match.
switch (NameR[11]) {
default: break;
case 'c': // 6 strings to match.
if (NameR[12] != 'm')
break;
switch (NameR[13]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(14, 9) != "c.s0.sat.")
break;
switch (NameR[23]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_M2_vcmac_s0_sat_i; // "exagon.M2.vcmac.s0.sat.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_M2_vcmac_s0_sat_r; // "exagon.M2.vcmac.s0.sat.r"
}
break;
case 'p': // 4 strings to match.
if (NameR.substr(14, 3) != "y.s")
break;
switch (NameR[17]) {
default: break;
case '0': // 2 strings to match.
if (NameR.substr(18, 5) != ".sat.")
break;
switch (NameR[23]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_M2_vcmpy_s0_sat_i; // "exagon.M2.vcmpy.s0.sat.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_M2_vcmpy_s0_sat_r; // "exagon.M2.vcmpy.s0.sat.r"
}
break;
case '1': // 2 strings to match.
if (NameR.substr(18, 5) != ".sat.")
break;
switch (NameR[23]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_M2_vcmpy_s1_sat_i; // "exagon.M2.vcmpy.s1.sat.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_M2_vcmpy_s1_sat_r; // "exagon.M2.vcmpy.s1.sat.r"
}
break;
}
break;
}
break;
case 'r': // 1 string to match.
if (NameR.substr(12, 12) != "cmpys.acc.s1")
break;
return Intrinsic::hexagon_M2_vrcmpys_acc_s1; // "exagon.M2.vrcmpys.acc.s1"
}
break;
}
break;
case 'S': // 4 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(11, 3) != "sr.")
break;
switch (NameR[14]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(15, 9) != ".svw.trun")
break;
return Intrinsic::hexagon_S2_asr_i_svw_trun; // "exagon.S2.asr.i.svw.trun"
case 'r': // 1 string to match.
if (NameR.substr(15, 9) != ".svw.trun")
break;
return Intrinsic::hexagon_S2_asr_r_svw_trun; // "exagon.S2.asr.r.svw.trun"
}
break;
case 'v': // 2 strings to match.
if (NameR.substr(11, 3) != "sat")
break;
switch (NameR[14]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(15, 9) != "ub.nopack")
break;
return Intrinsic::hexagon_S2_vsathub_nopack; // "exagon.S2.vsathub.nopack"
case 'w': // 1 string to match.
if (NameR.substr(15, 9) != "uh.nopack")
break;
return Intrinsic::hexagon_S2_vsatwuh_nopack; // "exagon.S2.vsatwuh.nopack"
}
break;
}
break;
}
break;
case 25: // 31 strings to match.
if (NameR.substr(0, 7) != "exagon.")
break;
switch (NameR[7]) {
default: break;
case 'A': // 14 strings to match.
if (NameR.substr(8, 2) != "2.")
break;
switch (NameR[10]) {
default: break;
case 'a': // 8 strings to match.
if (NameR.substr(11, 4) != "ddh.")
break;
switch (NameR[15]) {
default: break;
case 'h': // 4 strings to match.
if (NameR.substr(16, 7) != "16.sat.")
break;
switch (NameR[23]) {
default: break;
case 'h': // 2 strings to match.
switch (NameR[24]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_sat_hh; // "exagon.A2.addh.h16.sat.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_sat_hl; // "exagon.A2.addh.h16.sat.hl"
}
break;
case 'l': // 2 strings to match.
switch (NameR[24]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_sat_lh; // "exagon.A2.addh.h16.sat.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_sat_ll; // "exagon.A2.addh.h16.sat.ll"
}
break;
}
break;
case 'l': // 4 strings to match.
if (NameR.substr(16, 7) != "16.sat.")
break;
switch (NameR[23]) {
default: break;
case 'h': // 2 strings to match.
switch (NameR[24]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_sat_hh; // "exagon.A2.addh.l16.sat.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_sat_hl; // "exagon.A2.addh.l16.sat.hl"
}
break;
case 'l': // 2 strings to match.
switch (NameR[24]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_sat_lh; // "exagon.A2.addh.l16.sat.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_sat_ll; // "exagon.A2.addh.l16.sat.ll"
}
break;
}
break;
}
break;
case 's': // 6 strings to match.
if (NameR.substr(11, 4) != "ubh.")
break;
switch (NameR[15]) {
default: break;
case 'h': // 4 strings to match.
if (NameR.substr(16, 7) != "16.sat.")
break;
switch (NameR[23]) {
default: break;
case 'h': // 2 strings to match.
switch (NameR[24]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_sat_hh; // "exagon.A2.subh.h16.sat.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_sat_hl; // "exagon.A2.subh.h16.sat.hl"
}
break;
case 'l': // 2 strings to match.
switch (NameR[24]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_sat_lh; // "exagon.A2.subh.h16.sat.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_sat_ll; // "exagon.A2.subh.h16.sat.ll"
}
break;
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(16, 7) != "16.sat.")
break;
switch (NameR[23]) {
default: break;
case 'h': // 1 string to match.
if (NameR[24] != 'l')
break;
return Intrinsic::hexagon_A2_subh_l16_sat_hl; // "exagon.A2.subh.l16.sat.hl"
case 'l': // 1 string to match.
if (NameR[24] != 'l')
break;
return Intrinsic::hexagon_A2_subh_l16_sat_ll; // "exagon.A2.subh.l16.sat.ll"
}
break;
}
break;
}
break;
case 'C': // 1 string to match.
if (NameR.substr(8, 17) != "4.fastcorner9.not")
break;
return Intrinsic::hexagon_C4_fastcorner9_not; // "exagon.C4.fastcorner9.not"
case 'M': // 16 strings to match.
if (NameR.substr(8, 8) != "2.mpyud.")
break;
switch (NameR[16]) {
default: break;
case 'a': // 8 strings to match.
if (NameR.substr(17, 3) != "cc.")
break;
switch (NameR[20]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[21]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(22, 2) != ".s")
break;
switch (NameR[24]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_hh_s0; // "exagon.M2.mpyud.acc.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_hh_s1; // "exagon.M2.mpyud.acc.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(22, 2) != ".s")
break;
switch (NameR[24]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_hl_s0; // "exagon.M2.mpyud.acc.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_hl_s1; // "exagon.M2.mpyud.acc.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[21]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(22, 2) != ".s")
break;
switch (NameR[24]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_lh_s0; // "exagon.M2.mpyud.acc.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_lh_s1; // "exagon.M2.mpyud.acc.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(22, 2) != ".s")
break;
switch (NameR[24]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_ll_s0; // "exagon.M2.mpyud.acc.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_ll_s1; // "exagon.M2.mpyud.acc.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (NameR.substr(17, 3) != "ac.")
break;
switch (NameR[20]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[21]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(22, 2) != ".s")
break;
switch (NameR[24]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_hh_s0; // "exagon.M2.mpyud.nac.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_hh_s1; // "exagon.M2.mpyud.nac.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(22, 2) != ".s")
break;
switch (NameR[24]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_hl_s0; // "exagon.M2.mpyud.nac.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_hl_s1; // "exagon.M2.mpyud.nac.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[21]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(22, 2) != ".s")
break;
switch (NameR[24]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_lh_s0; // "exagon.M2.mpyud.nac.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_lh_s1; // "exagon.M2.mpyud.nac.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(22, 2) != ".s")
break;
switch (NameR[24]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_ll_s0; // "exagon.M2.mpyud.nac.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_ll_s1; // "exagon.M2.mpyud.nac.ll.s1"
}
break;
}
break;
}
break;
}
break;
}
break;
case 27: // 24 strings to match.
if (NameR.substr(0, 14) != "exagon.M2.mpy.")
break;
switch (NameR[14]) {
default: break;
case 'a': // 8 strings to match.
if (NameR.substr(15, 7) != "cc.sat.")
break;
switch (NameR[22]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[23]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0; // "exagon.M2.mpy.acc.sat.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1; // "exagon.M2.mpy.acc.sat.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0; // "exagon.M2.mpy.acc.sat.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1; // "exagon.M2.mpy.acc.sat.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[23]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0; // "exagon.M2.mpy.acc.sat.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1; // "exagon.M2.mpy.acc.sat.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0; // "exagon.M2.mpy.acc.sat.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1; // "exagon.M2.mpy.acc.sat.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (NameR.substr(15, 7) != "ac.sat.")
break;
switch (NameR[22]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[23]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0; // "exagon.M2.mpy.nac.sat.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1; // "exagon.M2.mpy.nac.sat.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0; // "exagon.M2.mpy.nac.sat.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1; // "exagon.M2.mpy.nac.sat.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[23]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0; // "exagon.M2.mpy.nac.sat.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1; // "exagon.M2.mpy.nac.sat.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0; // "exagon.M2.mpy.nac.sat.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1; // "exagon.M2.mpy.nac.sat.ll.s1"
}
break;
}
break;
}
break;
case 's': // 8 strings to match.
if (NameR.substr(15, 7) != "at.rnd.")
break;
switch (NameR[22]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[23]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0; // "exagon.M2.mpy.sat.rnd.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1; // "exagon.M2.mpy.sat.rnd.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0; // "exagon.M2.mpy.sat.rnd.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1; // "exagon.M2.mpy.sat.rnd.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (NameR[23]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0; // "exagon.M2.mpy.sat.rnd.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1; // "exagon.M2.mpy.sat.rnd.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (NameR.substr(24, 2) != ".s")
break;
switch (NameR[26]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0; // "exagon.M2.mpy.sat.rnd.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1; // "exagon.M2.mpy.sat.rnd.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 30: // 4 strings to match.
if (NameR.substr(0, 18) != "exagon.S2.tableidx")
break;
switch (NameR[18]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(19, 11) != ".goodsyntax")
break;
return Intrinsic::hexagon_S2_tableidxb_goodsyntax; // "exagon.S2.tableidxb.goodsyntax"
case 'd': // 1 string to match.
if (NameR.substr(19, 11) != ".goodsyntax")
break;
return Intrinsic::hexagon_S2_tableidxd_goodsyntax; // "exagon.S2.tableidxd.goodsyntax"
case 'h': // 1 string to match.
if (NameR.substr(19, 11) != ".goodsyntax")
break;
return Intrinsic::hexagon_S2_tableidxh_goodsyntax; // "exagon.S2.tableidxh.goodsyntax"
case 'w': // 1 string to match.
if (NameR.substr(19, 11) != ".goodsyntax")
break;
return Intrinsic::hexagon_S2_tableidxw_goodsyntax; // "exagon.S2.tableidxw.goodsyntax"
}
break;
case 32: // 1 string to match.
if (NameR.substr(0, 32) != "exagon.S2.asr.i.r.rnd.goodsyntax")
break;
return Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax; // "exagon.S2.asr.i.r.rnd.goodsyntax"
}
break; // end of 'h' case.
case 'i':
switch (NameR.size()) {
default: break;
case 12: // 1 string to match.
if (NameR.substr(0, 12) != "nvariant.end")
break;
return Intrinsic::invariant_end; // "nvariant.end"
case 14: // 2 strings to match.
if (NameR[0] != 'n')
break;
switch (NameR[1]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(2, 12) != "t.trampoline")
break;
return Intrinsic::init_trampoline; // "nit.trampoline"
case 'v': // 1 string to match.
if (NameR.substr(2, 12) != "ariant.start")
break;
return Intrinsic::invariant_start; // "nvariant.start"
}
break;
}
break; // end of 'i' case.
case 'l':
if (NameR.startswith("og.")) return Intrinsic::log;
if (NameR.startswith("og10.")) return Intrinsic::log10;
if (NameR.startswith("og2.")) return Intrinsic::log2;
switch (NameR.size()) {
default: break;
case 6: // 1 string to match.
if (NameR.substr(0, 6) != "ongjmp")
break;
return Intrinsic::longjmp; // "ongjmp"
case 11: // 1 string to match.
if (NameR.substr(0, 11) != "ifetime.end")
break;
return Intrinsic::lifetime_end; // "ifetime.end"
case 13: // 1 string to match.
if (NameR.substr(0, 13) != "ifetime.start")
break;
return Intrinsic::lifetime_start; // "ifetime.start"
}
break; // end of 'l' case.
case 'm':
if (NameR.startswith("emcpy.")) return Intrinsic::memcpy;
if (NameR.startswith("emmove.")) return Intrinsic::memmove;
if (NameR.startswith("emset.")) return Intrinsic::memset;
break; // end of 'm' case.
case 'o':
if (NameR.startswith("bjectsize.")) return Intrinsic::objectsize;
break; // end of 'o' case.
case 'p':
if (NameR.startswith("ow.")) return Intrinsic::pow;
if (NameR.startswith("owi.")) return Intrinsic::powi;
if (NameR.startswith("tr.annotation.")) return Intrinsic::ptr_annotation;
switch (NameR.size()) {
default: break;
case 7: // 8 strings to match.
switch (NameR[0]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(1, 6) != "marker")
break;
return Intrinsic::pcmarker; // "cmarker"
case 'p': // 6 strings to match.
if (NameR.substr(1, 2) != "c.")
break;
switch (NameR[3]) {
default: break;
case 'd': // 5 strings to match.
if (NameR.substr(4, 2) != "cb")
break;
switch (NameR[6]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::ppc_dcba; // "pc.dcba"
case 'f': // 1 string to match.
return Intrinsic::ppc_dcbf; // "pc.dcbf"
case 'i': // 1 string to match.
return Intrinsic::ppc_dcbi; // "pc.dcbi"
case 't': // 1 string to match.
return Intrinsic::ppc_dcbt; // "pc.dcbt"
case 'z': // 1 string to match.
return Intrinsic::ppc_dcbz; // "pc.dcbz"
}
break;
case 's': // 1 string to match.
if (NameR.substr(4, 3) != "ync")
break;
return Intrinsic::ppc_sync; // "pc.sync"
}
break;
case 'r': // 1 string to match.
if (NameR.substr(1, 6) != "efetch")
break;
return Intrinsic::prefetch; // "refetch"
}
break;
case 8: // 2 strings to match.
if (NameR.substr(0, 6) != "pc.dcb")
break;
switch (NameR[6]) {
default: break;
case 's': // 1 string to match.
if (NameR[7] != 't')
break;
return Intrinsic::ppc_dcbst; // "pc.dcbst"
case 'z': // 1 string to match.
if (NameR[7] != 'l')
break;
return Intrinsic::ppc_dcbzl; // "pc.dcbzl"
}
break;
case 9: // 1 string to match.
if (NameR.substr(0, 9) != "pc.dcbtst")
break;
return Intrinsic::ppc_dcbtst; // "pc.dcbtst"
case 11: // 5 strings to match.
if (NameR.substr(0, 3) != "tx.")
break;
switch (NameR[3]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(4, 7) != "ar.sync")
break;
return Intrinsic::ptx_bar_sync; // "tx.bar.sync"
case 'r': // 4 strings to match.
if (NameR.substr(4, 6) != "ead.pm")
break;
switch (NameR[10]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::ptx_read_pm0; // "tx.read.pm0"
case '1': // 1 string to match.
return Intrinsic::ptx_read_pm1; // "tx.read.pm1"
case '2': // 1 string to match.
return Intrinsic::ptx_read_pm2; // "tx.read.pm2"
case '3': // 1 string to match.
return Intrinsic::ptx_read_pm3; // "tx.read.pm3"
}
break;
}
break;
case 12: // 1 string to match.
if (NameR.substr(0, 12) != "tx.read.smid")
break;
return Intrinsic::ptx_read_smid; // "tx.read.smid"
case 13: // 6 strings to match.
if (NameR.substr(0, 8) != "tx.read.")
break;
switch (NameR[8]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(9, 4) != "lock")
break;
return Intrinsic::ptx_read_clock; // "tx.read.clock"
case 'n': // 1 string to match.
if (NameR.substr(9, 4) != "smid")
break;
return Intrinsic::ptx_read_nsmid; // "tx.read.nsmid"
case 't': // 4 strings to match.
if (NameR.substr(9, 3) != "id.")
break;
switch (NameR[12]) {
default: break;
case 'w': // 1 string to match.
return Intrinsic::ptx_read_tid_w; // "tx.read.tid.w"
case 'x': // 1 string to match.
return Intrinsic::ptx_read_tid_x; // "tx.read.tid.x"
case 'y': // 1 string to match.
return Intrinsic::ptx_read_tid_y; // "tx.read.tid.y"
case 'z': // 1 string to match.
return Intrinsic::ptx_read_tid_z; // "tx.read.tid.z"
}
break;
}
break;
case 14: // 12 strings to match.
switch (NameR[0]) {
default: break;
case 'p': // 5 strings to match.
if (NameR.substr(1, 10) != "c.altivec.")
break;
switch (NameR[11]) {
default: break;
case 'd': // 2 strings to match.
if (NameR[12] != 's')
break;
switch (NameR[13]) {
default: break;
case 's': // 1 string to match.
return Intrinsic::ppc_altivec_dss; // "pc.altivec.dss"
case 't': // 1 string to match.
return Intrinsic::ppc_altivec_dst; // "pc.altivec.dst"
}
break;
case 'l': // 1 string to match.
if (NameR.substr(12, 2) != "vx")
break;
return Intrinsic::ppc_altivec_lvx; // "pc.altivec.lvx"
case 'v': // 2 strings to match.
if (NameR[12] != 's')
break;
switch (NameR[13]) {
default: break;
case 'l': // 1 string to match.
return Intrinsic::ppc_altivec_vsl; // "pc.altivec.vsl"
case 'r': // 1 string to match.
return Intrinsic::ppc_altivec_vsr; // "pc.altivec.vsr"
}
break;
}
break;
case 't': // 7 strings to match.
if (NameR.substr(1, 7) != "x.read.")
break;
switch (NameR[8]) {
default: break;
case 'g': // 1 string to match.
if (NameR.substr(9, 5) != "ridid")
break;
return Intrinsic::ptx_read_gridid; // "tx.read.gridid"
case 'l': // 1 string to match.
if (NameR.substr(9, 5) != "aneid")
break;
return Intrinsic::ptx_read_laneid; // "tx.read.laneid"
case 'n': // 4 strings to match.
if (NameR.substr(9, 4) != "tid.")
break;
switch (NameR[13]) {
default: break;
case 'w': // 1 string to match.
return Intrinsic::ptx_read_ntid_w; // "tx.read.ntid.w"
case 'x': // 1 string to match.
return Intrinsic::ptx_read_ntid_x; // "tx.read.ntid.x"
case 'y': // 1 string to match.
return Intrinsic::ptx_read_ntid_y; // "tx.read.ntid.y"
case 'z': // 1 string to match.
return Intrinsic::ptx_read_ntid_z; // "tx.read.ntid.z"
}
break;
case 'w': // 1 string to match.
if (NameR.substr(9, 5) != "arpid")
break;
return Intrinsic::ptx_read_warpid; // "tx.read.warpid"
}
break;
}
break;
case 15: // 23 strings to match.
switch (NameR[0]) {
default: break;
case 'p': // 17 strings to match.
if (NameR.substr(1, 10) != "c.altivec.")
break;
switch (NameR[11]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(12, 3) != "stt")
break;
return Intrinsic::ppc_altivec_dstt; // "pc.altivec.dstt"
case 'l': // 3 strings to match.
if (NameR[12] != 'v')
break;
switch (NameR[13]) {
default: break;
case 's': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'l': // 1 string to match.
return Intrinsic::ppc_altivec_lvsl; // "pc.altivec.lvsl"
case 'r': // 1 string to match.
return Intrinsic::ppc_altivec_lvsr; // "pc.altivec.lvsr"
}
break;
case 'x': // 1 string to match.
if (NameR[14] != 'l')
break;
return Intrinsic::ppc_altivec_lvxl; // "pc.altivec.lvxl"
}
break;
case 's': // 1 string to match.
if (NameR.substr(12, 3) != "tvx")
break;
return Intrinsic::ppc_altivec_stvx; // "pc.altivec.stvx"
case 'v': // 12 strings to match.
switch (NameR[12]) {
default: break;
case 'r': // 3 strings to match.
if (NameR[13] != 'l')
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vrlb; // "pc.altivec.vrlb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vrlh; // "pc.altivec.vrlh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vrlw; // "pc.altivec.vrlw"
}
break;
case 's': // 9 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 1 string to match.
if (NameR[14] != 'l')
break;
return Intrinsic::ppc_altivec_vsel; // "pc.altivec.vsel"
case 'l': // 4 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vslb; // "pc.altivec.vslb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vslh; // "pc.altivec.vslh"
case 'o': // 1 string to match.
return Intrinsic::ppc_altivec_vslo; // "pc.altivec.vslo"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vslw; // "pc.altivec.vslw"
}
break;
case 'r': // 4 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vsrb; // "pc.altivec.vsrb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vsrh; // "pc.altivec.vsrh"
case 'o': // 1 string to match.
return Intrinsic::ppc_altivec_vsro; // "pc.altivec.vsro"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vsrw; // "pc.altivec.vsrw"
}
break;
}
break;
}
break;
}
break;
case 't': // 6 strings to match.
if (NameR.substr(1, 7) != "x.read.")
break;
switch (NameR[8]) {
default: break;
case 'c': // 5 strings to match.
switch (NameR[9]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(10, 5) != "ock64")
break;
return Intrinsic::ptx_read_clock64; // "tx.read.clock64"
case 't': // 4 strings to match.
if (NameR.substr(10, 4) != "aid.")
break;
switch (NameR[14]) {
default: break;
case 'w': // 1 string to match.
return Intrinsic::ptx_read_ctaid_w; // "tx.read.ctaid.w"
case 'x': // 1 string to match.
return Intrinsic::ptx_read_ctaid_x; // "tx.read.ctaid.x"
case 'y': // 1 string to match.
return Intrinsic::ptx_read_ctaid_y; // "tx.read.ctaid.y"
case 'z': // 1 string to match.
return Intrinsic::ptx_read_ctaid_z; // "tx.read.ctaid.z"
}
break;
}
break;
case 'n': // 1 string to match.
if (NameR.substr(9, 6) != "warpid")
break;
return Intrinsic::ptx_read_nwarpid; // "tx.read.nwarpid"
}
break;
}
break;
case 16: // 21 strings to match.
switch (NameR[0]) {
default: break;
case 'p': // 17 strings to match.
if (NameR.substr(1, 10) != "c.altivec.")
break;
switch (NameR[11]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(12, 4) != "stst")
break;
return Intrinsic::ppc_altivec_dstst; // "pc.altivec.dstst"
case 'l': // 3 strings to match.
if (NameR.substr(12, 2) != "ve")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
if (NameR[15] != 'x')
break;
return Intrinsic::ppc_altivec_lvebx; // "pc.altivec.lvebx"
case 'h': // 1 string to match.
if (NameR[15] != 'x')
break;
return Intrinsic::ppc_altivec_lvehx; // "pc.altivec.lvehx"
case 'w': // 1 string to match.
if (NameR[15] != 'x')
break;
return Intrinsic::ppc_altivec_lvewx; // "pc.altivec.lvewx"
}
break;
case 's': // 1 string to match.
if (NameR.substr(12, 4) != "tvxl")
break;
return Intrinsic::ppc_altivec_stvxl; // "pc.altivec.stvxl"
case 'v': // 12 strings to match.
switch (NameR[12]) {
default: break;
case 'c': // 2 strings to match.
if (NameR[13] != 'f')
break;
switch (NameR[14]) {
default: break;
case 's': // 1 string to match.
if (NameR[15] != 'x')
break;
return Intrinsic::ppc_altivec_vcfsx; // "pc.altivec.vcfsx"
case 'u': // 1 string to match.
if (NameR[15] != 'x')
break;
return Intrinsic::ppc_altivec_vcfux; // "pc.altivec.vcfux"
}
break;
case 'p': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(14, 2) != "rm")
break;
return Intrinsic::ppc_altivec_vperm; // "pc.altivec.vperm"
case 'k': // 1 string to match.
if (NameR.substr(14, 2) != "px")
break;
return Intrinsic::ppc_altivec_vpkpx; // "pc.altivec.vpkpx"
}
break;
case 'r': // 5 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(14, 2) != "fp")
break;
return Intrinsic::ppc_altivec_vrefp; // "pc.altivec.vrefp"
case 'f': // 4 strings to match.
if (NameR[14] != 'i')
break;
switch (NameR[15]) {
default: break;
case 'm': // 1 string to match.
return Intrinsic::ppc_altivec_vrfim; // "pc.altivec.vrfim"
case 'n': // 1 string to match.
return Intrinsic::ppc_altivec_vrfin; // "pc.altivec.vrfin"
case 'p': // 1 string to match.
return Intrinsic::ppc_altivec_vrfip; // "pc.altivec.vrfip"
case 'z': // 1 string to match.
return Intrinsic::ppc_altivec_vrfiz; // "pc.altivec.vrfiz"
}
break;
}
break;
case 's': // 3 strings to match.
if (NameR.substr(13, 2) != "ra")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vsrab; // "pc.altivec.vsrab"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vsrah; // "pc.altivec.vsrah"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vsraw; // "pc.altivec.vsraw"
}
break;
}
break;
}
break;
case 't': // 4 strings to match.
if (NameR.substr(1, 14) != "x.read.nctaid.")
break;
switch (NameR[15]) {
default: break;
case 'w': // 1 string to match.
return Intrinsic::ptx_read_nctaid_w; // "tx.read.nctaid.w"
case 'x': // 1 string to match.
return Intrinsic::ptx_read_nctaid_x; // "tx.read.nctaid.x"
case 'y': // 1 string to match.
return Intrinsic::ptx_read_nctaid_y; // "tx.read.nctaid.y"
case 'z': // 1 string to match.
return Intrinsic::ptx_read_nctaid_z; // "tx.read.nctaid.z"
}
break;
}
break;
case 17: // 29 strings to match.
if (NameR.substr(0, 11) != "pc.altivec.")
break;
switch (NameR[11]) {
default: break;
case 'd': // 2 strings to match.
if (NameR[12] != 's')
break;
switch (NameR[13]) {
default: break;
case 's': // 1 string to match.
if (NameR.substr(14, 3) != "all")
break;
return Intrinsic::ppc_altivec_dssall; // "pc.altivec.dssall"
case 't': // 1 string to match.
if (NameR.substr(14, 3) != "stt")
break;
return Intrinsic::ppc_altivec_dststt; // "pc.altivec.dststt"
}
break;
case 'm': // 2 strings to match.
switch (NameR[12]) {
default: break;
case 'f': // 1 string to match.
if (NameR.substr(13, 4) != "vscr")
break;
return Intrinsic::ppc_altivec_mfvscr; // "pc.altivec.mfvscr"
case 't': // 1 string to match.
if (NameR.substr(13, 4) != "vscr")
break;
return Intrinsic::ppc_altivec_mtvscr; // "pc.altivec.mtvscr"
}
break;
case 's': // 3 strings to match.
if (NameR.substr(12, 3) != "tve")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
if (NameR[16] != 'x')
break;
return Intrinsic::ppc_altivec_stvebx; // "pc.altivec.stvebx"
case 'h': // 1 string to match.
if (NameR[16] != 'x')
break;
return Intrinsic::ppc_altivec_stvehx; // "pc.altivec.stvehx"
case 'w': // 1 string to match.
if (NameR[16] != 'x')
break;
return Intrinsic::ppc_altivec_stvewx; // "pc.altivec.stvewx"
}
break;
case 'v': // 22 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 6 strings to match.
if (NameR.substr(13, 2) != "vg")
break;
switch (NameR[15]) {
default: break;
case 's': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vavgsb; // "pc.altivec.vavgsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vavgsh; // "pc.altivec.vavgsh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vavgsw; // "pc.altivec.vavgsw"
}
break;
case 'u': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vavgub; // "pc.altivec.vavgub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vavguh; // "pc.altivec.vavguh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vavguw; // "pc.altivec.vavguw"
}
break;
}
break;
case 'c': // 2 strings to match.
if (NameR[13] != 't')
break;
switch (NameR[14]) {
default: break;
case 's': // 1 string to match.
if (NameR.substr(15, 2) != "xs")
break;
return Intrinsic::ppc_altivec_vctsxs; // "pc.altivec.vctsxs"
case 'u': // 1 string to match.
if (NameR.substr(15, 2) != "xs")
break;
return Intrinsic::ppc_altivec_vctuxs; // "pc.altivec.vctuxs"
}
break;
case 'm': // 14 strings to match.
switch (NameR[13]) {
default: break;
case 'a': // 7 strings to match.
if (NameR[14] != 'x')
break;
switch (NameR[15]) {
default: break;
case 'f': // 1 string to match.
if (NameR[16] != 'p')
break;
return Intrinsic::ppc_altivec_vmaxfp; // "pc.altivec.vmaxfp"
case 's': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxsb; // "pc.altivec.vmaxsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxsh; // "pc.altivec.vmaxsh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxsw; // "pc.altivec.vmaxsw"
}
break;
case 'u': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxub; // "pc.altivec.vmaxub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxuh; // "pc.altivec.vmaxuh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxuw; // "pc.altivec.vmaxuw"
}
break;
}
break;
case 'i': // 7 strings to match.
if (NameR[14] != 'n')
break;
switch (NameR[15]) {
default: break;
case 'f': // 1 string to match.
if (NameR[16] != 'p')
break;
return Intrinsic::ppc_altivec_vminfp; // "pc.altivec.vminfp"
case 's': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vminsb; // "pc.altivec.vminsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vminsh; // "pc.altivec.vminsh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vminsw; // "pc.altivec.vminsw"
}
break;
case 'u': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vminub; // "pc.altivec.vminub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vminuh; // "pc.altivec.vminuh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vminuw; // "pc.altivec.vminuw"
}
break;
}
break;
}
break;
}
break;
}
break;
case 18: // 38 strings to match.
if (NameR.substr(0, 12) != "pc.altivec.v")
break;
switch (NameR[12]) {
default: break;
case 'a': // 7 strings to match.
if (NameR.substr(13, 2) != "dd")
break;
switch (NameR[15]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(16, 2) != "uw")
break;
return Intrinsic::ppc_altivec_vaddcuw; // "pc.altivec.vaddcuw"
case 's': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vaddsbs; // "pc.altivec.vaddsbs"
case 'h': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vaddshs; // "pc.altivec.vaddshs"
case 'w': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vaddsws; // "pc.altivec.vaddsws"
}
break;
case 'u': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vaddubs; // "pc.altivec.vaddubs"
case 'h': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vadduhs; // "pc.altivec.vadduhs"
case 'w': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vadduws; // "pc.altivec.vadduws"
}
break;
}
break;
case 'c': // 1 string to match.
if (NameR.substr(13, 5) != "mpbfp")
break;
return Intrinsic::ppc_altivec_vcmpbfp; // "pc.altivec.vcmpbfp"
case 'l': // 1 string to match.
if (NameR.substr(13, 5) != "ogefp")
break;
return Intrinsic::ppc_altivec_vlogefp; // "pc.altivec.vlogefp"
case 'm': // 9 strings to match.
switch (NameR[13]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(14, 4) != "ddfp")
break;
return Intrinsic::ppc_altivec_vmaddfp; // "pc.altivec.vmaddfp"
case 'u': // 8 strings to match.
if (NameR[14] != 'l')
break;
switch (NameR[15]) {
default: break;
case 'e': // 4 strings to match.
switch (NameR[16]) {
default: break;
case 's': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmulesb; // "pc.altivec.vmulesb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmulesh; // "pc.altivec.vmulesh"
}
break;
case 'u': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmuleub; // "pc.altivec.vmuleub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmuleuh; // "pc.altivec.vmuleuh"
}
break;
}
break;
case 'o': // 4 strings to match.
switch (NameR[16]) {
default: break;
case 's': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmulosb; // "pc.altivec.vmulosb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmulosh; // "pc.altivec.vmulosh"
}
break;
case 'u': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmuloub; // "pc.altivec.vmuloub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmulouh; // "pc.altivec.vmulouh"
}
break;
}
break;
}
break;
}
break;
case 'p': // 6 strings to match.
if (NameR[13] != 'k')
break;
switch (NameR[14]) {
default: break;
case 's': // 4 strings to match.
switch (NameR[15]) {
default: break;
case 'h': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 's': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vpkshss; // "pc.altivec.vpkshss"
case 'u': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vpkshus; // "pc.altivec.vpkshus"
}
break;
case 'w': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 's': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vpkswss; // "pc.altivec.vpkswss"
case 'u': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vpkswus; // "pc.altivec.vpkswus"
}
break;
}
break;
case 'u': // 2 strings to match.
switch (NameR[15]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(16, 2) != "us")
break;
return Intrinsic::ppc_altivec_vpkuhus; // "pc.altivec.vpkuhus"
case 'w': // 1 string to match.
if (NameR.substr(16, 2) != "us")
break;
return Intrinsic::ppc_altivec_vpkuwus; // "pc.altivec.vpkuwus"
}
break;
}
break;
case 's': // 8 strings to match.
if (NameR[13] != 'u')
break;
switch (NameR[14]) {
default: break;
case 'b': // 7 strings to match.
switch (NameR[15]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(16, 2) != "uw")
break;
return Intrinsic::ppc_altivec_vsubcuw; // "pc.altivec.vsubcuw"
case 's': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vsubsbs; // "pc.altivec.vsubsbs"
case 'h': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vsubshs; // "pc.altivec.vsubshs"
case 'w': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vsubsws; // "pc.altivec.vsubsws"
}
break;
case 'u': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vsububs; // "pc.altivec.vsububs"
case 'h': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vsubuhs; // "pc.altivec.vsubuhs"
case 'w': // 1 string to match.
if (NameR[17] != 's')
break;
return Intrinsic::ppc_altivec_vsubuws; // "pc.altivec.vsubuws"
}
break;
}
break;
case 'm': // 1 string to match.
if (NameR.substr(15, 3) != "sws")
break;
return Intrinsic::ppc_altivec_vsumsws; // "pc.altivec.vsumsws"
}
break;
case 'u': // 6 strings to match.
if (NameR.substr(13, 2) != "pk")
break;
switch (NameR[15]) {
default: break;
case 'h': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR[17] != 'x')
break;
return Intrinsic::ppc_altivec_vupkhpx; // "pc.altivec.vupkhpx"
case 's': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vupkhsb; // "pc.altivec.vupkhsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vupkhsh; // "pc.altivec.vupkhsh"
}
break;
}
break;
case 'l': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'p': // 1 string to match.
if (NameR[17] != 'x')
break;
return Intrinsic::ppc_altivec_vupklpx; // "pc.altivec.vupklpx"
case 's': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vupklsb; // "pc.altivec.vupklsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vupklsh; // "pc.altivec.vupklsh"
}
break;
}
break;
}
break;
}
break;
case 19: // 29 strings to match.
switch (NameR[0]) {
default: break;
case 'p': // 24 strings to match.
if (NameR.substr(1, 11) != "c.altivec.v")
break;
switch (NameR[12]) {
default: break;
case 'c': // 12 strings to match.
if (NameR.substr(13, 2) != "mp")
break;
switch (NameR[15]) {
default: break;
case 'e': // 4 strings to match.
if (NameR[16] != 'q')
break;
switch (NameR[17]) {
default: break;
case 'f': // 1 string to match.
if (NameR[18] != 'p')
break;
return Intrinsic::ppc_altivec_vcmpeqfp; // "pc.altivec.vcmpeqfp"
case 'u': // 3 strings to match.
switch (NameR[18]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpequb; // "pc.altivec.vcmpequb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpequh; // "pc.altivec.vcmpequh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpequw; // "pc.altivec.vcmpequw"
}
break;
}
break;
case 'g': // 8 strings to match.
switch (NameR[16]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(17, 2) != "fp")
break;
return Intrinsic::ppc_altivec_vcmpgefp; // "pc.altivec.vcmpgefp"
case 't': // 7 strings to match.
switch (NameR[17]) {
default: break;
case 'f': // 1 string to match.
if (NameR[18] != 'p')
break;
return Intrinsic::ppc_altivec_vcmpgtfp; // "pc.altivec.vcmpgtfp"
case 's': // 3 strings to match.
switch (NameR[18]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtsb; // "pc.altivec.vcmpgtsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtsh; // "pc.altivec.vcmpgtsh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtsw; // "pc.altivec.vcmpgtsw"
}
break;
case 'u': // 3 strings to match.
switch (NameR[18]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtub; // "pc.altivec.vcmpgtub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtuh; // "pc.altivec.vcmpgtuh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtuw; // "pc.altivec.vcmpgtuw"
}
break;
}
break;
}
break;
}
break;
case 'e': // 1 string to match.
if (NameR.substr(13, 6) != "xptefp")
break;
return Intrinsic::ppc_altivec_vexptefp; // "pc.altivec.vexptefp"
case 'm': // 6 strings to match.
if (NameR.substr(13, 3) != "sum")
break;
switch (NameR[16]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(17, 2) != "bm")
break;
return Intrinsic::ppc_altivec_vmsummbm; // "pc.altivec.vmsummbm"
case 's': // 2 strings to match.
if (NameR[17] != 'h')
break;
switch (NameR[18]) {
default: break;
case 'm': // 1 string to match.
return Intrinsic::ppc_altivec_vmsumshm; // "pc.altivec.vmsumshm"
case 's': // 1 string to match.
return Intrinsic::ppc_altivec_vmsumshs; // "pc.altivec.vmsumshs"
}
break;
case 'u': // 3 strings to match.
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
if (NameR[18] != 'm')
break;
return Intrinsic::ppc_altivec_vmsumubm; // "pc.altivec.vmsumubm"
case 'h': // 2 strings to match.
switch (NameR[18]) {
default: break;
case 'm': // 1 string to match.
return Intrinsic::ppc_altivec_vmsumuhm; // "pc.altivec.vmsumuhm"
case 's': // 1 string to match.
return Intrinsic::ppc_altivec_vmsumuhs; // "pc.altivec.vmsumuhs"
}
break;
}
break;
}
break;
case 'n': // 1 string to match.
if (NameR.substr(13, 6) != "msubfp")
break;
return Intrinsic::ppc_altivec_vnmsubfp; // "pc.altivec.vnmsubfp"
case 's': // 4 strings to match.
if (NameR.substr(13, 2) != "um")
break;
switch (NameR[15]) {
default: break;
case '2': // 1 string to match.
if (NameR.substr(16, 3) != "sws")
break;
return Intrinsic::ppc_altivec_vsum2sws; // "pc.altivec.vsum2sws"
case '4': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 's': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
if (NameR[18] != 's')
break;
return Intrinsic::ppc_altivec_vsum4sbs; // "pc.altivec.vsum4sbs"
case 'h': // 1 string to match.
if (NameR[18] != 's')
break;
return Intrinsic::ppc_altivec_vsum4shs; // "pc.altivec.vsum4shs"
}
break;
case 'u': // 1 string to match.
if (NameR.substr(17, 2) != "bs")
break;
return Intrinsic::ppc_altivec_vsum4ubs; // "pc.altivec.vsum4ubs"
}
break;
}
break;
}
break;
case 't': // 5 strings to match.
if (NameR.substr(1, 16) != "x.read.lanemask.")
break;
switch (NameR[17]) {
default: break;
case 'e': // 1 string to match.
if (NameR[18] != 'q')
break;
return Intrinsic::ptx_read_lanemask_eq; // "tx.read.lanemask.eq"
case 'g': // 2 strings to match.
switch (NameR[18]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::ptx_read_lanemask_ge; // "tx.read.lanemask.ge"
case 't': // 1 string to match.
return Intrinsic::ptx_read_lanemask_gt; // "tx.read.lanemask.gt"
}
break;
case 'l': // 2 strings to match.
switch (NameR[18]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::ptx_read_lanemask_le; // "tx.read.lanemask.le"
case 't': // 1 string to match.
return Intrinsic::ptx_read_lanemask_lt; // "tx.read.lanemask.lt"
}
break;
}
break;
}
break;
case 20: // 4 strings to match.
if (NameR.substr(0, 12) != "pc.altivec.v")
break;
switch (NameR[12]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(13, 7) != "mpbfp.p")
break;
return Intrinsic::ppc_altivec_vcmpbfp_p; // "pc.altivec.vcmpbfp.p"
case 'm': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(14, 6) != "addshs")
break;
return Intrinsic::ppc_altivec_vmhaddshs; // "pc.altivec.vmhaddshs"
case 'l': // 1 string to match.
if (NameR.substr(14, 6) != "adduhm")
break;
return Intrinsic::ppc_altivec_vmladduhm; // "pc.altivec.vmladduhm"
}
break;
case 'r': // 1 string to match.
if (NameR.substr(13, 7) != "sqrtefp")
break;
return Intrinsic::ppc_altivec_vrsqrtefp; // "pc.altivec.vrsqrtefp"
}
break;
case 21: // 13 strings to match.
if (NameR.substr(0, 12) != "pc.altivec.v")
break;
switch (NameR[12]) {
default: break;
case 'c': // 12 strings to match.
if (NameR.substr(13, 2) != "mp")
break;
switch (NameR[15]) {
default: break;
case 'e': // 4 strings to match.
if (NameR[16] != 'q')
break;
switch (NameR[17]) {
default: break;
case 'f': // 1 string to match.
if (NameR.substr(18, 3) != "p.p")
break;
return Intrinsic::ppc_altivec_vcmpeqfp_p; // "pc.altivec.vcmpeqfp.p"
case 'u': // 3 strings to match.
switch (NameR[18]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(19, 2) != ".p")
break;
return Intrinsic::ppc_altivec_vcmpequb_p; // "pc.altivec.vcmpequb.p"
case 'h': // 1 string to match.
if (NameR.substr(19, 2) != ".p")
break;
return Intrinsic::ppc_altivec_vcmpequh_p; // "pc.altivec.vcmpequh.p"
case 'w': // 1 string to match.
if (NameR.substr(19, 2) != ".p")
break;
return Intrinsic::ppc_altivec_vcmpequw_p; // "pc.altivec.vcmpequw.p"
}
break;
}
break;
case 'g': // 8 strings to match.
switch (NameR[16]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(17, 4) != "fp.p")
break;
return Intrinsic::ppc_altivec_vcmpgefp_p; // "pc.altivec.vcmpgefp.p"
case 't': // 7 strings to match.
switch (NameR[17]) {
default: break;
case 'f': // 1 string to match.
if (NameR.substr(18, 3) != "p.p")
break;
return Intrinsic::ppc_altivec_vcmpgtfp_p; // "pc.altivec.vcmpgtfp.p"
case 's': // 3 strings to match.
switch (NameR[18]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(19, 2) != ".p")
break;
return Intrinsic::ppc_altivec_vcmpgtsb_p; // "pc.altivec.vcmpgtsb.p"
case 'h': // 1 string to match.
if (NameR.substr(19, 2) != ".p")
break;
return Intrinsic::ppc_altivec_vcmpgtsh_p; // "pc.altivec.vcmpgtsh.p"
case 'w': // 1 string to match.
if (NameR.substr(19, 2) != ".p")
break;
return Intrinsic::ppc_altivec_vcmpgtsw_p; // "pc.altivec.vcmpgtsw.p"
}
break;
case 'u': // 3 strings to match.
switch (NameR[18]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(19, 2) != ".p")
break;
return Intrinsic::ppc_altivec_vcmpgtub_p; // "pc.altivec.vcmpgtub.p"
case 'h': // 1 string to match.
if (NameR.substr(19, 2) != ".p")
break;
return Intrinsic::ppc_altivec_vcmpgtuh_p; // "pc.altivec.vcmpgtuh.p"
case 'w': // 1 string to match.
if (NameR.substr(19, 2) != ".p")
break;
return Intrinsic::ppc_altivec_vcmpgtuw_p; // "pc.altivec.vcmpgtuw.p"
}
break;
}
break;
}
break;
}
break;
case 'm': // 1 string to match.
if (NameR.substr(13, 8) != "hraddshs")
break;
return Intrinsic::ppc_altivec_vmhraddshs; // "pc.altivec.vmhraddshs"
}
break;
}
break; // end of 'p' case.
case 'r':
if (NameR.startswith("kqc.NOT.")) return Intrinsic::NOT;
if (NameR.startswith("kqc.a_eq_a_minus_b.")) return Intrinsic::a_eq_a_minus_b;
if (NameR.startswith("kqc.a_eq_a_plus_b.")) return Intrinsic::a_eq_a_plus_b;
if (NameR.startswith("kqc.a_eq_a_plus_b_times_c.")) return Intrinsic::a_eq_a_plus_b_times_c;
if (NameR.startswith("kqc.a_swap_b.")) return Intrinsic::a_swap_b;
if (NameR.startswith("kqc.assign_value_of_0_to_a.")) return Intrinsic::assign_value_of_0_to_a;
if (NameR.startswith("kqc.assign_value_of_1_to_a.")) return Intrinsic::assign_value_of_1_to_a;
if (NameR.startswith("kqc.assign_value_of_b_to_a.")) return Intrinsic::assign_value_of_b_to_a;
if (NameR.startswith("kqc.cnot.")) return Intrinsic::cnot;
if (NameR.startswith("kqc.toffoli.")) return Intrinsic::toffoli;
switch (NameR.size()) {
default: break;
case 12: // 1 string to match.
if (NameR.substr(0, 12) != "eturnaddress")
break;
return Intrinsic::returnaddress; // "eturnaddress"
case 15: // 1 string to match.
if (NameR.substr(0, 15) != "eadcyclecounter")
break;
return Intrinsic::readcyclecounter; // "eadcyclecounter"
}
break; // end of 'r' case.
case 's':
if (NameR.startswith("add.with.overflow.")) return Intrinsic::sadd_with_overflow;
if (NameR.startswith("in.")) return Intrinsic::sin;
if (NameR.startswith("mul.with.overflow.")) return Intrinsic::smul_with_overflow;
if (NameR.startswith("qrt.")) return Intrinsic::sqrt;
if (NameR.startswith("sub.with.overflow.")) return Intrinsic::ssub_with_overflow;
switch (NameR.size()) {
default: break;
case 5: // 1 string to match.
if (NameR.substr(0, 5) != "etjmp")
break;
return Intrinsic::setjmp; // "etjmp"
case 7: // 1 string to match.
if (NameR.substr(0, 7) != "pu.si.a")
break;
return Intrinsic::spu_si_a; // "pu.si.a"
case 8: // 11 strings to match.
switch (NameR[0]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(1, 7) != "gsetjmp")
break;
return Intrinsic::sigsetjmp; // "igsetjmp"
case 'p': // 9 strings to match.
if (NameR.substr(1, 5) != "u.si.")
break;
switch (NameR[6]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[7]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::spu_si_ah; // "pu.si.ah"
case 'i': // 1 string to match.
return Intrinsic::spu_si_ai; // "pu.si.ai"
}
break;
case 'b': // 1 string to match.
if (NameR[7] != 'g')
break;
return Intrinsic::spu_si_bg; // "pu.si.bg"
case 'c': // 1 string to match.
if (NameR[7] != 'g')
break;
return Intrinsic::spu_si_cg; // "pu.si.cg"
case 'f': // 3 strings to match.
switch (NameR[7]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_fa; // "pu.si.fa"
case 'm': // 1 string to match.
return Intrinsic::spu_si_fm; // "pu.si.fm"
case 's': // 1 string to match.
return Intrinsic::spu_si_fs; // "pu.si.fs"
}
break;
case 'o': // 1 string to match.
if (NameR[7] != 'r')
break;
return Intrinsic::spu_si_or; // "pu.si.or"
case 's': // 1 string to match.
if (NameR[7] != 'f')
break;
return Intrinsic::spu_si_sf; // "pu.si.sf"
}
break;
case 't': // 1 string to match.
if (NameR.substr(1, 7) != "acksave")
break;
return Intrinsic::stacksave; // "tacksave"
}
break;
case 9: // 20 strings to match.
switch (NameR[0]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(1, 8) != "glongjmp")
break;
return Intrinsic::siglongjmp; // "iglongjmp"
case 'p': // 19 strings to match.
if (NameR.substr(1, 5) != "u.si.")
break;
switch (NameR[6]) {
default: break;
case 'a': // 2 strings to match.
switch (NameR[7]) {
default: break;
case 'h': // 1 string to match.
if (NameR[8] != 'i')
break;
return Intrinsic::spu_si_ahi; // "pu.si.ahi"
case 'n': // 1 string to match.
if (NameR[8] != 'd')
break;
return Intrinsic::spu_si_and; // "pu.si.and"
}
break;
case 'b': // 1 string to match.
if (NameR.substr(7, 2) != "gx")
break;
return Intrinsic::spu_si_bgx; // "pu.si.bgx"
case 'c': // 3 strings to match.
switch (NameR[7]) {
default: break;
case 'e': // 1 string to match.
if (NameR[8] != 'q')
break;
return Intrinsic::spu_si_ceq; // "pu.si.ceq"
case 'g': // 2 strings to match.
switch (NameR[8]) {
default: break;
case 't': // 1 string to match.
return Intrinsic::spu_si_cgt; // "pu.si.cgt"
case 'x': // 1 string to match.
return Intrinsic::spu_si_cgx; // "pu.si.cgx"
}
break;
}
break;
case 'd': // 3 strings to match.
if (NameR[7] != 'f')
break;
switch (NameR[8]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_dfa; // "pu.si.dfa"
case 'm': // 1 string to match.
return Intrinsic::spu_si_dfm; // "pu.si.dfm"
case 's': // 1 string to match.
return Intrinsic::spu_si_dfs; // "pu.si.dfs"
}
break;
case 'f': // 2 strings to match.
if (NameR[7] != 'm')
break;
switch (NameR[8]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_fma; // "pu.si.fma"
case 's': // 1 string to match.
return Intrinsic::spu_si_fms; // "pu.si.fms"
}
break;
case 'm': // 1 string to match.
if (NameR.substr(7, 2) != "py")
break;
return Intrinsic::spu_si_mpy; // "pu.si.mpy"
case 'n': // 1 string to match.
if (NameR.substr(7, 2) != "or")
break;
return Intrinsic::spu_si_nor; // "pu.si.nor"
case 'o': // 2 strings to match.
if (NameR[7] != 'r')
break;
switch (NameR[8]) {
default: break;
case 'c': // 1 string to match.
return Intrinsic::spu_si_orc; // "pu.si.orc"
case 'i': // 1 string to match.
return Intrinsic::spu_si_ori; // "pu.si.ori"
}
break;
case 's': // 3 strings to match.
if (NameR[7] != 'f')
break;
switch (NameR[8]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::spu_si_sfh; // "pu.si.sfh"
case 'i': // 1 string to match.
return Intrinsic::spu_si_sfi; // "pu.si.sfi"
case 'x': // 1 string to match.
return Intrinsic::spu_si_sfx; // "pu.si.sfx"
}
break;
case 'x': // 1 string to match.
if (NameR.substr(7, 2) != "or")
break;
return Intrinsic::spu_si_xor; // "pu.si.xor"
}
break;
}
break;
case 10: // 26 strings to match.
if (NameR.substr(0, 6) != "pu.si.")
break;
switch (NameR[6]) {
default: break;
case 'a': // 3 strings to match.
switch (NameR[7]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(8, 2) != "dx")
break;
return Intrinsic::spu_si_addx; // "pu.si.addx"
case 'n': // 2 strings to match.
if (NameR[8] != 'd')
break;
switch (NameR[9]) {
default: break;
case 'c': // 1 string to match.
return Intrinsic::spu_si_andc; // "pu.si.andc"
case 'i': // 1 string to match.
return Intrinsic::spu_si_andi; // "pu.si.andi"
}
break;
}
break;
case 'c': // 7 strings to match.
switch (NameR[7]) {
default: break;
case 'e': // 3 strings to match.
if (NameR[8] != 'q')
break;
switch (NameR[9]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::spu_si_ceqb; // "pu.si.ceqb"
case 'h': // 1 string to match.
return Intrinsic::spu_si_ceqh; // "pu.si.ceqh"
case 'i': // 1 string to match.
return Intrinsic::spu_si_ceqi; // "pu.si.ceqi"
}
break;
case 'g': // 3 strings to match.
if (NameR[8] != 't')
break;
switch (NameR[9]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::spu_si_cgtb; // "pu.si.cgtb"
case 'h': // 1 string to match.
return Intrinsic::spu_si_cgth; // "pu.si.cgth"
case 'i': // 1 string to match.
return Intrinsic::spu_si_cgti; // "pu.si.cgti"
}
break;
case 'l': // 1 string to match.
if (NameR.substr(8, 2) != "gt")
break;
return Intrinsic::spu_si_clgt; // "pu.si.clgt"
}
break;
case 'd': // 2 strings to match.
if (NameR.substr(7, 2) != "fm")
break;
switch (NameR[9]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_dfma; // "pu.si.dfma"
case 's': // 1 string to match.
return Intrinsic::spu_si_dfms; // "pu.si.dfms"
}
break;
case 'f': // 3 strings to match.
switch (NameR[7]) {
default: break;
case 'c': // 2 strings to match.
switch (NameR[8]) {
default: break;
case 'e': // 1 string to match.
if (NameR[9] != 'q')
break;
return Intrinsic::spu_si_fceq; // "pu.si.fceq"
case 'g': // 1 string to match.
if (NameR[9] != 't')
break;
return Intrinsic::spu_si_fcgt; // "pu.si.fcgt"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(8, 2) != "ms")
break;
return Intrinsic::spu_si_fnms; // "pu.si.fnms"
}
break;
case 'm': // 5 strings to match.
if (NameR.substr(7, 2) != "py")
break;
switch (NameR[9]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_mpya; // "pu.si.mpya"
case 'h': // 1 string to match.
return Intrinsic::spu_si_mpyh; // "pu.si.mpyh"
case 'i': // 1 string to match.
return Intrinsic::spu_si_mpyi; // "pu.si.mpyi"
case 's': // 1 string to match.
return Intrinsic::spu_si_mpys; // "pu.si.mpys"
case 'u': // 1 string to match.
return Intrinsic::spu_si_mpyu; // "pu.si.mpyu"
}
break;
case 'n': // 1 string to match.
if (NameR.substr(7, 3) != "and")
break;
return Intrinsic::spu_si_nand; // "pu.si.nand"
case 'o': // 2 strings to match.
if (NameR[7] != 'r')
break;
switch (NameR[8]) {
default: break;
case 'b': // 1 string to match.
if (NameR[9] != 'i')
break;
return Intrinsic::spu_si_orbi; // "pu.si.orbi"
case 'h': // 1 string to match.
if (NameR[9] != 'i')
break;
return Intrinsic::spu_si_orhi; // "pu.si.orhi"
}
break;
case 's': // 2 strings to match.
switch (NameR[7]) {
default: break;
case 'f': // 1 string to match.
if (NameR.substr(8, 2) != "hi")
break;
return Intrinsic::spu_si_sfhi; // "pu.si.sfhi"
case 'h': // 1 string to match.
if (NameR.substr(8, 2) != "li")
break;
return Intrinsic::spu_si_shli; // "pu.si.shli"
}
break;
case 'x': // 1 string to match.
if (NameR.substr(7, 3) != "ori")
break;
return Intrinsic::spu_si_xori; // "pu.si.xori"
}
break;
case 11: // 19 strings to match.
switch (NameR[0]) {
default: break;
case 'p': // 18 strings to match.
if (NameR.substr(1, 5) != "u.si.")
break;
switch (NameR[6]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(7, 2) != "nd")
break;
switch (NameR[9]) {
default: break;
case 'b': // 1 string to match.
if (NameR[10] != 'i')
break;
return Intrinsic::spu_si_andbi; // "pu.si.andbi"
case 'h': // 1 string to match.
if (NameR[10] != 'i')
break;
return Intrinsic::spu_si_andhi; // "pu.si.andhi"
}
break;
case 'c': // 7 strings to match.
switch (NameR[7]) {
default: break;
case 'e': // 2 strings to match.
if (NameR[8] != 'q')
break;
switch (NameR[9]) {
default: break;
case 'b': // 1 string to match.
if (NameR[10] != 'i')
break;
return Intrinsic::spu_si_ceqbi; // "pu.si.ceqbi"
case 'h': // 1 string to match.
if (NameR[10] != 'i')
break;
return Intrinsic::spu_si_ceqhi; // "pu.si.ceqhi"
}
break;
case 'g': // 2 strings to match.
if (NameR[8] != 't')
break;
switch (NameR[9]) {
default: break;
case 'b': // 1 string to match.
if (NameR[10] != 'i')
break;
return Intrinsic::spu_si_cgtbi; // "pu.si.cgtbi"
case 'h': // 1 string to match.
if (NameR[10] != 'i')
break;
return Intrinsic::spu_si_cgthi; // "pu.si.cgthi"
}
break;
case 'l': // 3 strings to match.
if (NameR.substr(8, 2) != "gt")
break;
switch (NameR[10]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::spu_si_clgtb; // "pu.si.clgtb"
case 'h': // 1 string to match.
return Intrinsic::spu_si_clgth; // "pu.si.clgth"
case 'i': // 1 string to match.
return Intrinsic::spu_si_clgti; // "pu.si.clgti"
}
break;
}
break;
case 'd': // 2 strings to match.
if (NameR.substr(7, 3) != "fnm")
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_dfnma; // "pu.si.dfnma"
case 's': // 1 string to match.
return Intrinsic::spu_si_dfnms; // "pu.si.dfnms"
}
break;
case 'f': // 3 strings to match.
switch (NameR[7]) {
default: break;
case 'c': // 2 strings to match.
if (NameR[8] != 'm')
break;
switch (NameR[9]) {
default: break;
case 'e': // 1 string to match.
if (NameR[10] != 'q')
break;
return Intrinsic::spu_si_fcmeq; // "pu.si.fcmeq"
case 'g': // 1 string to match.
if (NameR[10] != 't')
break;
return Intrinsic::spu_si_fcmgt; // "pu.si.fcmgt"
}
break;
case 's': // 1 string to match.
if (NameR.substr(8, 3) != "mbi")
break;
return Intrinsic::spu_si_fsmbi; // "pu.si.fsmbi"
}
break;
case 'm': // 2 strings to match.
if (NameR.substr(7, 2) != "py")
break;
switch (NameR[9]) {
default: break;
case 'h': // 1 string to match.
if (NameR[10] != 'h')
break;
return Intrinsic::spu_si_mpyhh; // "pu.si.mpyhh"
case 'u': // 1 string to match.
if (NameR[10] != 'i')
break;
return Intrinsic::spu_si_mpyui; // "pu.si.mpyui"
}
break;
case 'x': // 2 strings to match.
if (NameR.substr(7, 2) != "or")
break;
switch (NameR[9]) {
default: break;
case 'b': // 1 string to match.
if (NameR[10] != 'i')
break;
return Intrinsic::spu_si_xorbi; // "pu.si.xorbi"
case 'h': // 1 string to match.
if (NameR[10] != 'i')
break;
return Intrinsic::spu_si_xorhi; // "pu.si.xorhi"
}
break;
}
break;
case 't': // 1 string to match.
if (NameR.substr(1, 10) != "ackrestore")
break;
return Intrinsic::stackrestore; // "tackrestore"
}
break;
case 12: // 6 strings to match.
if (NameR.substr(0, 6) != "pu.si.")
break;
switch (NameR[6]) {
default: break;
case 'c': // 2 strings to match.
if (NameR.substr(7, 3) != "lgt")
break;
switch (NameR[10]) {
default: break;
case 'b': // 1 string to match.
if (NameR[11] != 'i')
break;
return Intrinsic::spu_si_clgtbi; // "pu.si.clgtbi"
case 'h': // 1 string to match.
if (NameR[11] != 'i')
break;
return Intrinsic::spu_si_clgthi; // "pu.si.clgthi"
}
break;
case 'm': // 2 strings to match.
if (NameR.substr(7, 4) != "pyhh")
break;
switch (NameR[11]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_mpyhha; // "pu.si.mpyhha"
case 'u': // 1 string to match.
return Intrinsic::spu_si_mpyhhu; // "pu.si.mpyhhu"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(7, 4) != "hlqb")
break;
switch (NameR[11]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::spu_si_shlqbi; // "pu.si.shlqbi"
case 'y': // 1 string to match.
return Intrinsic::spu_si_shlqby; // "pu.si.shlqby"
}
break;
}
break;
case 13: // 4 strings to match.
switch (NameR[0]) {
default: break;
case 'p': // 3 strings to match.
if (NameR.substr(1, 5) != "u.si.")
break;
switch (NameR[6]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(7, 6) != "pyhhau")
break;
return Intrinsic::spu_si_mpyhhau; // "pu.si.mpyhhau"
case 's': // 2 strings to match.
if (NameR.substr(7, 4) != "hlqb")
break;
switch (NameR[11]) {
default: break;
case 'i': // 1 string to match.
if (NameR[12] != 'i')
break;
return Intrinsic::spu_si_shlqbii; // "pu.si.shlqbii"
case 'y': // 1 string to match.
if (NameR[12] != 'i')
break;
return Intrinsic::spu_si_shlqbyi; // "pu.si.shlqbyi"
}
break;
}
break;
case 't': // 1 string to match.
if (NameR.substr(1, 12) != "ackprotector")
break;
return Intrinsic::stackprotector; // "tackprotector"
}
break;
}
break; // end of 's' case.
case 't':
switch (NameR.size()) {
default: break;
case 3: // 1 string to match.
if (NameR.substr(0, 3) != "rap")
break;
return Intrinsic::trap; // "rap"
}
break; // end of 't' case.
case 'u':
if (NameR.startswith("add.with.overflow.")) return Intrinsic::uadd_with_overflow;
if (NameR.startswith("mul.with.overflow.")) return Intrinsic::umul_with_overflow;
if (NameR.startswith("sub.with.overflow.")) return Intrinsic::usub_with_overflow;
break; // end of 'u' case.
case 'v':
switch (NameR.size()) {
default: break;
case 5: // 1 string to match.
if (NameR.substr(0, 5) != "a_end")
break;
return Intrinsic::vaend; // "a_end"
case 6: // 1 string to match.
if (NameR.substr(0, 6) != "a_copy")
break;
return Intrinsic::vacopy; // "a_copy"
case 7: // 1 string to match.
if (NameR.substr(0, 7) != "a_start")
break;
return Intrinsic::vastart; // "a_start"
case 13: // 1 string to match.
if (NameR.substr(0, 13) != "ar.annotation")
break;
return Intrinsic::var_annotation; // "ar.annotation"
}
break; // end of 'v' case.
case 'x':
if (NameR.startswith("core.chkct.")) return Intrinsic::xcore_chkct;
if (NameR.startswith("core.eeu.")) return Intrinsic::xcore_eeu;
if (NameR.startswith("core.endin.")) return Intrinsic::xcore_endin;
if (NameR.startswith("core.freer.")) return Intrinsic::xcore_freer;
if (NameR.startswith("core.getr.")) return Intrinsic::xcore_getr;
if (NameR.startswith("core.getst.")) return Intrinsic::xcore_getst;
if (NameR.startswith("core.getts.")) return Intrinsic::xcore_getts;
if (NameR.startswith("core.in.")) return Intrinsic::xcore_in;
if (NameR.startswith("core.inct.")) return Intrinsic::xcore_inct;
if (NameR.startswith("core.initcp.")) return Intrinsic::xcore_initcp;
if (NameR.startswith("core.initdp.")) return Intrinsic::xcore_initdp;
if (NameR.startswith("core.initlr.")) return Intrinsic::xcore_initlr;
if (NameR.startswith("core.initpc.")) return Intrinsic::xcore_initpc;
if (NameR.startswith("core.initsp.")) return Intrinsic::xcore_initsp;
if (NameR.startswith("core.inshr.")) return Intrinsic::xcore_inshr;
if (NameR.startswith("core.int.")) return Intrinsic::xcore_int;
if (NameR.startswith("core.mjoin.")) return Intrinsic::xcore_mjoin;
if (NameR.startswith("core.msync.")) return Intrinsic::xcore_msync;
if (NameR.startswith("core.out.")) return Intrinsic::xcore_out;
if (NameR.startswith("core.outct.")) return Intrinsic::xcore_outct;
if (NameR.startswith("core.outshr.")) return Intrinsic::xcore_outshr;
if (NameR.startswith("core.outt.")) return Intrinsic::xcore_outt;
if (NameR.startswith("core.peek.")) return Intrinsic::xcore_peek;
if (NameR.startswith("core.setc.")) return Intrinsic::xcore_setc;
if (NameR.startswith("core.setclk.")) return Intrinsic::xcore_setclk;
if (NameR.startswith("core.setd.")) return Intrinsic::xcore_setd;
if (NameR.startswith("core.setev.")) return Intrinsic::xcore_setev;
if (NameR.startswith("core.setpsc.")) return Intrinsic::xcore_setpsc;
if (NameR.startswith("core.setpt.")) return Intrinsic::xcore_setpt;
if (NameR.startswith("core.setrdy.")) return Intrinsic::xcore_setrdy;
if (NameR.startswith("core.settw.")) return Intrinsic::xcore_settw;
if (NameR.startswith("core.setv.")) return Intrinsic::xcore_setv;
if (NameR.startswith("core.syncr.")) return Intrinsic::xcore_syncr;
if (NameR.startswith("core.testct.")) return Intrinsic::xcore_testct;
if (NameR.startswith("core.testwct.")) return Intrinsic::xcore_testwct;
switch (NameR.size()) {
default: break;
case 6: // 1 string to match.
if (NameR.substr(0, 6) != "86.int")
break;
return Intrinsic::x86_int; // "86.int"
case 9: // 4 strings to match.
if (NameR.substr(0, 5) != "core.")
break;
switch (NameR[5]) {
default: break;
case 'c': // 2 strings to match.
switch (NameR[6]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(7, 2) != "re")
break;
return Intrinsic::xcore_clre; // "core.clre"
case 'r': // 1 string to match.
if (NameR.substr(7, 2) != "c8")
break;
return Intrinsic::xcore_crc8; // "core.crc8"
}
break;
case 's': // 1 string to match.
if (NameR.substr(6, 3) != "ext")
break;
return Intrinsic::xcore_sext; // "core.sext"
case 'z': // 1 string to match.
if (NameR.substr(6, 3) != "ext")
break;
return Intrinsic::xcore_zext; // "core.zext"
}
break;
case 10: // 10 strings to match.
switch (NameR[0]) {
default: break;
case '8': // 1 string to match.
if (NameR.substr(1, 9) != "6.mmx.por")
break;
return Intrinsic::x86_mmx_por; // "86.mmx.por"
case 'c': // 9 strings to match.
if (NameR.substr(1, 4) != "ore.")
break;
switch (NameR[5]) {
default: break;
case 'c': // 2 strings to match.
switch (NameR[6]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(7, 3) != "rsr")
break;
return Intrinsic::xcore_clrsr; // "core.clrsr"
case 'r': // 1 string to match.
if (NameR.substr(7, 3) != "c32")
break;
return Intrinsic::xcore_crc32; // "core.crc32"
}
break;
case 'g': // 4 strings to match.
if (NameR.substr(6, 2) != "et")
break;
switch (NameR[8]) {
default: break;
case 'e': // 2 strings to match.
switch (NameR[9]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::xcore_geted; // "core.geted"
case 't': // 1 string to match.
return Intrinsic::xcore_getet; // "core.getet"
}
break;
case 'i': // 1 string to match.
if (NameR[9] != 'd')
break;
return Intrinsic::xcore_getid; // "core.getid"
case 'p': // 1 string to match.
if (NameR[9] != 's')
break;
return Intrinsic::xcore_getps; // "core.getps"
}
break;
case 's': // 3 strings to match.
switch (NameR[6]) {
default: break;
case 'e': // 2 strings to match.
if (NameR[7] != 't')
break;
switch (NameR[8]) {
default: break;
case 'p': // 1 string to match.
if (NameR[9] != 's')
break;
return Intrinsic::xcore_setps; // "core.setps"
case 's': // 1 string to match.
if (NameR[9] != 'r')
break;
return Intrinsic::xcore_setsr; // "core.setsr"
}
break;
case 's': // 1 string to match.
if (NameR.substr(7, 3) != "ync")
break;
return Intrinsic::xcore_ssync; // "core.ssync"
}
break;
}
break;
}
break;
case 11: // 4 strings to match.
switch (NameR[0]) {
default: break;
case '8': // 3 strings to match.
if (NameR.substr(1, 6) != "6.mmx.")
break;
switch (NameR[7]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(8, 3) != "mms")
break;
return Intrinsic::x86_mmx_emms; // "86.mmx.emms"
case 'p': // 2 strings to match.
switch (NameR[8]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(9, 2) != "nd")
break;
return Intrinsic::x86_mmx_pand; // "86.mmx.pand"
case 'x': // 1 string to match.
if (NameR.substr(9, 2) != "or")
break;
return Intrinsic::x86_mmx_pxor; // "86.mmx.pxor"
}
break;
}
break;
case 'c': // 1 string to match.
if (NameR.substr(1, 10) != "ore.bitrev")
break;
return Intrinsic::xcore_bitrev; // "core.bitrev"
}
break;
case 12: // 2 strings to match.
if (NameR.substr(0, 7) != "86.mmx.")
break;
switch (NameR[7]) {
default: break;
case 'f': // 1 string to match.
if (NameR.substr(8, 4) != "emms")
break;
return Intrinsic::x86_mmx_femms; // "86.mmx.femms"
case 'p': // 1 string to match.
if (NameR.substr(8, 4) != "andn")
break;
return Intrinsic::x86_mmx_pandn; // "86.mmx.pandn"
}
break;
case 13: // 49 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(4, 9) != "vx2.permd")
break;
return Intrinsic::x86_avx2_permd; // "86.avx2.permd"
case 'm': // 18 strings to match.
if (NameR.substr(4, 4) != "mx.p")
break;
switch (NameR[8]) {
default: break;
case 'a': // 6 strings to match.
switch (NameR[9]) {
default: break;
case 'd': // 4 strings to match.
if (NameR.substr(10, 2) != "d.")
break;
switch (NameR[12]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_padd_b; // "86.mmx.padd.b"
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_padd_d; // "86.mmx.padd.d"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_padd_q; // "86.mmx.padd.q"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_padd_w; // "86.mmx.padd.w"
}
break;
case 'v': // 2 strings to match.
if (NameR.substr(10, 2) != "g.")
break;
switch (NameR[12]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_pavg_b; // "86.mmx.pavg.b"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_pavg_w; // "86.mmx.pavg.w"
}
break;
}
break;
case 's': // 12 strings to match.
switch (NameR[9]) {
default: break;
case 'l': // 3 strings to match.
if (NameR.substr(10, 2) != "l.")
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psll_d; // "86.mmx.psll.d"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_psll_q; // "86.mmx.psll.q"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psll_w; // "86.mmx.psll.w"
}
break;
case 'r': // 5 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[11] != '.')
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psra_d; // "86.mmx.psra.d"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psra_w; // "86.mmx.psra.w"
}
break;
case 'l': // 3 strings to match.
if (NameR[11] != '.')
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psrl_d; // "86.mmx.psrl.d"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_psrl_q; // "86.mmx.psrl.q"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psrl_w; // "86.mmx.psrl.w"
}
break;
}
break;
case 'u': // 4 strings to match.
if (NameR.substr(10, 2) != "b.")
break;
switch (NameR[12]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_psub_b; // "86.mmx.psub.b"
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psub_d; // "86.mmx.psub.d"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_psub_q; // "86.mmx.psub.q"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psub_w; // "86.mmx.psub.w"
}
break;
}
break;
}
break;
case 's': // 16 strings to match.
if (NameR.substr(4, 2) != "se")
break;
switch (NameR[6]) {
default: break;
case '.': // 13 strings to match.
switch (NameR[7]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(8, 5) != "dd.ss")
break;
return Intrinsic::x86_sse_add_ss; // "86.sse.add.ss"
case 'c': // 2 strings to match.
if (NameR.substr(8, 3) != "mp.")
break;
switch (NameR[11]) {
default: break;
case 'p': // 1 string to match.
if (NameR[12] != 's')
break;
return Intrinsic::x86_sse_cmp_ps; // "86.sse.cmp.ps"
case 's': // 1 string to match.
if (NameR[12] != 's')
break;
return Intrinsic::x86_sse_cmp_ss; // "86.sse.cmp.ss"
}
break;
case 'd': // 1 string to match.
if (NameR.substr(8, 5) != "iv.ss")
break;
return Intrinsic::x86_sse_div_ss; // "86.sse.div.ss"
case 'm': // 5 strings to match.
switch (NameR[8]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(9, 2) != "x.")
break;
switch (NameR[11]) {
default: break;
case 'p': // 1 string to match.
if (NameR[12] != 's')
break;
return Intrinsic::x86_sse_max_ps; // "86.sse.max.ps"
case 's': // 1 string to match.
if (NameR[12] != 's')
break;
return Intrinsic::x86_sse_max_ss; // "86.sse.max.ss"
}
break;
case 'i': // 2 strings to match.
if (NameR.substr(9, 2) != "n.")
break;
switch (NameR[11]) {
default: break;
case 'p': // 1 string to match.
if (NameR[12] != 's')
break;
return Intrinsic::x86_sse_min_ps; // "86.sse.min.ps"
case 's': // 1 string to match.
if (NameR[12] != 's')
break;
return Intrinsic::x86_sse_min_ss; // "86.sse.min.ss"
}
break;
case 'u': // 1 string to match.
if (NameR.substr(9, 4) != "l.ss")
break;
return Intrinsic::x86_sse_mul_ss; // "86.sse.mul.ss"
}
break;
case 'r': // 2 strings to match.
if (NameR.substr(8, 3) != "cp.")
break;
switch (NameR[11]) {
default: break;
case 'p': // 1 string to match.
if (NameR[12] != 's')
break;
return Intrinsic::x86_sse_rcp_ps; // "86.sse.rcp.ps"
case 's': // 1 string to match.
if (NameR[12] != 's')
break;
return Intrinsic::x86_sse_rcp_ss; // "86.sse.rcp.ss"
}
break;
case 's': // 2 strings to match.
switch (NameR[8]) {
default: break;
case 'f': // 1 string to match.
if (NameR.substr(9, 4) != "ence")
break;
return Intrinsic::x86_sse_sfence; // "86.sse.sfence"
case 'u': // 1 string to match.
if (NameR.substr(9, 4) != "b.ss")
break;
return Intrinsic::x86_sse_sub_ss; // "86.sse.sub.ss"
}
break;
}
break;
case '3': // 1 string to match.
if (NameR.substr(7, 6) != ".mwait")
break;
return Intrinsic::x86_sse3_mwait; // "86.sse3.mwait"
case '4': // 2 strings to match.
if (NameR.substr(7, 5) != "1.dpp")
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_dppd; // "86.sse41.dppd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_dpps; // "86.sse41.dpps"
}
break;
}
break;
case 'x': // 14 strings to match.
if (NameR.substr(4, 5) != "op.vp")
break;
switch (NameR[9]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(10, 3) != "mov")
break;
return Intrinsic::x86_xop_vpcmov; // "86.xop.vpcmov"
case 'p': // 1 string to match.
if (NameR.substr(10, 3) != "erm")
break;
return Intrinsic::x86_xop_vpperm; // "86.xop.vpperm"
case 'r': // 4 strings to match.
if (NameR.substr(10, 2) != "ot")
break;
switch (NameR[12]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vprotb; // "86.xop.vprotb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vprotd; // "86.xop.vprotd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vprotq; // "86.xop.vprotq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vprotw; // "86.xop.vprotw"
}
break;
case 's': // 8 strings to match.
if (NameR[10] != 'h')
break;
switch (NameR[11]) {
default: break;
case 'a': // 4 strings to match.
switch (NameR[12]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpshab; // "86.xop.vpshab"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpshad; // "86.xop.vpshad"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpshaq; // "86.xop.vpshaq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpshaw; // "86.xop.vpshaw"
}
break;
case 'l': // 4 strings to match.
switch (NameR[12]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpshlb; // "86.xop.vpshlb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpshld; // "86.xop.vpshld"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpshlq; // "86.xop.vpshlq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpshlw; // "86.xop.vpshlw"
}
break;
}
break;
}
break;
}
break;
case 14: // 87 strings to match.
switch (NameR[0]) {
default: break;
case '8': // 86 strings to match.
if (NameR.substr(1, 2) != "6.")
break;
switch (NameR[3]) {
default: break;
case '3': // 9 strings to match.
if (NameR.substr(4, 6) != "dnow.p")
break;
switch (NameR[10]) {
default: break;
case 'f': // 8 strings to match.
switch (NameR[11]) {
default: break;
case '2': // 1 string to match.
if (NameR.substr(12, 2) != "id")
break;
return Intrinsic::x86_3dnow_pf2id; // "86.3dnow.pf2id"
case 'a': // 2 strings to match.
switch (NameR[12]) {
default: break;
case 'c': // 1 string to match.
if (NameR[13] != 'c')
break;
return Intrinsic::x86_3dnow_pfacc; // "86.3dnow.pfacc"
case 'd': // 1 string to match.
if (NameR[13] != 'd')
break;
return Intrinsic::x86_3dnow_pfadd; // "86.3dnow.pfadd"
}
break;
case 'm': // 3 strings to match.
switch (NameR[12]) {
default: break;
case 'a': // 1 string to match.
if (NameR[13] != 'x')
break;
return Intrinsic::x86_3dnow_pfmax; // "86.3dnow.pfmax"
case 'i': // 1 string to match.
if (NameR[13] != 'n')
break;
return Intrinsic::x86_3dnow_pfmin; // "86.3dnow.pfmin"
case 'u': // 1 string to match.
if (NameR[13] != 'l')
break;
return Intrinsic::x86_3dnow_pfmul; // "86.3dnow.pfmul"
}
break;
case 'r': // 1 string to match.
if (NameR.substr(12, 2) != "cp")
break;
return Intrinsic::x86_3dnow_pfrcp; // "86.3dnow.pfrcp"
case 's': // 1 string to match.
if (NameR.substr(12, 2) != "ub")
break;
return Intrinsic::x86_3dnow_pfsub; // "86.3dnow.pfsub"
}
break;
case 'i': // 1 string to match.
if (NameR.substr(11, 3) != "2fd")
break;
return Intrinsic::x86_3dnow_pi2fd; // "86.3dnow.pi2fd"
}
break;
case 'a': // 14 strings to match.
if (NameR.substr(4, 5) != "vx2.p")
break;
switch (NameR[9]) {
default: break;
case 'a': // 5 strings to match.
switch (NameR[10]) {
default: break;
case 'b': // 3 strings to match.
if (NameR.substr(11, 2) != "s.")
break;
switch (NameR[13]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_pabs_b; // "86.avx2.pabs.b"
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pabs_d; // "86.avx2.pabs.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_pabs_w; // "86.avx2.pabs.w"
}
break;
case 'v': // 2 strings to match.
if (NameR.substr(11, 2) != "g.")
break;
switch (NameR[13]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_pavg_b; // "86.avx2.pavg.b"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_pavg_w; // "86.avx2.pavg.w"
}
break;
}
break;
case 'e': // 1 string to match.
if (NameR.substr(10, 4) != "rmps")
break;
return Intrinsic::x86_avx2_permps; // "86.avx2.permps"
case 's': // 8 strings to match.
switch (NameR[10]) {
default: break;
case 'l': // 3 strings to match.
if (NameR.substr(11, 2) != "l.")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_psll_d; // "86.avx2.psll.d"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_psll_q; // "86.avx2.psll.q"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_psll_w; // "86.avx2.psll.w"
}
break;
case 'r': // 5 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[12] != '.')
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_psra_d; // "86.avx2.psra.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_psra_w; // "86.avx2.psra.w"
}
break;
case 'l': // 3 strings to match.
if (NameR[12] != '.')
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_psrl_d; // "86.avx2.psrl.d"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_psrl_q; // "86.avx2.psrl.q"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_psrl_w; // "86.avx2.psrl.w"
}
break;
}
break;
}
break;
}
break;
case 'b': // 6 strings to match.
if (NameR.substr(4, 3) != "mi.")
break;
switch (NameR[7]) {
default: break;
case 'b': // 2 strings to match.
if (NameR.substr(8, 4) != "zhi.")
break;
switch (NameR[12]) {
default: break;
case '3': // 1 string to match.
if (NameR[13] != '2')
break;
return Intrinsic::x86_bmi_bzhi_32; // "86.bmi.bzhi.32"
case '6': // 1 string to match.
if (NameR[13] != '4')
break;
return Intrinsic::x86_bmi_bzhi_64; // "86.bmi.bzhi.64"
}
break;
case 'p': // 4 strings to match.
switch (NameR[8]) {
default: break;
case 'd': // 2 strings to match.
if (NameR.substr(9, 3) != "ep.")
break;
switch (NameR[12]) {
default: break;
case '3': // 1 string to match.
if (NameR[13] != '2')
break;
return Intrinsic::x86_bmi_pdep_32; // "86.bmi.pdep.32"
case '6': // 1 string to match.
if (NameR[13] != '4')
break;
return Intrinsic::x86_bmi_pdep_64; // "86.bmi.pdep.64"
}
break;
case 'e': // 2 strings to match.
if (NameR.substr(9, 3) != "xt.")
break;
switch (NameR[12]) {
default: break;
case '3': // 1 string to match.
if (NameR[13] != '2')
break;
return Intrinsic::x86_bmi_pext_32; // "86.bmi.pext.32"
case '6': // 1 string to match.
if (NameR[13] != '4')
break;
return Intrinsic::x86_bmi_pext_64; // "86.bmi.pext.64"
}
break;
}
break;
}
break;
case 'm': // 21 strings to match.
if (NameR.substr(4, 4) != "mx.p")
break;
switch (NameR[8]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(9, 4) != "dds.")
break;
switch (NameR[13]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_padds_b; // "86.mmx.padds.b"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_padds_w; // "86.mmx.padds.w"
}
break;
case 'e': // 1 string to match.
if (NameR.substr(9, 5) != "xtr.w")
break;
return Intrinsic::x86_mmx_pextr_w; // "86.mmx.pextr.w"
case 'i': // 1 string to match.
if (NameR.substr(9, 5) != "nsr.w")
break;
return Intrinsic::x86_mmx_pinsr_w; // "86.mmx.pinsr.w"
case 'm': // 6 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[10] != 'x')
break;
switch (NameR[11]) {
default: break;
case 's': // 1 string to match.
if (NameR.substr(12, 2) != ".w")
break;
return Intrinsic::x86_mmx_pmaxs_w; // "86.mmx.pmaxs.w"
case 'u': // 1 string to match.
if (NameR.substr(12, 2) != ".b")
break;
return Intrinsic::x86_mmx_pmaxu_b; // "86.mmx.pmaxu.b"
}
break;
case 'i': // 2 strings to match.
if (NameR[10] != 'n')
break;
switch (NameR[11]) {
default: break;
case 's': // 1 string to match.
if (NameR.substr(12, 2) != ".w")
break;
return Intrinsic::x86_mmx_pmins_w; // "86.mmx.pmins.w"
case 'u': // 1 string to match.
if (NameR.substr(12, 2) != ".b")
break;
return Intrinsic::x86_mmx_pminu_b; // "86.mmx.pminu.b"
}
break;
case 'u': // 2 strings to match.
if (NameR[10] != 'l')
break;
switch (NameR[11]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(12, 2) != ".w")
break;
return Intrinsic::x86_mmx_pmulh_w; // "86.mmx.pmulh.w"
case 'l': // 1 string to match.
if (NameR.substr(12, 2) != ".w")
break;
return Intrinsic::x86_mmx_pmull_w; // "86.mmx.pmull.w"
}
break;
}
break;
case 's': // 11 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(10, 4) != "d.bw")
break;
return Intrinsic::x86_mmx_psad_bw; // "86.mmx.psad.bw"
case 'l': // 3 strings to match.
if (NameR.substr(10, 3) != "li.")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_pslli_d; // "86.mmx.pslli.d"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_pslli_q; // "86.mmx.pslli.q"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_pslli_w; // "86.mmx.pslli.w"
}
break;
case 'r': // 5 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(11, 2) != "i.")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psrai_d; // "86.mmx.psrai.d"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psrai_w; // "86.mmx.psrai.w"
}
break;
case 'l': // 3 strings to match.
if (NameR.substr(11, 2) != "i.")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psrli_d; // "86.mmx.psrli.d"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_psrli_q; // "86.mmx.psrli.q"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psrli_w; // "86.mmx.psrli.w"
}
break;
}
break;
case 'u': // 2 strings to match.
if (NameR.substr(10, 3) != "bs.")
break;
switch (NameR[13]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_psubs_b; // "86.mmx.psubs.b"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psubs_w; // "86.mmx.psubs.w"
}
break;
}
break;
}
break;
case 'r': // 4 strings to match.
if (NameR[4] != 'd')
break;
switch (NameR[5]) {
default: break;
case 'f': // 2 strings to match.
if (NameR.substr(6, 6) != "sbase.")
break;
switch (NameR[12]) {
default: break;
case '3': // 1 string to match.
if (NameR[13] != '2')
break;
return Intrinsic::x86_rdfsbase_32; // "86.rdfsbase.32"
case '6': // 1 string to match.
if (NameR[13] != '4')
break;
return Intrinsic::x86_rdfsbase_64; // "86.rdfsbase.64"
}
break;
case 'g': // 2 strings to match.
if (NameR.substr(6, 6) != "sbase.")
break;
switch (NameR[12]) {
default: break;
case '3': // 1 string to match.
if (NameR[13] != '2')
break;
return Intrinsic::x86_rdgsbase_32; // "86.rdgsbase.32"
case '6': // 1 string to match.
if (NameR[13] != '4')
break;
return Intrinsic::x86_rdgsbase_64; // "86.rdgsbase.64"
}
break;
}
break;
case 's': // 28 strings to match.
if (NameR.substr(4, 2) != "se")
break;
switch (NameR[6]) {
default: break;
case '.': // 5 strings to match.
switch (NameR[7]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(8, 6) != "dmxcsr")
break;
return Intrinsic::x86_sse_ldmxcsr; // "86.sse.ldmxcsr"
case 'p': // 1 string to match.
if (NameR.substr(8, 6) != "shuf.w")
break;
return Intrinsic::x86_sse_pshuf_w; // "86.sse.pshuf.w"
case 's': // 3 strings to match.
switch (NameR[8]) {
default: break;
case 'q': // 2 strings to match.
if (NameR.substr(9, 3) != "rt.")
break;
switch (NameR[12]) {
default: break;
case 'p': // 1 string to match.
if (NameR[13] != 's')
break;
return Intrinsic::x86_sse_sqrt_ps; // "86.sse.sqrt.ps"
case 's': // 1 string to match.
if (NameR[13] != 's')
break;
return Intrinsic::x86_sse_sqrt_ss; // "86.sse.sqrt.ss"
}
break;
case 't': // 1 string to match.
if (NameR.substr(9, 5) != "mxcsr")
break;
return Intrinsic::x86_sse_stmxcsr; // "86.sse.stmxcsr"
}
break;
}
break;
case '2': // 22 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(9, 5) != "dd.sd")
break;
return Intrinsic::x86_sse2_add_sd; // "86.sse2.add.sd"
case 'c': // 2 strings to match.
if (NameR.substr(9, 3) != "mp.")
break;
switch (NameR[12]) {
default: break;
case 'p': // 1 string to match.
if (NameR[13] != 'd')
break;
return Intrinsic::x86_sse2_cmp_pd; // "86.sse2.cmp.pd"
case 's': // 1 string to match.
if (NameR[13] != 'd')
break;
return Intrinsic::x86_sse2_cmp_sd; // "86.sse2.cmp.sd"
}
break;
case 'd': // 1 string to match.
if (NameR.substr(9, 5) != "iv.sd")
break;
return Intrinsic::x86_sse2_div_sd; // "86.sse2.div.sd"
case 'l': // 1 string to match.
if (NameR.substr(9, 5) != "fence")
break;
return Intrinsic::x86_sse2_lfence; // "86.sse2.lfence"
case 'm': // 6 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(10, 2) != "x.")
break;
switch (NameR[12]) {
default: break;
case 'p': // 1 string to match.
if (NameR[13] != 'd')
break;
return Intrinsic::x86_sse2_max_pd; // "86.sse2.max.pd"
case 's': // 1 string to match.
if (NameR[13] != 'd')
break;
return Intrinsic::x86_sse2_max_sd; // "86.sse2.max.sd"
}
break;
case 'f': // 1 string to match.
if (NameR.substr(10, 4) != "ence")
break;
return Intrinsic::x86_sse2_mfence; // "86.sse2.mfence"
case 'i': // 2 strings to match.
if (NameR.substr(10, 2) != "n.")
break;
switch (NameR[12]) {
default: break;
case 'p': // 1 string to match.
if (NameR[13] != 'd')
break;
return Intrinsic::x86_sse2_min_pd; // "86.sse2.min.pd"
case 's': // 1 string to match.
if (NameR[13] != 'd')
break;
return Intrinsic::x86_sse2_min_sd; // "86.sse2.min.sd"
}
break;
case 'u': // 1 string to match.
if (NameR.substr(10, 4) != "l.sd")
break;
return Intrinsic::x86_sse2_mul_sd; // "86.sse2.mul.sd"
}
break;
case 'p': // 10 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(10, 3) != "vg.")
break;
switch (NameR[13]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_sse2_pavg_b; // "86.sse2.pavg.b"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_pavg_w; // "86.sse2.pavg.w"
}
break;
case 's': // 8 strings to match.
switch (NameR[10]) {
default: break;
case 'l': // 3 strings to match.
if (NameR.substr(11, 2) != "l.")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_psll_d; // "86.sse2.psll.d"
case 'q': // 1 string to match.
return Intrinsic::x86_sse2_psll_q; // "86.sse2.psll.q"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_psll_w; // "86.sse2.psll.w"
}
break;
case 'r': // 5 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[12] != '.')
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_psra_d; // "86.sse2.psra.d"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_psra_w; // "86.sse2.psra.w"
}
break;
case 'l': // 3 strings to match.
if (NameR[12] != '.')
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_psrl_d; // "86.sse2.psrl.d"
case 'q': // 1 string to match.
return Intrinsic::x86_sse2_psrl_q; // "86.sse2.psrl.q"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_psrl_w; // "86.sse2.psrl.w"
}
break;
}
break;
}
break;
}
break;
case 's': // 1 string to match.
if (NameR.substr(9, 5) != "ub.sd")
break;
return Intrinsic::x86_sse2_sub_sd; // "86.sse2.sub.sd"
}
break;
case '3': // 1 string to match.
if (NameR.substr(7, 7) != ".ldu.dq")
break;
return Intrinsic::x86_sse3_ldu_dq; // "86.sse3.ldu.dq"
}
break;
case 'w': // 4 strings to match.
if (NameR[4] != 'r')
break;
switch (NameR[5]) {
default: break;
case 'f': // 2 strings to match.
if (NameR.substr(6, 6) != "sbase.")
break;
switch (NameR[12]) {
default: break;
case '3': // 1 string to match.
if (NameR[13] != '2')
break;
return Intrinsic::x86_wrfsbase_32; // "86.wrfsbase.32"
case '6': // 1 string to match.
if (NameR[13] != '4')
break;
return Intrinsic::x86_wrfsbase_64; // "86.wrfsbase.64"
}
break;
case 'g': // 2 strings to match.
if (NameR.substr(6, 6) != "sbase.")
break;
switch (NameR[12]) {
default: break;
case '3': // 1 string to match.
if (NameR[13] != '2')
break;
return Intrinsic::x86_wrgsbase_32; // "86.wrgsbase.32"
case '6': // 1 string to match.
if (NameR[13] != '4')
break;
return Intrinsic::x86_wrgsbase_64; // "86.wrgsbase.64"
}
break;
}
break;
}
break;
case 'c': // 1 string to match.
if (NameR.substr(1, 13) != "ore.waitevent")
break;
return Intrinsic::xcore_waitevent; // "core.waitevent"
}
break;
case 15: // 166 strings to match.
switch (NameR[0]) {
default: break;
case '8': // 165 strings to match.
if (NameR.substr(1, 2) != "6.")
break;
switch (NameR[3]) {
default: break;
case '3': // 3 strings to match.
if (NameR.substr(4, 4) != "dnow")
break;
switch (NameR[8]) {
default: break;
case '.': // 1 string to match.
if (NameR.substr(9, 6) != "pfsubr")
break;
return Intrinsic::x86_3dnow_pfsubr; // "86.3dnow.pfsubr"
case 'a': // 2 strings to match.
if (NameR.substr(9, 2) != ".p")
break;
switch (NameR[11]) {
default: break;
case 'f': // 1 string to match.
if (NameR.substr(12, 3) != "2iw")
break;
return Intrinsic::x86_3dnowa_pf2iw; // "86.3dnowa.pf2iw"
case 'i': // 1 string to match.
if (NameR.substr(12, 3) != "2fw")
break;
return Intrinsic::x86_3dnowa_pi2fw; // "86.3dnowa.pi2fw"
}
break;
}
break;
case 'a': // 48 strings to match.
switch (NameR[4]) {
default: break;
case 'e': // 3 strings to match.
if (NameR.substr(5, 7) != "sni.aes")
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(13, 2) != "ec")
break;
return Intrinsic::x86_aesni_aesdec; // "86.aesni.aesdec"
case 'e': // 1 string to match.
if (NameR.substr(13, 2) != "nc")
break;
return Intrinsic::x86_aesni_aesenc; // "86.aesni.aesenc"
case 'i': // 1 string to match.
if (NameR.substr(13, 2) != "mc")
break;
return Intrinsic::x86_aesni_aesimc; // "86.aesni.aesimc"
}
break;
case 'v': // 45 strings to match.
if (NameR[5] != 'x')
break;
switch (NameR[6]) {
default: break;
case '.': // 1 string to match.
if (NameR.substr(7, 8) != "vzeroall")
break;
return Intrinsic::x86_avx_vzeroall; // "86.avx.vzeroall"
case '2': // 44 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(9, 6) != "psadbw")
break;
return Intrinsic::x86_avx2_mpsadbw; // "86.avx2.mpsadbw"
case 'p': // 43 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(10, 4) != "dds.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_padds_b; // "86.avx2.padds.b"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_padds_w; // "86.avx2.padds.w"
}
break;
case 'b': // 1 string to match.
if (NameR.substr(10, 5) != "lendw")
break;
return Intrinsic::x86_avx2_pblendw; // "86.avx2.pblendw"
case 'h': // 4 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(11, 3) != "dd.")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_phadd_d; // "86.avx2.phadd.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_phadd_w; // "86.avx2.phadd.w"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(11, 3) != "ub.")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_phsub_d; // "86.avx2.phsub.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_phsub_w; // "86.avx2.phsub.w"
}
break;
}
break;
case 'm': // 14 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 6 strings to match.
if (NameR[11] != 'x')
break;
switch (NameR[12]) {
default: break;
case 's': // 3 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_pmaxs_b; // "86.avx2.pmaxs.b"
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pmaxs_d; // "86.avx2.pmaxs.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_pmaxs_w; // "86.avx2.pmaxs.w"
}
break;
case 'u': // 3 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_pmaxu_b; // "86.avx2.pmaxu.b"
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pmaxu_d; // "86.avx2.pmaxu.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_pmaxu_w; // "86.avx2.pmaxu.w"
}
break;
}
break;
case 'i': // 6 strings to match.
if (NameR[11] != 'n')
break;
switch (NameR[12]) {
default: break;
case 's': // 3 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_pmins_b; // "86.avx2.pmins.b"
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pmins_d; // "86.avx2.pmins.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_pmins_w; // "86.avx2.pmins.w"
}
break;
case 'u': // 3 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_pminu_b; // "86.avx2.pminu.b"
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pminu_d; // "86.avx2.pminu.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_pminu_w; // "86.avx2.pminu.w"
}
break;
}
break;
case 'u': // 2 strings to match.
if (NameR[11] != 'l')
break;
switch (NameR[12]) {
default: break;
case '.': // 1 string to match.
if (NameR.substr(13, 2) != "dq")
break;
return Intrinsic::x86_avx2_pmul_dq; // "86.avx2.pmul.dq"
case 'h': // 1 string to match.
if (NameR.substr(13, 2) != ".w")
break;
return Intrinsic::x86_avx2_pmulh_w; // "86.avx2.pmulh.w"
}
break;
}
break;
case 's': // 22 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 4) != "d.bw")
break;
return Intrinsic::x86_avx2_psad_bw; // "86.avx2.psad.bw"
case 'h': // 1 string to match.
if (NameR.substr(11, 4) != "uf.b")
break;
return Intrinsic::x86_avx2_pshuf_b; // "86.avx2.pshuf.b"
case 'i': // 3 strings to match.
if (NameR.substr(11, 3) != "gn.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_psign_b; // "86.avx2.psign.b"
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_psign_d; // "86.avx2.psign.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_psign_w; // "86.avx2.psign.w"
}
break;
case 'l': // 6 strings to match.
if (NameR[11] != 'l')
break;
switch (NameR[12]) {
default: break;
case '.': // 1 string to match.
if (NameR.substr(13, 2) != "dq")
break;
return Intrinsic::x86_avx2_psll_dq; // "86.avx2.psll.dq"
case 'i': // 3 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pslli_d; // "86.avx2.pslli.d"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_pslli_q; // "86.avx2.pslli.q"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_pslli_w; // "86.avx2.pslli.w"
}
break;
case 'v': // 2 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_psllv_d; // "86.avx2.psllv.d"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_psllv_q; // "86.avx2.psllv.q"
}
break;
}
break;
case 'r': // 9 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 3 strings to match.
switch (NameR[12]) {
default: break;
case 'i': // 2 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_psrai_d; // "86.avx2.psrai.d"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_psrai_w; // "86.avx2.psrai.w"
}
break;
case 'v': // 1 string to match.
if (NameR.substr(13, 2) != ".d")
break;
return Intrinsic::x86_avx2_psrav_d; // "86.avx2.psrav.d"
}
break;
case 'l': // 6 strings to match.
switch (NameR[12]) {
default: break;
case '.': // 1 string to match.
if (NameR.substr(13, 2) != "dq")
break;
return Intrinsic::x86_avx2_psrl_dq; // "86.avx2.psrl.dq"
case 'i': // 3 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_psrli_d; // "86.avx2.psrli.d"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_psrli_q; // "86.avx2.psrli.q"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_psrli_w; // "86.avx2.psrli.w"
}
break;
case 'v': // 2 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_psrlv_d; // "86.avx2.psrlv.d"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_psrlv_q; // "86.avx2.psrlv.q"
}
break;
}
break;
}
break;
case 'u': // 2 strings to match.
if (NameR.substr(11, 3) != "bs.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_psubs_b; // "86.avx2.psubs.b"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_psubs_w; // "86.avx2.psubs.w"
}
break;
}
break;
}
break;
}
break;
}
break;
}
break;
case 'b': // 2 strings to match.
if (NameR.substr(4, 9) != "mi.bextr.")
break;
switch (NameR[13]) {
default: break;
case '3': // 1 string to match.
if (NameR[14] != '2')
break;
return Intrinsic::x86_bmi_bextr_32; // "86.bmi.bextr.32"
case '6': // 1 string to match.
if (NameR[14] != '4')
break;
return Intrinsic::x86_bmi_bextr_64; // "86.bmi.bextr.64"
}
break;
case 'm': // 19 strings to match.
if (NameR.substr(4, 3) != "mx.")
break;
switch (NameR[7]) {
default: break;
case 'm': // 2 strings to match.
switch (NameR[8]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(9, 6) != "skmovq")
break;
return Intrinsic::x86_mmx_maskmovq; // "86.mmx.maskmovq"
case 'o': // 1 string to match.
if (NameR.substr(9, 6) != "vnt.dq")
break;
return Intrinsic::x86_mmx_movnt_dq; // "86.mmx.movnt.dq"
}
break;
case 'p': // 17 strings to match.
switch (NameR[8]) {
default: break;
case 'a': // 5 strings to match.
switch (NameR[9]) {
default: break;
case 'c': // 3 strings to match.
if (NameR[10] != 'k')
break;
switch (NameR[11]) {
default: break;
case 's': // 2 strings to match.
if (NameR[12] != 's')
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR[14] != 'w')
break;
return Intrinsic::x86_mmx_packssdw; // "86.mmx.packssdw"
case 'w': // 1 string to match.
if (NameR[14] != 'b')
break;
return Intrinsic::x86_mmx_packsswb; // "86.mmx.packsswb"
}
break;
case 'u': // 1 string to match.
if (NameR.substr(12, 3) != "swb")
break;
return Intrinsic::x86_mmx_packuswb; // "86.mmx.packuswb"
}
break;
case 'd': // 2 strings to match.
if (NameR.substr(10, 4) != "dus.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_paddus_b; // "86.mmx.paddus.b"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_paddus_w; // "86.mmx.paddus.w"
}
break;
}
break;
case 'c': // 6 strings to match.
if (NameR.substr(9, 2) != "mp")
break;
switch (NameR[11]) {
default: break;
case 'e': // 3 strings to match.
if (NameR.substr(12, 2) != "q.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_pcmpeq_b; // "86.mmx.pcmpeq.b"
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_pcmpeq_d; // "86.mmx.pcmpeq.d"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_pcmpeq_w; // "86.mmx.pcmpeq.w"
}
break;
case 'g': // 3 strings to match.
if (NameR.substr(12, 2) != "t.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_pcmpgt_b; // "86.mmx.pcmpgt.b"
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_pcmpgt_d; // "86.mmx.pcmpgt.d"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_pcmpgt_w; // "86.mmx.pcmpgt.w"
}
break;
}
break;
case 'm': // 4 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(10, 5) != "dd.wd")
break;
return Intrinsic::x86_mmx_pmadd_wd; // "86.mmx.pmadd.wd"
case 'o': // 1 string to match.
if (NameR.substr(10, 5) != "vmskb")
break;
return Intrinsic::x86_mmx_pmovmskb; // "86.mmx.pmovmskb"
case 'u': // 2 strings to match.
if (NameR[10] != 'l')
break;
switch (NameR[11]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(12, 3) != "u.w")
break;
return Intrinsic::x86_mmx_pmulhu_w; // "86.mmx.pmulhu.w"
case 'u': // 1 string to match.
if (NameR.substr(12, 3) != ".dq")
break;
return Intrinsic::x86_mmx_pmulu_dq; // "86.mmx.pmulu.dq"
}
break;
}
break;
case 's': // 2 strings to match.
if (NameR.substr(9, 5) != "ubus.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_psubus_b; // "86.mmx.psubus.b"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psubus_w; // "86.mmx.psubus.w"
}
break;
}
break;
}
break;
case 's': // 53 strings to match.
if (NameR[4] != 's')
break;
switch (NameR[5]) {
default: break;
case 'e': // 50 strings to match.
switch (NameR[6]) {
default: break;
case '.': // 8 strings to match.
switch (NameR[7]) {
default: break;
case 'c': // 6 strings to match.
if (NameR.substr(8, 2) != "vt")
break;
switch (NameR[10]) {
default: break;
case 'p': // 4 strings to match.
switch (NameR[11]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(12, 3) != "2pi")
break;
return Intrinsic::x86_sse_cvtpd2pi; // "86.sse.cvtpd2pi"
case 'i': // 2 strings to match.
if (NameR.substr(12, 2) != "2p")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse_cvtpi2pd; // "86.sse.cvtpi2pd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_cvtpi2ps; // "86.sse.cvtpi2ps"
}
break;
case 's': // 1 string to match.
if (NameR.substr(12, 3) != "2pi")
break;
return Intrinsic::x86_sse_cvtps2pi; // "86.sse.cvtps2pi"
}
break;
case 's': // 2 strings to match.
switch (NameR[11]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(12, 3) != "2ss")
break;
return Intrinsic::x86_sse_cvtsi2ss; // "86.sse.cvtsi2ss"
case 's': // 1 string to match.
if (NameR.substr(12, 3) != "2si")
break;
return Intrinsic::x86_sse_cvtss2si; // "86.sse.cvtss2si"
}
break;
}
break;
case 'r': // 2 strings to match.
if (NameR.substr(8, 5) != "sqrt.")
break;
switch (NameR[13]) {
default: break;
case 'p': // 1 string to match.
if (NameR[14] != 's')
break;
return Intrinsic::x86_sse_rsqrt_ps; // "86.sse.rsqrt.ps"
case 's': // 1 string to match.
if (NameR[14] != 's')
break;
return Intrinsic::x86_sse_rsqrt_ss; // "86.sse.rsqrt.ss"
}
break;
}
break;
case '2': // 23 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(9, 6) != "lflush")
break;
return Intrinsic::x86_sse2_clflush; // "86.sse2.clflush"
case 'p': // 20 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(10, 4) != "dds.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_sse2_padds_b; // "86.sse2.padds.b"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_padds_w; // "86.sse2.padds.w"
}
break;
case 'm': // 5 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 2 strings to match.
if (NameR[11] != 'x')
break;
switch (NameR[12]) {
default: break;
case 's': // 1 string to match.
if (NameR.substr(13, 2) != ".w")
break;
return Intrinsic::x86_sse2_pmaxs_w; // "86.sse2.pmaxs.w"
case 'u': // 1 string to match.
if (NameR.substr(13, 2) != ".b")
break;
return Intrinsic::x86_sse2_pmaxu_b; // "86.sse2.pmaxu.b"
}
break;
case 'i': // 2 strings to match.
if (NameR[11] != 'n')
break;
switch (NameR[12]) {
default: break;
case 's': // 1 string to match.
if (NameR.substr(13, 2) != ".w")
break;
return Intrinsic::x86_sse2_pmins_w; // "86.sse2.pmins.w"
case 'u': // 1 string to match.
if (NameR.substr(13, 2) != ".b")
break;
return Intrinsic::x86_sse2_pminu_b; // "86.sse2.pminu.b"
}
break;
case 'u': // 1 string to match.
if (NameR.substr(11, 4) != "lh.w")
break;
return Intrinsic::x86_sse2_pmulh_w; // "86.sse2.pmulh.w"
}
break;
case 's': // 13 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 4) != "d.bw")
break;
return Intrinsic::x86_sse2_psad_bw; // "86.sse2.psad.bw"
case 'l': // 4 strings to match.
if (NameR[11] != 'l')
break;
switch (NameR[12]) {
default: break;
case '.': // 1 string to match.
if (NameR.substr(13, 2) != "dq")
break;
return Intrinsic::x86_sse2_psll_dq; // "86.sse2.psll.dq"
case 'i': // 3 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_pslli_d; // "86.sse2.pslli.d"
case 'q': // 1 string to match.
return Intrinsic::x86_sse2_pslli_q; // "86.sse2.pslli.q"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_pslli_w; // "86.sse2.pslli.w"
}
break;
}
break;
case 'r': // 6 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 2) != "i.")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_psrai_d; // "86.sse2.psrai.d"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_psrai_w; // "86.sse2.psrai.w"
}
break;
case 'l': // 4 strings to match.
switch (NameR[12]) {
default: break;
case '.': // 1 string to match.
if (NameR.substr(13, 2) != "dq")
break;
return Intrinsic::x86_sse2_psrl_dq; // "86.sse2.psrl.dq"
case 'i': // 3 strings to match.
if (NameR[13] != '.')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_psrli_d; // "86.sse2.psrli.d"
case 'q': // 1 string to match.
return Intrinsic::x86_sse2_psrli_q; // "86.sse2.psrli.q"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_psrli_w; // "86.sse2.psrli.w"
}
break;
}
break;
}
break;
case 'u': // 2 strings to match.
if (NameR.substr(11, 3) != "bs.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_sse2_psubs_b; // "86.sse2.psubs.b"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_psubs_w; // "86.sse2.psubs.w"
}
break;
}
break;
}
break;
case 's': // 2 strings to match.
if (NameR.substr(9, 4) != "qrt.")
break;
switch (NameR[13]) {
default: break;
case 'p': // 1 string to match.
if (NameR[14] != 'd')
break;
return Intrinsic::x86_sse2_sqrt_pd; // "86.sse2.sqrt.pd"
case 's': // 1 string to match.
if (NameR[14] != 'd')
break;
return Intrinsic::x86_sse2_sqrt_sd; // "86.sse2.sqrt.sd"
}
break;
}
break;
case '3': // 5 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(10, 4) != "dd.p")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse3_hadd_pd; // "86.sse3.hadd.pd"
case 's': // 1 string to match.
return Intrinsic::x86_sse3_hadd_ps; // "86.sse3.hadd.ps"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(10, 4) != "ub.p")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse3_hsub_pd; // "86.sse3.hsub.pd"
case 's': // 1 string to match.
return Intrinsic::x86_sse3_hsub_ps; // "86.sse3.hsub.ps"
}
break;
}
break;
case 'm': // 1 string to match.
if (NameR.substr(9, 6) != "onitor")
break;
return Intrinsic::x86_sse3_monitor; // "86.sse3.monitor"
}
break;
case '4': // 14 strings to match.
if (NameR.substr(7, 3) != "1.p")
break;
switch (NameR[10]) {
default: break;
case 'e': // 3 strings to match.
if (NameR.substr(11, 3) != "xtr")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_sse41_pextrb; // "86.sse41.pextrb"
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_pextrd; // "86.sse41.pextrd"
case 'q': // 1 string to match.
return Intrinsic::x86_sse41_pextrq; // "86.sse41.pextrq"
}
break;
case 'm': // 9 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 4 strings to match.
if (NameR[12] != 'x')
break;
switch (NameR[13]) {
default: break;
case 's': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_sse41_pmaxsb; // "86.sse41.pmaxsb"
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_pmaxsd; // "86.sse41.pmaxsd"
}
break;
case 'u': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_pmaxud; // "86.sse41.pmaxud"
case 'w': // 1 string to match.
return Intrinsic::x86_sse41_pmaxuw; // "86.sse41.pmaxuw"
}
break;
}
break;
case 'i': // 4 strings to match.
if (NameR[12] != 'n')
break;
switch (NameR[13]) {
default: break;
case 's': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_sse41_pminsb; // "86.sse41.pminsb"
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_pminsd; // "86.sse41.pminsd"
}
break;
case 'u': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_pminud; // "86.sse41.pminud"
case 'w': // 1 string to match.
return Intrinsic::x86_sse41_pminuw; // "86.sse41.pminuw"
}
break;
}
break;
case 'u': // 1 string to match.
if (NameR.substr(12, 3) != "ldq")
break;
return Intrinsic::x86_sse41_pmuldq; // "86.sse41.pmuldq"
}
break;
case 't': // 2 strings to match.
if (NameR.substr(11, 3) != "est")
break;
switch (NameR[14]) {
default: break;
case 'c': // 1 string to match.
return Intrinsic::x86_sse41_ptestc; // "86.sse41.ptestc"
case 'z': // 1 string to match.
return Intrinsic::x86_sse41_ptestz; // "86.sse41.ptestz"
}
break;
}
break;
}
break;
case 's': // 3 strings to match.
if (NameR.substr(6, 8) != "e3.pabs.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_ssse3_pabs_b; // "86.ssse3.pabs.b"
case 'd': // 1 string to match.
return Intrinsic::x86_ssse3_pabs_d; // "86.ssse3.pabs.d"
case 'w': // 1 string to match.
return Intrinsic::x86_ssse3_pabs_w; // "86.ssse3.pabs.w"
}
break;
}
break;
case 'x': // 40 strings to match.
if (NameR.substr(4, 4) != "op.v")
break;
switch (NameR[8]) {
default: break;
case 'f': // 4 strings to match.
if (NameR.substr(9, 4) != "rcz.")
break;
switch (NameR[13]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vfrcz_pd; // "86.xop.vfrcz.pd"
case 's': // 1 string to match.
return Intrinsic::x86_xop_vfrcz_ps; // "86.xop.vfrcz.ps"
}
break;
case 's': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vfrcz_sd; // "86.xop.vfrcz.sd"
case 's': // 1 string to match.
return Intrinsic::x86_xop_vfrcz_ss; // "86.xop.vfrcz.ss"
}
break;
}
break;
case 'p': // 36 strings to match.
switch (NameR[9]) {
default: break;
case 'c': // 24 strings to match.
if (NameR.substr(10, 2) != "om")
break;
switch (NameR[12]) {
default: break;
case 'e': // 4 strings to match.
if (NameR[13] != 'q')
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomeqb; // "86.xop.vpcomeqb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomeqd; // "86.xop.vpcomeqd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomeqq; // "86.xop.vpcomeqq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomeqw; // "86.xop.vpcomeqw"
}
break;
case 'g': // 8 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 4 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeb; // "86.xop.vpcomgeb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomged; // "86.xop.vpcomged"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeq; // "86.xop.vpcomgeq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomgew; // "86.xop.vpcomgew"
}
break;
case 't': // 4 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtb; // "86.xop.vpcomgtb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtd; // "86.xop.vpcomgtd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtq; // "86.xop.vpcomgtq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtw; // "86.xop.vpcomgtw"
}
break;
}
break;
case 'l': // 8 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 4 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomleb; // "86.xop.vpcomleb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomled; // "86.xop.vpcomled"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomleq; // "86.xop.vpcomleq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomlew; // "86.xop.vpcomlew"
}
break;
case 't': // 4 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomltb; // "86.xop.vpcomltb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomltd; // "86.xop.vpcomltd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomltq; // "86.xop.vpcomltq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomltw; // "86.xop.vpcomltw"
}
break;
}
break;
case 'n': // 4 strings to match.
if (NameR[13] != 'e')
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomneb; // "86.xop.vpcomneb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomned; // "86.xop.vpcomned"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomneq; // "86.xop.vpcomneq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomnew; // "86.xop.vpcomnew"
}
break;
}
break;
case 'h': // 9 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 6 strings to match.
if (NameR.substr(11, 2) != "dd")
break;
switch (NameR[13]) {
default: break;
case 'b': // 3 strings to match.
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vphaddbd; // "86.xop.vphaddbd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vphaddbq; // "86.xop.vphaddbq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vphaddbw; // "86.xop.vphaddbw"
}
break;
case 'd': // 1 string to match.
if (NameR[14] != 'q')
break;
return Intrinsic::x86_xop_vphadddq; // "86.xop.vphadddq"
case 'w': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vphaddwd; // "86.xop.vphaddwd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vphaddwq; // "86.xop.vphaddwq"
}
break;
}
break;
case 's': // 3 strings to match.
if (NameR.substr(11, 2) != "ub")
break;
switch (NameR[13]) {
default: break;
case 'b': // 1 string to match.
if (NameR[14] != 'w')
break;
return Intrinsic::x86_xop_vphsubbw; // "86.xop.vphsubbw"
case 'd': // 1 string to match.
if (NameR[14] != 'q')
break;
return Intrinsic::x86_xop_vphsubdq; // "86.xop.vphsubdq"
case 'w': // 1 string to match.
if (NameR[14] != 'd')
break;
return Intrinsic::x86_xop_vphsubwd; // "86.xop.vphsubwd"
}
break;
}
break;
case 'm': // 3 strings to match.
if (NameR.substr(10, 3) != "acs")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR[14] != 'd')
break;
return Intrinsic::x86_xop_vpmacsdd; // "86.xop.vpmacsdd"
case 'w': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpmacswd; // "86.xop.vpmacswd"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpmacsww; // "86.xop.vpmacsww"
}
break;
}
break;
}
break;
}
break;
}
break;
case 'c': // 1 string to match.
if (NameR.substr(1, 14) != "ore.checkevent")
break;
return Intrinsic::xcore_checkevent; // "core.checkevent"
}
break;
case 16: // 127 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case '3': // 8 strings to match.
if (NameR.substr(4, 4) != "dnow")
break;
switch (NameR[8]) {
default: break;
case '.': // 6 strings to match.
if (NameR[9] != 'p')
break;
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 5) != "vgusb")
break;
return Intrinsic::x86_3dnow_pavgusb; // "86.3dnow.pavgusb"
case 'f': // 4 strings to match.
switch (NameR[11]) {
default: break;
case 'c': // 3 strings to match.
if (NameR.substr(12, 2) != "mp")
break;
switch (NameR[14]) {
default: break;
case 'e': // 1 string to match.
if (NameR[15] != 'q')
break;
return Intrinsic::x86_3dnow_pfcmpeq; // "86.3dnow.pfcmpeq"
case 'g': // 2 strings to match.
switch (NameR[15]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_3dnow_pfcmpge; // "86.3dnow.pfcmpge"
case 't': // 1 string to match.
return Intrinsic::x86_3dnow_pfcmpgt; // "86.3dnow.pfcmpgt"
}
break;
}
break;
case 'r': // 1 string to match.
if (NameR.substr(12, 4) != "sqrt")
break;
return Intrinsic::x86_3dnow_pfrsqrt; // "86.3dnow.pfrsqrt"
}
break;
case 'm': // 1 string to match.
if (NameR.substr(11, 5) != "ulhrw")
break;
return Intrinsic::x86_3dnow_pmulhrw; // "86.3dnow.pmulhrw"
}
break;
case 'a': // 2 strings to match.
if (NameR.substr(9, 2) != ".p")
break;
switch (NameR[11]) {
default: break;
case 'f': // 1 string to match.
if (NameR.substr(12, 4) != "nacc")
break;
return Intrinsic::x86_3dnowa_pfnacc; // "86.3dnowa.pfnacc"
case 's': // 1 string to match.
if (NameR.substr(12, 4) != "wapd")
break;
return Intrinsic::x86_3dnowa_pswapd; // "86.3dnowa.pswapd"
}
break;
}
break;
case 'a': // 33 strings to match.
if (NameR.substr(4, 2) != "vx")
break;
switch (NameR[6]) {
default: break;
case '.': // 5 strings to match.
switch (NameR[7]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(8, 8) != "p.ps.256")
break;
return Intrinsic::x86_avx_dp_ps_256; // "86.avx.dp.ps.256"
case 'v': // 4 strings to match.
if (NameR.substr(8, 4) != "test")
break;
switch (NameR[12]) {
default: break;
case 'c': // 2 strings to match.
if (NameR.substr(13, 2) != ".p")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_vtestc_pd; // "86.avx.vtestc.pd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_vtestc_ps; // "86.avx.vtestc.ps"
}
break;
case 'z': // 2 strings to match.
if (NameR.substr(13, 2) != ".p")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_vtestz_pd; // "86.avx.vtestz.pd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_vtestz_ps; // "86.avx.vtestz.ps"
}
break;
}
break;
}
break;
case '2': // 28 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(9, 7) != "ovntdqa")
break;
return Intrinsic::x86_avx2_movntdqa; // "86.avx2.movntdqa"
case 'p': // 27 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 6 strings to match.
switch (NameR[10]) {
default: break;
case 'c': // 4 strings to match.
if (NameR[11] != 'k')
break;
switch (NameR[12]) {
default: break;
case 's': // 2 strings to match.
if (NameR[13] != 's')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR[15] != 'w')
break;
return Intrinsic::x86_avx2_packssdw; // "86.avx2.packssdw"
case 'w': // 1 string to match.
if (NameR[15] != 'b')
break;
return Intrinsic::x86_avx2_packsswb; // "86.avx2.packsswb"
}
break;
case 'u': // 2 strings to match.
if (NameR[13] != 's')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR[15] != 'w')
break;
return Intrinsic::x86_avx2_packusdw; // "86.avx2.packusdw"
case 'w': // 1 string to match.
if (NameR[15] != 'b')
break;
return Intrinsic::x86_avx2_packuswb; // "86.avx2.packuswb"
}
break;
}
break;
case 'd': // 2 strings to match.
if (NameR.substr(11, 4) != "dus.")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_paddus_b; // "86.avx2.paddus.b"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_paddus_w; // "86.avx2.paddus.w"
}
break;
}
break;
case 'b': // 1 string to match.
if (NameR.substr(10, 6) != "lendvb")
break;
return Intrinsic::x86_avx2_pblendvb; // "86.avx2.pblendvb"
case 'h': // 2 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 5) != "dd.sw")
break;
return Intrinsic::x86_avx2_phadd_sw; // "86.avx2.phadd.sw"
case 's': // 1 string to match.
if (NameR.substr(11, 5) != "ub.sw")
break;
return Intrinsic::x86_avx2_phsub_sw; // "86.avx2.phsub.sw"
}
break;
case 'm': // 16 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 5) != "dd.wd")
break;
return Intrinsic::x86_avx2_pmadd_wd; // "86.avx2.pmadd.wd"
case 'o': // 13 strings to match.
if (NameR[11] != 'v')
break;
switch (NameR[12]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(13, 3) != "skb")
break;
return Intrinsic::x86_avx2_pmovmskb; // "86.avx2.pmovmskb"
case 's': // 6 strings to match.
if (NameR[13] != 'x')
break;
switch (NameR[14]) {
default: break;
case 'b': // 3 strings to match.
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pmovsxbd; // "86.avx2.pmovsxbd"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_pmovsxbq; // "86.avx2.pmovsxbq"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_pmovsxbw; // "86.avx2.pmovsxbw"
}
break;
case 'd': // 1 string to match.
if (NameR[15] != 'q')
break;
return Intrinsic::x86_avx2_pmovsxdq; // "86.avx2.pmovsxdq"
case 'w': // 2 strings to match.
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pmovsxwd; // "86.avx2.pmovsxwd"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_pmovsxwq; // "86.avx2.pmovsxwq"
}
break;
}
break;
case 'z': // 6 strings to match.
if (NameR[13] != 'x')
break;
switch (NameR[14]) {
default: break;
case 'b': // 3 strings to match.
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pmovzxbd; // "86.avx2.pmovzxbd"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_pmovzxbq; // "86.avx2.pmovzxbq"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_pmovzxbw; // "86.avx2.pmovzxbw"
}
break;
case 'd': // 1 string to match.
if (NameR[15] != 'q')
break;
return Intrinsic::x86_avx2_pmovzxdq; // "86.avx2.pmovzxdq"
case 'w': // 2 strings to match.
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_pmovzxwd; // "86.avx2.pmovzxwd"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_pmovzxwq; // "86.avx2.pmovzxwq"
}
break;
}
break;
}
break;
case 'u': // 2 strings to match.
if (NameR[11] != 'l')
break;
switch (NameR[12]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(13, 3) != "u.w")
break;
return Intrinsic::x86_avx2_pmulhu_w; // "86.avx2.pmulhu.w"
case 'u': // 1 string to match.
if (NameR.substr(13, 3) != ".dq")
break;
return Intrinsic::x86_avx2_pmulu_dq; // "86.avx2.pmulu.dq"
}
break;
}
break;
case 's': // 2 strings to match.
if (NameR.substr(10, 5) != "ubus.")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_avx2_psubus_b; // "86.avx2.psubus.b"
case 'w': // 1 string to match.
return Intrinsic::x86_avx2_psubus_w; // "86.avx2.psubus.w"
}
break;
}
break;
}
break;
}
break;
case 'm': // 7 strings to match.
if (NameR.substr(4, 4) != "mx.p")
break;
switch (NameR[8]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(9, 7) != "lignr.b")
break;
return Intrinsic::x86_mmx_palignr_b; // "86.mmx.palignr.b"
case 'u': // 6 strings to match.
if (NameR.substr(9, 4) != "npck")
break;
switch (NameR[13]) {
default: break;
case 'h': // 3 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
if (NameR[15] != 'w')
break;
return Intrinsic::x86_mmx_punpckhbw; // "86.mmx.punpckhbw"
case 'd': // 1 string to match.
if (NameR[15] != 'q')
break;
return Intrinsic::x86_mmx_punpckhdq; // "86.mmx.punpckhdq"
case 'w': // 1 string to match.
if (NameR[15] != 'd')
break;
return Intrinsic::x86_mmx_punpckhwd; // "86.mmx.punpckhwd"
}
break;
case 'l': // 3 strings to match.
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
if (NameR[15] != 'w')
break;
return Intrinsic::x86_mmx_punpcklbw; // "86.mmx.punpcklbw"
case 'd': // 1 string to match.
if (NameR[15] != 'q')
break;
return Intrinsic::x86_mmx_punpckldq; // "86.mmx.punpckldq"
case 'w': // 1 string to match.
if (NameR[15] != 'd')
break;
return Intrinsic::x86_mmx_punpcklwd; // "86.mmx.punpcklwd"
}
break;
}
break;
}
break;
case 's': // 39 strings to match.
if (NameR[4] != 's')
break;
switch (NameR[5]) {
default: break;
case 'e': // 31 strings to match.
switch (NameR[6]) {
default: break;
case '.': // 10 strings to match.
switch (NameR[7]) {
default: break;
case 'c': // 8 strings to match.
switch (NameR[8]) {
default: break;
case 'o': // 5 strings to match.
if (NameR.substr(9, 2) != "mi")
break;
switch (NameR[11]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(12, 4) != "q.ss")
break;
return Intrinsic::x86_sse_comieq_ss; // "86.sse.comieq.ss"
case 'g': // 2 strings to match.
switch (NameR[12]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(13, 3) != ".ss")
break;
return Intrinsic::x86_sse_comige_ss; // "86.sse.comige.ss"
case 't': // 1 string to match.
if (NameR.substr(13, 3) != ".ss")
break;
return Intrinsic::x86_sse_comigt_ss; // "86.sse.comigt.ss"
}
break;
case 'l': // 2 strings to match.
switch (NameR[12]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(13, 3) != ".ss")
break;
return Intrinsic::x86_sse_comile_ss; // "86.sse.comile.ss"
case 't': // 1 string to match.
if (NameR.substr(13, 3) != ".ss")
break;
return Intrinsic::x86_sse_comilt_ss; // "86.sse.comilt.ss"
}
break;
}
break;
case 'v': // 3 strings to match.
if (NameR.substr(9, 2) != "tt")
break;
switch (NameR[11]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(13, 3) != "2pi")
break;
return Intrinsic::x86_sse_cvttpd2pi; // "86.sse.cvttpd2pi"
case 's': // 1 string to match.
if (NameR.substr(13, 3) != "2pi")
break;
return Intrinsic::x86_sse_cvttps2pi; // "86.sse.cvttps2pi"
}
break;
case 's': // 1 string to match.
if (NameR.substr(12, 4) != "s2si")
break;
return Intrinsic::x86_sse_cvttss2si; // "86.sse.cvttss2si"
}
break;
}
break;
case 'm': // 1 string to match.
if (NameR.substr(8, 8) != "ovmsk.ps")
break;
return Intrinsic::x86_sse_movmsk_ps; // "86.sse.movmsk.ps"
case 's': // 1 string to match.
if (NameR.substr(8, 8) != "toreu.ps")
break;
return Intrinsic::x86_sse_storeu_ps; // "86.sse.storeu.ps"
}
break;
case '2': // 17 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'c': // 10 strings to match.
if (NameR.substr(9, 2) != "vt")
break;
switch (NameR[11]) {
default: break;
case 'd': // 2 strings to match.
if (NameR.substr(12, 3) != "q2p")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_cvtdq2pd; // "86.sse2.cvtdq2pd"
case 's': // 1 string to match.
return Intrinsic::x86_sse2_cvtdq2ps; // "86.sse2.cvtdq2ps"
}
break;
case 'p': // 4 strings to match.
switch (NameR[12]) {
default: break;
case 'd': // 2 strings to match.
if (NameR[13] != '2')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR[15] != 'q')
break;
return Intrinsic::x86_sse2_cvtpd2dq; // "86.sse2.cvtpd2dq"
case 'p': // 1 string to match.
if (NameR[15] != 's')
break;
return Intrinsic::x86_sse2_cvtpd2ps; // "86.sse2.cvtpd2ps"
}
break;
case 's': // 2 strings to match.
if (NameR[13] != '2')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR[15] != 'q')
break;
return Intrinsic::x86_sse2_cvtps2dq; // "86.sse2.cvtps2dq"
case 'p': // 1 string to match.
if (NameR[15] != 'd')
break;
return Intrinsic::x86_sse2_cvtps2pd; // "86.sse2.cvtps2pd"
}
break;
}
break;
case 's': // 4 strings to match.
switch (NameR[12]) {
default: break;
case 'd': // 2 strings to match.
if (NameR.substr(13, 2) != "2s")
break;
switch (NameR[15]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::x86_sse2_cvtsd2si; // "86.sse2.cvtsd2si"
case 's': // 1 string to match.
return Intrinsic::x86_sse2_cvtsd2ss; // "86.sse2.cvtsd2ss"
}
break;
case 'i': // 1 string to match.
if (NameR.substr(13, 3) != "2sd")
break;
return Intrinsic::x86_sse2_cvtsi2sd; // "86.sse2.cvtsi2sd"
case 's': // 1 string to match.
if (NameR.substr(13, 3) != "2sd")
break;
return Intrinsic::x86_sse2_cvtss2sd; // "86.sse2.cvtss2sd"
}
break;
}
break;
case 'p': // 7 strings to match.
switch (NameR[9]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(10, 5) != "ddus.")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_sse2_paddus_b; // "86.sse2.paddus.b"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_paddus_w; // "86.sse2.paddus.w"
}
break;
case 'm': // 3 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 5) != "dd.wd")
break;
return Intrinsic::x86_sse2_pmadd_wd; // "86.sse2.pmadd.wd"
case 'u': // 2 strings to match.
if (NameR[11] != 'l')
break;
switch (NameR[12]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(13, 3) != "u.w")
break;
return Intrinsic::x86_sse2_pmulhu_w; // "86.sse2.pmulhu.w"
case 'u': // 1 string to match.
if (NameR.substr(13, 3) != ".dq")
break;
return Intrinsic::x86_sse2_pmulu_dq; // "86.sse2.pmulu.dq"
}
break;
}
break;
case 's': // 2 strings to match.
if (NameR.substr(10, 5) != "ubus.")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_sse2_psubus_b; // "86.sse2.psubus.b"
case 'w': // 1 string to match.
return Intrinsic::x86_sse2_psubus_w; // "86.sse2.psubus.w"
}
break;
}
break;
}
break;
case '4': // 4 strings to match.
if (NameR.substr(7, 2) != "1.")
break;
switch (NameR[9]) {
default: break;
case 'b': // 2 strings to match.
if (NameR.substr(10, 5) != "lendp")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_blendpd; // "86.sse41.blendpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_blendps; // "86.sse41.blendps"
}
break;
case 'm': // 1 string to match.
if (NameR.substr(10, 6) != "psadbw")
break;
return Intrinsic::x86_sse41_mpsadbw; // "86.sse41.mpsadbw"
case 'p': // 1 string to match.
if (NameR.substr(10, 6) != "blendw")
break;
return Intrinsic::x86_sse41_pblendw; // "86.sse41.pblendw"
}
break;
}
break;
case 's': // 8 strings to match.
if (NameR.substr(6, 4) != "e3.p")
break;
switch (NameR[10]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 3) != "dd.")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_ssse3_phadd_d; // "86.ssse3.phadd.d"
case 'w': // 1 string to match.
return Intrinsic::x86_ssse3_phadd_w; // "86.ssse3.phadd.w"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(12, 3) != "ub.")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_ssse3_phsub_d; // "86.ssse3.phsub.d"
case 'w': // 1 string to match.
return Intrinsic::x86_ssse3_phsub_w; // "86.ssse3.phsub.w"
}
break;
}
break;
case 's': // 4 strings to match.
switch (NameR[11]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(12, 4) != "uf.b")
break;
return Intrinsic::x86_ssse3_pshuf_b; // "86.ssse3.pshuf.b"
case 'i': // 3 strings to match.
if (NameR.substr(12, 3) != "gn.")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_ssse3_psign_b; // "86.ssse3.psign.b"
case 'd': // 1 string to match.
return Intrinsic::x86_ssse3_psign_d; // "86.ssse3.psign.d"
case 'w': // 1 string to match.
return Intrinsic::x86_ssse3_psign_w; // "86.ssse3.psign.w"
}
break;
}
break;
}
break;
}
break;
case 'v': // 4 strings to match.
if (NameR.substr(4, 4) != "cvtp")
break;
switch (NameR[8]) {
default: break;
case 'h': // 2 strings to match.
if (NameR.substr(9, 4) != "2ps.")
break;
switch (NameR[13]) {
default: break;
case '1': // 1 string to match.
if (NameR.substr(14, 2) != "28")
break;
return Intrinsic::x86_vcvtph2ps_128; // "86.vcvtph2ps.128"
case '2': // 1 string to match.
if (NameR.substr(14, 2) != "56")
break;
return Intrinsic::x86_vcvtph2ps_256; // "86.vcvtph2ps.256"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(9, 4) != "2ph.")
break;
switch (NameR[13]) {
default: break;
case '1': // 1 string to match.
if (NameR.substr(14, 2) != "28")
break;
return Intrinsic::x86_vcvtps2ph_128; // "86.vcvtps2ph.128"
case '2': // 1 string to match.
if (NameR.substr(14, 2) != "56")
break;
return Intrinsic::x86_vcvtps2ph_256; // "86.vcvtps2ph.256"
}
break;
}
break;
case 'x': // 36 strings to match.
if (NameR.substr(4, 5) != "op.vp")
break;
switch (NameR[9]) {
default: break;
case 'c': // 24 strings to match.
if (NameR.substr(10, 2) != "om")
break;
switch (NameR[12]) {
default: break;
case 'e': // 4 strings to match.
if (NameR.substr(13, 2) != "qu")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomequb; // "86.xop.vpcomequb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomequd; // "86.xop.vpcomequd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomequq; // "86.xop.vpcomequq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomequw; // "86.xop.vpcomequw"
}
break;
case 'g': // 8 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 4 strings to match.
if (NameR[14] != 'u')
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeub; // "86.xop.vpcomgeub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeud; // "86.xop.vpcomgeud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeuq; // "86.xop.vpcomgeuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeuw; // "86.xop.vpcomgeuw"
}
break;
case 't': // 4 strings to match.
if (NameR[14] != 'u')
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtub; // "86.xop.vpcomgtub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtud; // "86.xop.vpcomgtud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtuq; // "86.xop.vpcomgtuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtuw; // "86.xop.vpcomgtuw"
}
break;
}
break;
case 'l': // 8 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 4 strings to match.
if (NameR[14] != 'u')
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomleub; // "86.xop.vpcomleub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomleud; // "86.xop.vpcomleud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomleuq; // "86.xop.vpcomleuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomleuw; // "86.xop.vpcomleuw"
}
break;
case 't': // 4 strings to match.
if (NameR[14] != 'u')
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomltub; // "86.xop.vpcomltub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomltud; // "86.xop.vpcomltud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomltuq; // "86.xop.vpcomltuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomltuw; // "86.xop.vpcomltuw"
}
break;
}
break;
case 'n': // 4 strings to match.
if (NameR.substr(13, 2) != "eu")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomneub; // "86.xop.vpcomneub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomneud; // "86.xop.vpcomneud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomneuq; // "86.xop.vpcomneuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomneuw; // "86.xop.vpcomneuw"
}
break;
}
break;
case 'h': // 6 strings to match.
if (NameR.substr(10, 4) != "addu")
break;
switch (NameR[14]) {
default: break;
case 'b': // 3 strings to match.
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vphaddubd; // "86.xop.vphaddubd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vphaddubq; // "86.xop.vphaddubq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vphaddubw; // "86.xop.vphaddubw"
}
break;
case 'd': // 1 string to match.
if (NameR[15] != 'q')
break;
return Intrinsic::x86_xop_vphaddudq; // "86.xop.vphaddudq"
case 'w': // 2 strings to match.
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vphadduwd; // "86.xop.vphadduwd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vphadduwq; // "86.xop.vphadduwq"
}
break;
}
break;
case 'm': // 6 strings to match.
if (NameR[10] != 'a')
break;
switch (NameR[11]) {
default: break;
case 'c': // 5 strings to match.
if (NameR[12] != 's')
break;
switch (NameR[13]) {
default: break;
case 'd': // 2 strings to match.
if (NameR[14] != 'q')
break;
switch (NameR[15]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::x86_xop_vpmacsdqh; // "86.xop.vpmacsdqh"
case 'l': // 1 string to match.
return Intrinsic::x86_xop_vpmacsdql; // "86.xop.vpmacsdql"
}
break;
case 's': // 3 strings to match.
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR[15] != 'd')
break;
return Intrinsic::x86_xop_vpmacssdd; // "86.xop.vpmacssdd"
case 'w': // 2 strings to match.
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpmacsswd; // "86.xop.vpmacsswd"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpmacssww; // "86.xop.vpmacssww"
}
break;
}
break;
}
break;
case 'd': // 1 string to match.
if (NameR.substr(12, 4) != "cswd")
break;
return Intrinsic::x86_xop_vpmadcswd; // "86.xop.vpmadcswd"
}
break;
}
break;
}
break;
case 17: // 80 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case '3': // 4 strings to match.
if (NameR.substr(4, 4) != "dnow")
break;
switch (NameR[8]) {
default: break;
case '.': // 3 strings to match.
if (NameR.substr(9, 3) != "pfr")
break;
switch (NameR[12]) {
default: break;
case 'c': // 2 strings to match.
if (NameR.substr(13, 3) != "pit")
break;
switch (NameR[16]) {
default: break;
case '1': // 1 string to match.
return Intrinsic::x86_3dnow_pfrcpit1; // "86.3dnow.pfrcpit1"
case '2': // 1 string to match.
return Intrinsic::x86_3dnow_pfrcpit2; // "86.3dnow.pfrcpit2"
}
break;
case 's': // 1 string to match.
if (NameR.substr(13, 4) != "qit1")
break;
return Intrinsic::x86_3dnow_pfrsqit1; // "86.3dnow.pfrsqit1"
}
break;
case 'a': // 1 string to match.
if (NameR.substr(9, 8) != ".pfpnacc")
break;
return Intrinsic::x86_3dnowa_pfpnacc; // "86.3dnowa.pfpnacc"
}
break;
case 'a': // 11 strings to match.
if (NameR.substr(4, 3) != "vx.")
break;
switch (NameR[7]) {
default: break;
case 'c': // 2 strings to match.
if (NameR.substr(8, 4) != "mp.p")
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(13, 4) != ".256")
break;
return Intrinsic::x86_avx_cmp_pd_256; // "86.avx.cmp.pd.256"
case 's': // 1 string to match.
if (NameR.substr(13, 4) != ".256")
break;
return Intrinsic::x86_avx_cmp_ps_256; // "86.avx.cmp.ps.256"
}
break;
case 'l': // 1 string to match.
if (NameR.substr(8, 9) != "du.dq.256")
break;
return Intrinsic::x86_avx_ldu_dq_256; // "86.avx.ldu.dq.256"
case 'm': // 4 strings to match.
switch (NameR[8]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(9, 3) != "x.p")
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(13, 4) != ".256")
break;
return Intrinsic::x86_avx_max_pd_256; // "86.avx.max.pd.256"
case 's': // 1 string to match.
if (NameR.substr(13, 4) != ".256")
break;
return Intrinsic::x86_avx_max_ps_256; // "86.avx.max.ps.256"
}
break;
case 'i': // 2 strings to match.
if (NameR.substr(9, 3) != "n.p")
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(13, 4) != ".256")
break;
return Intrinsic::x86_avx_min_pd_256; // "86.avx.min.pd.256"
case 's': // 1 string to match.
if (NameR.substr(13, 4) != ".256")
break;
return Intrinsic::x86_avx_min_ps_256; // "86.avx.min.ps.256"
}
break;
}
break;
case 'p': // 2 strings to match.
if (NameR.substr(8, 4) != "test")
break;
switch (NameR[12]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(13, 4) != ".256")
break;
return Intrinsic::x86_avx_ptestc_256; // "86.avx.ptestc.256"
case 'z': // 1 string to match.
if (NameR.substr(13, 4) != ".256")
break;
return Intrinsic::x86_avx_ptestz_256; // "86.avx.ptestz.256"
}
break;
case 'r': // 1 string to match.
if (NameR.substr(8, 9) != "cp.ps.256")
break;
return Intrinsic::x86_avx_rcp_ps_256; // "86.avx.rcp.ps.256"
case 'v': // 1 string to match.
if (NameR.substr(8, 9) != "zeroupper")
break;
return Intrinsic::x86_avx_vzeroupper; // "86.avx.vzeroupper"
}
break;
case 'f': // 8 strings to match.
if (NameR.substr(4, 7) != "ma4.vfm")
break;
switch (NameR[11]) {
default: break;
case 'a': // 4 strings to match.
if (NameR.substr(12, 3) != "dd.")
break;
switch (NameR[15]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmadd_pd; // "86.fma4.vfmadd.pd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmadd_ps; // "86.fma4.vfmadd.ps"
}
break;
case 's': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmadd_sd; // "86.fma4.vfmadd.sd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmadd_ss; // "86.fma4.vfmadd.ss"
}
break;
}
break;
case 's': // 4 strings to match.
if (NameR.substr(12, 3) != "ub.")
break;
switch (NameR[15]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmsub_pd; // "86.fma4.vfmsub.pd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmsub_ps; // "86.fma4.vfmsub.ps"
}
break;
case 's': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmsub_sd; // "86.fma4.vfmsub.sd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmsub_ss; // "86.fma4.vfmsub.ss"
}
break;
}
break;
}
break;
case 's': // 47 strings to match.
if (NameR[4] != 's')
break;
switch (NameR[5]) {
default: break;
case 'e': // 45 strings to match.
switch (NameR[6]) {
default: break;
case '.': // 8 strings to match.
switch (NameR[7]) {
default: break;
case 'c': // 3 strings to match.
switch (NameR[8]) {
default: break;
case 'o': // 1 string to match.
if (NameR.substr(9, 8) != "mineq.ss")
break;
return Intrinsic::x86_sse_comineq_ss; // "86.sse.comineq.ss"
case 'v': // 2 strings to match.
if (NameR.substr(9, 2) != "ts")
break;
switch (NameR[11]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(12, 5) != "642ss")
break;
return Intrinsic::x86_sse_cvtsi642ss; // "86.sse.cvtsi642ss"
case 's': // 1 string to match.
if (NameR.substr(12, 5) != "2si64")
break;
return Intrinsic::x86_sse_cvtss2si64; // "86.sse.cvtss2si64"
}
break;
}
break;
case 'u': // 5 strings to match.
if (NameR.substr(8, 4) != "comi")
break;
switch (NameR[12]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(13, 4) != "q.ss")
break;
return Intrinsic::x86_sse_ucomieq_ss; // "86.sse.ucomieq.ss"
case 'g': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(14, 3) != ".ss")
break;
return Intrinsic::x86_sse_ucomige_ss; // "86.sse.ucomige.ss"
case 't': // 1 string to match.
if (NameR.substr(14, 3) != ".ss")
break;
return Intrinsic::x86_sse_ucomigt_ss; // "86.sse.ucomigt.ss"
}
break;
case 'l': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(14, 3) != ".ss")
break;
return Intrinsic::x86_sse_ucomile_ss; // "86.sse.ucomile.ss"
case 't': // 1 string to match.
if (NameR.substr(14, 3) != ".ss")
break;
return Intrinsic::x86_sse_ucomilt_ss; // "86.sse.ucomilt.ss"
}
break;
}
break;
}
break;
case '2': // 12 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'c': // 8 strings to match.
switch (NameR[9]) {
default: break;
case 'o': // 5 strings to match.
if (NameR.substr(10, 2) != "mi")
break;
switch (NameR[12]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(13, 4) != "q.sd")
break;
return Intrinsic::x86_sse2_comieq_sd; // "86.sse2.comieq.sd"
case 'g': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(14, 3) != ".sd")
break;
return Intrinsic::x86_sse2_comige_sd; // "86.sse2.comige.sd"
case 't': // 1 string to match.
if (NameR.substr(14, 3) != ".sd")
break;
return Intrinsic::x86_sse2_comigt_sd; // "86.sse2.comigt.sd"
}
break;
case 'l': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(14, 3) != ".sd")
break;
return Intrinsic::x86_sse2_comile_sd; // "86.sse2.comile.sd"
case 't': // 1 string to match.
if (NameR.substr(14, 3) != ".sd")
break;
return Intrinsic::x86_sse2_comilt_sd; // "86.sse2.comilt.sd"
}
break;
}
break;
case 'v': // 3 strings to match.
if (NameR.substr(10, 2) != "tt")
break;
switch (NameR[12]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(14, 3) != "2dq")
break;
return Intrinsic::x86_sse2_cvttpd2dq; // "86.sse2.cvttpd2dq"
case 's': // 1 string to match.
if (NameR.substr(14, 3) != "2dq")
break;
return Intrinsic::x86_sse2_cvttps2dq; // "86.sse2.cvttps2dq"
}
break;
case 's': // 1 string to match.
if (NameR.substr(13, 4) != "d2si")
break;
return Intrinsic::x86_sse2_cvttsd2si; // "86.sse2.cvttsd2si"
}
break;
}
break;
case 'm': // 1 string to match.
if (NameR.substr(9, 8) != "ovmsk.pd")
break;
return Intrinsic::x86_sse2_movmsk_pd; // "86.sse2.movmsk.pd"
case 's': // 3 strings to match.
if (NameR.substr(9, 4) != "tore")
break;
switch (NameR[13]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(14, 3) != ".dq")
break;
return Intrinsic::x86_sse2_storel_dq; // "86.sse2.storel.dq"
case 'u': // 2 strings to match.
if (NameR[14] != '.')
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR[16] != 'q')
break;
return Intrinsic::x86_sse2_storeu_dq; // "86.sse2.storeu.dq"
case 'p': // 1 string to match.
if (NameR[16] != 'd')
break;
return Intrinsic::x86_sse2_storeu_pd; // "86.sse2.storeu.pd"
}
break;
}
break;
}
break;
case '3': // 2 strings to match.
if (NameR.substr(7, 9) != ".addsub.p")
break;
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse3_addsub_pd; // "86.sse3.addsub.pd"
case 's': // 1 string to match.
return Intrinsic::x86_sse3_addsub_ps; // "86.sse3.addsub.ps"
}
break;
case '4': // 23 strings to match.
if (NameR.substr(7, 2) != "1.")
break;
switch (NameR[9]) {
default: break;
case 'b': // 2 strings to match.
if (NameR.substr(10, 6) != "lendvp")
break;
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_blendvpd; // "86.sse41.blendvpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_blendvps; // "86.sse41.blendvps"
}
break;
case 'i': // 1 string to match.
if (NameR.substr(10, 7) != "nsertps")
break;
return Intrinsic::x86_sse41_insertps; // "86.sse41.insertps"
case 'm': // 1 string to match.
if (NameR.substr(10, 7) != "ovntdqa")
break;
return Intrinsic::x86_sse41_movntdqa; // "86.sse41.movntdqa"
case 'p': // 15 strings to match.
switch (NameR[10]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(11, 6) != "ckusdw")
break;
return Intrinsic::x86_sse41_packusdw; // "86.sse41.packusdw"
case 'b': // 1 string to match.
if (NameR.substr(11, 6) != "lendvb")
break;
return Intrinsic::x86_sse41_pblendvb; // "86.sse41.pblendvb"
case 'm': // 12 strings to match.
if (NameR.substr(11, 2) != "ov")
break;
switch (NameR[13]) {
default: break;
case 's': // 6 strings to match.
if (NameR[14] != 'x')
break;
switch (NameR[15]) {
default: break;
case 'b': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_pmovsxbd; // "86.sse41.pmovsxbd"
case 'q': // 1 string to match.
return Intrinsic::x86_sse41_pmovsxbq; // "86.sse41.pmovsxbq"
case 'w': // 1 string to match.
return Intrinsic::x86_sse41_pmovsxbw; // "86.sse41.pmovsxbw"
}
break;
case 'd': // 1 string to match.
if (NameR[16] != 'q')
break;
return Intrinsic::x86_sse41_pmovsxdq; // "86.sse41.pmovsxdq"
case 'w': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_pmovsxwd; // "86.sse41.pmovsxwd"
case 'q': // 1 string to match.
return Intrinsic::x86_sse41_pmovsxwq; // "86.sse41.pmovsxwq"
}
break;
}
break;
case 'z': // 6 strings to match.
if (NameR[14] != 'x')
break;
switch (NameR[15]) {
default: break;
case 'b': // 3 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_pmovzxbd; // "86.sse41.pmovzxbd"
case 'q': // 1 string to match.
return Intrinsic::x86_sse41_pmovzxbq; // "86.sse41.pmovzxbq"
case 'w': // 1 string to match.
return Intrinsic::x86_sse41_pmovzxbw; // "86.sse41.pmovzxbw"
}
break;
case 'd': // 1 string to match.
if (NameR[16] != 'q')
break;
return Intrinsic::x86_sse41_pmovzxdq; // "86.sse41.pmovzxdq"
case 'w': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_pmovzxwd; // "86.sse41.pmovzxwd"
case 'q': // 1 string to match.
return Intrinsic::x86_sse41_pmovzxwq; // "86.sse41.pmovzxwq"
}
break;
}
break;
}
break;
case 't': // 1 string to match.
if (NameR.substr(11, 6) != "estnzc")
break;
return Intrinsic::x86_sse41_ptestnzc; // "86.sse41.ptestnzc"
}
break;
case 'r': // 4 strings to match.
if (NameR.substr(10, 5) != "ound.")
break;
switch (NameR[15]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_round_pd; // "86.sse41.round.pd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_round_ps; // "86.sse41.round.ps"
}
break;
case 's': // 2 strings to match.
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_round_sd; // "86.sse41.round.sd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_round_ss; // "86.sse41.round.ss"
}
break;
}
break;
}
break;
}
break;
case 's': // 2 strings to match.
if (NameR.substr(6, 5) != "e3.ph")
break;
switch (NameR[11]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(12, 5) != "dd.sw")
break;
return Intrinsic::x86_ssse3_phadd_sw; // "86.ssse3.phadd.sw"
case 's': // 1 string to match.
if (NameR.substr(12, 5) != "ub.sw")
break;
return Intrinsic::x86_ssse3_phsub_sw; // "86.ssse3.phsub.sw"
}
break;
}
break;
case 'x': // 10 strings to match.
if (NameR.substr(4, 5) != "op.vp")
break;
switch (NameR[9]) {
default: break;
case 'c': // 5 strings to match.
switch (NameR[10]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(11, 6) != "ov.256")
break;
return Intrinsic::x86_xop_vpcmov_256; // "86.xop.vpcmov.256"
case 'o': // 4 strings to match.
if (NameR.substr(11, 5) != "mtrue")
break;
switch (NameR[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueb; // "86.xop.vpcomtrueb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrued; // "86.xop.vpcomtrued"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueq; // "86.xop.vpcomtrueq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomtruew; // "86.xop.vpcomtruew"
}
break;
}
break;
case 'e': // 2 strings to match.
if (NameR.substr(10, 6) != "rmil2p")
break;
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpermil2pd; // "86.xop.vpermil2pd"
case 's': // 1 string to match.
return Intrinsic::x86_xop_vpermil2ps; // "86.xop.vpermil2ps"
}
break;
case 'm': // 3 strings to match.
if (NameR[10] != 'a')
break;
switch (NameR[11]) {
default: break;
case 'c': // 2 strings to match.
if (NameR.substr(12, 4) != "ssdq")
break;
switch (NameR[16]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::x86_xop_vpmacssdqh; // "86.xop.vpmacssdqh"
case 'l': // 1 string to match.
return Intrinsic::x86_xop_vpmacssdql; // "86.xop.vpmacssdql"
}
break;
case 'd': // 1 string to match.
if (NameR.substr(12, 5) != "csswd")
break;
return Intrinsic::x86_xop_vpmadcsswd; // "86.xop.vpmadcsswd"
}
break;
}
break;
}
break;
case 18: // 45 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case 'a': // 16 strings to match.
if (NameR.substr(4, 2) != "vx")
break;
switch (NameR[6]) {
default: break;
case '.': // 10 strings to match.
switch (NameR[7]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[8]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(9, 4) != "dd.p")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(14, 4) != ".256")
break;
return Intrinsic::x86_avx_hadd_pd_256; // "86.avx.hadd.pd.256"
case 's': // 1 string to match.
if (NameR.substr(14, 4) != ".256")
break;
return Intrinsic::x86_avx_hadd_ps_256; // "86.avx.hadd.ps.256"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(9, 4) != "ub.p")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(14, 4) != ".256")
break;
return Intrinsic::x86_avx_hsub_pd_256; // "86.avx.hsub.pd.256"
case 's': // 1 string to match.
if (NameR.substr(14, 4) != ".256")
break;
return Intrinsic::x86_avx_hsub_ps_256; // "86.avx.hsub.ps.256"
}
break;
}
break;
case 'm': // 2 strings to match.
if (NameR.substr(8, 9) != "askload.p")
break;
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_maskload_pd; // "86.avx.maskload.pd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_maskload_ps; // "86.avx.maskload.ps"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(8, 5) != "qrt.p")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(14, 4) != ".256")
break;
return Intrinsic::x86_avx_sqrt_pd_256; // "86.avx.sqrt.pd.256"
case 's': // 1 string to match.
if (NameR.substr(14, 4) != ".256")
break;
return Intrinsic::x86_avx_sqrt_ps_256; // "86.avx.sqrt.ps.256"
}
break;
case 'v': // 2 strings to match.
if (NameR.substr(8, 9) != "testnzc.p")
break;
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_vtestnzc_pd; // "86.avx.vtestnzc.pd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_vtestnzc_ps; // "86.avx.vtestnzc.ps"
}
break;
}
break;
case '2': // 6 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'm': // 2 strings to match.
if (NameR.substr(9, 8) != "askload.")
break;
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_maskload_d; // "86.avx2.maskload.d"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_maskload_q; // "86.avx2.maskload.q"
}
break;
case 'p': // 3 strings to match.
switch (NameR[9]) {
default: break;
case 'm': // 1 string to match.
if (NameR.substr(10, 8) != "ul.hr.sw")
break;
return Intrinsic::x86_avx2_pmul_hr_sw; // "86.avx2.pmul.hr.sw"
case 's': // 2 strings to match.
switch (NameR[10]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(11, 7) != "l.dq.bs")
break;
return Intrinsic::x86_avx2_psll_dq_bs; // "86.avx2.psll.dq.bs"
case 'r': // 1 string to match.
if (NameR.substr(11, 7) != "l.dq.bs")
break;
return Intrinsic::x86_avx2_psrl_dq_bs; // "86.avx2.psrl.dq.bs"
}
break;
}
break;
case 'v': // 1 string to match.
if (NameR.substr(9, 9) != "perm2i128")
break;
return Intrinsic::x86_avx2_vperm2i128; // "86.avx2.vperm2i128"
}
break;
}
break;
case 'f': // 8 strings to match.
if (NameR.substr(4, 8) != "ma4.vfnm")
break;
switch (NameR[12]) {
default: break;
case 'a': // 4 strings to match.
if (NameR.substr(13, 3) != "dd.")
break;
switch (NameR[16]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfnmadd_pd; // "86.fma4.vfnmadd.pd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfnmadd_ps; // "86.fma4.vfnmadd.ps"
}
break;
case 's': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfnmadd_sd; // "86.fma4.vfnmadd.sd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfnmadd_ss; // "86.fma4.vfnmadd.ss"
}
break;
}
break;
case 's': // 4 strings to match.
if (NameR.substr(13, 3) != "ub.")
break;
switch (NameR[16]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfnmsub_pd; // "86.fma4.vfnmsub.pd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfnmsub_ps; // "86.fma4.vfnmsub.ps"
}
break;
case 's': // 2 strings to match.
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfnmsub_sd; // "86.fma4.vfnmsub.sd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfnmsub_ss; // "86.fma4.vfnmsub.ss"
}
break;
}
break;
}
break;
case 's': // 13 strings to match.
if (NameR.substr(4, 2) != "se")
break;
switch (NameR[6]) {
default: break;
case '.': // 2 strings to match.
switch (NameR[7]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(8, 10) != "vttss2si64")
break;
return Intrinsic::x86_sse_cvttss2si64; // "86.sse.cvttss2si64"
case 'u': // 1 string to match.
if (NameR.substr(8, 10) != "comineq.ss")
break;
return Intrinsic::x86_sse_ucomineq_ss; // "86.sse.ucomineq.ss"
}
break;
case '2': // 10 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'c': // 3 strings to match.
switch (NameR[9]) {
default: break;
case 'o': // 1 string to match.
if (NameR.substr(10, 8) != "mineq.sd")
break;
return Intrinsic::x86_sse2_comineq_sd; // "86.sse2.comineq.sd"
case 'v': // 2 strings to match.
if (NameR.substr(10, 2) != "ts")
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(13, 5) != "2si64")
break;
return Intrinsic::x86_sse2_cvtsd2si64; // "86.sse2.cvtsd2si64"
case 'i': // 1 string to match.
if (NameR.substr(13, 5) != "642sd")
break;
return Intrinsic::x86_sse2_cvtsi642sd; // "86.sse2.cvtsi642sd"
}
break;
}
break;
case 'p': // 2 strings to match.
if (NameR[9] != 's')
break;
switch (NameR[10]) {
default: break;
case 'l': // 1 string to match.
if (NameR.substr(11, 7) != "l.dq.bs")
break;
return Intrinsic::x86_sse2_psll_dq_bs; // "86.sse2.psll.dq.bs"
case 'r': // 1 string to match.
if (NameR.substr(11, 7) != "l.dq.bs")
break;
return Intrinsic::x86_sse2_psrl_dq_bs; // "86.sse2.psrl.dq.bs"
}
break;
case 'u': // 5 strings to match.
if (NameR.substr(9, 4) != "comi")
break;
switch (NameR[13]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(14, 4) != "q.sd")
break;
return Intrinsic::x86_sse2_ucomieq_sd; // "86.sse2.ucomieq.sd"
case 'g': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(15, 3) != ".sd")
break;
return Intrinsic::x86_sse2_ucomige_sd; // "86.sse2.ucomige.sd"
case 't': // 1 string to match.
if (NameR.substr(15, 3) != ".sd")
break;
return Intrinsic::x86_sse2_ucomigt_sd; // "86.sse2.ucomigt.sd"
}
break;
case 'l': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(15, 3) != ".sd")
break;
return Intrinsic::x86_sse2_ucomile_sd; // "86.sse2.ucomile.sd"
case 't': // 1 string to match.
if (NameR.substr(15, 3) != ".sd")
break;
return Intrinsic::x86_sse2_ucomilt_sd; // "86.sse2.ucomilt.sd"
}
break;
}
break;
}
break;
case '4': // 1 string to match.
if (NameR.substr(7, 11) != "1.extractps")
break;
return Intrinsic::x86_sse41_extractps; // "86.sse41.extractps"
}
break;
case 'x': // 8 strings to match.
if (NameR.substr(4, 8) != "op.vpcom")
break;
switch (NameR[12]) {
default: break;
case 'f': // 4 strings to match.
if (NameR.substr(13, 4) != "alse")
break;
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseb; // "86.xop.vpcomfalseb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalsed; // "86.xop.vpcomfalsed"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseq; // "86.xop.vpcomfalseq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalsew; // "86.xop.vpcomfalsew"
}
break;
case 't': // 4 strings to match.
if (NameR.substr(13, 4) != "rueu")
break;
switch (NameR[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueub; // "86.xop.vpcomtrueub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueud; // "86.xop.vpcomtrueud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueuq; // "86.xop.vpcomtrueuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueuw; // "86.xop.vpcomtrueuw"
}
break;
}
break;
}
break;
case 19: // 40 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case 'a': // 24 strings to match.
switch (NameR[4]) {
default: break;
case 'e': // 2 strings to match.
if (NameR.substr(5, 7) != "sni.aes")
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(13, 6) != "eclast")
break;
return Intrinsic::x86_aesni_aesdeclast; // "86.aesni.aesdeclast"
case 'e': // 1 string to match.
if (NameR.substr(13, 6) != "nclast")
break;
return Intrinsic::x86_aesni_aesenclast; // "86.aesni.aesenclast"
}
break;
case 'v': // 22 strings to match.
if (NameR[5] != 'x')
break;
switch (NameR[6]) {
default: break;
case '.': // 11 strings to match.
switch (NameR[7]) {
default: break;
case 'b': // 2 strings to match.
if (NameR.substr(8, 6) != "lend.p")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx_blend_pd_256; // "86.avx.blend.pd.256"
case 's': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx_blend_ps_256; // "86.avx.blend.ps.256"
}
break;
case 'm': // 5 strings to match.
switch (NameR[8]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(9, 9) != "skstore.p")
break;
switch (NameR[18]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_maskstore_pd; // "86.avx.maskstore.pd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_maskstore_ps; // "86.avx.maskstore.ps"
}
break;
case 'o': // 3 strings to match.
if (NameR.substr(9, 4) != "vnt.")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(14, 5) != "q.256")
break;
return Intrinsic::x86_avx_movnt_dq_256; // "86.avx.movnt.dq.256"
case 'p': // 2 strings to match.
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx_movnt_pd_256; // "86.avx.movnt.pd.256"
case 's': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx_movnt_ps_256; // "86.avx.movnt.ps.256"
}
break;
}
break;
}
break;
case 'p': // 1 string to match.
if (NameR.substr(8, 11) != "testnzc.256")
break;
return Intrinsic::x86_avx_ptestnzc_256; // "86.avx.ptestnzc.256"
case 'r': // 3 strings to match.
switch (NameR[8]) {
default: break;
case 'o': // 2 strings to match.
if (NameR.substr(9, 5) != "und.p")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx_round_pd_256; // "86.avx.round.pd.256"
case 's': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx_round_ps_256; // "86.avx.round.ps.256"
}
break;
case 's': // 1 string to match.
if (NameR.substr(9, 10) != "qrt.ps.256")
break;
return Intrinsic::x86_avx_rsqrt_ps_256; // "86.avx.rsqrt.ps.256"
}
break;
}
break;
case '2': // 11 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'm': // 2 strings to match.
if (NameR.substr(9, 9) != "askstore.")
break;
switch (NameR[18]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_maskstore_d; // "86.avx2.maskstore.d"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_maskstore_q; // "86.avx2.maskstore.q"
}
break;
case 'p': // 8 strings to match.
switch (NameR[9]) {
default: break;
case 'b': // 2 strings to match.
if (NameR.substr(10, 6) != "lendd.")
break;
switch (NameR[16]) {
default: break;
case '1': // 1 string to match.
if (NameR.substr(17, 2) != "28")
break;
return Intrinsic::x86_avx2_pblendd_128; // "86.avx2.pblendd.128"
case '2': // 1 string to match.
if (NameR.substr(17, 2) != "56")
break;
return Intrinsic::x86_avx2_pblendd_256; // "86.avx2.pblendd.256"
}
break;
case 'm': // 1 string to match.
if (NameR.substr(10, 9) != "add.ub.sw")
break;
return Intrinsic::x86_avx2_pmadd_ub_sw; // "86.avx2.pmadd.ub.sw"
case 's': // 5 strings to match.
switch (NameR[10]) {
default: break;
case 'l': // 2 strings to match.
if (NameR.substr(11, 3) != "lv.")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx2_psllv_d_256; // "86.avx2.psllv.d.256"
case 'q': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx2_psllv_q_256; // "86.avx2.psllv.q.256"
}
break;
case 'r': // 3 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(12, 7) != "v.d.256")
break;
return Intrinsic::x86_avx2_psrav_d_256; // "86.avx2.psrav.d.256"
case 'l': // 2 strings to match.
if (NameR.substr(12, 2) != "v.")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx2_psrlv_d_256; // "86.avx2.psrlv.d.256"
case 'q': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_avx2_psrlv_q_256; // "86.avx2.psrlv.q.256"
}
break;
}
break;
}
break;
}
break;
case 'v': // 1 string to match.
if (NameR.substr(9, 10) != "inserti128")
break;
return Intrinsic::x86_avx2_vinserti128; // "86.avx2.vinserti128"
}
break;
}
break;
}
break;
case 's': // 10 strings to match.
if (NameR[4] != 's')
break;
switch (NameR[5]) {
default: break;
case 'e': // 6 strings to match.
switch (NameR[6]) {
default: break;
case '2': // 3 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'c': // 1 string to match.
if (NameR.substr(9, 10) != "vttsd2si64")
break;
return Intrinsic::x86_sse2_cvttsd2si64; // "86.sse2.cvttsd2si64"
case 'm': // 1 string to match.
if (NameR.substr(9, 10) != "askmov.dqu")
break;
return Intrinsic::x86_sse2_maskmov_dqu; // "86.sse2.maskmov.dqu"
case 'u': // 1 string to match.
if (NameR.substr(9, 10) != "comineq.sd")
break;
return Intrinsic::x86_sse2_ucomineq_sd; // "86.sse2.ucomineq.sd"
}
break;
case '4': // 3 strings to match.
switch (NameR[7]) {
default: break;
case '1': // 1 string to match.
if (NameR.substr(8, 11) != ".phminposuw")
break;
return Intrinsic::x86_sse41_phminposuw; // "86.sse41.phminposuw"
case '2': // 2 strings to match.
if (NameR.substr(8, 7) != ".crc32.")
break;
switch (NameR[15]) {
default: break;
case '3': // 1 string to match.
if (NameR.substr(16, 3) != "2.8")
break;
return Intrinsic::x86_sse42_crc32_32_8; // "86.sse42.crc32.32.8"
case '6': // 1 string to match.
if (NameR.substr(16, 3) != "4.8")
break;
return Intrinsic::x86_sse42_crc32_64_8; // "86.sse42.crc32.64.8"
}
break;
}
break;
}
break;
case 's': // 4 strings to match.
if (NameR.substr(6, 4) != "e3.p")
break;
switch (NameR[10]) {
default: break;
case 'a': // 3 strings to match.
if (NameR.substr(11, 3) != "bs.")
break;
switch (NameR[14]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(15, 4) != ".128")
break;
return Intrinsic::x86_ssse3_pabs_b_128; // "86.ssse3.pabs.b.128"
case 'd': // 1 string to match.
if (NameR.substr(15, 4) != ".128")
break;
return Intrinsic::x86_ssse3_pabs_d_128; // "86.ssse3.pabs.d.128"
case 'w': // 1 string to match.
if (NameR.substr(15, 4) != ".128")
break;
return Intrinsic::x86_ssse3_pabs_w_128; // "86.ssse3.pabs.w.128"
}
break;
case 'm': // 1 string to match.
if (NameR.substr(11, 8) != "ul.hr.sw")
break;
return Intrinsic::x86_ssse3_pmul_hr_sw; // "86.ssse3.pmul.hr.sw"
}
break;
}
break;
case 'x': // 6 strings to match.
if (NameR.substr(4, 4) != "op.v")
break;
switch (NameR[8]) {
default: break;
case 'f': // 2 strings to match.
if (NameR.substr(9, 5) != "rcz.p")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_xop_vfrcz_pd_256; // "86.xop.vfrcz.pd.256"
case 's': // 1 string to match.
if (NameR.substr(15, 4) != ".256")
break;
return Intrinsic::x86_xop_vfrcz_ps_256; // "86.xop.vfrcz.ps.256"
}
break;
case 'p': // 4 strings to match.
if (NameR.substr(9, 9) != "comfalseu")
break;
switch (NameR[18]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseub; // "86.xop.vpcomfalseub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseud; // "86.xop.vpcomfalseud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseuq; // "86.xop.vpcomfalseuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseuw; // "86.xop.vpcomfalseuw"
}
break;
}
break;
}
break;
case 20: // 41 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case 'a': // 21 strings to match.
if (NameR.substr(4, 2) != "vx")
break;
switch (NameR[6]) {
default: break;
case '.': // 20 strings to match.
switch (NameR[7]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(8, 7) != "ddsub.p")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_addsub_pd_256; // "86.avx.addsub.pd.256"
case 's': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_addsub_ps_256; // "86.avx.addsub.ps.256"
}
break;
case 'b': // 2 strings to match.
if (NameR.substr(8, 7) != "lendv.p")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_blendv_pd_256; // "86.avx.blendv.pd.256"
case 's': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_blendv_ps_256; // "86.avx.blendv.ps.256"
}
break;
case 'c': // 4 strings to match.
if (NameR.substr(8, 2) != "vt")
break;
switch (NameR[10]) {
default: break;
case '.': // 2 strings to match.
if (NameR[11] != 'p')
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(13, 7) != "2dq.256")
break;
return Intrinsic::x86_avx_cvt_pd2dq_256; // "86.avx.cvt.pd2dq.256"
case 's': // 1 string to match.
if (NameR.substr(13, 7) != "2dq.256")
break;
return Intrinsic::x86_avx_cvt_ps2dq_256; // "86.avx.cvt.ps2dq.256"
}
break;
case 'd': // 2 strings to match.
if (NameR.substr(11, 4) != "q2.p")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_cvtdq2_pd_256; // "86.avx.cvtdq2.pd.256"
case 's': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_cvtdq2_ps_256; // "86.avx.cvtdq2.ps.256"
}
break;
}
break;
case 'm': // 2 strings to match.
if (NameR.substr(8, 7) != "ovmsk.p")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_movmsk_pd_256; // "86.avx.movmsk.pd.256"
case 's': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_movmsk_ps_256; // "86.avx.movmsk.ps.256"
}
break;
case 's': // 3 strings to match.
if (NameR.substr(8, 6) != "toreu.")
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(15, 5) != "q.256")
break;
return Intrinsic::x86_avx_storeu_dq_256; // "86.avx.storeu.dq.256"
case 'p': // 2 strings to match.
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_storeu_pd_256; // "86.avx.storeu.pd.256"
case 's': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_storeu_ps_256; // "86.avx.storeu.ps.256"
}
break;
}
break;
case 'v': // 7 strings to match.
switch (NameR[8]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(9, 11) != "roadcast.ss")
break;
return Intrinsic::x86_avx_vbroadcast_ss; // "86.avx.vbroadcast.ss"
case 'p': // 2 strings to match.
if (NameR.substr(9, 10) != "ermilvar.p")
break;
switch (NameR[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_vpermilvar_pd; // "86.avx.vpermilvar.pd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_vpermilvar_ps; // "86.avx.vpermilvar.ps"
}
break;
case 't': // 4 strings to match.
if (NameR.substr(9, 3) != "est")
break;
switch (NameR[12]) {
default: break;
case 'c': // 2 strings to match.
if (NameR.substr(13, 2) != ".p")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_vtestc_pd_256; // "86.avx.vtestc.pd.256"
case 's': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_vtestc_ps_256; // "86.avx.vtestc.ps.256"
}
break;
case 'z': // 2 strings to match.
if (NameR.substr(13, 2) != ".p")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_vtestz_pd_256; // "86.avx.vtestz.pd.256"
case 's': // 1 string to match.
if (NameR.substr(16, 4) != ".256")
break;
return Intrinsic::x86_avx_vtestz_ps_256; // "86.avx.vtestz.ps.256"
}
break;
}
break;
}
break;
}
break;
case '2': // 1 string to match.
if (NameR.substr(7, 13) != ".vextracti128")
break;
return Intrinsic::x86_avx2_vextracti128; // "86.avx2.vextracti128"
}
break;
case 'f': // 4 strings to match.
if (NameR.substr(4, 7) != "ma4.vfm")
break;
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 7) != "ddsub.p")
break;
switch (NameR[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmaddsub_pd; // "86.fma4.vfmaddsub.pd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmaddsub_ps; // "86.fma4.vfmaddsub.ps"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(12, 7) != "ubadd.p")
break;
switch (NameR[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmsubadd_pd; // "86.fma4.vfmsubadd.pd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmsubadd_ps; // "86.fma4.vfmsubadd.ps"
}
break;
}
break;
case 's': // 16 strings to match.
if (NameR[4] != 's')
break;
switch (NameR[5]) {
default: break;
case 'e': // 7 strings to match.
switch (NameR[6]) {
default: break;
case '2': // 4 strings to match.
if (NameR.substr(7, 2) != ".p")
break;
switch (NameR[9]) {
default: break;
case 'a': // 3 strings to match.
if (NameR.substr(10, 2) != "ck")
break;
switch (NameR[12]) {
default: break;
case 's': // 2 strings to match.
if (NameR[13] != 's')
break;
switch (NameR[14]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(15, 5) != "w.128")
break;
return Intrinsic::x86_sse2_packssdw_128; // "86.sse2.packssdw.128"
case 'w': // 1 string to match.
if (NameR.substr(15, 5) != "b.128")
break;
return Intrinsic::x86_sse2_packsswb_128; // "86.sse2.packsswb.128"
}
break;
case 'u': // 1 string to match.
if (NameR.substr(13, 7) != "swb.128")
break;
return Intrinsic::x86_sse2_packuswb_128; // "86.sse2.packuswb.128"
}
break;
case 'm': // 1 string to match.
if (NameR.substr(10, 10) != "ovmskb.128")
break;
return Intrinsic::x86_sse2_pmovmskb_128; // "86.sse2.pmovmskb.128"
}
break;
case '4': // 3 strings to match.
if (NameR.substr(7, 8) != "2.crc32.")
break;
switch (NameR[15]) {
default: break;
case '3': // 2 strings to match.
if (NameR.substr(16, 2) != "2.")
break;
switch (NameR[18]) {
default: break;
case '1': // 1 string to match.
if (NameR[19] != '6')
break;
return Intrinsic::x86_sse42_crc32_32_16; // "86.sse42.crc32.32.16"
case '3': // 1 string to match.
if (NameR[19] != '2')
break;
return Intrinsic::x86_sse42_crc32_32_32; // "86.sse42.crc32.32.32"
}
break;
case '6': // 1 string to match.
if (NameR.substr(16, 4) != "4.64")
break;
return Intrinsic::x86_sse42_crc32_64_64; // "86.sse42.crc32.64.64"
}
break;
}
break;
case 's': // 9 strings to match.
if (NameR.substr(6, 4) != "e3.p")
break;
switch (NameR[10]) {
default: break;
case 'h': // 4 strings to match.
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 3) != "dd.")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".128")
break;
return Intrinsic::x86_ssse3_phadd_d_128; // "86.ssse3.phadd.d.128"
case 'w': // 1 string to match.
if (NameR.substr(16, 4) != ".128")
break;
return Intrinsic::x86_ssse3_phadd_w_128; // "86.ssse3.phadd.w.128"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(12, 3) != "ub.")
break;
switch (NameR[15]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".128")
break;
return Intrinsic::x86_ssse3_phsub_d_128; // "86.ssse3.phsub.d.128"
case 'w': // 1 string to match.
if (NameR.substr(16, 4) != ".128")
break;
return Intrinsic::x86_ssse3_phsub_w_128; // "86.ssse3.phsub.w.128"
}
break;
}
break;
case 'm': // 1 string to match.
if (NameR.substr(11, 9) != "add.ub.sw")
break;
return Intrinsic::x86_ssse3_pmadd_ub_sw; // "86.ssse3.pmadd.ub.sw"
case 's': // 4 strings to match.
switch (NameR[11]) {
default: break;
case 'h': // 1 string to match.
if (NameR.substr(12, 8) != "uf.b.128")
break;
return Intrinsic::x86_ssse3_pshuf_b_128; // "86.ssse3.pshuf.b.128"
case 'i': // 3 strings to match.
if (NameR.substr(12, 3) != "gn.")
break;
switch (NameR[15]) {
default: break;
case 'b': // 1 string to match.
if (NameR.substr(16, 4) != ".128")
break;
return Intrinsic::x86_ssse3_psign_b_128; // "86.ssse3.psign.b.128"
case 'd': // 1 string to match.
if (NameR.substr(16, 4) != ".128")
break;
return Intrinsic::x86_ssse3_psign_d_128; // "86.ssse3.psign.d.128"
case 'w': // 1 string to match.
if (NameR.substr(16, 4) != ".128")
break;
return Intrinsic::x86_ssse3_psign_w_128; // "86.ssse3.psign.w.128"
}
break;
}
break;
}
break;
}
break;
}
break;
case 21: // 16 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case 'a': // 4 strings to match.
if (NameR.substr(4, 6) != "vx.cvt")
break;
switch (NameR[10]) {
default: break;
case '.': // 2 strings to match.
if (NameR[11] != 'p')
break;
switch (NameR[12]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(13, 8) != "2.ps.256")
break;
return Intrinsic::x86_avx_cvt_pd2_ps_256; // "86.avx.cvt.pd2.ps.256"
case 's': // 1 string to match.
if (NameR.substr(13, 8) != "2.pd.256")
break;
return Intrinsic::x86_avx_cvt_ps2_pd_256; // "86.avx.cvt.ps2.pd.256"
}
break;
case 't': // 2 strings to match.
if (NameR.substr(11, 2) != ".p")
break;
switch (NameR[13]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(14, 7) != "2dq.256")
break;
return Intrinsic::x86_avx_cvtt_pd2dq_256; // "86.avx.cvtt.pd2dq.256"
case 's': // 1 string to match.
if (NameR.substr(14, 7) != "2dq.256")
break;
return Intrinsic::x86_avx_cvtt_ps2dq_256; // "86.avx.cvtt.ps2dq.256"
}
break;
}
break;
case 'f': // 4 strings to match.
if (NameR.substr(4, 7) != "ma4.vfm")
break;
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 4) != "dd.p")
break;
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(17, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfmadd_pd_256; // "86.fma4.vfmadd.pd.256"
case 's': // 1 string to match.
if (NameR.substr(17, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfmadd_ps_256; // "86.fma4.vfmadd.ps.256"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(12, 4) != "ub.p")
break;
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(17, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfmsub_pd_256; // "86.fma4.vfmsub.pd.256"
case 's': // 1 string to match.
if (NameR.substr(17, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfmsub_ps_256; // "86.fma4.vfmsub.ps.256"
}
break;
}
break;
case 's': // 6 strings to match.
if (NameR[4] != 's')
break;
switch (NameR[5]) {
default: break;
case 'e': // 4 strings to match.
if (NameR.substr(6, 7) != "42.pcmp")
break;
switch (NameR[13]) {
default: break;
case 'e': // 2 strings to match.
if (NameR.substr(14, 3) != "str")
break;
switch (NameR[17]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(18, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestri128; // "86.sse42.pcmpestri128"
case 'm': // 1 string to match.
if (NameR.substr(18, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestrm128; // "86.sse42.pcmpestrm128"
}
break;
case 'i': // 2 strings to match.
if (NameR.substr(14, 3) != "str")
break;
switch (NameR[17]) {
default: break;
case 'i': // 1 string to match.
if (NameR.substr(18, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistri128; // "86.sse42.pcmpistri128"
case 'm': // 1 string to match.
if (NameR.substr(18, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistrm128; // "86.sse42.pcmpistrm128"
}
break;
}
break;
case 's': // 2 strings to match.
if (NameR.substr(6, 5) != "e3.ph")
break;
switch (NameR[11]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(12, 9) != "dd.sw.128")
break;
return Intrinsic::x86_ssse3_phadd_sw_128; // "86.ssse3.phadd.sw.128"
case 's': // 1 string to match.
if (NameR.substr(12, 9) != "ub.sw.128")
break;
return Intrinsic::x86_ssse3_phsub_sw_128; // "86.ssse3.phsub.sw.128"
}
break;
}
break;
case 'x': // 2 strings to match.
if (NameR.substr(4, 12) != "op.vpermil2p")
break;
switch (NameR[16]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(17, 4) != ".256")
break;
return Intrinsic::x86_xop_vpermil2pd_256; // "86.xop.vpermil2pd.256"
case 's': // 1 string to match.
if (NameR.substr(17, 4) != ".256")
break;
return Intrinsic::x86_xop_vpermil2ps_256; // "86.xop.vpermil2ps.256"
}
break;
}
break;
case 22: // 21 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case 'a': // 7 strings to match.
if (NameR.substr(4, 2) != "vx")
break;
switch (NameR[6]) {
default: break;
case '.': // 4 strings to match.
switch (NameR[7]) {
default: break;
case 'm': // 2 strings to match.
if (NameR.substr(8, 9) != "askload.p")
break;
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_avx_maskload_pd_256; // "86.avx.maskload.pd.256"
case 's': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_avx_maskload_ps_256; // "86.avx.maskload.ps.256"
}
break;
case 'v': // 2 strings to match.
if (NameR.substr(8, 9) != "testnzc.p")
break;
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_avx_vtestnzc_pd_256; // "86.avx.vtestnzc.pd.256"
case 's': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_avx_vtestnzc_ps_256; // "86.avx.vtestnzc.ps.256"
}
break;
}
break;
case '2': // 3 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'm': // 2 strings to match.
if (NameR.substr(9, 8) != "askload.")
break;
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_avx2_maskload_d_256; // "86.avx2.maskload.d.256"
case 'q': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_avx2_maskload_q_256; // "86.avx2.maskload.q.256"
}
break;
case 'v': // 1 string to match.
if (NameR.substr(9, 13) != "broadcasti128")
break;
return Intrinsic::x86_avx2_vbroadcasti128; // "86.avx2.vbroadcasti128"
}
break;
}
break;
case 'f': // 4 strings to match.
if (NameR.substr(4, 8) != "ma4.vfnm")
break;
switch (NameR[12]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(13, 4) != "dd.p")
break;
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfnmadd_pd_256; // "86.fma4.vfnmadd.pd.256"
case 's': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfnmadd_ps_256; // "86.fma4.vfnmadd.ps.256"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(13, 4) != "ub.p")
break;
switch (NameR[17]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfnmsub_pd_256; // "86.fma4.vfnmsub.pd.256"
case 's': // 1 string to match.
if (NameR.substr(18, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfnmsub_ps_256; // "86.fma4.vfnmsub.ps.256"
}
break;
}
break;
case 's': // 10 strings to match.
if (NameR.substr(4, 9) != "se42.pcmp")
break;
switch (NameR[13]) {
default: break;
case 'e': // 5 strings to match.
if (NameR.substr(14, 4) != "stri")
break;
switch (NameR[18]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestria128; // "86.sse42.pcmpestria128"
case 'c': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestric128; // "86.sse42.pcmpestric128"
case 'o': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestrio128; // "86.sse42.pcmpestrio128"
case 's': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestris128; // "86.sse42.pcmpestris128"
case 'z': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestriz128; // "86.sse42.pcmpestriz128"
}
break;
case 'i': // 5 strings to match.
if (NameR.substr(14, 4) != "stri")
break;
switch (NameR[18]) {
default: break;
case 'a': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistria128; // "86.sse42.pcmpistria128"
case 'c': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistric128; // "86.sse42.pcmpistric128"
case 'o': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistrio128; // "86.sse42.pcmpistrio128"
case 's': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistris128; // "86.sse42.pcmpistris128"
case 'z': // 1 string to match.
if (NameR.substr(19, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistriz128; // "86.sse42.pcmpistriz128"
}
break;
}
break;
}
break;
case 23: // 13 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case 'a': // 12 strings to match.
if (NameR.substr(4, 2) != "vx")
break;
switch (NameR[6]) {
default: break;
case '.': // 2 strings to match.
if (NameR.substr(7, 11) != "maskstore.p")
break;
switch (NameR[18]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(19, 4) != ".256")
break;
return Intrinsic::x86_avx_maskstore_pd_256; // "86.avx.maskstore.pd.256"
case 's': // 1 string to match.
if (NameR.substr(19, 4) != ".256")
break;
return Intrinsic::x86_avx_maskstore_ps_256; // "86.avx.maskstore.ps.256"
}
break;
case '2': // 10 strings to match.
if (NameR[7] != '.')
break;
switch (NameR[8]) {
default: break;
case 'm': // 2 strings to match.
if (NameR.substr(9, 9) != "askstore.")
break;
switch (NameR[18]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(19, 4) != ".256")
break;
return Intrinsic::x86_avx2_maskstore_d_256; // "86.avx2.maskstore.d.256"
case 'q': // 1 string to match.
if (NameR.substr(19, 4) != ".256")
break;
return Intrinsic::x86_avx2_maskstore_q_256; // "86.avx2.maskstore.q.256"
}
break;
case 'p': // 8 strings to match.
if (NameR.substr(9, 9) != "broadcast")
break;
switch (NameR[18]) {
default: break;
case 'b': // 2 strings to match.
if (NameR[19] != '.')
break;
switch (NameR[20]) {
default: break;
case '1': // 1 string to match.
if (NameR.substr(21, 2) != "28")
break;
return Intrinsic::x86_avx2_pbroadcastb_128; // "86.avx2.pbroadcastb.128"
case '2': // 1 string to match.
if (NameR.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_pbroadcastb_256; // "86.avx2.pbroadcastb.256"
}
break;
case 'd': // 2 strings to match.
if (NameR[19] != '.')
break;
switch (NameR[20]) {
default: break;
case '1': // 1 string to match.
if (NameR.substr(21, 2) != "28")
break;
return Intrinsic::x86_avx2_pbroadcastd_128; // "86.avx2.pbroadcastd.128"
case '2': // 1 string to match.
if (NameR.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_pbroadcastd_256; // "86.avx2.pbroadcastd.256"
}
break;
case 'q': // 2 strings to match.
if (NameR[19] != '.')
break;
switch (NameR[20]) {
default: break;
case '1': // 1 string to match.
if (NameR.substr(21, 2) != "28")
break;
return Intrinsic::x86_avx2_pbroadcastq_128; // "86.avx2.pbroadcastq.128"
case '2': // 1 string to match.
if (NameR.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_pbroadcastq_256; // "86.avx2.pbroadcastq.256"
}
break;
case 'w': // 2 strings to match.
if (NameR[19] != '.')
break;
switch (NameR[20]) {
default: break;
case '1': // 1 string to match.
if (NameR.substr(21, 2) != "28")
break;
return Intrinsic::x86_avx2_pbroadcastw_128; // "86.avx2.pbroadcastw.128"
case '2': // 1 string to match.
if (NameR.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_pbroadcastw_256; // "86.avx2.pbroadcastw.256"
}
break;
}
break;
}
break;
}
break;
case 's': // 1 string to match.
if (NameR.substr(4, 19) != "sse3.pmul.hr.sw.128")
break;
return Intrinsic::x86_ssse3_pmul_hr_sw_128; // "86.ssse3.pmul.hr.sw.128"
}
break;
case 24: // 14 strings to match.
if (NameR.substr(0, 3) != "86.")
break;
switch (NameR[3]) {
default: break;
case 'a': // 9 strings to match.
switch (NameR[4]) {
default: break;
case 'e': // 1 string to match.
if (NameR.substr(5, 19) != "sni.aeskeygenassist")
break;
return Intrinsic::x86_aesni_aeskeygenassist; // "86.aesni.aeskeygenassist"
case 'v': // 8 strings to match.
if (NameR[5] != 'x')
break;
switch (NameR[6]) {
default: break;
case '.': // 7 strings to match.
if (NameR[7] != 'v')
break;
switch (NameR[8]) {
default: break;
case 'b': // 2 strings to match.
if (NameR.substr(9, 10) != "roadcast.s")
break;
switch (NameR[19]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_avx_vbroadcast_sd_256; // "86.avx.vbroadcast.sd.256"
case 's': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_avx_vbroadcast_ss_256; // "86.avx.vbroadcast.ss.256"
}
break;
case 'p': // 5 strings to match.
if (NameR.substr(9, 3) != "erm")
break;
switch (NameR[12]) {
default: break;
case '2': // 3 strings to match.
if (NameR.substr(13, 5) != "f128.")
break;
switch (NameR[18]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[19]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_avx_vperm2f128_pd_256; // "86.avx.vperm2f128.pd.256"
case 's': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_avx_vperm2f128_ps_256; // "86.avx.vperm2f128.ps.256"
}
break;
case 's': // 1 string to match.
if (NameR.substr(19, 5) != "i.256")
break;
return Intrinsic::x86_avx_vperm2f128_si_256; // "86.avx.vperm2f128.si.256"
}
break;
case 'i': // 2 strings to match.
if (NameR.substr(13, 6) != "lvar.p")
break;
switch (NameR[19]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_avx_vpermilvar_pd_256; // "86.avx.vpermilvar.pd.256"
case 's': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_avx_vpermilvar_ps_256; // "86.avx.vpermilvar.ps.256"
}
break;
}
break;
}
break;
case '2': // 1 string to match.
if (NameR.substr(7, 17) != ".vbroadcast.ss.ps")
break;
return Intrinsic::x86_avx2_vbroadcast_ss_ps; // "86.avx2.vbroadcast.ss.ps"
}
break;
}
break;
case 'f': // 4 strings to match.
if (NameR.substr(4, 7) != "ma4.vfm")
break;
switch (NameR[11]) {
default: break;
case 'a': // 2 strings to match.
if (NameR.substr(12, 7) != "ddsub.p")
break;
switch (NameR[19]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfmaddsub_pd_256; // "86.fma4.vfmaddsub.pd.256"
case 's': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfmaddsub_ps_256; // "86.fma4.vfmaddsub.ps.256"
}
break;
case 's': // 2 strings to match.
if (NameR.substr(12, 7) != "ubadd.p")
break;
switch (NameR[19]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfmsubadd_pd_256; // "86.fma4.vfmsubadd.pd.256"
case 's': // 1 string to match.
if (NameR.substr(20, 4) != ".256")
break;
return Intrinsic::x86_fma4_vfmsubadd_ps_256; // "86.fma4.vfmsubadd.ps.256"
}
break;
}
break;
case 's': // 1 string to match.
if (NameR.substr(4, 20) != "sse3.pmadd.ub.sw.128")
break;
return Intrinsic::x86_ssse3_pmadd_ub_sw_128; // "86.ssse3.pmadd.ub.sw.128"
}
break;
case 25: // 3 strings to match.
if (NameR.substr(0, 19) != "86.avx.vinsertf128.")
break;
switch (NameR[19]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[20]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(21, 4) != ".256")
break;
return Intrinsic::x86_avx_vinsertf128_pd_256; // "86.avx.vinsertf128.pd.256"
case 's': // 1 string to match.
if (NameR.substr(21, 4) != ".256")
break;
return Intrinsic::x86_avx_vinsertf128_ps_256; // "86.avx.vinsertf128.ps.256"
}
break;
case 's': // 1 string to match.
if (NameR.substr(20, 5) != "i.256")
break;
return Intrinsic::x86_avx_vinsertf128_si_256; // "86.avx.vinsertf128.si.256"
}
break;
case 26: // 3 strings to match.
if (NameR.substr(0, 20) != "86.avx.vextractf128.")
break;
switch (NameR[20]) {
default: break;
case 'p': // 2 strings to match.
switch (NameR[21]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(22, 4) != ".256")
break;
return Intrinsic::x86_avx_vextractf128_pd_256; // "86.avx.vextractf128.pd.256"
case 's': // 1 string to match.
if (NameR.substr(22, 4) != ".256")
break;
return Intrinsic::x86_avx_vextractf128_ps_256; // "86.avx.vextractf128.ps.256"
}
break;
case 's': // 1 string to match.
if (NameR.substr(21, 5) != "i.256")
break;
return Intrinsic::x86_avx_vextractf128_si_256; // "86.avx.vextractf128.si.256"
}
break;
case 28: // 4 strings to match.
if (NameR.substr(0, 6) != "86.avx")
break;
switch (NameR[6]) {
default: break;
case '.': // 2 strings to match.
if (NameR.substr(7, 16) != "vbroadcastf128.p")
break;
switch (NameR[23]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(24, 4) != ".256")
break;
return Intrinsic::x86_avx_vbroadcastf128_pd_256; // "86.avx.vbroadcastf128.pd.256"
case 's': // 1 string to match.
if (NameR.substr(24, 4) != ".256")
break;
return Intrinsic::x86_avx_vbroadcastf128_ps_256; // "86.avx.vbroadcastf128.ps.256"
}
break;
case '2': // 2 strings to match.
if (NameR.substr(7, 13) != ".vbroadcast.s")
break;
switch (NameR[20]) {
default: break;
case 'd': // 1 string to match.
if (NameR.substr(21, 7) != ".pd.256")
break;
return Intrinsic::x86_avx2_vbroadcast_sd_pd_256; // "86.avx2.vbroadcast.sd.pd.256"
case 's': // 1 string to match.
if (NameR.substr(21, 7) != ".ps.256")
break;
return Intrinsic::x86_avx2_vbroadcast_ss_ps_256; // "86.avx2.vbroadcast.ss.ps.256"
}
break;
}
break;
}
break; // end of 'x' case.
}
#endif
// Verifier::visitIntrinsicFunctionCall code.
#ifdef GET_INTRINSIC_VERIFIER
switch (ID) {
default: llvm_unreachable("Invalid intrinsic!");
case Intrinsic::eh_unwind_init: // llvm.eh.unwind.init
case Intrinsic::ppc_altivec_dssall: // llvm.ppc.altivec.dssall
case Intrinsic::ppc_sync: // llvm.ppc.sync
case Intrinsic::trap: // llvm.trap
case Intrinsic::x86_avx_vzeroall: // llvm.x86.avx.vzeroall
case Intrinsic::x86_avx_vzeroupper: // llvm.x86.avx.vzeroupper
case Intrinsic::x86_mmx_emms: // llvm.x86.mmx.emms
case Intrinsic::x86_mmx_femms: // llvm.x86.mmx.femms
case Intrinsic::x86_sse2_lfence: // llvm.x86.sse2.lfence
case Intrinsic::x86_sse2_mfence: // llvm.x86.sse2.mfence
case Intrinsic::x86_sse_sfence: // llvm.x86.sse.sfence
case Intrinsic::xcore_clre: // llvm.xcore.clre
case Intrinsic::xcore_ssync: // llvm.xcore.ssync
VerifyIntrinsicPrototype(ID, IF, 0, 0);
break;
case Intrinsic::H: // llvm.H
case Intrinsic::NOT: // llvm.rkqc.NOT
case Intrinsic::S: // llvm.S
case Intrinsic::Sdag: // llvm.Sdag
case Intrinsic::T: // llvm.T
case Intrinsic::Tdag: // llvm.Tdag
case Intrinsic::X: // llvm.X
case Intrinsic::Y: // llvm.Y
case Intrinsic::Z: // llvm.Z
VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::iAny);
break;
case Intrinsic::CNOT: // llvm.CNOT
case Intrinsic::cnot: // llvm.rkqc.cnot
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iAny, MVT::iAny);
break;
case Intrinsic::Fredkin: // llvm.Fredkin
case Intrinsic::Toffoli: // llvm.Toffoli
case Intrinsic::toffoli: // llvm.rkqc.toffoli
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iAny, MVT::iAny, MVT::iAny);
break;
case Intrinsic::a_eq_a_plus_b_times_c: // llvm.rkqc.a_eq_a_plus_b_times_c
VerifyIntrinsicPrototype(ID, IF, 0, 4, MVT::iAny, MVT::iAny, MVT::iAny, MVT::i32);
break;
case Intrinsic::a_eq_a_minus_b: // llvm.rkqc.a_eq_a_minus_b
case Intrinsic::a_eq_a_plus_b: // llvm.rkqc.a_eq_a_plus_b
case Intrinsic::a_swap_b: // llvm.rkqc.a_swap_b
case Intrinsic::assign_value_of_b_to_a: // llvm.rkqc.assign_value_of_b_to_a
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iAny, MVT::iAny, MVT::i32);
break;
case Intrinsic::Rx: // llvm.Rx
case Intrinsic::Ry: // llvm.Ry
case Intrinsic::Rz: // llvm.Rz
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iAny, MVT::f64);
break;
case Intrinsic::PrepX: // llvm.PrepX
case Intrinsic::PrepZ: // llvm.PrepZ
case Intrinsic::assign_value_of_0_to_a: // llvm.rkqc.assign_value_of_0_to_a
case Intrinsic::assign_value_of_1_to_a: // llvm.rkqc.assign_value_of_1_to_a
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iAny, MVT::i32);
break;
case Intrinsic::xcore_eeu: // llvm.xcore.eeu
case Intrinsic::xcore_freer: // llvm.xcore.freer
case Intrinsic::xcore_mjoin: // llvm.xcore.mjoin
case Intrinsic::xcore_msync: // llvm.xcore.msync
case Intrinsic::xcore_syncr: // llvm.xcore.syncr
VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::iPTRAny);
break;
case Intrinsic::xcore_setclk: // llvm.xcore.setclk
case Intrinsic::xcore_setrdy: // llvm.xcore.setrdy
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTRAny, MVT::iPTRAny);
break;
case Intrinsic::memcpy: // llvm.memcpy
case Intrinsic::memmove: // llvm.memmove
VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTRAny, MVT::iPTRAny, MVT::iAny, MVT::i32, MVT::i1);
break;
case Intrinsic::xcore_chkct: // llvm.xcore.chkct
case Intrinsic::xcore_out: // llvm.xcore.out
case Intrinsic::xcore_outct: // llvm.xcore.outct
case Intrinsic::xcore_outt: // llvm.xcore.outt
case Intrinsic::xcore_setc: // llvm.xcore.setc
case Intrinsic::xcore_setd: // llvm.xcore.setd
case Intrinsic::xcore_setpsc: // llvm.xcore.setpsc
case Intrinsic::xcore_setpt: // llvm.xcore.setpt
case Intrinsic::xcore_settw: // llvm.xcore.settw
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTRAny, MVT::i32);
break;
case Intrinsic::memset: // llvm.memset
VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTRAny, MVT::i8, MVT::iAny, MVT::i32, MVT::i1);
break;
case Intrinsic::xcore_initcp: // llvm.xcore.initcp
case Intrinsic::xcore_initdp: // llvm.xcore.initdp
case Intrinsic::xcore_initlr: // llvm.xcore.initlr
case Intrinsic::xcore_initpc: // llvm.xcore.initpc
case Intrinsic::xcore_initsp: // llvm.xcore.initsp
case Intrinsic::xcore_setev: // llvm.xcore.setev
case Intrinsic::xcore_setv: // llvm.xcore.setv
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTRAny, MVT::iPTR);
break;
case Intrinsic::invariant_end: // llvm.invariant.end
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::i64, MVT::iPTR);
break;
case Intrinsic::arm_set_fpscr: // llvm.arm.set.fpscr
case Intrinsic::eh_sjlj_callsite: // llvm.eh.sjlj.callsite
case Intrinsic::pcmarker: // llvm.pcmarker
case Intrinsic::ppc_altivec_dss: // llvm.ppc.altivec.dss
case Intrinsic::ptx_bar_sync: // llvm.ptx.bar.sync
case Intrinsic::x86_wrfsbase_32: // llvm.x86.wrfsbase.32
case Intrinsic::x86_wrgsbase_32: // llvm.x86.wrgsbase.32
case Intrinsic::xcore_clrsr: // llvm.xcore.clrsr
case Intrinsic::xcore_setsr: // llvm.xcore.setsr
VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::i32);
break;
case Intrinsic::x86_sse3_mwait: // llvm.x86.sse3.mwait
case Intrinsic::xcore_setps: // llvm.xcore.setps
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_mcrr: // llvm.arm.mcrr
case Intrinsic::arm_mcrr2: // llvm.arm.mcrr2
VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::i32, MVT::i32, MVT::i32, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_cdp: // llvm.arm.cdp
case Intrinsic::arm_cdp2: // llvm.arm.cdp2
case Intrinsic::arm_mcr: // llvm.arm.mcr
case Intrinsic::arm_mcr2: // llvm.arm.mcr2
VerifyIntrinsicPrototype(ID, IF, 0, 6, MVT::i32, MVT::i32, MVT::i32, MVT::i32, MVT::i32, MVT::i32);
break;
case Intrinsic::eh_return_i32: // llvm.eh.return.i32
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::i32, MVT::iPTR);
break;
case Intrinsic::x86_wrfsbase_64: // llvm.x86.wrfsbase.64
case Intrinsic::x86_wrgsbase_64: // llvm.x86.wrgsbase.64
VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::i64);
break;
case Intrinsic::eh_return_i64: // llvm.eh.return.i64
case Intrinsic::lifetime_end: // llvm.lifetime.end
case Intrinsic::lifetime_start: // llvm.lifetime.start
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::i64, MVT::iPTR);
break;
case Intrinsic::x86_int: // llvm.x86.int
VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::i8);
break;
case Intrinsic::dbg_value: // llvm.dbg.value
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::Metadata, MVT::i64, MVT::Metadata);
break;
case Intrinsic::dbg_declare: // llvm.dbg.declare
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::Metadata, MVT::Metadata);
break;
case Intrinsic::eh_sjlj_functioncontext: // llvm.eh.sjlj.functioncontext
case Intrinsic::eh_sjlj_longjmp: // llvm.eh.sjlj.longjmp
case Intrinsic::ppc_dcba: // llvm.ppc.dcba
case Intrinsic::ppc_dcbf: // llvm.ppc.dcbf
case Intrinsic::ppc_dcbi: // llvm.ppc.dcbi
case Intrinsic::ppc_dcbst: // llvm.ppc.dcbst
case Intrinsic::ppc_dcbt: // llvm.ppc.dcbt
case Intrinsic::ppc_dcbtst: // llvm.ppc.dcbtst
case Intrinsic::ppc_dcbz: // llvm.ppc.dcbz
case Intrinsic::ppc_dcbzl: // llvm.ppc.dcbzl
case Intrinsic::stackrestore: // llvm.stackrestore
case Intrinsic::vaend: // llvm.va_end
case Intrinsic::vastart: // llvm.va_start
case Intrinsic::x86_sse2_clflush: // llvm.x86.sse2.clflush
case Intrinsic::x86_sse_ldmxcsr: // llvm.x86.sse.ldmxcsr
case Intrinsic::x86_sse_stmxcsr: // llvm.x86.sse.stmxcsr
VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::iPTR);
break;
case Intrinsic::arm_neon_vst2: // llvm.arm.neon.vst2
VerifyIntrinsicPrototype(ID, IF, 0, 4, MVT::iPTR, MVT::vAny, ~1, MVT::i32);
break;
case Intrinsic::arm_neon_vst3: // llvm.arm.neon.vst3
VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTR, MVT::vAny, ~1, ~1, MVT::i32);
break;
case Intrinsic::arm_neon_vst4: // llvm.arm.neon.vst4
VerifyIntrinsicPrototype(ID, IF, 0, 6, MVT::iPTR, MVT::vAny, ~1, ~1, ~1, MVT::i32);
break;
case Intrinsic::arm_neon_vst2lane: // llvm.arm.neon.vst2lane
VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTR, MVT::vAny, ~1, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_neon_vst3lane: // llvm.arm.neon.vst3lane
VerifyIntrinsicPrototype(ID, IF, 0, 6, MVT::iPTR, MVT::vAny, ~1, ~1, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_neon_vst4lane: // llvm.arm.neon.vst4lane
VerifyIntrinsicPrototype(ID, IF, 0, 7, MVT::iPTR, MVT::vAny, ~1, ~1, ~1, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_neon_vst1: // llvm.arm.neon.vst1
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::vAny, MVT::i32);
break;
case Intrinsic::longjmp: // llvm.longjmp
case Intrinsic::siglongjmp: // llvm.siglongjmp
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::i32);
break;
case Intrinsic::ppc_altivec_dst: // llvm.ppc.altivec.dst
case Intrinsic::ppc_altivec_dstst: // llvm.ppc.altivec.dstst
case Intrinsic::ppc_altivec_dststt: // llvm.ppc.altivec.dststt
case Intrinsic::ppc_altivec_dstt: // llvm.ppc.altivec.dstt
case Intrinsic::x86_sse3_monitor: // llvm.x86.sse3.monitor
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::i32, MVT::i32);
break;
case Intrinsic::prefetch: // llvm.prefetch
VerifyIntrinsicPrototype(ID, IF, 0, 4, MVT::iPTR, MVT::i32, MVT::i32, MVT::i32);
break;
case Intrinsic::vacopy: // llvm.va_copy
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::iPTR);
break;
case Intrinsic::init_trampoline: // llvm.init.trampoline
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::iPTR, MVT::iPTR);
break;
case Intrinsic::var_annotation: // llvm.var.annotation
VerifyIntrinsicPrototype(ID, IF, 0, 4, MVT::iPTR, MVT::iPTR, MVT::iPTR, MVT::i32);
break;
case Intrinsic::gcwrite: // llvm.gcwrite
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::iPTR, MVT::iPTR);
break;
case Intrinsic::stackprotector: // llvm.stackprotector
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::iPTR);
break;
case Intrinsic::x86_sse2_storeu_dq: // llvm.x86.sse2.storeu.dq
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v16i8);
break;
case Intrinsic::x86_sse2_storeu_pd: // llvm.x86.sse2.storeu.pd
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v2f64);
break;
case Intrinsic::x86_avx_maskstore_pd: // llvm.x86.avx.maskstore.pd
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v2f64, MVT::v2f64);
break;
case Intrinsic::x86_avx2_maskstore_q: // llvm.x86.avx2.maskstore.q
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v2i64, MVT::v2i64);
break;
case Intrinsic::x86_avx_storeu_dq_256: // llvm.x86.avx.storeu.dq.256
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v32i8);
break;
case Intrinsic::x86_sse_storeu_ps: // llvm.x86.sse.storeu.ps
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4f32);
break;
case Intrinsic::x86_avx_maskstore_ps: // llvm.x86.avx.maskstore.ps
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v4f32, MVT::v4f32);
break;
case Intrinsic::x86_avx_movnt_pd_256: // llvm.x86.avx.movnt.pd.256
case Intrinsic::x86_avx_storeu_pd_256: // llvm.x86.avx.storeu.pd.256
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4f64);
break;
case Intrinsic::x86_avx_maskstore_pd_256: // llvm.x86.avx.maskstore.pd.256
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v4f64, MVT::v4f64);
break;
case Intrinsic::x86_sse2_storel_dq: // llvm.x86.sse2.storel.dq
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4i32);
break;
case Intrinsic::x86_avx2_maskstore_d: // llvm.x86.avx2.maskstore.d
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v4i32, MVT::v4i32);
break;
case Intrinsic::x86_avx_movnt_dq_256: // llvm.x86.avx.movnt.dq.256
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4i64);
break;
case Intrinsic::x86_avx2_maskstore_q_256: // llvm.x86.avx2.maskstore.q.256
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v4i64, MVT::v4i64);
break;
case Intrinsic::x86_avx_movnt_ps_256: // llvm.x86.avx.movnt.ps.256
case Intrinsic::x86_avx_storeu_ps_256: // llvm.x86.avx.storeu.ps.256
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v8f32);
break;
case Intrinsic::x86_avx_maskstore_ps_256: // llvm.x86.avx.maskstore.ps.256
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v8f32, MVT::v8f32);
break;
case Intrinsic::x86_avx2_maskstore_d_256: // llvm.x86.avx2.maskstore.d.256
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v8i32, MVT::v8i32);
break;
case Intrinsic::gcroot: // llvm.gcroot
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::iPTR);
break;
case Intrinsic::x86_mmx_movnt_dq: // llvm.x86.mmx.movnt.dq
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::x86mmx);
break;
case Intrinsic::ppc_altivec_stvebx: // llvm.ppc.altivec.stvebx
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::v16i8, MVT::iPTR);
break;
case Intrinsic::x86_sse2_maskmov_dqu: // llvm.x86.sse2.maskmov.dqu
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::v16i8, MVT::v16i8, MVT::iPTR);
break;
case Intrinsic::ppc_altivec_mtvscr: // llvm.ppc.altivec.mtvscr
VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::v4i32);
break;
case Intrinsic::ppc_altivec_stvewx: // llvm.ppc.altivec.stvewx
case Intrinsic::ppc_altivec_stvx: // llvm.ppc.altivec.stvx
case Intrinsic::ppc_altivec_stvxl: // llvm.ppc.altivec.stvxl
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::v4i32, MVT::iPTR);
break;
case Intrinsic::ppc_altivec_stvehx: // llvm.ppc.altivec.stvehx
VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::v8i16, MVT::iPTR);
break;
case Intrinsic::x86_mmx_maskmovq: // llvm.x86.mmx.maskmovq
VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::x86mmx, MVT::x86mmx, MVT::iPTR);
break;
case Intrinsic::ptr_annotation: // llvm.ptr.annotation
VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::iPTRAny, ~0, MVT::iPTR, MVT::iPTR, MVT::i32);
break;
case Intrinsic::sin: // llvm.sin
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
break;
case Intrinsic::cos: // llvm.cos
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
break;
case Intrinsic::pow: // llvm.pow
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, ~0, ~0);
break;
case Intrinsic::log: // llvm.log
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
break;
case Intrinsic::log10: // llvm.log10
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
break;
case Intrinsic::log2: // llvm.log2
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
break;
case Intrinsic::exp: // llvm.exp
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
break;
case Intrinsic::exp2: // llvm.exp2
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
break;
case Intrinsic::fma: // llvm.fma
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::fAny, ~0, ~0, ~0);
break;
case Intrinsic::sqrt: // llvm.sqrt
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
break;
case Intrinsic::powi: // llvm.powi
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, ~0, MVT::i32);
break;
case Intrinsic::convertff: // llvm.convertff
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::fAny, MVT::fAny, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_neon_vcvtfxs2fp: // llvm.arm.neon.vcvtfxs2fp
case Intrinsic::arm_neon_vcvtfxu2fp: // llvm.arm.neon.vcvtfxu2fp
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, MVT::iAny, MVT::i32);
break;
case Intrinsic::convertfsi: // llvm.convertfsi
case Intrinsic::convertfui: // llvm.convertfui
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::fAny, MVT::iAny, MVT::i32, MVT::i32);
break;
case Intrinsic::expect: // llvm.expect
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, ~0, ~0);
break;
case Intrinsic::bswap: // llvm.bswap
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
break;
case Intrinsic::ctpop: // llvm.ctpop
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
break;
case Intrinsic::ctlz: // llvm.ctlz
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, ~0, MVT::i1);
break;
case Intrinsic::cttz: // llvm.cttz
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, ~0, MVT::i1);
break;
case Intrinsic::annotation: // llvm.annotation
VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::iAny, ~0, MVT::iPTR, MVT::iPTR, MVT::i32);
break;
case Intrinsic::arm_neon_vcvtfp2fxs: // llvm.arm.neon.vcvtfp2fxs
case Intrinsic::arm_neon_vcvtfp2fxu: // llvm.arm.neon.vcvtfp2fxu
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::fAny, MVT::i32);
break;
case Intrinsic::convertsif: // llvm.convertsif
case Intrinsic::convertuif: // llvm.convertuif
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::fAny, MVT::i32, MVT::i32);
break;
case Intrinsic::convertss: // llvm.convertss
case Intrinsic::convertsu: // llvm.convertsu
case Intrinsic::convertus: // llvm.convertus
case Intrinsic::convertuu: // llvm.convertuu
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::iAny, MVT::i32, MVT::i32);
break;
case Intrinsic::objectsize: // llvm.objectsize
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTR, MVT::i1);
break;
case Intrinsic::sadd_with_overflow: // llvm.sadd.with.overflow
VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
break;
case Intrinsic::uadd_with_overflow: // llvm.uadd.with.overflow
VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
break;
case Intrinsic::ssub_with_overflow: // llvm.ssub.with.overflow
VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
break;
case Intrinsic::usub_with_overflow: // llvm.usub.with.overflow
VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
break;
case Intrinsic::smul_with_overflow: // llvm.smul.with.overflow
VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
break;
case Intrinsic::umul_with_overflow: // llvm.umul.with.overflow
VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
break;
case Intrinsic::xcore_getst: // llvm.xcore.getst
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iPTRAny, MVT::iPTRAny);
break;
case Intrinsic::xcore_getr: // llvm.xcore.getr
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iPTRAny, MVT::i32);
break;
case Intrinsic::arm_neon_vabs: // llvm.arm.neon.vabs
case Intrinsic::arm_neon_vcls: // llvm.arm.neon.vcls
case Intrinsic::arm_neon_vclz: // llvm.arm.neon.vclz
case Intrinsic::arm_neon_vcnt: // llvm.arm.neon.vcnt
case Intrinsic::arm_neon_vqabs: // llvm.arm.neon.vqabs
case Intrinsic::arm_neon_vqneg: // llvm.arm.neon.vqneg
case Intrinsic::arm_neon_vrecpe: // llvm.arm.neon.vrecpe
case Intrinsic::arm_neon_vrsqrte: // llvm.arm.neon.vrsqrte
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, ~0);
break;
case Intrinsic::arm_neon_vqmovns: // llvm.arm.neon.vqmovns
case Intrinsic::arm_neon_vqmovnsu: // llvm.arm.neon.vqmovnsu
case Intrinsic::arm_neon_vqmovnu: // llvm.arm.neon.vqmovnu
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, ~(ExtendedElementVectorType | 0));
break;
case Intrinsic::arm_neon_vabds: // llvm.arm.neon.vabds
case Intrinsic::arm_neon_vabdu: // llvm.arm.neon.vabdu
case Intrinsic::arm_neon_vhadds: // llvm.arm.neon.vhadds
case Intrinsic::arm_neon_vhaddu: // llvm.arm.neon.vhaddu
case Intrinsic::arm_neon_vhsubs: // llvm.arm.neon.vhsubs
case Intrinsic::arm_neon_vhsubu: // llvm.arm.neon.vhsubu
case Intrinsic::arm_neon_vmaxs: // llvm.arm.neon.vmaxs
case Intrinsic::arm_neon_vmaxu: // llvm.arm.neon.vmaxu
case Intrinsic::arm_neon_vmins: // llvm.arm.neon.vmins
case Intrinsic::arm_neon_vminu: // llvm.arm.neon.vminu
case Intrinsic::arm_neon_vmulp: // llvm.arm.neon.vmulp
case Intrinsic::arm_neon_vpadd: // llvm.arm.neon.vpadd
case Intrinsic::arm_neon_vpmaxs: // llvm.arm.neon.vpmaxs
case Intrinsic::arm_neon_vpmaxu: // llvm.arm.neon.vpmaxu
case Intrinsic::arm_neon_vpmins: // llvm.arm.neon.vpmins
case Intrinsic::arm_neon_vpminu: // llvm.arm.neon.vpminu
case Intrinsic::arm_neon_vqadds: // llvm.arm.neon.vqadds
case Intrinsic::arm_neon_vqaddu: // llvm.arm.neon.vqaddu
case Intrinsic::arm_neon_vqdmulh: // llvm.arm.neon.vqdmulh
case Intrinsic::arm_neon_vqrdmulh: // llvm.arm.neon.vqrdmulh
case Intrinsic::arm_neon_vqrshifts: // llvm.arm.neon.vqrshifts
case Intrinsic::arm_neon_vqrshiftu: // llvm.arm.neon.vqrshiftu
case Intrinsic::arm_neon_vqshifts: // llvm.arm.neon.vqshifts
case Intrinsic::arm_neon_vqshiftsu: // llvm.arm.neon.vqshiftsu
case Intrinsic::arm_neon_vqshiftu: // llvm.arm.neon.vqshiftu
case Intrinsic::arm_neon_vqsubs: // llvm.arm.neon.vqsubs
case Intrinsic::arm_neon_vqsubu: // llvm.arm.neon.vqsubu
case Intrinsic::arm_neon_vrecps: // llvm.arm.neon.vrecps
case Intrinsic::arm_neon_vrhadds: // llvm.arm.neon.vrhadds
case Intrinsic::arm_neon_vrhaddu: // llvm.arm.neon.vrhaddu
case Intrinsic::arm_neon_vrshifts: // llvm.arm.neon.vrshifts
case Intrinsic::arm_neon_vrshiftu: // llvm.arm.neon.vrshiftu
case Intrinsic::arm_neon_vrsqrts: // llvm.arm.neon.vrsqrts
case Intrinsic::arm_neon_vshifts: // llvm.arm.neon.vshifts
case Intrinsic::arm_neon_vshiftu: // llvm.arm.neon.vshiftu
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, ~0);
break;
case Intrinsic::arm_neon_vaddhn: // llvm.arm.neon.vaddhn
case Intrinsic::arm_neon_vqrshiftns: // llvm.arm.neon.vqrshiftns
case Intrinsic::arm_neon_vqrshiftnsu: // llvm.arm.neon.vqrshiftnsu
case Intrinsic::arm_neon_vqrshiftnu: // llvm.arm.neon.vqrshiftnu
case Intrinsic::arm_neon_vqshiftns: // llvm.arm.neon.vqshiftns
case Intrinsic::arm_neon_vqshiftnsu: // llvm.arm.neon.vqshiftnsu
case Intrinsic::arm_neon_vqshiftnu: // llvm.arm.neon.vqshiftnu
case Intrinsic::arm_neon_vraddhn: // llvm.arm.neon.vraddhn
case Intrinsic::arm_neon_vrshiftn: // llvm.arm.neon.vrshiftn
case Intrinsic::arm_neon_vrsubhn: // llvm.arm.neon.vrsubhn
case Intrinsic::arm_neon_vshiftn: // llvm.arm.neon.vshiftn
case Intrinsic::arm_neon_vsubhn: // llvm.arm.neon.vsubhn
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~(ExtendedElementVectorType | 0), ~(ExtendedElementVectorType | 0));
break;
case Intrinsic::arm_neon_vmullp: // llvm.arm.neon.vmullp
case Intrinsic::arm_neon_vmulls: // llvm.arm.neon.vmulls
case Intrinsic::arm_neon_vmullu: // llvm.arm.neon.vmullu
case Intrinsic::arm_neon_vqdmull: // llvm.arm.neon.vqdmull
case Intrinsic::arm_neon_vshiftls: // llvm.arm.neon.vshiftls
case Intrinsic::arm_neon_vshiftlu: // llvm.arm.neon.vshiftlu
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~(TruncatedElementVectorType | 0), ~(TruncatedElementVectorType | 0));
break;
case Intrinsic::arm_neon_vshiftins: // llvm.arm.neon.vshiftins
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::vAny, ~0, ~0, ~0);
break;
case Intrinsic::arm_neon_vqdmlal: // llvm.arm.neon.vqdmlal
case Intrinsic::arm_neon_vqdmlsl: // llvm.arm.neon.vqdmlsl
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::vAny, ~0, ~(TruncatedElementVectorType | 0), ~(TruncatedElementVectorType | 0));
break;
case Intrinsic::arm_neon_vpadals: // llvm.arm.neon.vpadals
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, MVT::vAny);
break;
case Intrinsic::arm_neon_vpadalu: // llvm.arm.neon.vpadalu
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, MVT::vAny);
break;
case Intrinsic::arm_neon_vpaddls: // llvm.arm.neon.vpaddls
case Intrinsic::arm_neon_vpaddlu: // llvm.arm.neon.vpaddlu
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, MVT::vAny);
break;
case Intrinsic::arm_neon_vld1: // llvm.arm.neon.vld1
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, MVT::iPTR, MVT::i32);
break;
case Intrinsic::arm_neon_vld2: // llvm.arm.neon.vld2
VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::vAny, ~0, MVT::iPTR, MVT::i32);
break;
case Intrinsic::arm_neon_vld3: // llvm.arm.neon.vld3
VerifyIntrinsicPrototype(ID, IF, 3, 2, MVT::vAny, ~0, ~0, MVT::iPTR, MVT::i32);
break;
case Intrinsic::arm_neon_vld4: // llvm.arm.neon.vld4
VerifyIntrinsicPrototype(ID, IF, 4, 2, MVT::vAny, ~0, ~0, ~0, MVT::iPTR, MVT::i32);
break;
case Intrinsic::arm_neon_vld2lane: // llvm.arm.neon.vld2lane
VerifyIntrinsicPrototype(ID, IF, 2, 5, MVT::vAny, ~0, MVT::iPTR, ~0, ~0, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_neon_vld3lane: // llvm.arm.neon.vld3lane
VerifyIntrinsicPrototype(ID, IF, 3, 6, MVT::vAny, ~0, ~0, MVT::iPTR, ~0, ~0, ~0, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_neon_vld4lane: // llvm.arm.neon.vld4lane
VerifyIntrinsicPrototype(ID, IF, 4, 7, MVT::vAny, ~0, ~0, ~0, MVT::iPTR, ~0, ~0, ~0, ~0, MVT::i32, MVT::i32);
break;
case Intrinsic::MeasX: // llvm.MeasX
case Intrinsic::MeasZ: // llvm.MeasZ
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i1, MVT::iAny);
break;
case Intrinsic::invariant_start: // llvm.invariant.start
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iPTR, MVT::i64, MVT::iPTR);
break;
case Intrinsic::arm_vcvtr: // llvm.arm.vcvtr
case Intrinsic::arm_vcvtru: // llvm.arm.vcvtru
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::f32, MVT::fAny);
break;
case Intrinsic::convert_from_fp16: // llvm.convert.from.fp16
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::f32, MVT::i16);
break;
case Intrinsic::convert_to_fp16: // llvm.convert.to.fp16
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i16, MVT::f32);
break;
case Intrinsic::hexagon_C2_all8: // llvm.hexagon.C2.all8
case Intrinsic::hexagon_C2_any8: // llvm.hexagon.C2.any8
case Intrinsic::hexagon_C2_not: // llvm.hexagon.C2.not
case Intrinsic::hexagon_C2_pxfer_map: // llvm.hexagon.C2.pxfer.map
case Intrinsic::hexagon_C2_tfrrp: // llvm.hexagon.C2.tfrrp
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i1, MVT::i32);
break;
case Intrinsic::hexagon_C2_and: // llvm.hexagon.C2.and
case Intrinsic::hexagon_C2_andn: // llvm.hexagon.C2.andn
case Intrinsic::hexagon_C2_bitsclr: // llvm.hexagon.C2.bitsclr
case Intrinsic::hexagon_C2_bitsclri: // llvm.hexagon.C2.bitsclri
case Intrinsic::hexagon_C2_bitsset: // llvm.hexagon.C2.bitsset
case Intrinsic::hexagon_C2_cmpeq: // llvm.hexagon.C2.cmpeq
case Intrinsic::hexagon_C2_cmpeqi: // llvm.hexagon.C2.cmpeqi
case Intrinsic::hexagon_C2_cmpgei: // llvm.hexagon.C2.cmpgei
case Intrinsic::hexagon_C2_cmpgeui: // llvm.hexagon.C2.cmpgeui
case Intrinsic::hexagon_C2_cmpgt: // llvm.hexagon.C2.cmpgt
case Intrinsic::hexagon_C2_cmpgti: // llvm.hexagon.C2.cmpgti
case Intrinsic::hexagon_C2_cmpgtu: // llvm.hexagon.C2.cmpgtu
case Intrinsic::hexagon_C2_cmpgtui: // llvm.hexagon.C2.cmpgtui
case Intrinsic::hexagon_C2_cmplt: // llvm.hexagon.C2.cmplt
case Intrinsic::hexagon_C2_cmpltu: // llvm.hexagon.C2.cmpltu
case Intrinsic::hexagon_C2_or: // llvm.hexagon.C2.or
case Intrinsic::hexagon_C2_orn: // llvm.hexagon.C2.orn
case Intrinsic::hexagon_C2_xor: // llvm.hexagon.C2.xor
case Intrinsic::hexagon_C4_cmplte: // llvm.hexagon.C4.cmplte
case Intrinsic::hexagon_C4_cmpltei: // llvm.hexagon.C4.cmpltei
case Intrinsic::hexagon_C4_cmplteu: // llvm.hexagon.C4.cmplteu
case Intrinsic::hexagon_C4_cmplteui: // llvm.hexagon.C4.cmplteui
case Intrinsic::hexagon_C4_cmpneq: // llvm.hexagon.C4.cmpneq
case Intrinsic::hexagon_C4_cmpneqi: // llvm.hexagon.C4.cmpneqi
case Intrinsic::hexagon_C4_fastcorner9: // llvm.hexagon.C4.fastcorner9
case Intrinsic::hexagon_C4_fastcorner9_not: // llvm.hexagon.C4.fastcorner9.not
case Intrinsic::hexagon_S2_tstbit_i: // llvm.hexagon.S2.tstbit.i
case Intrinsic::hexagon_S2_tstbit_r: // llvm.hexagon.S2.tstbit.r
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i1, MVT::i32, MVT::i32);
break;
case Intrinsic::hexagon_C4_and_and: // llvm.hexagon.C4.and.and
case Intrinsic::hexagon_C4_and_andn: // llvm.hexagon.C4.and.andn
case Intrinsic::hexagon_C4_and_or: // llvm.hexagon.C4.and.or
case Intrinsic::hexagon_C4_and_orn: // llvm.hexagon.C4.and.orn
case Intrinsic::hexagon_C4_or_and: // llvm.hexagon.C4.or.and
case Intrinsic::hexagon_C4_or_andn: // llvm.hexagon.C4.or.andn
case Intrinsic::hexagon_C4_or_or: // llvm.hexagon.C4.or.or
case Intrinsic::hexagon_C4_or_orn: // llvm.hexagon.C4.or.orn
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i1, MVT::i32, MVT::i32, MVT::i32);
break;
case Intrinsic::hexagon_A2_vcmpbeq: // llvm.hexagon.A2.vcmpbeq
case Intrinsic::hexagon_A2_vcmpbgtu: // llvm.hexagon.A2.vcmpbgtu
case Intrinsic::hexagon_A2_vcmpheq: // llvm.hexagon.A2.vcmpheq
case Intrinsic::hexagon_A2_vcmphgt: // llvm.hexagon.A2.vcmphgt
case Intrinsic::hexagon_A2_vcmphgtu: // llvm.hexagon.A2.vcmphgtu
case Intrinsic::hexagon_A2_vcmpweq: // llvm.hexagon.A2.vcmpweq
case Intrinsic::hexagon_A2_vcmpwgt: // llvm.hexagon.A2.vcmpwgt
case Intrinsic::hexagon_A2_vcmpwgtu: // llvm.hexagon.A2.vcmpwgtu
case Intrinsic::hexagon_C2_cmpeqp: // llvm.hexagon.C2.cmpeqp
case Intrinsic::hexagon_C2_cmpgtp: // llvm.hexagon.C2.cmpgtp
case Intrinsic::hexagon_C2_cmpgtup: // llvm.hexagon.C2.cmpgtup
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i1, MVT::i64, MVT::i64);
break;
case Intrinsic::arm_get_fpscr: // llvm.arm.get.fpscr
case Intrinsic::flt_rounds: // llvm.flt.rounds
case Intrinsic::ptx_read_clock: // llvm.ptx.read.clock
case Intrinsic::ptx_read_ctaid_w: // llvm.ptx.read.ctaid.w
case Intrinsic::ptx_read_ctaid_x: // llvm.ptx.read.ctaid.x
case Intrinsic::ptx_read_ctaid_y: // llvm.ptx.read.ctaid.y
case Intrinsic::ptx_read_ctaid_z: // llvm.ptx.read.ctaid.z
case Intrinsic::ptx_read_gridid: // llvm.ptx.read.gridid
case Intrinsic::ptx_read_laneid: // llvm.ptx.read.laneid
case Intrinsic::ptx_read_lanemask_eq: // llvm.ptx.read.lanemask.eq
case Intrinsic::ptx_read_lanemask_ge: // llvm.ptx.read.lanemask.ge
case Intrinsic::ptx_read_lanemask_gt: // llvm.ptx.read.lanemask.gt
case Intrinsic::ptx_read_lanemask_le: // llvm.ptx.read.lanemask.le
case Intrinsic::ptx_read_lanemask_lt: // llvm.ptx.read.lanemask.lt
case Intrinsic::ptx_read_nctaid_w: // llvm.ptx.read.nctaid.w
case Intrinsic::ptx_read_nctaid_x: // llvm.ptx.read.nctaid.x
case Intrinsic::ptx_read_nctaid_y: // llvm.ptx.read.nctaid.y
case Intrinsic::ptx_read_nctaid_z: // llvm.ptx.read.nctaid.z
case Intrinsic::ptx_read_nsmid: // llvm.ptx.read.nsmid
case Intrinsic::ptx_read_ntid_w: // llvm.ptx.read.ntid.w
case Intrinsic::ptx_read_ntid_x: // llvm.ptx.read.ntid.x
case Intrinsic::ptx_read_ntid_y: // llvm.ptx.read.ntid.y
case Intrinsic::ptx_read_ntid_z: // llvm.ptx.read.ntid.z
case Intrinsic::ptx_read_nwarpid: // llvm.ptx.read.nwarpid
case Intrinsic::ptx_read_pm0: // llvm.ptx.read.pm0
case Intrinsic::ptx_read_pm1: // llvm.ptx.read.pm1
case Intrinsic::ptx_read_pm2: // llvm.ptx.read.pm2
case Intrinsic::ptx_read_pm3: // llvm.ptx.read.pm3
case Intrinsic::ptx_read_smid: // llvm.ptx.read.smid
case Intrinsic::ptx_read_tid_w: // llvm.ptx.read.tid.w
case Intrinsic::ptx_read_tid_x: // llvm.ptx.read.tid.x
case Intrinsic::ptx_read_tid_y: // llvm.ptx.read.tid.y
case Intrinsic::ptx_read_tid_z: // llvm.ptx.read.tid.z
case Intrinsic::ptx_read_warpid: // llvm.ptx.read.warpid
case Intrinsic::x86_rdfsbase_32: // llvm.x86.rdfsbase.32
case Intrinsic::x86_rdgsbase_32: // llvm.x86.rdgsbase.32
case Intrinsic::xcore_geted: // llvm.xcore.geted
case Intrinsic::xcore_getet: // llvm.xcore.getet
case Intrinsic::xcore_getid: // llvm.xcore.getid
VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::i32);
break;
case Intrinsic::xcore_endin: // llvm.xcore.endin
case Intrinsic::xcore_getts: // llvm.xcore.getts
case Intrinsic::xcore_in: // llvm.xcore.in
case Intrinsic::xcore_inct: // llvm.xcore.inct
case Intrinsic::xcore_int: // llvm.xcore.int
case Intrinsic::xcore_peek: // llvm.xcore.peek
case Intrinsic::xcore_testct: // llvm.xcore.testct
case Intrinsic::xcore_testwct: // llvm.xcore.testwct
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::iPTRAny);
break;
case Intrinsic::xcore_inshr: // llvm.xcore.inshr
case Intrinsic::xcore_outshr: // llvm.xcore.outshr
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::iPTRAny, MVT::i32);
break;
case Intrinsic::hexagon_A2_abs: // llvm.hexagon.A2.abs
case Intrinsic::hexagon_A2_abssat: // llvm.hexagon.A2.abssat
case Intrinsic::hexagon_A2_aslh: // llvm.hexagon.A2.aslh
case Intrinsic::hexagon_A2_asrh: // llvm.hexagon.A2.asrh
case Intrinsic::hexagon_A2_neg: // llvm.hexagon.A2.neg
case Intrinsic::hexagon_A2_negsat: // llvm.hexagon.A2.negsat
case Intrinsic::hexagon_A2_not: // llvm.hexagon.A2.not
case Intrinsic::hexagon_A2_satb: // llvm.hexagon.A2.satb
case Intrinsic::hexagon_A2_sath: // llvm.hexagon.A2.sath
case Intrinsic::hexagon_A2_satub: // llvm.hexagon.A2.satub
case Intrinsic::hexagon_A2_satuh: // llvm.hexagon.A2.satuh
case Intrinsic::hexagon_A2_swiz: // llvm.hexagon.A2.swiz
case Intrinsic::hexagon_A2_sxtb: // llvm.hexagon.A2.sxtb
case Intrinsic::hexagon_A2_sxth: // llvm.hexagon.A2.sxth
case Intrinsic::hexagon_A2_tfr: // llvm.hexagon.A2.tfr
case Intrinsic::hexagon_A2_tfrsi: // llvm.hexagon.A2.tfrsi
case Intrinsic::hexagon_A2_zxtb: // llvm.hexagon.A2.zxtb
case Intrinsic::hexagon_A2_zxth: // llvm.hexagon.A2.zxth
case Intrinsic::hexagon_C2_tfrpr: // llvm.hexagon.C2.tfrpr
case Intrinsic::hexagon_S2_brev: // llvm.hexagon.S2.brev
case Intrinsic::hexagon_S2_cl0: // llvm.hexagon.S2.cl0
case Intrinsic::hexagon_S2_cl1: // llvm.hexagon.S2.cl1
case Intrinsic::hexagon_S2_clb: // llvm.hexagon.S2.clb
case Intrinsic::hexagon_S2_clbnorm: // llvm.hexagon.S2.clbnorm
case Intrinsic::hexagon_S2_ct0: // llvm.hexagon.S2.ct0
case Intrinsic::hexagon_S2_ct1: // llvm.hexagon.S2.ct1
case Intrinsic::hexagon_S2_svsathb: // llvm.hexagon.S2.svsathb
case Intrinsic::hexagon_S2_svsathub: // llvm.hexagon.S2.svsathub
case Intrinsic::hexagon_S2_vsplatrb: // llvm.hexagon.S2.vsplatrb
case Intrinsic::hexagon_SI_to_SXTHI_asrh: // llvm.hexagon.SI.to.SXTHI.asrh
case Intrinsic::xcore_bitrev: // llvm.xcore.bitrev
case Intrinsic::xcore_getps: // llvm.xcore.getps
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::i32);
break;
case Intrinsic::x86_sse42_crc32_32_16: // llvm.x86.sse42.crc32.32.16
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i16);
break;
case Intrinsic::arm_qadd: // llvm.arm.qadd
case Intrinsic::arm_qsub: // llvm.arm.qsub
case Intrinsic::arm_ssat: // llvm.arm.ssat
case Intrinsic::arm_usat: // llvm.arm.usat
case Intrinsic::hexagon_A2_add: // llvm.hexagon.A2.add
case Intrinsic::hexagon_A2_addh_h16_hh: // llvm.hexagon.A2.addh.h16.hh
case Intrinsic::hexagon_A2_addh_h16_hl: // llvm.hexagon.A2.addh.h16.hl
case Intrinsic::hexagon_A2_addh_h16_lh: // llvm.hexagon.A2.addh.h16.lh
case Intrinsic::hexagon_A2_addh_h16_ll: // llvm.hexagon.A2.addh.h16.ll
case Intrinsic::hexagon_A2_addh_h16_sat_hh: // llvm.hexagon.A2.addh.h16.sat.hh
case Intrinsic::hexagon_A2_addh_h16_sat_hl: // llvm.hexagon.A2.addh.h16.sat.hl
case Intrinsic::hexagon_A2_addh_h16_sat_lh: // llvm.hexagon.A2.addh.h16.sat.lh
case Intrinsic::hexagon_A2_addh_h16_sat_ll: // llvm.hexagon.A2.addh.h16.sat.ll
case Intrinsic::hexagon_A2_addh_l16_hh: // llvm.hexagon.A2.addh.l16.hh
case Intrinsic::hexagon_A2_addh_l16_hl: // llvm.hexagon.A2.addh.l16.hl
case Intrinsic::hexagon_A2_addh_l16_lh: // llvm.hexagon.A2.addh.l16.lh
case Intrinsic::hexagon_A2_addh_l16_ll: // llvm.hexagon.A2.addh.l16.ll
case Intrinsic::hexagon_A2_addh_l16_sat_hh: // llvm.hexagon.A2.addh.l16.sat.hh
case Intrinsic::hexagon_A2_addh_l16_sat_hl: // llvm.hexagon.A2.addh.l16.sat.hl
case Intrinsic::hexagon_A2_addh_l16_sat_lh: // llvm.hexagon.A2.addh.l16.sat.lh
case Intrinsic::hexagon_A2_addh_l16_sat_ll: // llvm.hexagon.A2.addh.l16.sat.ll
case Intrinsic::hexagon_A2_addi: // llvm.hexagon.A2.addi
case Intrinsic::hexagon_A2_addsat: // llvm.hexagon.A2.addsat
case Intrinsic::hexagon_A2_and: // llvm.hexagon.A2.and
case Intrinsic::hexagon_A2_andir: // llvm.hexagon.A2.andir
case Intrinsic::hexagon_A2_combine_hh: // llvm.hexagon.A2.combine.hh
case Intrinsic::hexagon_A2_combine_hl: // llvm.hexagon.A2.combine.hl
case Intrinsic::hexagon_A2_combine_lh: // llvm.hexagon.A2.combine.lh
case Intrinsic::hexagon_A2_combine_ll: // llvm.hexagon.A2.combine.ll
case Intrinsic::hexagon_A2_max: // llvm.hexagon.A2.max
case Intrinsic::hexagon_A2_maxu: // llvm.hexagon.A2.maxu
case Intrinsic::hexagon_A2_min: // llvm.hexagon.A2.min
case Intrinsic::hexagon_A2_minu: // llvm.hexagon.A2.minu
case Intrinsic::hexagon_A2_or: // llvm.hexagon.A2.or
case Intrinsic::hexagon_A2_orir: // llvm.hexagon.A2.orir
case Intrinsic::hexagon_A2_sub: // llvm.hexagon.A2.sub
case Intrinsic::hexagon_A2_subh_h16_hh: // llvm.hexagon.A2.subh.h16.hh
case Intrinsic::hexagon_A2_subh_h16_hl: // llvm.hexagon.A2.subh.h16.hl
case Intrinsic::hexagon_A2_subh_h16_lh: // llvm.hexagon.A2.subh.h16.lh
case Intrinsic::hexagon_A2_subh_h16_ll: // llvm.hexagon.A2.subh.h16.ll
case Intrinsic::hexagon_A2_subh_h16_sat_hh: // llvm.hexagon.A2.subh.h16.sat.hh
case Intrinsic::hexagon_A2_subh_h16_sat_hl: // llvm.hexagon.A2.subh.h16.sat.hl
case Intrinsic::hexagon_A2_subh_h16_sat_lh: // llvm.hexagon.A2.subh.h16.sat.lh
case Intrinsic::hexagon_A2_subh_h16_sat_ll: // llvm.hexagon.A2.subh.h16.sat.ll
case Intrinsic::hexagon_A2_subh_l16_hl: // llvm.hexagon.A2.subh.l16.hl
case Intrinsic::hexagon_A2_subh_l16_ll: // llvm.hexagon.A2.subh.l16.ll
case Intrinsic::hexagon_A2_subh_l16_sat_hl: // llvm.hexagon.A2.subh.l16.sat.hl
case Intrinsic::hexagon_A2_subh_l16_sat_ll: // llvm.hexagon.A2.subh.l16.sat.ll
case Intrinsic::hexagon_A2_subri: // llvm.hexagon.A2.subri
case Intrinsic::hexagon_A2_subsat: // llvm.hexagon.A2.subsat
case Intrinsic::hexagon_A2_svaddh: // llvm.hexagon.A2.svaddh
case Intrinsic::hexagon_A2_svaddhs: // llvm.hexagon.A2.svaddhs
case Intrinsic::hexagon_A2_svadduhs: // llvm.hexagon.A2.svadduhs
case Intrinsic::hexagon_A2_svavgh: // llvm.hexagon.A2.svavgh
case Intrinsic::hexagon_A2_svavghs: // llvm.hexagon.A2.svavghs
case Intrinsic::hexagon_A2_svnavgh: // llvm.hexagon.A2.svnavgh
case Intrinsic::hexagon_A2_svsubh: // llvm.hexagon.A2.svsubh
case Intrinsic::hexagon_A2_svsubhs: // llvm.hexagon.A2.svsubhs
case Intrinsic::hexagon_A2_svsubuhs: // llvm.hexagon.A2.svsubuhs
case Intrinsic::hexagon_A2_tfrih: // llvm.hexagon.A2.tfrih
case Intrinsic::hexagon_A2_tfril: // llvm.hexagon.A2.tfril
case Intrinsic::hexagon_A2_xor: // llvm.hexagon.A2.xor
case Intrinsic::hexagon_A4_andn: // llvm.hexagon.A4.andn
case Intrinsic::hexagon_A4_cround_ri: // llvm.hexagon.A4.cround.ri
case Intrinsic::hexagon_A4_cround_rr: // llvm.hexagon.A4.cround.rr
case Intrinsic::hexagon_A4_modwrapu: // llvm.hexagon.A4.modwrapu
case Intrinsic::hexagon_A4_orn: // llvm.hexagon.A4.orn
case Intrinsic::hexagon_A4_rcmpeq: // llvm.hexagon.A4.rcmpeq
case Intrinsic::hexagon_A4_rcmpeqi: // llvm.hexagon.A4.rcmpeqi
case Intrinsic::hexagon_A4_rcmpneq: // llvm.hexagon.A4.rcmpneq
case Intrinsic::hexagon_A4_rcmpneqi: // llvm.hexagon.A4.rcmpneqi
case Intrinsic::hexagon_A4_round_ri: // llvm.hexagon.A4.round.ri
case Intrinsic::hexagon_A4_round_ri_sat: // llvm.hexagon.A4.round.ri.sat
case Intrinsic::hexagon_A4_round_rr: // llvm.hexagon.A4.round.rr
case Intrinsic::hexagon_A4_round_rr_sat: // llvm.hexagon.A4.round.rr.sat
case Intrinsic::hexagon_C2_vitpack: // llvm.hexagon.C2.vitpack
case Intrinsic::hexagon_M2_cmpyrs_s0: // llvm.hexagon.M2.cmpyrs.s0
case Intrinsic::hexagon_M2_cmpyrs_s1: // llvm.hexagon.M2.cmpyrs.s1
case Intrinsic::hexagon_M2_cmpyrsc_s0: // llvm.hexagon.M2.cmpyrsc.s0
case Intrinsic::hexagon_M2_cmpyrsc_s1: // llvm.hexagon.M2.cmpyrsc.s1
case Intrinsic::hexagon_M2_dpmpyss_rnd_s0: // llvm.hexagon.M2.dpmpyss.rnd.s0
case Intrinsic::hexagon_M2_hmmpyh_rs1: // llvm.hexagon.M2.hmmpyh.rs1
case Intrinsic::hexagon_M2_hmmpyl_rs1: // llvm.hexagon.M2.hmmpyl.rs1
case Intrinsic::hexagon_M2_mpy_hh_s0: // llvm.hexagon.M2.mpy.hh.s0
case Intrinsic::hexagon_M2_mpy_hh_s1: // llvm.hexagon.M2.mpy.hh.s1
case Intrinsic::hexagon_M2_mpy_hl_s0: // llvm.hexagon.M2.mpy.hl.s0
case Intrinsic::hexagon_M2_mpy_hl_s1: // llvm.hexagon.M2.mpy.hl.s1
case Intrinsic::hexagon_M2_mpy_lh_s0: // llvm.hexagon.M2.mpy.lh.s0
case Intrinsic::hexagon_M2_mpy_lh_s1: // llvm.hexagon.M2.mpy.lh.s1
case Intrinsic::hexagon_M2_mpy_ll_s0: // llvm.hexagon.M2.mpy.ll.s0
case Intrinsic::hexagon_M2_mpy_ll_s1: // llvm.hexagon.M2.mpy.ll.s1
case Intrinsic::hexagon_M2_mpy_rnd_hh_s0: // llvm.hexagon.M2.mpy.rnd.hh.s0
case Intrinsic::hexagon_M2_mpy_rnd_hh_s1: // llvm.hexagon.M2.mpy.rnd.hh.s1
case Intrinsic::hexagon_M2_mpy_rnd_hl_s0: // llvm.hexagon.M2.mpy.rnd.hl.s0
case Intrinsic::hexagon_M2_mpy_rnd_hl_s1: // llvm.hexagon.M2.mpy.rnd.hl.s1
case Intrinsic::hexagon_M2_mpy_rnd_lh_s0: // llvm.hexagon.M2.mpy.rnd.lh.s0
case Intrinsic::hexagon_M2_mpy_rnd_lh_s1: // llvm.hexagon.M2.mpy.rnd.lh.s1
case Intrinsic::hexagon_M2_mpy_rnd_ll_s0: // llvm.hexagon.M2.mpy.rnd.ll.s0
case Intrinsic::hexagon_M2_mpy_rnd_ll_s1: // llvm.hexagon.M2.mpy.rnd.ll.s1
case Intrinsic::hexagon_M2_mpy_sat_hh_s0: // llvm.hexagon.M2.mpy.sat.hh.s0
case Intrinsic::hexagon_M2_mpy_sat_hh_s1: // llvm.hexagon.M2.mpy.sat.hh.s1
case Intrinsic::hexagon_M2_mpy_sat_hl_s0: // llvm.hexagon.M2.mpy.sat.hl.s0
case Intrinsic::hexagon_M2_mpy_sat_hl_s1: // llvm.hexagon.M2.mpy.sat.hl.s1
case Intrinsic::hexagon_M2_mpy_sat_lh_s0: // llvm.hexagon.M2.mpy.sat.lh.s0
case Intrinsic::hexagon_M2_mpy_sat_lh_s1: // llvm.hexagon.M2.mpy.sat.lh.s1
case Intrinsic::hexagon_M2_mpy_sat_ll_s0: // llvm.hexagon.M2.mpy.sat.ll.s0
case Intrinsic::hexagon_M2_mpy_sat_ll_s1: // llvm.hexagon.M2.mpy.sat.ll.s1
case Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0: // llvm.hexagon.M2.mpy.sat.rnd.hh.s0
case Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1: // llvm.hexagon.M2.mpy.sat.rnd.hh.s1
case Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0: // llvm.hexagon.M2.mpy.sat.rnd.hl.s0
case Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1: // llvm.hexagon.M2.mpy.sat.rnd.hl.s1
case Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0: // llvm.hexagon.M2.mpy.sat.rnd.lh.s0
case Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1: // llvm.hexagon.M2.mpy.sat.rnd.lh.s1
case Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0: // llvm.hexagon.M2.mpy.sat.rnd.ll.s0
case Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1: // llvm.hexagon.M2.mpy.sat.rnd.ll.s1
case Intrinsic::hexagon_M2_mpy_up: // llvm.hexagon.M2.mpy.up
case Intrinsic::hexagon_M2_mpyi: // llvm.hexagon.M2.mpyi
case Intrinsic::hexagon_M2_mpysmi: // llvm.hexagon.M2.mpysmi
case Intrinsic::hexagon_M2_mpyu_hh_s0: // llvm.hexagon.M2.mpyu.hh.s0
case Intrinsic::hexagon_M2_mpyu_hh_s1: // llvm.hexagon.M2.mpyu.hh.s1
case Intrinsic::hexagon_M2_mpyu_hl_s0: // llvm.hexagon.M2.mpyu.hl.s0
case Intrinsic::hexagon_M2_mpyu_hl_s1: // llvm.hexagon.M2.mpyu.hl.s1
case Intrinsic::hexagon_M2_mpyu_lh_s0: // llvm.hexagon.M2.mpyu.lh.s0
case Intrinsic::hexagon_M2_mpyu_lh_s1: // llvm.hexagon.M2.mpyu.lh.s1
case Intrinsic::hexagon_M2_mpyu_ll_s0: // llvm.hexagon.M2.mpyu.ll.s0
case Intrinsic::hexagon_M2_mpyu_ll_s1: // llvm.hexagon.M2.mpyu.ll.s1
case Intrinsic::hexagon_M2_mpyu_up: // llvm.hexagon.M2.mpyu.up
case Intrinsic::hexagon_M2_mpyui: // llvm.hexagon.M2.mpyui
case Intrinsic::hexagon_M2_vmpy2s_s0pack: // llvm.hexagon.M2.vmpy2s.s0pack
case Intrinsic::hexagon_M2_vmpy2s_s1pack: // llvm.hexagon.M2.vmpy2s.s1pack
case Intrinsic::hexagon_S2_asl_i_r: // llvm.hexagon.S2.asl.i.r
case Intrinsic::hexagon_S2_asl_i_r_sat: // llvm.hexagon.S2.asl.i.r.sat
case Intrinsic::hexagon_S2_asl_r_r: // llvm.hexagon.S2.asl.r.r
case Intrinsic::hexagon_S2_asl_r_r_sat: // llvm.hexagon.S2.asl.r.r.sat
case Intrinsic::hexagon_S2_asr_i_r: // llvm.hexagon.S2.asr.i.r
case Intrinsic::hexagon_S2_asr_i_r_rnd: // llvm.hexagon.S2.asr.i.r.rnd
case Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax: // llvm.hexagon.S2.asr.i.r.rnd.goodsyntax
case Intrinsic::hexagon_S2_asr_r_r: // llvm.hexagon.S2.asr.r.r
case Intrinsic::hexagon_S2_asr_r_r_sat: // llvm.hexagon.S2.asr.r.r.sat
case Intrinsic::hexagon_S2_clrbit_i: // llvm.hexagon.S2.clrbit.i
case Intrinsic::hexagon_S2_clrbit_r: // llvm.hexagon.S2.clrbit.r
case Intrinsic::hexagon_S2_lsl_r_r: // llvm.hexagon.S2.lsl.r.r
case Intrinsic::hexagon_S2_lsr_i_r: // llvm.hexagon.S2.lsr.i.r
case Intrinsic::hexagon_S2_lsr_r_r: // llvm.hexagon.S2.lsr.r.r
case Intrinsic::hexagon_S2_setbit_i: // llvm.hexagon.S2.setbit.i
case Intrinsic::hexagon_S2_setbit_r: // llvm.hexagon.S2.setbit.r
case Intrinsic::hexagon_S2_togglebit_i: // llvm.hexagon.S2.togglebit.i
case Intrinsic::hexagon_S2_togglebit_r: // llvm.hexagon.S2.togglebit.r
case Intrinsic::x86_bmi_bextr_32: // llvm.x86.bmi.bextr.32
case Intrinsic::x86_bmi_bzhi_32: // llvm.x86.bmi.bzhi.32
case Intrinsic::x86_bmi_pdep_32: // llvm.x86.bmi.pdep.32
case Intrinsic::x86_bmi_pext_32: // llvm.x86.bmi.pext.32
case Intrinsic::x86_sse42_crc32_32_32: // llvm.x86.sse42.crc32.32.32
case Intrinsic::xcore_sext: // llvm.xcore.sext
case Intrinsic::xcore_zext: // llvm.xcore.zext
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i32);
break;
case Intrinsic::hexagon_C2_mux: // llvm.hexagon.C2.mux
case Intrinsic::hexagon_C2_muxii: // llvm.hexagon.C2.muxii
case Intrinsic::hexagon_C2_muxir: // llvm.hexagon.C2.muxir
case Intrinsic::hexagon_C2_muxri: // llvm.hexagon.C2.muxri
case Intrinsic::hexagon_M2_acci: // llvm.hexagon.M2.acci
case Intrinsic::hexagon_M2_accii: // llvm.hexagon.M2.accii
case Intrinsic::hexagon_M2_maci: // llvm.hexagon.M2.maci
case Intrinsic::hexagon_M2_macsin: // llvm.hexagon.M2.macsin
case Intrinsic::hexagon_M2_macsip: // llvm.hexagon.M2.macsip
case Intrinsic::hexagon_M2_mpy_acc_hh_s0: // llvm.hexagon.M2.mpy.acc.hh.s0
case Intrinsic::hexagon_M2_mpy_acc_hh_s1: // llvm.hexagon.M2.mpy.acc.hh.s1
case Intrinsic::hexagon_M2_mpy_acc_hl_s0: // llvm.hexagon.M2.mpy.acc.hl.s0
case Intrinsic::hexagon_M2_mpy_acc_hl_s1: // llvm.hexagon.M2.mpy.acc.hl.s1
case Intrinsic::hexagon_M2_mpy_acc_lh_s0: // llvm.hexagon.M2.mpy.acc.lh.s0
case Intrinsic::hexagon_M2_mpy_acc_lh_s1: // llvm.hexagon.M2.mpy.acc.lh.s1
case Intrinsic::hexagon_M2_mpy_acc_ll_s0: // llvm.hexagon.M2.mpy.acc.ll.s0
case Intrinsic::hexagon_M2_mpy_acc_ll_s1: // llvm.hexagon.M2.mpy.acc.ll.s1
case Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0: // llvm.hexagon.M2.mpy.acc.sat.hh.s0
case Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1: // llvm.hexagon.M2.mpy.acc.sat.hh.s1
case Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0: // llvm.hexagon.M2.mpy.acc.sat.hl.s0
case Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1: // llvm.hexagon.M2.mpy.acc.sat.hl.s1
case Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0: // llvm.hexagon.M2.mpy.acc.sat.lh.s0
case Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1: // llvm.hexagon.M2.mpy.acc.sat.lh.s1
case Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0: // llvm.hexagon.M2.mpy.acc.sat.ll.s0
case Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1: // llvm.hexagon.M2.mpy.acc.sat.ll.s1
case Intrinsic::hexagon_M2_mpy_nac_hh_s0: // llvm.hexagon.M2.mpy.nac.hh.s0
case Intrinsic::hexagon_M2_mpy_nac_hh_s1: // llvm.hexagon.M2.mpy.nac.hh.s1
case Intrinsic::hexagon_M2_mpy_nac_hl_s0: // llvm.hexagon.M2.mpy.nac.hl.s0
case Intrinsic::hexagon_M2_mpy_nac_hl_s1: // llvm.hexagon.M2.mpy.nac.hl.s1
case Intrinsic::hexagon_M2_mpy_nac_lh_s0: // llvm.hexagon.M2.mpy.nac.lh.s0
case Intrinsic::hexagon_M2_mpy_nac_lh_s1: // llvm.hexagon.M2.mpy.nac.lh.s1
case Intrinsic::hexagon_M2_mpy_nac_ll_s0: // llvm.hexagon.M2.mpy.nac.ll.s0
case Intrinsic::hexagon_M2_mpy_nac_ll_s1: // llvm.hexagon.M2.mpy.nac.ll.s1
case Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0: // llvm.hexagon.M2.mpy.nac.sat.hh.s0
case Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1: // llvm.hexagon.M2.mpy.nac.sat.hh.s1
case Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0: // llvm.hexagon.M2.mpy.nac.sat.hl.s0
case Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1: // llvm.hexagon.M2.mpy.nac.sat.hl.s1
case Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0: // llvm.hexagon.M2.mpy.nac.sat.lh.s0
case Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1: // llvm.hexagon.M2.mpy.nac.sat.lh.s1
case Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0: // llvm.hexagon.M2.mpy.nac.sat.ll.s0
case Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1: // llvm.hexagon.M2.mpy.nac.sat.ll.s1
case Intrinsic::hexagon_M2_mpyu_acc_hh_s0: // llvm.hexagon.M2.mpyu.acc.hh.s0
case Intrinsic::hexagon_M2_mpyu_acc_hh_s1: // llvm.hexagon.M2.mpyu.acc.hh.s1
case Intrinsic::hexagon_M2_mpyu_acc_hl_s0: // llvm.hexagon.M2.mpyu.acc.hl.s0
case Intrinsic::hexagon_M2_mpyu_acc_hl_s1: // llvm.hexagon.M2.mpyu.acc.hl.s1
case Intrinsic::hexagon_M2_mpyu_acc_lh_s0: // llvm.hexagon.M2.mpyu.acc.lh.s0
case Intrinsic::hexagon_M2_mpyu_acc_lh_s1: // llvm.hexagon.M2.mpyu.acc.lh.s1
case Intrinsic::hexagon_M2_mpyu_acc_ll_s0: // llvm.hexagon.M2.mpyu.acc.ll.s0
case Intrinsic::hexagon_M2_mpyu_acc_ll_s1: // llvm.hexagon.M2.mpyu.acc.ll.s1
case Intrinsic::hexagon_M2_mpyu_nac_hh_s0: // llvm.hexagon.M2.mpyu.nac.hh.s0
case Intrinsic::hexagon_M2_mpyu_nac_hh_s1: // llvm.hexagon.M2.mpyu.nac.hh.s1
case Intrinsic::hexagon_M2_mpyu_nac_hl_s0: // llvm.hexagon.M2.mpyu.nac.hl.s0
case Intrinsic::hexagon_M2_mpyu_nac_hl_s1: // llvm.hexagon.M2.mpyu.nac.hl.s1
case Intrinsic::hexagon_M2_mpyu_nac_lh_s0: // llvm.hexagon.M2.mpyu.nac.lh.s0
case Intrinsic::hexagon_M2_mpyu_nac_lh_s1: // llvm.hexagon.M2.mpyu.nac.lh.s1
case Intrinsic::hexagon_M2_mpyu_nac_ll_s0: // llvm.hexagon.M2.mpyu.nac.ll.s0
case Intrinsic::hexagon_M2_mpyu_nac_ll_s1: // llvm.hexagon.M2.mpyu.nac.ll.s1
case Intrinsic::hexagon_M2_nacci: // llvm.hexagon.M2.nacci
case Intrinsic::hexagon_M2_naccii: // llvm.hexagon.M2.naccii
case Intrinsic::hexagon_M2_subacc: // llvm.hexagon.M2.subacc
case Intrinsic::hexagon_M2_xor_xacc: // llvm.hexagon.M2.xor.xacc
case Intrinsic::hexagon_M4_and_and: // llvm.hexagon.M4.and.and
case Intrinsic::hexagon_M4_and_andn: // llvm.hexagon.M4.and.andn
case Intrinsic::hexagon_M4_and_or: // llvm.hexagon.M4.and.or
case Intrinsic::hexagon_M4_and_xor: // llvm.hexagon.M4.and.xor
case Intrinsic::hexagon_M4_or_and: // llvm.hexagon.M4.or.and
case Intrinsic::hexagon_M4_or_andn: // llvm.hexagon.M4.or.andn
case Intrinsic::hexagon_M4_or_or: // llvm.hexagon.M4.or.or
case Intrinsic::hexagon_M4_or_xor: // llvm.hexagon.M4.or.xor
case Intrinsic::hexagon_M4_xor_and: // llvm.hexagon.M4.xor.and
case Intrinsic::hexagon_M4_xor_andn: // llvm.hexagon.M4.xor.andn
case Intrinsic::hexagon_M4_xor_or: // llvm.hexagon.M4.xor.or
case Intrinsic::hexagon_S2_addasl_rrri: // llvm.hexagon.S2.addasl.rrri
case Intrinsic::hexagon_S2_asl_i_r_acc: // llvm.hexagon.S2.asl.i.r.acc
case Intrinsic::hexagon_S2_asl_i_r_and: // llvm.hexagon.S2.asl.i.r.and
case Intrinsic::hexagon_S2_asl_i_r_nac: // llvm.hexagon.S2.asl.i.r.nac
case Intrinsic::hexagon_S2_asl_i_r_or: // llvm.hexagon.S2.asl.i.r.or
case Intrinsic::hexagon_S2_asl_i_r_xacc: // llvm.hexagon.S2.asl.i.r.xacc
case Intrinsic::hexagon_S2_asl_r_r_acc: // llvm.hexagon.S2.asl.r.r.acc
case Intrinsic::hexagon_S2_asl_r_r_and: // llvm.hexagon.S2.asl.r.r.and
case Intrinsic::hexagon_S2_asl_r_r_nac: // llvm.hexagon.S2.asl.r.r.nac
case Intrinsic::hexagon_S2_asl_r_r_or: // llvm.hexagon.S2.asl.r.r.or
case Intrinsic::hexagon_S2_asr_i_r_acc: // llvm.hexagon.S2.asr.i.r.acc
case Intrinsic::hexagon_S2_asr_i_r_and: // llvm.hexagon.S2.asr.i.r.and
case Intrinsic::hexagon_S2_asr_i_r_nac: // llvm.hexagon.S2.asr.i.r.nac
case Intrinsic::hexagon_S2_asr_i_r_or: // llvm.hexagon.S2.asr.i.r.or
case Intrinsic::hexagon_S2_asr_r_r_acc: // llvm.hexagon.S2.asr.r.r.acc
case Intrinsic::hexagon_S2_asr_r_r_and: // llvm.hexagon.S2.asr.r.r.and
case Intrinsic::hexagon_S2_asr_r_r_nac: // llvm.hexagon.S2.asr.r.r.nac
case Intrinsic::hexagon_S2_asr_r_r_or: // llvm.hexagon.S2.asr.r.r.or
case Intrinsic::hexagon_S2_extractu: // llvm.hexagon.S2.extractu
case Intrinsic::hexagon_S2_lsl_r_r_acc: // llvm.hexagon.S2.lsl.r.r.acc
case Intrinsic::hexagon_S2_lsl_r_r_and: // llvm.hexagon.S2.lsl.r.r.and
case Intrinsic::hexagon_S2_lsl_r_r_nac: // llvm.hexagon.S2.lsl.r.r.nac
case Intrinsic::hexagon_S2_lsl_r_r_or: // llvm.hexagon.S2.lsl.r.r.or
case Intrinsic::hexagon_S2_lsr_i_r_acc: // llvm.hexagon.S2.lsr.i.r.acc
case Intrinsic::hexagon_S2_lsr_i_r_and: // llvm.hexagon.S2.lsr.i.r.and
case Intrinsic::hexagon_S2_lsr_i_r_nac: // llvm.hexagon.S2.lsr.i.r.nac
case Intrinsic::hexagon_S2_lsr_i_r_or: // llvm.hexagon.S2.lsr.i.r.or
case Intrinsic::hexagon_S2_lsr_i_r_xacc: // llvm.hexagon.S2.lsr.i.r.xacc
case Intrinsic::hexagon_S2_lsr_r_r_acc: // llvm.hexagon.S2.lsr.r.r.acc
case Intrinsic::hexagon_S2_lsr_r_r_and: // llvm.hexagon.S2.lsr.r.r.and
case Intrinsic::hexagon_S2_lsr_r_r_nac: // llvm.hexagon.S2.lsr.r.r.nac
case Intrinsic::hexagon_S2_lsr_r_r_or: // llvm.hexagon.S2.lsr.r.r.or
case Intrinsic::hexagon_S4_addaddi: // llvm.hexagon.S4.addaddi
case Intrinsic::hexagon_S4_or_andi: // llvm.hexagon.S4.or.andi
case Intrinsic::hexagon_S4_or_andix: // llvm.hexagon.S4.or.andix
case Intrinsic::hexagon_S4_or_ori: // llvm.hexagon.S4.or.ori
case Intrinsic::hexagon_S4_subaddi: // llvm.hexagon.S4.subaddi
case Intrinsic::xcore_crc32: // llvm.xcore.crc32
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::i32, MVT::i32);
break;
case Intrinsic::hexagon_S2_insert: // llvm.hexagon.S2.insert
case Intrinsic::hexagon_S2_tableidxb_goodsyntax: // llvm.hexagon.S2.tableidxb.goodsyntax
case Intrinsic::hexagon_S2_tableidxd_goodsyntax: // llvm.hexagon.S2.tableidxd.goodsyntax
case Intrinsic::hexagon_S2_tableidxh_goodsyntax: // llvm.hexagon.S2.tableidxh.goodsyntax
case Intrinsic::hexagon_S2_tableidxw_goodsyntax: // llvm.hexagon.S2.tableidxw.goodsyntax
VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::i32, MVT::i32, MVT::i32, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_mrc: // llvm.arm.mrc
case Intrinsic::arm_mrc2: // llvm.arm.mrc2
VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::i32, MVT::i32, MVT::i32, MVT::i32, MVT::i32, MVT::i32);
break;
case Intrinsic::hexagon_S2_insert_rp: // llvm.hexagon.S2.insert.rp
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::i32, MVT::i64);
break;
case Intrinsic::arm_strexd: // llvm.arm.strexd
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::i32, MVT::iPTR);
break;
case Intrinsic::hexagon_S2_extractu_rp: // llvm.hexagon.S2.extractu.rp
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i64);
break;
case Intrinsic::x86_sse42_crc32_32_8: // llvm.x86.sse42.crc32.32.8
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i8);
break;
case Intrinsic::ppc_altivec_vcmpequb_p: // llvm.ppc.altivec.vcmpequb.p
case Intrinsic::ppc_altivec_vcmpgtsb_p: // llvm.ppc.altivec.vcmpgtsb.p
case Intrinsic::ppc_altivec_vcmpgtub_p: // llvm.ppc.altivec.vcmpgtub.p
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v16i8, MVT::v16i8);
break;
case Intrinsic::ppc_altivec_vcmpbfp_p: // llvm.ppc.altivec.vcmpbfp.p
case Intrinsic::ppc_altivec_vcmpeqfp_p: // llvm.ppc.altivec.vcmpeqfp.p
case Intrinsic::ppc_altivec_vcmpgefp_p: // llvm.ppc.altivec.vcmpgefp.p
case Intrinsic::ppc_altivec_vcmpgtfp_p: // llvm.ppc.altivec.vcmpgtfp.p
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v4f32, MVT::v4f32);
break;
case Intrinsic::ppc_altivec_vcmpequw_p: // llvm.ppc.altivec.vcmpequw.p
case Intrinsic::ppc_altivec_vcmpgtsw_p: // llvm.ppc.altivec.vcmpgtsw.p
case Intrinsic::ppc_altivec_vcmpgtuw_p: // llvm.ppc.altivec.vcmpgtuw.p
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v4i32, MVT::v4i32);
break;
case Intrinsic::ppc_altivec_vcmpequh_p: // llvm.ppc.altivec.vcmpequh.p
case Intrinsic::ppc_altivec_vcmpgtsh_p: // llvm.ppc.altivec.vcmpgtsh.p
case Intrinsic::ppc_altivec_vcmpgtuh_p: // llvm.ppc.altivec.vcmpgtuh.p
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v8i16, MVT::v8i16);
break;
case Intrinsic::hexagon_A2_sat: // llvm.hexagon.A2.sat
case Intrinsic::hexagon_S2_cl0p: // llvm.hexagon.S2.cl0p
case Intrinsic::hexagon_S2_cl1p: // llvm.hexagon.S2.cl1p
case Intrinsic::hexagon_S2_clbp: // llvm.hexagon.S2.clbp
case Intrinsic::hexagon_S2_vrndpackwh: // llvm.hexagon.S2.vrndpackwh
case Intrinsic::hexagon_S2_vrndpackwhs: // llvm.hexagon.S2.vrndpackwhs
case Intrinsic::hexagon_S2_vsathb: // llvm.hexagon.S2.vsathb
case Intrinsic::hexagon_S2_vsathub: // llvm.hexagon.S2.vsathub
case Intrinsic::hexagon_S2_vsatwh: // llvm.hexagon.S2.vsatwh
case Intrinsic::hexagon_S2_vsatwuh: // llvm.hexagon.S2.vsatwuh
case Intrinsic::hexagon_S2_vtrunehb: // llvm.hexagon.S2.vtrunehb
case Intrinsic::hexagon_S2_vtrunohb: // llvm.hexagon.S2.vtrunohb
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::i64);
break;
case Intrinsic::hexagon_M2_vrcmpys_s1rp: // llvm.hexagon.M2.vrcmpys.s1rp
case Intrinsic::hexagon_S2_asr_i_svw_trun: // llvm.hexagon.S2.asr.i.svw.trun
case Intrinsic::hexagon_S2_asr_r_svw_trun: // llvm.hexagon.S2.asr.r.svw.trun
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i64, MVT::i32);
break;
case Intrinsic::hexagon_M2_vdmpyrs_s0: // llvm.hexagon.M2.vdmpyrs.s0
case Intrinsic::hexagon_M2_vdmpyrs_s1: // llvm.hexagon.M2.vdmpyrs.s1
case Intrinsic::hexagon_M2_vradduh: // llvm.hexagon.M2.vradduh
case Intrinsic::hexagon_S2_parityp: // llvm.hexagon.S2.parityp
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i64, MVT::i64);
break;
case Intrinsic::eh_sjlj_setjmp: // llvm.eh.sjlj.setjmp
case Intrinsic::eh_typeid_for: // llvm.eh.typeid.for
case Intrinsic::setjmp: // llvm.setjmp
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::iPTR);
break;
case Intrinsic::sigsetjmp: // llvm.sigsetjmp
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::iPTR, MVT::i32);
break;
case Intrinsic::x86_sse2_pmovmskb_128: // llvm.x86.sse2.pmovmskb.128
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v16i8);
break;
case Intrinsic::x86_sse41_pextrb: // llvm.x86.sse41.pextrb
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v16i8, MVT::i32);
break;
case Intrinsic::x86_sse42_pcmpestri128: // llvm.x86.sse42.pcmpestri128
case Intrinsic::x86_sse42_pcmpestria128: // llvm.x86.sse42.pcmpestria128
case Intrinsic::x86_sse42_pcmpestric128: // llvm.x86.sse42.pcmpestric128
case Intrinsic::x86_sse42_pcmpestrio128: // llvm.x86.sse42.pcmpestrio128
case Intrinsic::x86_sse42_pcmpestris128: // llvm.x86.sse42.pcmpestris128
case Intrinsic::x86_sse42_pcmpestriz128: // llvm.x86.sse42.pcmpestriz128
VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::i32, MVT::v16i8, MVT::i32, MVT::v16i8, MVT::i32, MVT::i8);
break;
case Intrinsic::x86_sse42_pcmpistri128: // llvm.x86.sse42.pcmpistri128
case Intrinsic::x86_sse42_pcmpistria128: // llvm.x86.sse42.pcmpistria128
case Intrinsic::x86_sse42_pcmpistric128: // llvm.x86.sse42.pcmpistric128
case Intrinsic::x86_sse42_pcmpistrio128: // llvm.x86.sse42.pcmpistrio128
case Intrinsic::x86_sse42_pcmpistris128: // llvm.x86.sse42.pcmpistris128
case Intrinsic::x86_sse42_pcmpistriz128: // llvm.x86.sse42.pcmpistriz128
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::v16i8, MVT::v16i8, MVT::i8);
break;
case Intrinsic::x86_sse2_cvtsd2si: // llvm.x86.sse2.cvtsd2si
case Intrinsic::x86_sse2_cvttsd2si: // llvm.x86.sse2.cvttsd2si
case Intrinsic::x86_sse2_movmsk_pd: // llvm.x86.sse2.movmsk.pd
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v2f64);
break;
case Intrinsic::x86_avx_vtestc_pd: // llvm.x86.avx.vtestc.pd
case Intrinsic::x86_avx_vtestnzc_pd: // llvm.x86.avx.vtestnzc.pd
case Intrinsic::x86_avx_vtestz_pd: // llvm.x86.avx.vtestz.pd
case Intrinsic::x86_sse2_comieq_sd: // llvm.x86.sse2.comieq.sd
case Intrinsic::x86_sse2_comige_sd: // llvm.x86.sse2.comige.sd
case Intrinsic::x86_sse2_comigt_sd: // llvm.x86.sse2.comigt.sd
case Intrinsic::x86_sse2_comile_sd: // llvm.x86.sse2.comile.sd
case Intrinsic::x86_sse2_comilt_sd: // llvm.x86.sse2.comilt.sd
case Intrinsic::x86_sse2_comineq_sd: // llvm.x86.sse2.comineq.sd
case Intrinsic::x86_sse2_ucomieq_sd: // llvm.x86.sse2.ucomieq.sd
case Intrinsic::x86_sse2_ucomige_sd: // llvm.x86.sse2.ucomige.sd
case Intrinsic::x86_sse2_ucomigt_sd: // llvm.x86.sse2.ucomigt.sd
case Intrinsic::x86_sse2_ucomile_sd: // llvm.x86.sse2.ucomile.sd
case Intrinsic::x86_sse2_ucomilt_sd: // llvm.x86.sse2.ucomilt.sd
case Intrinsic::x86_sse2_ucomineq_sd: // llvm.x86.sse2.ucomineq.sd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v2f64, MVT::v2f64);
break;
case Intrinsic::x86_sse41_ptestc: // llvm.x86.sse41.ptestc
case Intrinsic::x86_sse41_ptestnzc: // llvm.x86.sse41.ptestnzc
case Intrinsic::x86_sse41_ptestz: // llvm.x86.sse41.ptestz
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v2i64, MVT::v2i64);
break;
case Intrinsic::x86_avx2_pmovmskb: // llvm.x86.avx2.pmovmskb
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v32i8);
break;
case Intrinsic::x86_sse_cvtss2si: // llvm.x86.sse.cvtss2si
case Intrinsic::x86_sse_cvttss2si: // llvm.x86.sse.cvttss2si
case Intrinsic::x86_sse_movmsk_ps: // llvm.x86.sse.movmsk.ps
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v4f32);
break;
case Intrinsic::x86_sse41_extractps: // llvm.x86.sse41.extractps
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f32, MVT::i32);
break;
case Intrinsic::x86_avx_vtestc_ps: // llvm.x86.avx.vtestc.ps
case Intrinsic::x86_avx_vtestnzc_ps: // llvm.x86.avx.vtestnzc.ps
case Intrinsic::x86_avx_vtestz_ps: // llvm.x86.avx.vtestz.ps
case Intrinsic::x86_sse_comieq_ss: // llvm.x86.sse.comieq.ss
case Intrinsic::x86_sse_comige_ss: // llvm.x86.sse.comige.ss
case Intrinsic::x86_sse_comigt_ss: // llvm.x86.sse.comigt.ss
case Intrinsic::x86_sse_comile_ss: // llvm.x86.sse.comile.ss
case Intrinsic::x86_sse_comilt_ss: // llvm.x86.sse.comilt.ss
case Intrinsic::x86_sse_comineq_ss: // llvm.x86.sse.comineq.ss
case Intrinsic::x86_sse_ucomieq_ss: // llvm.x86.sse.ucomieq.ss
case Intrinsic::x86_sse_ucomige_ss: // llvm.x86.sse.ucomige.ss
case Intrinsic::x86_sse_ucomigt_ss: // llvm.x86.sse.ucomigt.ss
case Intrinsic::x86_sse_ucomile_ss: // llvm.x86.sse.ucomile.ss
case Intrinsic::x86_sse_ucomilt_ss: // llvm.x86.sse.ucomilt.ss
case Intrinsic::x86_sse_ucomineq_ss: // llvm.x86.sse.ucomineq.ss
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f32, MVT::v4f32);
break;
case Intrinsic::x86_avx_movmsk_pd_256: // llvm.x86.avx.movmsk.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v4f64);
break;
case Intrinsic::x86_avx_vtestc_pd_256: // llvm.x86.avx.vtestc.pd.256
case Intrinsic::x86_avx_vtestnzc_pd_256: // llvm.x86.avx.vtestnzc.pd.256
case Intrinsic::x86_avx_vtestz_pd_256: // llvm.x86.avx.vtestz.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f64, MVT::v4f64);
break;
case Intrinsic::x86_sse41_pextrd: // llvm.x86.sse41.pextrd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4i32, MVT::i32);
break;
case Intrinsic::x86_avx_ptestc_256: // llvm.x86.avx.ptestc.256
case Intrinsic::x86_avx_ptestnzc_256: // llvm.x86.avx.ptestnzc.256
case Intrinsic::x86_avx_ptestz_256: // llvm.x86.avx.ptestz.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4i64, MVT::v4i64);
break;
case Intrinsic::x86_avx_movmsk_ps_256: // llvm.x86.avx.movmsk.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v8f32);
break;
case Intrinsic::x86_avx_vtestc_ps_256: // llvm.x86.avx.vtestc.ps.256
case Intrinsic::x86_avx_vtestnzc_ps_256: // llvm.x86.avx.vtestnzc.ps.256
case Intrinsic::x86_avx_vtestz_ps_256: // llvm.x86.avx.vtestz.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v8f32, MVT::v8f32);
break;
case Intrinsic::x86_mmx_pmovmskb: // llvm.x86.mmx.pmovmskb
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::x86mmx);
break;
case Intrinsic::x86_mmx_pextr_w: // llvm.x86.mmx.pextr.w
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::x86mmx, MVT::i32);
break;
case Intrinsic::xcore_crc8: // llvm.xcore.crc8
VerifyIntrinsicPrototype(ID, IF, 2, 3, MVT::i32, MVT::i32, MVT::i32, MVT::i32, MVT::i32);
break;
case Intrinsic::arm_ldrexd: // llvm.arm.ldrexd
VerifyIntrinsicPrototype(ID, IF, 2, 1, MVT::i32, MVT::i32, MVT::iPTR);
break;
case Intrinsic::ptx_read_clock64: // llvm.ptx.read.clock64
case Intrinsic::readcyclecounter: // llvm.readcyclecounter
case Intrinsic::x86_rdfsbase_64: // llvm.x86.rdfsbase.64
case Intrinsic::x86_rdgsbase_64: // llvm.x86.rdgsbase.64
VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::i64);
break;
case Intrinsic::hexagon_A2_sxtw: // llvm.hexagon.A2.sxtw
case Intrinsic::hexagon_A2_tfrpi: // llvm.hexagon.A2.tfrpi
case Intrinsic::hexagon_C2_mask: // llvm.hexagon.C2.mask
case Intrinsic::hexagon_S2_vsplatrh: // llvm.hexagon.S2.vsplatrh
case Intrinsic::hexagon_S2_vsxtbh: // llvm.hexagon.S2.vsxtbh
case Intrinsic::hexagon_S2_vsxthw: // llvm.hexagon.S2.vsxthw
case Intrinsic::hexagon_S2_vzxtbh: // llvm.hexagon.S2.vzxtbh
case Intrinsic::hexagon_S2_vzxthw: // llvm.hexagon.S2.vzxthw
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::i32);
break;
case Intrinsic::hexagon_A2_combineii: // llvm.hexagon.A2.combineii
case Intrinsic::hexagon_A2_combinew: // llvm.hexagon.A2.combinew
case Intrinsic::hexagon_A4_combineir: // llvm.hexagon.A4.combineir
case Intrinsic::hexagon_A4_combineri: // llvm.hexagon.A4.combineri
case Intrinsic::hexagon_M2_cmpyi_s0: // llvm.hexagon.M2.cmpyi.s0
case Intrinsic::hexagon_M2_cmpyr_s0: // llvm.hexagon.M2.cmpyr.s0
case Intrinsic::hexagon_M2_cmpys_s0: // llvm.hexagon.M2.cmpys.s0
case Intrinsic::hexagon_M2_cmpys_s1: // llvm.hexagon.M2.cmpys.s1
case Intrinsic::hexagon_M2_cmpysc_s0: // llvm.hexagon.M2.cmpysc.s0
case Intrinsic::hexagon_M2_cmpysc_s1: // llvm.hexagon.M2.cmpysc.s1
case Intrinsic::hexagon_M2_dpmpyss_s0: // llvm.hexagon.M2.dpmpyss.s0
case Intrinsic::hexagon_M2_dpmpyuu_s0: // llvm.hexagon.M2.dpmpyuu.s0
case Intrinsic::hexagon_M2_mpyd_hh_s0: // llvm.hexagon.M2.mpyd.hh.s0
case Intrinsic::hexagon_M2_mpyd_hh_s1: // llvm.hexagon.M2.mpyd.hh.s1
case Intrinsic::hexagon_M2_mpyd_hl_s0: // llvm.hexagon.M2.mpyd.hl.s0
case Intrinsic::hexagon_M2_mpyd_hl_s1: // llvm.hexagon.M2.mpyd.hl.s1
case Intrinsic::hexagon_M2_mpyd_lh_s0: // llvm.hexagon.M2.mpyd.lh.s0
case Intrinsic::hexagon_M2_mpyd_lh_s1: // llvm.hexagon.M2.mpyd.lh.s1
case Intrinsic::hexagon_M2_mpyd_ll_s0: // llvm.hexagon.M2.mpyd.ll.s0
case Intrinsic::hexagon_M2_mpyd_ll_s1: // llvm.hexagon.M2.mpyd.ll.s1
case Intrinsic::hexagon_M2_mpyd_rnd_hh_s0: // llvm.hexagon.M2.mpyd.rnd.hh.s0
case Intrinsic::hexagon_M2_mpyd_rnd_hh_s1: // llvm.hexagon.M2.mpyd.rnd.hh.s1
case Intrinsic::hexagon_M2_mpyd_rnd_hl_s0: // llvm.hexagon.M2.mpyd.rnd.hl.s0
case Intrinsic::hexagon_M2_mpyd_rnd_hl_s1: // llvm.hexagon.M2.mpyd.rnd.hl.s1
case Intrinsic::hexagon_M2_mpyd_rnd_lh_s0: // llvm.hexagon.M2.mpyd.rnd.lh.s0
case Intrinsic::hexagon_M2_mpyd_rnd_lh_s1: // llvm.hexagon.M2.mpyd.rnd.lh.s1
case Intrinsic::hexagon_M2_mpyd_rnd_ll_s0: // llvm.hexagon.M2.mpyd.rnd.ll.s0
case Intrinsic::hexagon_M2_mpyd_rnd_ll_s1: // llvm.hexagon.M2.mpyd.rnd.ll.s1
case Intrinsic::hexagon_M2_mpyud_hh_s0: // llvm.hexagon.M2.mpyud.hh.s0
case Intrinsic::hexagon_M2_mpyud_hh_s1: // llvm.hexagon.M2.mpyud.hh.s1
case Intrinsic::hexagon_M2_mpyud_hl_s0: // llvm.hexagon.M2.mpyud.hl.s0
case Intrinsic::hexagon_M2_mpyud_hl_s1: // llvm.hexagon.M2.mpyud.hl.s1
case Intrinsic::hexagon_M2_mpyud_lh_s0: // llvm.hexagon.M2.mpyud.lh.s0
case Intrinsic::hexagon_M2_mpyud_lh_s1: // llvm.hexagon.M2.mpyud.lh.s1
case Intrinsic::hexagon_M2_mpyud_ll_s0: // llvm.hexagon.M2.mpyud.ll.s0
case Intrinsic::hexagon_M2_mpyud_ll_s1: // llvm.hexagon.M2.mpyud.ll.s1
case Intrinsic::hexagon_M2_vmpy2s_s0: // llvm.hexagon.M2.vmpy2s.s0
case Intrinsic::hexagon_M2_vmpy2s_s1: // llvm.hexagon.M2.vmpy2s.s1
case Intrinsic::hexagon_S2_packhl: // llvm.hexagon.S2.packhl
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i32, MVT::i32);
break;
case Intrinsic::hexagon_A2_addsp: // llvm.hexagon.A2.addsp
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i32, MVT::i64);
break;
case Intrinsic::hexagon_C2_vmux: // llvm.hexagon.C2.vmux
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i64, MVT::i32, MVT::i64, MVT::i64);
break;
case Intrinsic::hexagon_A2_absp: // llvm.hexagon.A2.absp
case Intrinsic::hexagon_A2_negp: // llvm.hexagon.A2.negp
case Intrinsic::hexagon_A2_notp: // llvm.hexagon.A2.notp
case Intrinsic::hexagon_A2_tfrp: // llvm.hexagon.A2.tfrp
case Intrinsic::hexagon_A2_vabsh: // llvm.hexagon.A2.vabsh
case Intrinsic::hexagon_A2_vabshsat: // llvm.hexagon.A2.vabshsat
case Intrinsic::hexagon_A2_vabsw: // llvm.hexagon.A2.vabsw
case Intrinsic::hexagon_A2_vabswsat: // llvm.hexagon.A2.vabswsat
case Intrinsic::hexagon_A2_vconj: // llvm.hexagon.A2.vconj
case Intrinsic::hexagon_S2_deinterleave: // llvm.hexagon.S2.deinterleave
case Intrinsic::hexagon_S2_interleave: // llvm.hexagon.S2.interleave
case Intrinsic::hexagon_S2_vsathb_nopack: // llvm.hexagon.S2.vsathb.nopack
case Intrinsic::hexagon_S2_vsathub_nopack: // llvm.hexagon.S2.vsathub.nopack
case Intrinsic::hexagon_S2_vsatwh_nopack: // llvm.hexagon.S2.vsatwh.nopack
case Intrinsic::hexagon_S2_vsatwuh_nopack: // llvm.hexagon.S2.vsatwuh.nopack
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::i64);
break;
case Intrinsic::hexagon_M2_vrcmpys_s1: // llvm.hexagon.M2.vrcmpys.s1
case Intrinsic::hexagon_S2_asl_i_p: // llvm.hexagon.S2.asl.i.p
case Intrinsic::hexagon_S2_asl_i_vh: // llvm.hexagon.S2.asl.i.vh
case Intrinsic::hexagon_S2_asl_i_vw: // llvm.hexagon.S2.asl.i.vw
case Intrinsic::hexagon_S2_asl_r_p: // llvm.hexagon.S2.asl.r.p
case Intrinsic::hexagon_S2_asl_r_vh: // llvm.hexagon.S2.asl.r.vh
case Intrinsic::hexagon_S2_asl_r_vw: // llvm.hexagon.S2.asl.r.vw
case Intrinsic::hexagon_S2_asr_i_p: // llvm.hexagon.S2.asr.i.p
case Intrinsic::hexagon_S2_asr_i_vh: // llvm.hexagon.S2.asr.i.vh
case Intrinsic::hexagon_S2_asr_i_vw: // llvm.hexagon.S2.asr.i.vw
case Intrinsic::hexagon_S2_asr_r_p: // llvm.hexagon.S2.asr.r.p
case Intrinsic::hexagon_S2_asr_r_vh: // llvm.hexagon.S2.asr.r.vh
case Intrinsic::hexagon_S2_asr_r_vw: // llvm.hexagon.S2.asr.r.vw
case Intrinsic::hexagon_S2_lsl_r_p: // llvm.hexagon.S2.lsl.r.p
case Intrinsic::hexagon_S2_lsl_r_vh: // llvm.hexagon.S2.lsl.r.vh
case Intrinsic::hexagon_S2_lsl_r_vw: // llvm.hexagon.S2.lsl.r.vw
case Intrinsic::hexagon_S2_lsr_i_p: // llvm.hexagon.S2.lsr.i.p
case Intrinsic::hexagon_S2_lsr_i_vh: // llvm.hexagon.S2.lsr.i.vh
case Intrinsic::hexagon_S2_lsr_i_vw: // llvm.hexagon.S2.lsr.i.vw
case Intrinsic::hexagon_S2_lsr_r_p: // llvm.hexagon.S2.lsr.r.p
case Intrinsic::hexagon_S2_lsr_r_vh: // llvm.hexagon.S2.lsr.r.vh
case Intrinsic::hexagon_S2_lsr_r_vw: // llvm.hexagon.S2.lsr.r.vw
case Intrinsic::hexagon_S2_vcrotate: // llvm.hexagon.S2.vcrotate
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i64, MVT::i32);
break;
case Intrinsic::hexagon_M2_cmaci_s0: // llvm.hexagon.M2.cmaci.s0
case Intrinsic::hexagon_M2_cmacr_s0: // llvm.hexagon.M2.cmacr.s0
case Intrinsic::hexagon_M2_cmacs_s0: // llvm.hexagon.M2.cmacs.s0
case Intrinsic::hexagon_M2_cmacs_s1: // llvm.hexagon.M2.cmacs.s1
case Intrinsic::hexagon_M2_cmacsc_s0: // llvm.hexagon.M2.cmacsc.s0
case Intrinsic::hexagon_M2_cmacsc_s1: // llvm.hexagon.M2.cmacsc.s1
case Intrinsic::hexagon_M2_cnacs_s0: // llvm.hexagon.M2.cnacs.s0
case Intrinsic::hexagon_M2_cnacs_s1: // llvm.hexagon.M2.cnacs.s1
case Intrinsic::hexagon_M2_cnacsc_s0: // llvm.hexagon.M2.cnacsc.s0
case Intrinsic::hexagon_M2_cnacsc_s1: // llvm.hexagon.M2.cnacsc.s1
case Intrinsic::hexagon_M2_dpmpyss_acc_s0: // llvm.hexagon.M2.dpmpyss.acc.s0
case Intrinsic::hexagon_M2_dpmpyss_nac_s0: // llvm.hexagon.M2.dpmpyss.nac.s0
case Intrinsic::hexagon_M2_dpmpyuu_acc_s0: // llvm.hexagon.M2.dpmpyuu.acc.s0
case Intrinsic::hexagon_M2_dpmpyuu_nac_s0: // llvm.hexagon.M2.dpmpyuu.nac.s0
case Intrinsic::hexagon_M2_mpyd_acc_hh_s0: // llvm.hexagon.M2.mpyd.acc.hh.s0
case Intrinsic::hexagon_M2_mpyd_acc_hh_s1: // llvm.hexagon.M2.mpyd.acc.hh.s1
case Intrinsic::hexagon_M2_mpyd_acc_hl_s0: // llvm.hexagon.M2.mpyd.acc.hl.s0
case Intrinsic::hexagon_M2_mpyd_acc_hl_s1: // llvm.hexagon.M2.mpyd.acc.hl.s1
case Intrinsic::hexagon_M2_mpyd_acc_lh_s0: // llvm.hexagon.M2.mpyd.acc.lh.s0
case Intrinsic::hexagon_M2_mpyd_acc_lh_s1: // llvm.hexagon.M2.mpyd.acc.lh.s1
case Intrinsic::hexagon_M2_mpyd_acc_ll_s0: // llvm.hexagon.M2.mpyd.acc.ll.s0
case Intrinsic::hexagon_M2_mpyd_acc_ll_s1: // llvm.hexagon.M2.mpyd.acc.ll.s1
case Intrinsic::hexagon_M2_mpyd_nac_hh_s0: // llvm.hexagon.M2.mpyd.nac.hh.s0
case Intrinsic::hexagon_M2_mpyd_nac_hh_s1: // llvm.hexagon.M2.mpyd.nac.hh.s1
case Intrinsic::hexagon_M2_mpyd_nac_hl_s0: // llvm.hexagon.M2.mpyd.nac.hl.s0
case Intrinsic::hexagon_M2_mpyd_nac_hl_s1: // llvm.hexagon.M2.mpyd.nac.hl.s1
case Intrinsic::hexagon_M2_mpyd_nac_lh_s0: // llvm.hexagon.M2.mpyd.nac.lh.s0
case Intrinsic::hexagon_M2_mpyd_nac_lh_s1: // llvm.hexagon.M2.mpyd.nac.lh.s1
case Intrinsic::hexagon_M2_mpyd_nac_ll_s0: // llvm.hexagon.M2.mpyd.nac.ll.s0
case Intrinsic::hexagon_M2_mpyd_nac_ll_s1: // llvm.hexagon.M2.mpyd.nac.ll.s1
case Intrinsic::hexagon_M2_mpyud_acc_hh_s0: // llvm.hexagon.M2.mpyud.acc.hh.s0
case Intrinsic::hexagon_M2_mpyud_acc_hh_s1: // llvm.hexagon.M2.mpyud.acc.hh.s1
case Intrinsic::hexagon_M2_mpyud_acc_hl_s0: // llvm.hexagon.M2.mpyud.acc.hl.s0
case Intrinsic::hexagon_M2_mpyud_acc_hl_s1: // llvm.hexagon.M2.mpyud.acc.hl.s1
case Intrinsic::hexagon_M2_mpyud_acc_lh_s0: // llvm.hexagon.M2.mpyud.acc.lh.s0
case Intrinsic::hexagon_M2_mpyud_acc_lh_s1: // llvm.hexagon.M2.mpyud.acc.lh.s1
case Intrinsic::hexagon_M2_mpyud_acc_ll_s0: // llvm.hexagon.M2.mpyud.acc.ll.s0
case Intrinsic::hexagon_M2_mpyud_acc_ll_s1: // llvm.hexagon.M2.mpyud.acc.ll.s1
case Intrinsic::hexagon_M2_mpyud_nac_hh_s0: // llvm.hexagon.M2.mpyud.nac.hh.s0
case Intrinsic::hexagon_M2_mpyud_nac_hh_s1: // llvm.hexagon.M2.mpyud.nac.hh.s1
case Intrinsic::hexagon_M2_mpyud_nac_hl_s0: // llvm.hexagon.M2.mpyud.nac.hl.s0
case Intrinsic::hexagon_M2_mpyud_nac_hl_s1: // llvm.hexagon.M2.mpyud.nac.hl.s1
case Intrinsic::hexagon_M2_mpyud_nac_lh_s0: // llvm.hexagon.M2.mpyud.nac.lh.s0
case Intrinsic::hexagon_M2_mpyud_nac_lh_s1: // llvm.hexagon.M2.mpyud.nac.lh.s1
case Intrinsic::hexagon_M2_mpyud_nac_ll_s0: // llvm.hexagon.M2.mpyud.nac.ll.s0
case Intrinsic::hexagon_M2_mpyud_nac_ll_s1: // llvm.hexagon.M2.mpyud.nac.ll.s1
case Intrinsic::hexagon_M2_vmac2: // llvm.hexagon.M2.vmac2
case Intrinsic::hexagon_M2_vmac2s_s0: // llvm.hexagon.M2.vmac2s.s0
case Intrinsic::hexagon_M2_vmac2s_s1: // llvm.hexagon.M2.vmac2s.s1
case Intrinsic::hexagon_S2_extractup: // llvm.hexagon.S2.extractup
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i64, MVT::i64, MVT::i32, MVT::i32);
break;
case Intrinsic::hexagon_A2_addp: // llvm.hexagon.A2.addp
case Intrinsic::hexagon_A2_addpsat: // llvm.hexagon.A2.addpsat
case Intrinsic::hexagon_A2_andp: // llvm.hexagon.A2.andp
case Intrinsic::hexagon_A2_maxp: // llvm.hexagon.A2.maxp
case Intrinsic::hexagon_A2_maxup: // llvm.hexagon.A2.maxup
case Intrinsic::hexagon_A2_minp: // llvm.hexagon.A2.minp
case Intrinsic::hexagon_A2_minup: // llvm.hexagon.A2.minup
case Intrinsic::hexagon_A2_orp: // llvm.hexagon.A2.orp
case Intrinsic::hexagon_A2_subp: // llvm.hexagon.A2.subp
case Intrinsic::hexagon_A2_vaddh: // llvm.hexagon.A2.vaddh
case Intrinsic::hexagon_A2_vaddhs: // llvm.hexagon.A2.vaddhs
case Intrinsic::hexagon_A2_vaddub: // llvm.hexagon.A2.vaddub
case Intrinsic::hexagon_A2_vaddubs: // llvm.hexagon.A2.vaddubs
case Intrinsic::hexagon_A2_vadduhs: // llvm.hexagon.A2.vadduhs
case Intrinsic::hexagon_A2_vaddw: // llvm.hexagon.A2.vaddw
case Intrinsic::hexagon_A2_vaddws: // llvm.hexagon.A2.vaddws
case Intrinsic::hexagon_A2_vavgh: // llvm.hexagon.A2.vavgh
case Intrinsic::hexagon_A2_vavghcr: // llvm.hexagon.A2.vavghcr
case Intrinsic::hexagon_A2_vavghr: // llvm.hexagon.A2.vavghr
case Intrinsic::hexagon_A2_vavgub: // llvm.hexagon.A2.vavgub
case Intrinsic::hexagon_A2_vavgubr: // llvm.hexagon.A2.vavgubr
case Intrinsic::hexagon_A2_vavguh: // llvm.hexagon.A2.vavguh
case Intrinsic::hexagon_A2_vavguhr: // llvm.hexagon.A2.vavguhr
case Intrinsic::hexagon_A2_vavguw: // llvm.hexagon.A2.vavguw
case Intrinsic::hexagon_A2_vavguwr: // llvm.hexagon.A2.vavguwr
case Intrinsic::hexagon_A2_vavgw: // llvm.hexagon.A2.vavgw
case Intrinsic::hexagon_A2_vavgwcr: // llvm.hexagon.A2.vavgwcr
case Intrinsic::hexagon_A2_vavgwr: // llvm.hexagon.A2.vavgwr
case Intrinsic::hexagon_A2_vmaxh: // llvm.hexagon.A2.vmaxh
case Intrinsic::hexagon_A2_vmaxub: // llvm.hexagon.A2.vmaxub
case Intrinsic::hexagon_A2_vmaxuh: // llvm.hexagon.A2.vmaxuh
case Intrinsic::hexagon_A2_vmaxuw: // llvm.hexagon.A2.vmaxuw
case Intrinsic::hexagon_A2_vmaxw: // llvm.hexagon.A2.vmaxw
case Intrinsic::hexagon_A2_vminh: // llvm.hexagon.A2.vminh
case Intrinsic::hexagon_A2_vminub: // llvm.hexagon.A2.vminub
case Intrinsic::hexagon_A2_vminuh: // llvm.hexagon.A2.vminuh
case Intrinsic::hexagon_A2_vminuw: // llvm.hexagon.A2.vminuw
case Intrinsic::hexagon_A2_vminw: // llvm.hexagon.A2.vminw
case Intrinsic::hexagon_A2_vnavgh: // llvm.hexagon.A2.vnavgh
case Intrinsic::hexagon_A2_vnavghcr: // llvm.hexagon.A2.vnavghcr
case Intrinsic::hexagon_A2_vnavghr: // llvm.hexagon.A2.vnavghr
case Intrinsic::hexagon_A2_vnavgw: // llvm.hexagon.A2.vnavgw
case Intrinsic::hexagon_A2_vnavgwcr: // llvm.hexagon.A2.vnavgwcr
case Intrinsic::hexagon_A2_vnavgwr: // llvm.hexagon.A2.vnavgwr
case Intrinsic::hexagon_A2_vraddub: // llvm.hexagon.A2.vraddub
case Intrinsic::hexagon_A2_vrsadub: // llvm.hexagon.A2.vrsadub
case Intrinsic::hexagon_A2_vsubh: // llvm.hexagon.A2.vsubh
case Intrinsic::hexagon_A2_vsubhs: // llvm.hexagon.A2.vsubhs
case Intrinsic::hexagon_A2_vsubub: // llvm.hexagon.A2.vsubub
case Intrinsic::hexagon_A2_vsububs: // llvm.hexagon.A2.vsububs
case Intrinsic::hexagon_A2_vsubuhs: // llvm.hexagon.A2.vsubuhs
case Intrinsic::hexagon_A2_vsubw: // llvm.hexagon.A2.vsubw
case Intrinsic::hexagon_A2_vsubws: // llvm.hexagon.A2.vsubws
case Intrinsic::hexagon_A2_xorp: // llvm.hexagon.A2.xorp
case Intrinsic::hexagon_A4_andnp: // llvm.hexagon.A4.andnp
case Intrinsic::hexagon_A4_ornp: // llvm.hexagon.A4.ornp
case Intrinsic::hexagon_M2_mmpyh_rs0: // llvm.hexagon.M2.mmpyh.rs0
case Intrinsic::hexagon_M2_mmpyh_rs1: // llvm.hexagon.M2.mmpyh.rs1
case Intrinsic::hexagon_M2_mmpyh_s0: // llvm.hexagon.M2.mmpyh.s0
case Intrinsic::hexagon_M2_mmpyh_s1: // llvm.hexagon.M2.mmpyh.s1
case Intrinsic::hexagon_M2_mmpyl_rs0: // llvm.hexagon.M2.mmpyl.rs0
case Intrinsic::hexagon_M2_mmpyl_rs1: // llvm.hexagon.M2.mmpyl.rs1
case Intrinsic::hexagon_M2_mmpyl_s0: // llvm.hexagon.M2.mmpyl.s0
case Intrinsic::hexagon_M2_mmpyl_s1: // llvm.hexagon.M2.mmpyl.s1
case Intrinsic::hexagon_M2_mmpyuh_rs0: // llvm.hexagon.M2.mmpyuh.rs0
case Intrinsic::hexagon_M2_mmpyuh_rs1: // llvm.hexagon.M2.mmpyuh.rs1
case Intrinsic::hexagon_M2_mmpyuh_s0: // llvm.hexagon.M2.mmpyuh.s0
case Intrinsic::hexagon_M2_mmpyuh_s1: // llvm.hexagon.M2.mmpyuh.s1
case Intrinsic::hexagon_M2_mmpyul_rs0: // llvm.hexagon.M2.mmpyul.rs0
case Intrinsic::hexagon_M2_mmpyul_rs1: // llvm.hexagon.M2.mmpyul.rs1
case Intrinsic::hexagon_M2_mmpyul_s0: // llvm.hexagon.M2.mmpyul.s0
case Intrinsic::hexagon_M2_mmpyul_s1: // llvm.hexagon.M2.mmpyul.s1
case Intrinsic::hexagon_M2_vabsdiffh: // llvm.hexagon.M2.vabsdiffh
case Intrinsic::hexagon_M2_vabsdiffw: // llvm.hexagon.M2.vabsdiffw
case Intrinsic::hexagon_M2_vcmpy_s0_sat_i: // llvm.hexagon.M2.vcmpy.s0.sat.i
case Intrinsic::hexagon_M2_vcmpy_s0_sat_r: // llvm.hexagon.M2.vcmpy.s0.sat.r
case Intrinsic::hexagon_M2_vcmpy_s1_sat_i: // llvm.hexagon.M2.vcmpy.s1.sat.i
case Intrinsic::hexagon_M2_vcmpy_s1_sat_r: // llvm.hexagon.M2.vcmpy.s1.sat.r
case Intrinsic::hexagon_M2_vdmpys_s0: // llvm.hexagon.M2.vdmpys.s0
case Intrinsic::hexagon_M2_vdmpys_s1: // llvm.hexagon.M2.vdmpys.s1
case Intrinsic::hexagon_M2_vmpy2es_s0: // llvm.hexagon.M2.vmpy2es.s0
case Intrinsic::hexagon_M2_vmpy2es_s1: // llvm.hexagon.M2.vmpy2es.s1
case Intrinsic::hexagon_M2_vrcmpyi_s0: // llvm.hexagon.M2.vrcmpyi.s0
case Intrinsic::hexagon_M2_vrcmpyi_s0c: // llvm.hexagon.M2.vrcmpyi.s0c
case Intrinsic::hexagon_M2_vrcmpyr_s0: // llvm.hexagon.M2.vrcmpyr.s0
case Intrinsic::hexagon_M2_vrcmpyr_s0c: // llvm.hexagon.M2.vrcmpyr.s0c
case Intrinsic::hexagon_M2_vrmpy_s0: // llvm.hexagon.M2.vrmpy.s0
case Intrinsic::hexagon_S2_extractup_rp: // llvm.hexagon.S2.extractup.rp
case Intrinsic::hexagon_S2_lfsp: // llvm.hexagon.S2.lfsp
case Intrinsic::hexagon_S2_shuffeb: // llvm.hexagon.S2.shuffeb
case Intrinsic::hexagon_S2_shuffeh: // llvm.hexagon.S2.shuffeh
case Intrinsic::hexagon_S2_shuffob: // llvm.hexagon.S2.shuffob
case Intrinsic::hexagon_S2_shuffoh: // llvm.hexagon.S2.shuffoh
case Intrinsic::hexagon_S2_vtrunewh: // llvm.hexagon.S2.vtrunewh
case Intrinsic::hexagon_S2_vtrunowh: // llvm.hexagon.S2.vtrunowh
case Intrinsic::hexagon_S4_andnp: // llvm.hexagon.S4.andnp
case Intrinsic::hexagon_S4_ornp: // llvm.hexagon.S4.ornp
case Intrinsic::x86_bmi_bextr_64: // llvm.x86.bmi.bextr.64
case Intrinsic::x86_bmi_bzhi_64: // llvm.x86.bmi.bzhi.64
case Intrinsic::x86_bmi_pdep_64: // llvm.x86.bmi.pdep.64
case Intrinsic::x86_bmi_pext_64: // llvm.x86.bmi.pext.64
case Intrinsic::x86_sse42_crc32_64_64: // llvm.x86.sse42.crc32.64.64
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i64, MVT::i64);
break;
case Intrinsic::hexagon_M2_vrcmpys_acc_s1: // llvm.hexagon.M2.vrcmpys.acc.s1
case Intrinsic::hexagon_S2_asl_i_p_acc: // llvm.hexagon.S2.asl.i.p.acc
case Intrinsic::hexagon_S2_asl_i_p_and: // llvm.hexagon.S2.asl.i.p.and
case Intrinsic::hexagon_S2_asl_i_p_nac: // llvm.hexagon.S2.asl.i.p.nac
case Intrinsic::hexagon_S2_asl_i_p_or: // llvm.hexagon.S2.asl.i.p.or
case Intrinsic::hexagon_S2_asl_i_p_xacc: // llvm.hexagon.S2.asl.i.p.xacc
case Intrinsic::hexagon_S2_asl_r_p_acc: // llvm.hexagon.S2.asl.r.p.acc
case Intrinsic::hexagon_S2_asl_r_p_and: // llvm.hexagon.S2.asl.r.p.and
case Intrinsic::hexagon_S2_asl_r_p_nac: // llvm.hexagon.S2.asl.r.p.nac
case Intrinsic::hexagon_S2_asl_r_p_or: // llvm.hexagon.S2.asl.r.p.or
case Intrinsic::hexagon_S2_asr_i_p_acc: // llvm.hexagon.S2.asr.i.p.acc
case Intrinsic::hexagon_S2_asr_i_p_and: // llvm.hexagon.S2.asr.i.p.and
case Intrinsic::hexagon_S2_asr_i_p_nac: // llvm.hexagon.S2.asr.i.p.nac
case Intrinsic::hexagon_S2_asr_i_p_or: // llvm.hexagon.S2.asr.i.p.or
case Intrinsic::hexagon_S2_asr_r_p_acc: // llvm.hexagon.S2.asr.r.p.acc
case Intrinsic::hexagon_S2_asr_r_p_and: // llvm.hexagon.S2.asr.r.p.and
case Intrinsic::hexagon_S2_asr_r_p_nac: // llvm.hexagon.S2.asr.r.p.nac
case Intrinsic::hexagon_S2_asr_r_p_or: // llvm.hexagon.S2.asr.r.p.or
case Intrinsic::hexagon_S2_lsl_r_p_acc: // llvm.hexagon.S2.lsl.r.p.acc
case Intrinsic::hexagon_S2_lsl_r_p_and: // llvm.hexagon.S2.lsl.r.p.and
case Intrinsic::hexagon_S2_lsl_r_p_nac: // llvm.hexagon.S2.lsl.r.p.nac
case Intrinsic::hexagon_S2_lsl_r_p_or: // llvm.hexagon.S2.lsl.r.p.or
case Intrinsic::hexagon_S2_lsr_i_p_acc: // llvm.hexagon.S2.lsr.i.p.acc
case Intrinsic::hexagon_S2_lsr_i_p_and: // llvm.hexagon.S2.lsr.i.p.and
case Intrinsic::hexagon_S2_lsr_i_p_nac: // llvm.hexagon.S2.lsr.i.p.nac
case Intrinsic::hexagon_S2_lsr_i_p_or: // llvm.hexagon.S2.lsr.i.p.or
case Intrinsic::hexagon_S2_lsr_i_p_xacc: // llvm.hexagon.S2.lsr.i.p.xacc
case Intrinsic::hexagon_S2_lsr_r_p_acc: // llvm.hexagon.S2.lsr.r.p.acc
case Intrinsic::hexagon_S2_lsr_r_p_and: // llvm.hexagon.S2.lsr.r.p.and
case Intrinsic::hexagon_S2_lsr_r_p_nac: // llvm.hexagon.S2.lsr.r.p.nac
case Intrinsic::hexagon_S2_lsr_r_p_or: // llvm.hexagon.S2.lsr.r.p.or
case Intrinsic::hexagon_S2_valignib: // llvm.hexagon.S2.valignib
case Intrinsic::hexagon_S2_valignrb: // llvm.hexagon.S2.valignrb
case Intrinsic::hexagon_S2_vspliceib: // llvm.hexagon.S2.vspliceib
case Intrinsic::hexagon_S2_vsplicerb: // llvm.hexagon.S2.vsplicerb
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i64, MVT::i64, MVT::i64, MVT::i32);
break;
case Intrinsic::hexagon_S2_insertp: // llvm.hexagon.S2.insertp
VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::i64, MVT::i64, MVT::i64, MVT::i32, MVT::i32);
break;
case Intrinsic::hexagon_A2_vraddub_acc: // llvm.hexagon.A2.vraddub.acc
case Intrinsic::hexagon_A2_vrsadub_acc: // llvm.hexagon.A2.vrsadub.acc
case Intrinsic::hexagon_M2_mmachs_rs0: // llvm.hexagon.M2.mmachs.rs0
case Intrinsic::hexagon_M2_mmachs_rs1: // llvm.hexagon.M2.mmachs.rs1
case Intrinsic::hexagon_M2_mmachs_s0: // llvm.hexagon.M2.mmachs.s0
case Intrinsic::hexagon_M2_mmachs_s1: // llvm.hexagon.M2.mmachs.s1
case Intrinsic::hexagon_M2_mmacls_rs0: // llvm.hexagon.M2.mmacls.rs0
case Intrinsic::hexagon_M2_mmacls_rs1: // llvm.hexagon.M2.mmacls.rs1
case Intrinsic::hexagon_M2_mmacls_s0: // llvm.hexagon.M2.mmacls.s0
case Intrinsic::hexagon_M2_mmacls_s1: // llvm.hexagon.M2.mmacls.s1
case Intrinsic::hexagon_M2_mmacuhs_rs0: // llvm.hexagon.M2.mmacuhs.rs0
case Intrinsic::hexagon_M2_mmacuhs_rs1: // llvm.hexagon.M2.mmacuhs.rs1
case Intrinsic::hexagon_M2_mmacuhs_s0: // llvm.hexagon.M2.mmacuhs.s0
case Intrinsic::hexagon_M2_mmacuhs_s1: // llvm.hexagon.M2.mmacuhs.s1
case Intrinsic::hexagon_M2_mmaculs_rs0: // llvm.hexagon.M2.mmaculs.rs0
case Intrinsic::hexagon_M2_mmaculs_rs1: // llvm.hexagon.M2.mmaculs.rs1
case Intrinsic::hexagon_M2_mmaculs_s0: // llvm.hexagon.M2.mmaculs.s0
case Intrinsic::hexagon_M2_mmaculs_s1: // llvm.hexagon.M2.mmaculs.s1
case Intrinsic::hexagon_M2_vcmac_s0_sat_i: // llvm.hexagon.M2.vcmac.s0.sat.i
case Intrinsic::hexagon_M2_vcmac_s0_sat_r: // llvm.hexagon.M2.vcmac.s0.sat.r
case Intrinsic::hexagon_M2_vdmacs_s0: // llvm.hexagon.M2.vdmacs.s0
case Intrinsic::hexagon_M2_vdmacs_s1: // llvm.hexagon.M2.vdmacs.s1
case Intrinsic::hexagon_M2_vmac2es: // llvm.hexagon.M2.vmac2es
case Intrinsic::hexagon_M2_vmac2es_s0: // llvm.hexagon.M2.vmac2es.s0
case Intrinsic::hexagon_M2_vmac2es_s1: // llvm.hexagon.M2.vmac2es.s1
case Intrinsic::hexagon_M2_vrcmaci_s0: // llvm.hexagon.M2.vrcmaci.s0
case Intrinsic::hexagon_M2_vrcmaci_s0c: // llvm.hexagon.M2.vrcmaci.s0c
case Intrinsic::hexagon_M2_vrcmacr_s0: // llvm.hexagon.M2.vrcmacr.s0
case Intrinsic::hexagon_M2_vrcmacr_s0c: // llvm.hexagon.M2.vrcmacr.s0c
case Intrinsic::hexagon_M2_vrmac_s0: // llvm.hexagon.M2.vrmac.s0
case Intrinsic::hexagon_M4_xor_xacc: // llvm.hexagon.M4.xor.xacc
case Intrinsic::hexagon_S2_insertp_rp: // llvm.hexagon.S2.insertp.rp
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i64, MVT::i64, MVT::i64, MVT::i64);
break;
case Intrinsic::x86_sse42_crc32_64_8: // llvm.x86.sse42.crc32.64.8
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i64, MVT::i8);
break;
case Intrinsic::x86_sse2_cvtsd2si64: // llvm.x86.sse2.cvtsd2si64
case Intrinsic::x86_sse2_cvttsd2si64: // llvm.x86.sse2.cvttsd2si64
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::v2f64);
break;
case Intrinsic::x86_sse41_pextrq: // llvm.x86.sse41.pextrq
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::v2i64, MVT::i32);
break;
case Intrinsic::x86_sse_cvtss2si64: // llvm.x86.sse.cvtss2si64
case Intrinsic::x86_sse_cvttss2si64: // llvm.x86.sse.cvttss2si64
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::v4f32);
break;
case Intrinsic::arm_thread_pointer: // llvm.arm.thread.pointer
case Intrinsic::eh_sjlj_lsda: // llvm.eh.sjlj.lsda
case Intrinsic::stacksave: // llvm.stacksave
case Intrinsic::xcore_waitevent: // llvm.xcore.waitevent
VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::iPTR);
break;
case Intrinsic::eh_dwarf_cfa: // llvm.eh.dwarf.cfa
case Intrinsic::frameaddress: // llvm.frameaddress
case Intrinsic::returnaddress: // llvm.returnaddress
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iPTR, MVT::i32);
break;
case Intrinsic::adjust_trampoline: // llvm.adjust.trampoline
case Intrinsic::xcore_checkevent: // llvm.xcore.checkevent
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iPTR, MVT::iPTR);
break;
case Intrinsic::gcread: // llvm.gcread
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iPTR, MVT::iPTR, MVT::iPTR);
break;
case Intrinsic::x86_avx2_pabs_w: // llvm.x86.avx2.pabs.w
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i16, MVT::v16i16);
break;
case Intrinsic::x86_avx2_pslli_w: // llvm.x86.avx2.pslli.w
case Intrinsic::x86_avx2_psrai_w: // llvm.x86.avx2.psrai.w
case Intrinsic::x86_avx2_psrli_w: // llvm.x86.avx2.psrli.w
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i16, MVT::v16i16, MVT::i32);
break;
case Intrinsic::x86_avx2_padds_w: // llvm.x86.avx2.padds.w
case Intrinsic::x86_avx2_paddus_w: // llvm.x86.avx2.paddus.w
case Intrinsic::x86_avx2_pavg_w: // llvm.x86.avx2.pavg.w
case Intrinsic::x86_avx2_phadd_sw: // llvm.x86.avx2.phadd.sw
case Intrinsic::x86_avx2_phadd_w: // llvm.x86.avx2.phadd.w
case Intrinsic::x86_avx2_phsub_sw: // llvm.x86.avx2.phsub.sw
case Intrinsic::x86_avx2_phsub_w: // llvm.x86.avx2.phsub.w
case Intrinsic::x86_avx2_pmaxs_w: // llvm.x86.avx2.pmaxs.w
case Intrinsic::x86_avx2_pmaxu_w: // llvm.x86.avx2.pmaxu.w
case Intrinsic::x86_avx2_pmins_w: // llvm.x86.avx2.pmins.w
case Intrinsic::x86_avx2_pminu_w: // llvm.x86.avx2.pminu.w
case Intrinsic::x86_avx2_pmul_hr_sw: // llvm.x86.avx2.pmul.hr.sw
case Intrinsic::x86_avx2_pmulh_w: // llvm.x86.avx2.pmulh.w
case Intrinsic::x86_avx2_pmulhu_w: // llvm.x86.avx2.pmulhu.w
case Intrinsic::x86_avx2_psign_w: // llvm.x86.avx2.psign.w
case Intrinsic::x86_avx2_psubs_w: // llvm.x86.avx2.psubs.w
case Intrinsic::x86_avx2_psubus_w: // llvm.x86.avx2.psubus.w
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i16, MVT::v16i16, MVT::v16i16);
break;
case Intrinsic::x86_avx2_pblendw: // llvm.x86.avx2.pblendw
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i16, MVT::v16i16, MVT::v16i16, MVT::i32);
break;
case Intrinsic::x86_avx2_psll_w: // llvm.x86.avx2.psll.w
case Intrinsic::x86_avx2_psra_w: // llvm.x86.avx2.psra.w
case Intrinsic::x86_avx2_psrl_w: // llvm.x86.avx2.psrl.w
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i16, MVT::v16i16, MVT::v8i16);
break;
case Intrinsic::x86_avx2_pmovsxbw: // llvm.x86.avx2.pmovsxbw
case Intrinsic::x86_avx2_pmovzxbw: // llvm.x86.avx2.pmovzxbw
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i16, MVT::v16i8);
break;
case Intrinsic::x86_avx2_pmadd_ub_sw: // llvm.x86.avx2.pmadd.ub.sw
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i16, MVT::v32i8, MVT::v32i8);
break;
case Intrinsic::x86_avx2_mpsadbw: // llvm.x86.avx2.mpsadbw
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i16, MVT::v32i8, MVT::v32i8, MVT::i32);
break;
case Intrinsic::x86_avx2_pbroadcastw_256: // llvm.x86.avx2.pbroadcastw.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i16, MVT::v8i16);
break;
case Intrinsic::x86_avx2_packssdw: // llvm.x86.avx2.packssdw
case Intrinsic::x86_avx2_packusdw: // llvm.x86.avx2.packusdw
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i16, MVT::v8i32, MVT::v8i32);
break;
case Intrinsic::ppc_altivec_lvebx: // llvm.ppc.altivec.lvebx
case Intrinsic::ppc_altivec_lvsl: // llvm.ppc.altivec.lvsl
case Intrinsic::ppc_altivec_lvsr: // llvm.ppc.altivec.lvsr
case Intrinsic::x86_sse3_ldu_dq: // llvm.x86.sse3.ldu.dq
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i8, MVT::iPTR);
break;
case Intrinsic::x86_avx2_pbroadcastb_128: // llvm.x86.avx2.pbroadcastb.128
case Intrinsic::x86_ssse3_pabs_b_128: // llvm.x86.ssse3.pabs.b.128
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i8, MVT::v16i8);
break;
case Intrinsic::spu_si_shlqbii: // llvm.spu.si.shlqbii
case Intrinsic::spu_si_shlqbyi: // llvm.spu.si.shlqbyi
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::i8);
break;
case Intrinsic::x86_sse42_pcmpestrm128: // llvm.x86.sse42.pcmpestrm128
VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::v16i8, MVT::v16i8, MVT::i32, MVT::v16i8, MVT::i32, MVT::i8);
break;
case Intrinsic::spu_si_andbi: // llvm.spu.si.andbi
case Intrinsic::spu_si_ceqbi: // llvm.spu.si.ceqbi
case Intrinsic::spu_si_cgtbi: // llvm.spu.si.cgtbi
case Intrinsic::spu_si_clgtbi: // llvm.spu.si.clgtbi
case Intrinsic::spu_si_orbi: // llvm.spu.si.orbi
case Intrinsic::spu_si_xorbi: // llvm.spu.si.xorbi
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::i8);
break;
case Intrinsic::ppc_altivec_vaddsbs: // llvm.ppc.altivec.vaddsbs
case Intrinsic::ppc_altivec_vaddubs: // llvm.ppc.altivec.vaddubs
case Intrinsic::ppc_altivec_vavgsb: // llvm.ppc.altivec.vavgsb
case Intrinsic::ppc_altivec_vavgub: // llvm.ppc.altivec.vavgub
case Intrinsic::ppc_altivec_vcmpequb: // llvm.ppc.altivec.vcmpequb
case Intrinsic::ppc_altivec_vcmpgtsb: // llvm.ppc.altivec.vcmpgtsb
case Intrinsic::ppc_altivec_vcmpgtub: // llvm.ppc.altivec.vcmpgtub
case Intrinsic::ppc_altivec_vmaxsb: // llvm.ppc.altivec.vmaxsb
case Intrinsic::ppc_altivec_vmaxub: // llvm.ppc.altivec.vmaxub
case Intrinsic::ppc_altivec_vminsb: // llvm.ppc.altivec.vminsb
case Intrinsic::ppc_altivec_vminub: // llvm.ppc.altivec.vminub
case Intrinsic::ppc_altivec_vrlb: // llvm.ppc.altivec.vrlb
case Intrinsic::ppc_altivec_vslb: // llvm.ppc.altivec.vslb
case Intrinsic::ppc_altivec_vsrab: // llvm.ppc.altivec.vsrab
case Intrinsic::ppc_altivec_vsrb: // llvm.ppc.altivec.vsrb
case Intrinsic::ppc_altivec_vsubsbs: // llvm.ppc.altivec.vsubsbs
case Intrinsic::ppc_altivec_vsububs: // llvm.ppc.altivec.vsububs
case Intrinsic::spu_si_ceqb: // llvm.spu.si.ceqb
case Intrinsic::spu_si_cgtb: // llvm.spu.si.cgtb
case Intrinsic::spu_si_clgtb: // llvm.spu.si.clgtb
case Intrinsic::x86_sse2_padds_b: // llvm.x86.sse2.padds.b
case Intrinsic::x86_sse2_paddus_b: // llvm.x86.sse2.paddus.b
case Intrinsic::x86_sse2_pavg_b: // llvm.x86.sse2.pavg.b
case Intrinsic::x86_sse2_pmaxu_b: // llvm.x86.sse2.pmaxu.b
case Intrinsic::x86_sse2_pminu_b: // llvm.x86.sse2.pminu.b
case Intrinsic::x86_sse2_psubs_b: // llvm.x86.sse2.psubs.b
case Intrinsic::x86_sse2_psubus_b: // llvm.x86.sse2.psubus.b
case Intrinsic::x86_sse41_pmaxsb: // llvm.x86.sse41.pmaxsb
case Intrinsic::x86_sse41_pminsb: // llvm.x86.sse41.pminsb
case Intrinsic::x86_ssse3_pshuf_b_128: // llvm.x86.ssse3.pshuf.b.128
case Intrinsic::x86_ssse3_psign_b_128: // llvm.x86.ssse3.psign.b.128
case Intrinsic::x86_xop_vpcomeqb: // llvm.x86.xop.vpcomeqb
case Intrinsic::x86_xop_vpcomequb: // llvm.x86.xop.vpcomequb
case Intrinsic::x86_xop_vpcomfalseb: // llvm.x86.xop.vpcomfalseb
case Intrinsic::x86_xop_vpcomfalseub: // llvm.x86.xop.vpcomfalseub
case Intrinsic::x86_xop_vpcomgeb: // llvm.x86.xop.vpcomgeb
case Intrinsic::x86_xop_vpcomgeub: // llvm.x86.xop.vpcomgeub
case Intrinsic::x86_xop_vpcomgtb: // llvm.x86.xop.vpcomgtb
case Intrinsic::x86_xop_vpcomgtub: // llvm.x86.xop.vpcomgtub
case Intrinsic::x86_xop_vpcomleb: // llvm.x86.xop.vpcomleb
case Intrinsic::x86_xop_vpcomleub: // llvm.x86.xop.vpcomleub
case Intrinsic::x86_xop_vpcomltb: // llvm.x86.xop.vpcomltb
case Intrinsic::x86_xop_vpcomltub: // llvm.x86.xop.vpcomltub
case Intrinsic::x86_xop_vpcomneb: // llvm.x86.xop.vpcomneb
case Intrinsic::x86_xop_vpcomneub: // llvm.x86.xop.vpcomneub
case Intrinsic::x86_xop_vpcomtrueb: // llvm.x86.xop.vpcomtrueb
case Intrinsic::x86_xop_vpcomtrueub: // llvm.x86.xop.vpcomtrueub
case Intrinsic::x86_xop_vprotb: // llvm.x86.xop.vprotb
case Intrinsic::x86_xop_vpshab: // llvm.x86.xop.vpshab
case Intrinsic::x86_xop_vpshlb: // llvm.x86.xop.vpshlb
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::v16i8);
break;
case Intrinsic::x86_sse42_pcmpistrm128: // llvm.x86.sse42.pcmpistrm128
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::i8);
break;
case Intrinsic::x86_sse41_pblendvb: // llvm.x86.sse41.pblendvb
case Intrinsic::x86_xop_vpperm: // llvm.x86.xop.vpperm
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::v16i8);
break;
case Intrinsic::ppc_altivec_vpkswss: // llvm.ppc.altivec.vpkswss
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v4i32, MVT::v4i32);
break;
case Intrinsic::ppc_altivec_vpkshss: // llvm.ppc.altivec.vpkshss
case Intrinsic::ppc_altivec_vpkshus: // llvm.ppc.altivec.vpkshus
case Intrinsic::ppc_altivec_vpkuhus: // llvm.ppc.altivec.vpkuhus
case Intrinsic::x86_sse2_packsswb_128: // llvm.x86.sse2.packsswb.128
case Intrinsic::x86_sse2_packuswb_128: // llvm.x86.sse2.packuswb.128
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v8i16, MVT::v8i16);
break;
case Intrinsic::x86_avx_maskload_pd: // llvm.x86.avx.maskload.pd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::iPTR, MVT::v2f64);
break;
case Intrinsic::x86_sse2_sqrt_pd: // llvm.x86.sse2.sqrt.pd
case Intrinsic::x86_sse2_sqrt_sd: // llvm.x86.sse2.sqrt.sd
case Intrinsic::x86_xop_vfrcz_pd: // llvm.x86.xop.vfrcz.pd
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v2f64);
break;
case Intrinsic::x86_sse2_cvtsi2sd: // llvm.x86.sse2.cvtsi2sd
case Intrinsic::x86_sse41_round_pd: // llvm.x86.sse41.round.pd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i32);
break;
case Intrinsic::x86_sse2_cvtsi642sd: // llvm.x86.sse2.cvtsi642sd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i64);
break;
case Intrinsic::spu_si_dfa: // llvm.spu.si.dfa
case Intrinsic::spu_si_dfm: // llvm.spu.si.dfm
case Intrinsic::spu_si_dfma: // llvm.spu.si.dfma
case Intrinsic::spu_si_dfms: // llvm.spu.si.dfms
case Intrinsic::spu_si_dfnma: // llvm.spu.si.dfnma
case Intrinsic::spu_si_dfnms: // llvm.spu.si.dfnms
case Intrinsic::spu_si_dfs: // llvm.spu.si.dfs
case Intrinsic::x86_sse2_add_sd: // llvm.x86.sse2.add.sd
case Intrinsic::x86_sse2_div_sd: // llvm.x86.sse2.div.sd
case Intrinsic::x86_sse2_max_pd: // llvm.x86.sse2.max.pd
case Intrinsic::x86_sse2_max_sd: // llvm.x86.sse2.max.sd
case Intrinsic::x86_sse2_min_pd: // llvm.x86.sse2.min.pd
case Intrinsic::x86_sse2_min_sd: // llvm.x86.sse2.min.sd
case Intrinsic::x86_sse2_mul_sd: // llvm.x86.sse2.mul.sd
case Intrinsic::x86_sse2_sub_sd: // llvm.x86.sse2.sub.sd
case Intrinsic::x86_sse3_addsub_pd: // llvm.x86.sse3.addsub.pd
case Intrinsic::x86_sse3_hadd_pd: // llvm.x86.sse3.hadd.pd
case Intrinsic::x86_sse3_hsub_pd: // llvm.x86.sse3.hsub.pd
case Intrinsic::x86_xop_vfrcz_sd: // llvm.x86.xop.vfrcz.sd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v2f64);
break;
case Intrinsic::x86_sse41_blendpd: // llvm.x86.sse41.blendpd
case Intrinsic::x86_sse41_dppd: // llvm.x86.sse41.dppd
case Intrinsic::x86_sse41_round_sd: // llvm.x86.sse41.round.sd
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::i32);
break;
case Intrinsic::x86_sse2_cmp_pd: // llvm.x86.sse2.cmp.pd
case Intrinsic::x86_sse2_cmp_sd: // llvm.x86.sse2.cmp.sd
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::i8);
break;
case Intrinsic::x86_fma4_vfmadd_pd: // llvm.x86.fma4.vfmadd.pd
case Intrinsic::x86_fma4_vfmadd_sd: // llvm.x86.fma4.vfmadd.sd
case Intrinsic::x86_fma4_vfmaddsub_pd: // llvm.x86.fma4.vfmaddsub.pd
case Intrinsic::x86_fma4_vfmsub_pd: // llvm.x86.fma4.vfmsub.pd
case Intrinsic::x86_fma4_vfmsub_sd: // llvm.x86.fma4.vfmsub.sd
case Intrinsic::x86_fma4_vfmsubadd_pd: // llvm.x86.fma4.vfmsubadd.pd
case Intrinsic::x86_fma4_vfnmadd_pd: // llvm.x86.fma4.vfnmadd.pd
case Intrinsic::x86_fma4_vfnmadd_sd: // llvm.x86.fma4.vfnmadd.sd
case Intrinsic::x86_fma4_vfnmsub_pd: // llvm.x86.fma4.vfnmsub.pd
case Intrinsic::x86_fma4_vfnmsub_sd: // llvm.x86.fma4.vfnmsub.sd
case Intrinsic::x86_sse41_blendvpd: // llvm.x86.sse41.blendvpd
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::v2f64);
break;
case Intrinsic::x86_xop_vpermil2pd: // llvm.x86.xop.vpermil2pd
VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::i8);
break;
case Intrinsic::x86_avx_vpermilvar_pd: // llvm.x86.avx.vpermilvar.pd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v2i64);
break;
case Intrinsic::x86_sse2_cvtss2sd: // llvm.x86.sse2.cvtss2sd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v4f32);
break;
case Intrinsic::x86_sse2_cvtps2pd: // llvm.x86.sse2.cvtps2pd
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v4f32);
break;
case Intrinsic::x86_avx_vextractf128_pd_256: // llvm.x86.avx.vextractf128.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v4f64, MVT::i8);
break;
case Intrinsic::x86_sse2_cvtdq2pd: // llvm.x86.sse2.cvtdq2pd
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v4i32);
break;
case Intrinsic::x86_sse_cvtpi2pd: // llvm.x86.sse.cvtpi2pd
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::x86mmx);
break;
case Intrinsic::arm_neon_vacged: // llvm.arm.neon.vacged
case Intrinsic::arm_neon_vacgtd: // llvm.arm.neon.vacgtd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2f32, MVT::v2f32);
break;
case Intrinsic::x86_sse41_movntdqa: // llvm.x86.sse41.movntdqa
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::iPTR);
break;
case Intrinsic::x86_avx2_maskload_q: // llvm.x86.avx2.maskload.q
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::iPTR, MVT::v2i64);
break;
case Intrinsic::x86_sse41_pmovsxbq: // llvm.x86.sse41.pmovsxbq
case Intrinsic::x86_sse41_pmovzxbq: // llvm.x86.sse41.pmovzxbq
case Intrinsic::x86_xop_vphaddbq: // llvm.x86.xop.vphaddbq
case Intrinsic::x86_xop_vphaddubq: // llvm.x86.xop.vphaddubq
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v16i8);
break;
case Intrinsic::x86_sse2_psad_bw: // llvm.x86.sse2.psad.bw
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v16i8, MVT::v16i8);
break;
case Intrinsic::x86_aesni_aesimc: // llvm.x86.aesni.aesimc
case Intrinsic::x86_avx2_pbroadcastq_128: // llvm.x86.avx2.pbroadcastq.128
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v2i64);
break;
case Intrinsic::x86_sse2_psll_dq: // llvm.x86.sse2.psll.dq
case Intrinsic::x86_sse2_psll_dq_bs: // llvm.x86.sse2.psll.dq.bs
case Intrinsic::x86_sse2_pslli_q: // llvm.x86.sse2.pslli.q
case Intrinsic::x86_sse2_psrl_dq: // llvm.x86.sse2.psrl.dq
case Intrinsic::x86_sse2_psrl_dq_bs: // llvm.x86.sse2.psrl.dq.bs
case Intrinsic::x86_sse2_psrli_q: // llvm.x86.sse2.psrli.q
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::i32);
break;
case Intrinsic::x86_aesni_aeskeygenassist: // llvm.x86.aesni.aeskeygenassist
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::i8);
break;
case Intrinsic::x86_aesni_aesdec: // llvm.x86.aesni.aesdec
case Intrinsic::x86_aesni_aesdeclast: // llvm.x86.aesni.aesdeclast
case Intrinsic::x86_aesni_aesenc: // llvm.x86.aesni.aesenc
case Intrinsic::x86_aesni_aesenclast: // llvm.x86.aesni.aesenclast
case Intrinsic::x86_avx2_psllv_q: // llvm.x86.avx2.psllv.q
case Intrinsic::x86_avx2_psrlv_q: // llvm.x86.avx2.psrlv.q
case Intrinsic::x86_sse2_psll_q: // llvm.x86.sse2.psll.q
case Intrinsic::x86_sse2_psrl_q: // llvm.x86.sse2.psrl.q
case Intrinsic::x86_xop_vpcomeqq: // llvm.x86.xop.vpcomeqq
case Intrinsic::x86_xop_vpcomequq: // llvm.x86.xop.vpcomequq
case Intrinsic::x86_xop_vpcomfalseq: // llvm.x86.xop.vpcomfalseq
case Intrinsic::x86_xop_vpcomfalseuq: // llvm.x86.xop.vpcomfalseuq
case Intrinsic::x86_xop_vpcomgeq: // llvm.x86.xop.vpcomgeq
case Intrinsic::x86_xop_vpcomgeuq: // llvm.x86.xop.vpcomgeuq
case Intrinsic::x86_xop_vpcomgtq: // llvm.x86.xop.vpcomgtq
case Intrinsic::x86_xop_vpcomgtuq: // llvm.x86.xop.vpcomgtuq
case Intrinsic::x86_xop_vpcomleq: // llvm.x86.xop.vpcomleq
case Intrinsic::x86_xop_vpcomleuq: // llvm.x86.xop.vpcomleuq
case Intrinsic::x86_xop_vpcomltq: // llvm.x86.xop.vpcomltq
case Intrinsic::x86_xop_vpcomltuq: // llvm.x86.xop.vpcomltuq
case Intrinsic::x86_xop_vpcomneq: // llvm.x86.xop.vpcomneq
case Intrinsic::x86_xop_vpcomneuq: // llvm.x86.xop.vpcomneuq
case Intrinsic::x86_xop_vpcomtrueq: // llvm.x86.xop.vpcomtrueq
case Intrinsic::x86_xop_vpcomtrueuq: // llvm.x86.xop.vpcomtrueuq
case Intrinsic::x86_xop_vprotq: // llvm.x86.xop.vprotq
case Intrinsic::x86_xop_vpshaq: // llvm.x86.xop.vpshaq
case Intrinsic::x86_xop_vpshlq: // llvm.x86.xop.vpshlq
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::v2i64);
break;
case Intrinsic::x86_xop_vpcmov: // llvm.x86.xop.vpcmov
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2i64, MVT::v2i64, MVT::v2i64, MVT::v2i64);
break;
case Intrinsic::x86_sse41_pmovsxdq: // llvm.x86.sse41.pmovsxdq
case Intrinsic::x86_sse41_pmovzxdq: // llvm.x86.sse41.pmovzxdq
case Intrinsic::x86_xop_vphadddq: // llvm.x86.xop.vphadddq
case Intrinsic::x86_xop_vphaddudq: // llvm.x86.xop.vphaddudq
case Intrinsic::x86_xop_vphsubdq: // llvm.x86.xop.vphsubdq
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v4i32);
break;
case Intrinsic::x86_sse2_pmulu_dq: // llvm.x86.sse2.pmulu.dq
case Intrinsic::x86_sse41_pmuldq: // llvm.x86.sse41.pmuldq
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v4i32, MVT::v4i32);
break;
case Intrinsic::x86_xop_vpmacsdqh: // llvm.x86.xop.vpmacsdqh
case Intrinsic::x86_xop_vpmacsdql: // llvm.x86.xop.vpmacsdql
case Intrinsic::x86_xop_vpmacssdqh: // llvm.x86.xop.vpmacssdqh
case Intrinsic::x86_xop_vpmacssdql: // llvm.x86.xop.vpmacssdql
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2i64, MVT::v4i32, MVT::v4i32, MVT::v2i64);
break;
case Intrinsic::x86_avx2_vextracti128: // llvm.x86.avx2.vextracti128
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v4i64, MVT::i8);
break;
case Intrinsic::x86_sse41_pmovsxwq: // llvm.x86.sse41.pmovsxwq
case Intrinsic::x86_sse41_pmovzxwq: // llvm.x86.sse41.pmovzxwq
case Intrinsic::x86_xop_vphadduwq: // llvm.x86.xop.vphadduwq
case Intrinsic::x86_xop_vphaddwq: // llvm.x86.xop.vphaddwq
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v8i16);
break;
case Intrinsic::x86_avx_ldu_dq_256: // llvm.x86.avx.ldu.dq.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v32i8, MVT::iPTR);
break;
case Intrinsic::x86_avx2_packsswb: // llvm.x86.avx2.packsswb
case Intrinsic::x86_avx2_packuswb: // llvm.x86.avx2.packuswb
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v32i8, MVT::v16i16, MVT::v16i16);
break;
case Intrinsic::x86_avx2_pbroadcastb_256: // llvm.x86.avx2.pbroadcastb.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v32i8, MVT::v16i8);
break;
case Intrinsic::x86_avx2_pabs_b: // llvm.x86.avx2.pabs.b
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v32i8, MVT::v32i8);
break;
case Intrinsic::x86_avx2_padds_b: // llvm.x86.avx2.padds.b
case Intrinsic::x86_avx2_paddus_b: // llvm.x86.avx2.paddus.b
case Intrinsic::x86_avx2_pavg_b: // llvm.x86.avx2.pavg.b
case Intrinsic::x86_avx2_pmaxs_b: // llvm.x86.avx2.pmaxs.b
case Intrinsic::x86_avx2_pmaxu_b: // llvm.x86.avx2.pmaxu.b
case Intrinsic::x86_avx2_pmins_b: // llvm.x86.avx2.pmins.b
case Intrinsic::x86_avx2_pminu_b: // llvm.x86.avx2.pminu.b
case Intrinsic::x86_avx2_pshuf_b: // llvm.x86.avx2.pshuf.b
case Intrinsic::x86_avx2_psign_b: // llvm.x86.avx2.psign.b
case Intrinsic::x86_avx2_psubs_b: // llvm.x86.avx2.psubs.b
case Intrinsic::x86_avx2_psubus_b: // llvm.x86.avx2.psubus.b
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v32i8, MVT::v32i8, MVT::v32i8);
break;
case Intrinsic::x86_avx2_pblendvb: // llvm.x86.avx2.pblendvb
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v32i8, MVT::v32i8, MVT::v32i8, MVT::v32i8);
break;
case Intrinsic::x86_avx_vbroadcast_ss: // llvm.x86.avx.vbroadcast.ss
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::iPTR);
break;
case Intrinsic::x86_avx_maskload_ps: // llvm.x86.avx.maskload.ps
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::iPTR, MVT::v4f32);
break;
case Intrinsic::x86_sse2_cvtpd2ps: // llvm.x86.sse2.cvtpd2ps
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v2f64);
break;
case Intrinsic::ppc_altivec_vexptefp: // llvm.ppc.altivec.vexptefp
case Intrinsic::ppc_altivec_vlogefp: // llvm.ppc.altivec.vlogefp
case Intrinsic::ppc_altivec_vrefp: // llvm.ppc.altivec.vrefp
case Intrinsic::ppc_altivec_vrfim: // llvm.ppc.altivec.vrfim
case Intrinsic::ppc_altivec_vrfin: // llvm.ppc.altivec.vrfin
case Intrinsic::ppc_altivec_vrfip: // llvm.ppc.altivec.vrfip
case Intrinsic::ppc_altivec_vrfiz: // llvm.ppc.altivec.vrfiz
case Intrinsic::ppc_altivec_vrsqrtefp: // llvm.ppc.altivec.vrsqrtefp
case Intrinsic::x86_avx2_vbroadcast_ss_ps: // llvm.x86.avx2.vbroadcast.ss.ps
case Intrinsic::x86_sse_rcp_ps: // llvm.x86.sse.rcp.ps
case Intrinsic::x86_sse_rcp_ss: // llvm.x86.sse.rcp.ss
case Intrinsic::x86_sse_rsqrt_ps: // llvm.x86.sse.rsqrt.ps
case Intrinsic::x86_sse_rsqrt_ss: // llvm.x86.sse.rsqrt.ss
case Intrinsic::x86_sse_sqrt_ps: // llvm.x86.sse.sqrt.ps
case Intrinsic::x86_sse_sqrt_ss: // llvm.x86.sse.sqrt.ss
case Intrinsic::x86_xop_vfrcz_ps: // llvm.x86.xop.vfrcz.ps
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4f32);
break;
case Intrinsic::x86_sse41_round_ps: // llvm.x86.sse41.round.ps
case Intrinsic::x86_sse_cvtsi2ss: // llvm.x86.sse.cvtsi2ss
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i32);
break;
case Intrinsic::x86_sse_cvtsi642ss: // llvm.x86.sse.cvtsi642ss
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i64);
break;
case Intrinsic::x86_sse2_cvtsd2ss: // llvm.x86.sse2.cvtsd2ss
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v2f64);
break;
case Intrinsic::ppc_altivec_vmaxfp: // llvm.ppc.altivec.vmaxfp
case Intrinsic::ppc_altivec_vminfp: // llvm.ppc.altivec.vminfp
case Intrinsic::spu_si_fa: // llvm.spu.si.fa
case Intrinsic::spu_si_fceq: // llvm.spu.si.fceq
case Intrinsic::spu_si_fcgt: // llvm.spu.si.fcgt
case Intrinsic::spu_si_fcmeq: // llvm.spu.si.fcmeq
case Intrinsic::spu_si_fcmgt: // llvm.spu.si.fcmgt
case Intrinsic::spu_si_fm: // llvm.spu.si.fm
case Intrinsic::spu_si_fs: // llvm.spu.si.fs
case Intrinsic::x86_sse3_addsub_ps: // llvm.x86.sse3.addsub.ps
case Intrinsic::x86_sse3_hadd_ps: // llvm.x86.sse3.hadd.ps
case Intrinsic::x86_sse3_hsub_ps: // llvm.x86.sse3.hsub.ps
case Intrinsic::x86_sse_add_ss: // llvm.x86.sse.add.ss
case Intrinsic::x86_sse_div_ss: // llvm.x86.sse.div.ss
case Intrinsic::x86_sse_max_ps: // llvm.x86.sse.max.ps
case Intrinsic::x86_sse_max_ss: // llvm.x86.sse.max.ss
case Intrinsic::x86_sse_min_ps: // llvm.x86.sse.min.ps
case Intrinsic::x86_sse_min_ss: // llvm.x86.sse.min.ss
case Intrinsic::x86_sse_mul_ss: // llvm.x86.sse.mul.ss
case Intrinsic::x86_sse_sub_ss: // llvm.x86.sse.sub.ss
case Intrinsic::x86_xop_vfrcz_ss: // llvm.x86.xop.vfrcz.ss
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v4f32);
break;
case Intrinsic::x86_sse41_blendps: // llvm.x86.sse41.blendps
case Intrinsic::x86_sse41_dpps: // llvm.x86.sse41.dpps
case Intrinsic::x86_sse41_insertps: // llvm.x86.sse41.insertps
case Intrinsic::x86_sse41_round_ss: // llvm.x86.sse41.round.ss
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::i32);
break;
case Intrinsic::x86_sse_cmp_ps: // llvm.x86.sse.cmp.ps
case Intrinsic::x86_sse_cmp_ss: // llvm.x86.sse.cmp.ss
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::i8);
break;
case Intrinsic::ppc_altivec_vmaddfp: // llvm.ppc.altivec.vmaddfp
case Intrinsic::ppc_altivec_vnmsubfp: // llvm.ppc.altivec.vnmsubfp
case Intrinsic::spu_si_fma: // llvm.spu.si.fma
case Intrinsic::spu_si_fms: // llvm.spu.si.fms
case Intrinsic::spu_si_fnms: // llvm.spu.si.fnms
case Intrinsic::x86_fma4_vfmadd_ps: // llvm.x86.fma4.vfmadd.ps
case Intrinsic::x86_fma4_vfmadd_ss: // llvm.x86.fma4.vfmadd.ss
case Intrinsic::x86_fma4_vfmaddsub_ps: // llvm.x86.fma4.vfmaddsub.ps
case Intrinsic::x86_fma4_vfmsub_ps: // llvm.x86.fma4.vfmsub.ps
case Intrinsic::x86_fma4_vfmsub_ss: // llvm.x86.fma4.vfmsub.ss
case Intrinsic::x86_fma4_vfmsubadd_ps: // llvm.x86.fma4.vfmsubadd.ps
case Intrinsic::x86_fma4_vfnmadd_ps: // llvm.x86.fma4.vfnmadd.ps
case Intrinsic::x86_fma4_vfnmadd_ss: // llvm.x86.fma4.vfnmadd.ss
case Intrinsic::x86_fma4_vfnmsub_ps: // llvm.x86.fma4.vfnmsub.ps
case Intrinsic::x86_fma4_vfnmsub_ss: // llvm.x86.fma4.vfnmsub.ss
case Intrinsic::x86_sse41_blendvps: // llvm.x86.sse41.blendvps
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::v4f32);
break;
case Intrinsic::x86_xop_vpermil2ps: // llvm.x86.xop.vpermil2ps
VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::i8);
break;
case Intrinsic::x86_avx_vpermilvar_ps: // llvm.x86.avx.vpermilvar.ps
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v4i32);
break;
case Intrinsic::x86_sse_cvtpi2ps: // llvm.x86.sse.cvtpi2ps
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::x86mmx);
break;
case Intrinsic::x86_avx_cvt_pd2_ps_256: // llvm.x86.avx.cvt.pd2.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4f64);
break;
case Intrinsic::arm_neon_vcvthf2fp: // llvm.arm.neon.vcvthf2fp
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4i16);
break;
case Intrinsic::x86_sse2_cvtdq2ps: // llvm.x86.sse2.cvtdq2ps
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4i32);
break;
case Intrinsic::ppc_altivec_vcfsx: // llvm.ppc.altivec.vcfsx
case Intrinsic::ppc_altivec_vcfux: // llvm.ppc.altivec.vcfux
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4i32, MVT::i32);
break;
case Intrinsic::x86_avx_vextractf128_ps_256: // llvm.x86.avx.vextractf128.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v8f32, MVT::i8);
break;
case Intrinsic::x86_vcvtph2ps_128: // llvm.x86.vcvtph2ps.128
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v8i16);
break;
case Intrinsic::x86_avx_vbroadcast_sd_256: // llvm.x86.avx.vbroadcast.sd.256
case Intrinsic::x86_avx_vbroadcastf128_pd_256: // llvm.x86.avx.vbroadcastf128.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::iPTR);
break;
case Intrinsic::x86_avx_maskload_pd_256: // llvm.x86.avx.maskload.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::iPTR, MVT::v4f64);
break;
case Intrinsic::x86_avx2_vbroadcast_sd_pd_256: // llvm.x86.avx2.vbroadcast.sd.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v2f64);
break;
case Intrinsic::x86_avx_cvt_ps2_pd_256: // llvm.x86.avx.cvt.ps2.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v4f32);
break;
case Intrinsic::x86_avx_sqrt_pd_256: // llvm.x86.avx.sqrt.pd.256
case Intrinsic::x86_xop_vfrcz_pd_256: // llvm.x86.xop.vfrcz.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v4f64);
break;
case Intrinsic::x86_avx_round_pd_256: // llvm.x86.avx.round.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::i32);
break;
case Intrinsic::x86_avx_vinsertf128_pd_256: // llvm.x86.avx.vinsertf128.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v2f64, MVT::i8);
break;
case Intrinsic::x86_avx_addsub_pd_256: // llvm.x86.avx.addsub.pd.256
case Intrinsic::x86_avx_hadd_pd_256: // llvm.x86.avx.hadd.pd.256
case Intrinsic::x86_avx_hsub_pd_256: // llvm.x86.avx.hsub.pd.256
case Intrinsic::x86_avx_max_pd_256: // llvm.x86.avx.max.pd.256
case Intrinsic::x86_avx_min_pd_256: // llvm.x86.avx.min.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::v4f64);
break;
case Intrinsic::x86_avx_blend_pd_256: // llvm.x86.avx.blend.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::i32);
break;
case Intrinsic::x86_avx_cmp_pd_256: // llvm.x86.avx.cmp.pd.256
case Intrinsic::x86_avx_vperm2f128_pd_256: // llvm.x86.avx.vperm2f128.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::i8);
break;
case Intrinsic::x86_avx_blendv_pd_256: // llvm.x86.avx.blendv.pd.256
case Intrinsic::x86_fma4_vfmadd_pd_256: // llvm.x86.fma4.vfmadd.pd.256
case Intrinsic::x86_fma4_vfmaddsub_pd_256: // llvm.x86.fma4.vfmaddsub.pd.256
case Intrinsic::x86_fma4_vfmsub_pd_256: // llvm.x86.fma4.vfmsub.pd.256
case Intrinsic::x86_fma4_vfmsubadd_pd_256: // llvm.x86.fma4.vfmsubadd.pd.256
case Intrinsic::x86_fma4_vfnmadd_pd_256: // llvm.x86.fma4.vfnmadd.pd.256
case Intrinsic::x86_fma4_vfnmsub_pd_256: // llvm.x86.fma4.vfnmsub.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::v4f64);
break;
case Intrinsic::x86_xop_vpermil2pd_256: // llvm.x86.xop.vpermil2pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::i8);
break;
case Intrinsic::x86_avx_vpermilvar_pd_256: // llvm.x86.avx.vpermilvar.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::v4i64);
break;
case Intrinsic::x86_avx_cvtdq2_pd_256: // llvm.x86.avx.cvtdq2.pd.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v4i32);
break;
case Intrinsic::arm_neon_vcvtfp2hf: // llvm.arm.neon.vcvtfp2hf
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i16, MVT::v4f32);
break;
case Intrinsic::ppc_altivec_lvewx: // llvm.ppc.altivec.lvewx
case Intrinsic::ppc_altivec_lvx: // llvm.ppc.altivec.lvx
case Intrinsic::ppc_altivec_lvxl: // llvm.ppc.altivec.lvxl
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::iPTR);
break;
case Intrinsic::x86_avx2_maskload_d: // llvm.x86.avx2.maskload.d
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::iPTR, MVT::v4i32);
break;
case Intrinsic::x86_sse41_pmovsxbd: // llvm.x86.sse41.pmovsxbd
case Intrinsic::x86_sse41_pmovzxbd: // llvm.x86.sse41.pmovzxbd
case Intrinsic::x86_xop_vphaddbd: // llvm.x86.xop.vphaddbd
case Intrinsic::x86_xop_vphaddubd: // llvm.x86.xop.vphaddubd
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v16i8);
break;
case Intrinsic::ppc_altivec_vmsummbm: // llvm.ppc.altivec.vmsummbm
case Intrinsic::ppc_altivec_vmsumubm: // llvm.ppc.altivec.vmsumubm
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v16i8, MVT::v16i8, MVT::v4i32);
break;
case Intrinsic::ppc_altivec_vsum4sbs: // llvm.ppc.altivec.vsum4sbs
case Intrinsic::ppc_altivec_vsum4ubs: // llvm.ppc.altivec.vsum4ubs
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v16i8, MVT::v4i32);
break;
case Intrinsic::x86_sse2_cvtpd2dq: // llvm.x86.sse2.cvtpd2dq
case Intrinsic::x86_sse2_cvttpd2dq: // llvm.x86.sse2.cvttpd2dq
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v2f64);
break;
case Intrinsic::x86_sse2_cvtps2dq: // llvm.x86.sse2.cvtps2dq
case Intrinsic::x86_sse2_cvttps2dq: // llvm.x86.sse2.cvttps2dq
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4f32);
break;
case Intrinsic::ppc_altivec_vctsxs: // llvm.ppc.altivec.vctsxs
case Intrinsic::ppc_altivec_vctuxs: // llvm.ppc.altivec.vctuxs
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4f32, MVT::i32);
break;
case Intrinsic::arm_neon_vacgeq: // llvm.arm.neon.vacgeq
case Intrinsic::arm_neon_vacgtq: // llvm.arm.neon.vacgtq
case Intrinsic::ppc_altivec_vcmpbfp: // llvm.ppc.altivec.vcmpbfp
case Intrinsic::ppc_altivec_vcmpeqfp: // llvm.ppc.altivec.vcmpeqfp
case Intrinsic::ppc_altivec_vcmpgefp: // llvm.ppc.altivec.vcmpgefp
case Intrinsic::ppc_altivec_vcmpgtfp: // llvm.ppc.altivec.vcmpgtfp
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4f32, MVT::v4f32);
break;
case Intrinsic::x86_avx_cvt_pd2dq_256: // llvm.x86.avx.cvt.pd2dq.256
case Intrinsic::x86_avx_cvtt_pd2dq_256: // llvm.x86.avx.cvtt.pd2dq.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4f64);
break;
case Intrinsic::x86_avx2_pbroadcastd_128: // llvm.x86.avx2.pbroadcastd.128
case Intrinsic::x86_ssse3_pabs_d_128: // llvm.x86.ssse3.pabs.d.128
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4i32);
break;
case Intrinsic::spu_si_shli: // llvm.spu.si.shli
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i8);
break;
case Intrinsic::spu_si_ai: // llvm.spu.si.ai
case Intrinsic::spu_si_andi: // llvm.spu.si.andi
case Intrinsic::spu_si_ceqi: // llvm.spu.si.ceqi
case Intrinsic::spu_si_cgti: // llvm.spu.si.cgti
case Intrinsic::spu_si_clgti: // llvm.spu.si.clgti
case Intrinsic::spu_si_ori: // llvm.spu.si.ori
case Intrinsic::spu_si_sfi: // llvm.spu.si.sfi
case Intrinsic::spu_si_xori: // llvm.spu.si.xori
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i16);
break;
case Intrinsic::x86_sse2_pslli_d: // llvm.x86.sse2.pslli.d
case Intrinsic::x86_sse2_psrai_d: // llvm.x86.sse2.psrai.d
case Intrinsic::x86_sse2_psrli_d: // llvm.x86.sse2.psrli.d
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i32);
break;
case Intrinsic::ppc_altivec_vaddcuw: // llvm.ppc.altivec.vaddcuw
case Intrinsic::ppc_altivec_vaddsws: // llvm.ppc.altivec.vaddsws
case Intrinsic::ppc_altivec_vadduws: // llvm.ppc.altivec.vadduws
case Intrinsic::ppc_altivec_vavgsw: // llvm.ppc.altivec.vavgsw
case Intrinsic::ppc_altivec_vavguw: // llvm.ppc.altivec.vavguw
case Intrinsic::ppc_altivec_vcmpequw: // llvm.ppc.altivec.vcmpequw
case Intrinsic::ppc_altivec_vcmpgtsw: // llvm.ppc.altivec.vcmpgtsw
case Intrinsic::ppc_altivec_vcmpgtuw: // llvm.ppc.altivec.vcmpgtuw
case Intrinsic::ppc_altivec_vmaxsw: // llvm.ppc.altivec.vmaxsw
case Intrinsic::ppc_altivec_vmaxuw: // llvm.ppc.altivec.vmaxuw
case Intrinsic::ppc_altivec_vminsw: // llvm.ppc.altivec.vminsw
case Intrinsic::ppc_altivec_vminuw: // llvm.ppc.altivec.vminuw
case Intrinsic::ppc_altivec_vrlw: // llvm.ppc.altivec.vrlw
case Intrinsic::ppc_altivec_vsl: // llvm.ppc.altivec.vsl
case Intrinsic::ppc_altivec_vslo: // llvm.ppc.altivec.vslo
case Intrinsic::ppc_altivec_vslw: // llvm.ppc.altivec.vslw
case Intrinsic::ppc_altivec_vsr: // llvm.ppc.altivec.vsr
case Intrinsic::ppc_altivec_vsraw: // llvm.ppc.altivec.vsraw
case Intrinsic::ppc_altivec_vsro: // llvm.ppc.altivec.vsro
case Intrinsic::ppc_altivec_vsrw: // llvm.ppc.altivec.vsrw
case Intrinsic::ppc_altivec_vsubcuw: // llvm.ppc.altivec.vsubcuw
case Intrinsic::ppc_altivec_vsubsws: // llvm.ppc.altivec.vsubsws
case Intrinsic::ppc_altivec_vsubuws: // llvm.ppc.altivec.vsubuws
case Intrinsic::ppc_altivec_vsum2sws: // llvm.ppc.altivec.vsum2sws
case Intrinsic::ppc_altivec_vsumsws: // llvm.ppc.altivec.vsumsws
case Intrinsic::spu_si_a: // llvm.spu.si.a
case Intrinsic::spu_si_addx: // llvm.spu.si.addx
case Intrinsic::spu_si_and: // llvm.spu.si.and
case Intrinsic::spu_si_andc: // llvm.spu.si.andc
case Intrinsic::spu_si_bg: // llvm.spu.si.bg
case Intrinsic::spu_si_bgx: // llvm.spu.si.bgx
case Intrinsic::spu_si_ceq: // llvm.spu.si.ceq
case Intrinsic::spu_si_cg: // llvm.spu.si.cg
case Intrinsic::spu_si_cgt: // llvm.spu.si.cgt
case Intrinsic::spu_si_cgx: // llvm.spu.si.cgx
case Intrinsic::spu_si_clgt: // llvm.spu.si.clgt
case Intrinsic::spu_si_nand: // llvm.spu.si.nand
case Intrinsic::spu_si_nor: // llvm.spu.si.nor
case Intrinsic::spu_si_or: // llvm.spu.si.or
case Intrinsic::spu_si_orc: // llvm.spu.si.orc
case Intrinsic::spu_si_sf: // llvm.spu.si.sf
case Intrinsic::spu_si_sfx: // llvm.spu.si.sfx
case Intrinsic::spu_si_xor: // llvm.spu.si.xor
case Intrinsic::x86_avx2_psllv_d: // llvm.x86.avx2.psllv.d
case Intrinsic::x86_avx2_psrav_d: // llvm.x86.avx2.psrav.d
case Intrinsic::x86_avx2_psrlv_d: // llvm.x86.avx2.psrlv.d
case Intrinsic::x86_sse2_psll_d: // llvm.x86.sse2.psll.d
case Intrinsic::x86_sse2_psra_d: // llvm.x86.sse2.psra.d
case Intrinsic::x86_sse2_psrl_d: // llvm.x86.sse2.psrl.d
case Intrinsic::x86_sse41_pmaxsd: // llvm.x86.sse41.pmaxsd
case Intrinsic::x86_sse41_pmaxud: // llvm.x86.sse41.pmaxud
case Intrinsic::x86_sse41_pminsd: // llvm.x86.sse41.pminsd
case Intrinsic::x86_sse41_pminud: // llvm.x86.sse41.pminud
case Intrinsic::x86_ssse3_phadd_d_128: // llvm.x86.ssse3.phadd.d.128
case Intrinsic::x86_ssse3_phsub_d_128: // llvm.x86.ssse3.phsub.d.128
case Intrinsic::x86_ssse3_psign_d_128: // llvm.x86.ssse3.psign.d.128
case Intrinsic::x86_xop_vpcomeqd: // llvm.x86.xop.vpcomeqd
case Intrinsic::x86_xop_vpcomequd: // llvm.x86.xop.vpcomequd
case Intrinsic::x86_xop_vpcomfalsed: // llvm.x86.xop.vpcomfalsed
case Intrinsic::x86_xop_vpcomfalseud: // llvm.x86.xop.vpcomfalseud
case Intrinsic::x86_xop_vpcomged: // llvm.x86.xop.vpcomged
case Intrinsic::x86_xop_vpcomgeud: // llvm.x86.xop.vpcomgeud
case Intrinsic::x86_xop_vpcomgtd: // llvm.x86.xop.vpcomgtd
case Intrinsic::x86_xop_vpcomgtud: // llvm.x86.xop.vpcomgtud
case Intrinsic::x86_xop_vpcomled: // llvm.x86.xop.vpcomled
case Intrinsic::x86_xop_vpcomleud: // llvm.x86.xop.vpcomleud
case Intrinsic::x86_xop_vpcomltd: // llvm.x86.xop.vpcomltd
case Intrinsic::x86_xop_vpcomltud: // llvm.x86.xop.vpcomltud
case Intrinsic::x86_xop_vpcomned: // llvm.x86.xop.vpcomned
case Intrinsic::x86_xop_vpcomneud: // llvm.x86.xop.vpcomneud
case Intrinsic::x86_xop_vpcomtrued: // llvm.x86.xop.vpcomtrued
case Intrinsic::x86_xop_vpcomtrueud: // llvm.x86.xop.vpcomtrueud
case Intrinsic::x86_xop_vprotd: // llvm.x86.xop.vprotd
case Intrinsic::x86_xop_vpshad: // llvm.x86.xop.vpshad
case Intrinsic::x86_xop_vpshld: // llvm.x86.xop.vpshld
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::v4i32);
break;
case Intrinsic::x86_avx2_pblendd_128: // llvm.x86.avx2.pblendd.128
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v4i32, MVT::v4i32, MVT::i32);
break;
case Intrinsic::ppc_altivec_vperm: // llvm.ppc.altivec.vperm
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v4i32, MVT::v4i32, MVT::v16i8);
break;
case Intrinsic::ppc_altivec_vsel: // llvm.ppc.altivec.vsel
case Intrinsic::x86_xop_vpmacsdd: // llvm.x86.xop.vpmacsdd
case Intrinsic::x86_xop_vpmacssdd: // llvm.x86.xop.vpmacssdd
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v4i32, MVT::v4i32, MVT::v4i32);
break;
case Intrinsic::spu_si_mpyh: // llvm.spu.si.mpyh
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::v8i16);
break;
case Intrinsic::ppc_altivec_vupkhpx: // llvm.ppc.altivec.vupkhpx
case Intrinsic::ppc_altivec_vupkhsh: // llvm.ppc.altivec.vupkhsh
case Intrinsic::ppc_altivec_vupklpx: // llvm.ppc.altivec.vupklpx
case Intrinsic::ppc_altivec_vupklsh: // llvm.ppc.altivec.vupklsh
case Intrinsic::x86_sse41_pmovsxwd: // llvm.x86.sse41.pmovsxwd
case Intrinsic::x86_sse41_pmovzxwd: // llvm.x86.sse41.pmovzxwd
case Intrinsic::x86_xop_vphadduwd: // llvm.x86.xop.vphadduwd
case Intrinsic::x86_xop_vphaddwd: // llvm.x86.xop.vphaddwd
case Intrinsic::x86_xop_vphsubwd: // llvm.x86.xop.vphsubwd
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v8i16);
break;
case Intrinsic::spu_si_mpyi: // llvm.spu.si.mpyi
case Intrinsic::spu_si_mpyui: // llvm.spu.si.mpyui
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::i16);
break;
case Intrinsic::ppc_altivec_vsum4shs: // llvm.ppc.altivec.vsum4shs
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::v4i32);
break;
case Intrinsic::ppc_altivec_vmulesh: // llvm.ppc.altivec.vmulesh
case Intrinsic::ppc_altivec_vmuleuh: // llvm.ppc.altivec.vmuleuh
case Intrinsic::ppc_altivec_vmulosh: // llvm.ppc.altivec.vmulosh
case Intrinsic::ppc_altivec_vmulouh: // llvm.ppc.altivec.vmulouh
case Intrinsic::spu_si_mpy: // llvm.spu.si.mpy
case Intrinsic::spu_si_mpyhh: // llvm.spu.si.mpyhh
case Intrinsic::spu_si_mpyhha: // llvm.spu.si.mpyhha
case Intrinsic::spu_si_mpyhhau: // llvm.spu.si.mpyhhau
case Intrinsic::spu_si_mpyhhu: // llvm.spu.si.mpyhhu
case Intrinsic::spu_si_mpys: // llvm.spu.si.mpys
case Intrinsic::spu_si_mpyu: // llvm.spu.si.mpyu
case Intrinsic::x86_sse2_pmadd_wd: // llvm.x86.sse2.pmadd.wd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::v8i16);
break;
case Intrinsic::ppc_altivec_vmsumshm: // llvm.ppc.altivec.vmsumshm
case Intrinsic::ppc_altivec_vmsumshs: // llvm.ppc.altivec.vmsumshs
case Intrinsic::ppc_altivec_vmsumuhm: // llvm.ppc.altivec.vmsumuhm
case Intrinsic::ppc_altivec_vmsumuhs: // llvm.ppc.altivec.vmsumuhs
case Intrinsic::x86_xop_vpmacsswd: // llvm.x86.xop.vpmacsswd
case Intrinsic::x86_xop_vpmacswd: // llvm.x86.xop.vpmacswd
case Intrinsic::x86_xop_vpmadcsswd: // llvm.x86.xop.vpmadcsswd
case Intrinsic::x86_xop_vpmadcswd: // llvm.x86.xop.vpmadcswd
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v8i16, MVT::v8i16, MVT::v4i32);
break;
case Intrinsic::spu_si_mpya: // llvm.spu.si.mpya
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v8i16, MVT::v8i16, MVT::v8i16);
break;
case Intrinsic::x86_avx_vextractf128_si_256: // llvm.x86.avx.vextractf128.si.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i32, MVT::i8);
break;
case Intrinsic::x86_avx2_movntdqa: // llvm.x86.avx2.movntdqa
case Intrinsic::x86_avx2_vbroadcasti128: // llvm.x86.avx2.vbroadcasti128
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i64, MVT::iPTR);
break;
case Intrinsic::x86_avx2_maskload_q_256: // llvm.x86.avx2.maskload.q.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i64, MVT::iPTR, MVT::v4i64);
break;
case Intrinsic::x86_avx2_pmovsxbq: // llvm.x86.avx2.pmovsxbq
case Intrinsic::x86_avx2_pmovzxbq: // llvm.x86.avx2.pmovzxbq
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i64, MVT::v16i8);
break;
case Intrinsic::x86_avx2_pbroadcastq_256: // llvm.x86.avx2.pbroadcastq.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i64, MVT::v2i64);
break;
case Intrinsic::x86_avx2_psad_bw: // llvm.x86.avx2.psad.bw
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i64, MVT::v32i8, MVT::v32i8);
break;
case Intrinsic::x86_avx2_pmovsxdq: // llvm.x86.avx2.pmovsxdq
case Intrinsic::x86_avx2_pmovzxdq: // llvm.x86.avx2.pmovzxdq
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i64, MVT::v4i32);
break;
case Intrinsic::x86_avx2_psll_dq: // llvm.x86.avx2.psll.dq
case Intrinsic::x86_avx2_psll_dq_bs: // llvm.x86.avx2.psll.dq.bs
case Intrinsic::x86_avx2_pslli_q: // llvm.x86.avx2.pslli.q
case Intrinsic::x86_avx2_psrl_dq: // llvm.x86.avx2.psrl.dq
case Intrinsic::x86_avx2_psrl_dq_bs: // llvm.x86.avx2.psrl.dq.bs
case Intrinsic::x86_avx2_psrli_q: // llvm.x86.avx2.psrli.q
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i64, MVT::v4i64, MVT::i32);
break;
case Intrinsic::x86_avx2_psll_q: // llvm.x86.avx2.psll.q
case Intrinsic::x86_avx2_psrl_q: // llvm.x86.avx2.psrl.q
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i64, MVT::v4i64, MVT::v2i64);
break;
case Intrinsic::x86_avx2_vinserti128: // llvm.x86.avx2.vinserti128
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i64, MVT::v4i64, MVT::v2i64, MVT::i8);
break;
case Intrinsic::x86_avx2_psllv_q_256: // llvm.x86.avx2.psllv.q.256
case Intrinsic::x86_avx2_psrlv_q_256: // llvm.x86.avx2.psrlv.q.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i64, MVT::v4i64, MVT::v4i64);
break;
case Intrinsic::x86_avx2_vperm2i128: // llvm.x86.avx2.vperm2i128
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i64, MVT::v4i64, MVT::v4i64, MVT::i8);
break;
case Intrinsic::x86_xop_vpcmov_256: // llvm.x86.xop.vpcmov.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i64, MVT::v4i64, MVT::v4i64, MVT::v4i64);
break;
case Intrinsic::x86_avx2_pmovsxwq: // llvm.x86.avx2.pmovsxwq
case Intrinsic::x86_avx2_pmovzxwq: // llvm.x86.avx2.pmovzxwq
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i64, MVT::v8i16);
break;
case Intrinsic::x86_avx2_pmul_dq: // llvm.x86.avx2.pmul.dq
case Intrinsic::x86_avx2_pmulu_dq: // llvm.x86.avx2.pmulu.dq
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i64, MVT::v8i32, MVT::v8i32);
break;
case Intrinsic::x86_avx_vbroadcast_ss_256: // llvm.x86.avx.vbroadcast.ss.256
case Intrinsic::x86_avx_vbroadcastf128_ps_256: // llvm.x86.avx.vbroadcastf128.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::iPTR);
break;
case Intrinsic::x86_avx_maskload_ps_256: // llvm.x86.avx.maskload.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::iPTR, MVT::v8f32);
break;
case Intrinsic::x86_avx2_vbroadcast_ss_ps_256: // llvm.x86.avx2.vbroadcast.ss.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::v4f32);
break;
case Intrinsic::x86_avx_rcp_ps_256: // llvm.x86.avx.rcp.ps.256
case Intrinsic::x86_avx_rsqrt_ps_256: // llvm.x86.avx.rsqrt.ps.256
case Intrinsic::x86_avx_sqrt_ps_256: // llvm.x86.avx.sqrt.ps.256
case Intrinsic::x86_xop_vfrcz_ps_256: // llvm.x86.xop.vfrcz.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::v8f32);
break;
case Intrinsic::x86_avx_round_ps_256: // llvm.x86.avx.round.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::i32);
break;
case Intrinsic::x86_avx_vinsertf128_ps_256: // llvm.x86.avx.vinsertf128.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v4f32, MVT::i8);
break;
case Intrinsic::x86_avx2_permps: // llvm.x86.avx2.permps
case Intrinsic::x86_avx_addsub_ps_256: // llvm.x86.avx.addsub.ps.256
case Intrinsic::x86_avx_hadd_ps_256: // llvm.x86.avx.hadd.ps.256
case Intrinsic::x86_avx_hsub_ps_256: // llvm.x86.avx.hsub.ps.256
case Intrinsic::x86_avx_max_ps_256: // llvm.x86.avx.max.ps.256
case Intrinsic::x86_avx_min_ps_256: // llvm.x86.avx.min.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::v8f32);
break;
case Intrinsic::x86_avx_blend_ps_256: // llvm.x86.avx.blend.ps.256
case Intrinsic::x86_avx_dp_ps_256: // llvm.x86.avx.dp.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::i32);
break;
case Intrinsic::x86_avx_cmp_ps_256: // llvm.x86.avx.cmp.ps.256
case Intrinsic::x86_avx_vperm2f128_ps_256: // llvm.x86.avx.vperm2f128.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::i8);
break;
case Intrinsic::x86_avx_blendv_ps_256: // llvm.x86.avx.blendv.ps.256
case Intrinsic::x86_fma4_vfmadd_ps_256: // llvm.x86.fma4.vfmadd.ps.256
case Intrinsic::x86_fma4_vfmaddsub_ps_256: // llvm.x86.fma4.vfmaddsub.ps.256
case Intrinsic::x86_fma4_vfmsub_ps_256: // llvm.x86.fma4.vfmsub.ps.256
case Intrinsic::x86_fma4_vfmsubadd_ps_256: // llvm.x86.fma4.vfmsubadd.ps.256
case Intrinsic::x86_fma4_vfnmadd_ps_256: // llvm.x86.fma4.vfnmadd.ps.256
case Intrinsic::x86_fma4_vfnmsub_ps_256: // llvm.x86.fma4.vfnmsub.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::v8f32);
break;
case Intrinsic::x86_xop_vpermil2ps_256: // llvm.x86.xop.vpermil2ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::i8);
break;
case Intrinsic::x86_avx_vpermilvar_ps_256: // llvm.x86.avx.vpermilvar.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::v8i32);
break;
case Intrinsic::x86_vcvtph2ps_256: // llvm.x86.vcvtph2ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::v8i16);
break;
case Intrinsic::x86_avx_cvtdq2_ps_256: // llvm.x86.avx.cvtdq2.ps.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::v8i32);
break;
case Intrinsic::ppc_altivec_mfvscr: // llvm.ppc.altivec.mfvscr
VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::v8i16);
break;
case Intrinsic::ppc_altivec_lvehx: // llvm.ppc.altivec.lvehx
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::iPTR);
break;
case Intrinsic::ppc_altivec_vupkhsb: // llvm.ppc.altivec.vupkhsb
case Intrinsic::ppc_altivec_vupklsb: // llvm.ppc.altivec.vupklsb
case Intrinsic::x86_sse41_pmovsxbw: // llvm.x86.sse41.pmovsxbw
case Intrinsic::x86_sse41_pmovzxbw: // llvm.x86.sse41.pmovzxbw
case Intrinsic::x86_xop_vphaddbw: // llvm.x86.xop.vphaddbw
case Intrinsic::x86_xop_vphaddubw: // llvm.x86.xop.vphaddubw
case Intrinsic::x86_xop_vphsubbw: // llvm.x86.xop.vphsubbw
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::v16i8);
break;
case Intrinsic::ppc_altivec_vmulesb: // llvm.ppc.altivec.vmulesb
case Intrinsic::ppc_altivec_vmuleub: // llvm.ppc.altivec.vmuleub
case Intrinsic::ppc_altivec_vmulosb: // llvm.ppc.altivec.vmulosb
case Intrinsic::ppc_altivec_vmuloub: // llvm.ppc.altivec.vmuloub
case Intrinsic::x86_ssse3_pmadd_ub_sw_128: // llvm.x86.ssse3.pmadd.ub.sw.128
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v16i8, MVT::v16i8);
break;
case Intrinsic::x86_sse41_mpsadbw: // llvm.x86.sse41.mpsadbw
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i16, MVT::v16i8, MVT::v16i8, MVT::i32);
break;
case Intrinsic::x86_vcvtps2ph_128: // llvm.x86.vcvtps2ph.128
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v4f32, MVT::i32);
break;
case Intrinsic::ppc_altivec_vpkpx: // llvm.ppc.altivec.vpkpx
case Intrinsic::ppc_altivec_vpkswus: // llvm.ppc.altivec.vpkswus
case Intrinsic::ppc_altivec_vpkuwus: // llvm.ppc.altivec.vpkuwus
case Intrinsic::x86_sse2_packssdw_128: // llvm.x86.sse2.packssdw.128
case Intrinsic::x86_sse41_packusdw: // llvm.x86.sse41.packusdw
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v4i32, MVT::v4i32);
break;
case Intrinsic::x86_vcvtps2ph_256: // llvm.x86.vcvtps2ph.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8f32, MVT::i32);
break;
case Intrinsic::x86_avx2_pbroadcastw_128: // llvm.x86.avx2.pbroadcastw.128
case Intrinsic::x86_sse41_phminposuw: // llvm.x86.sse41.phminposuw
case Intrinsic::x86_ssse3_pabs_w_128: // llvm.x86.ssse3.pabs.w.128
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::v8i16);
break;
case Intrinsic::spu_si_ahi: // llvm.spu.si.ahi
case Intrinsic::spu_si_andhi: // llvm.spu.si.andhi
case Intrinsic::spu_si_ceqhi: // llvm.spu.si.ceqhi
case Intrinsic::spu_si_cgthi: // llvm.spu.si.cgthi
case Intrinsic::spu_si_clgthi: // llvm.spu.si.clgthi
case Intrinsic::spu_si_fsmbi: // llvm.spu.si.fsmbi
case Intrinsic::spu_si_orhi: // llvm.spu.si.orhi
case Intrinsic::spu_si_sfhi: // llvm.spu.si.sfhi
case Intrinsic::spu_si_xorhi: // llvm.spu.si.xorhi
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::i16);
break;
case Intrinsic::spu_si_shlqbi: // llvm.spu.si.shlqbi
case Intrinsic::spu_si_shlqby: // llvm.spu.si.shlqby
case Intrinsic::x86_sse2_pslli_w: // llvm.x86.sse2.pslli.w
case Intrinsic::x86_sse2_psrai_w: // llvm.x86.sse2.psrai.w
case Intrinsic::x86_sse2_psrli_w: // llvm.x86.sse2.psrli.w
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::i32);
break;
case Intrinsic::ppc_altivec_vaddshs: // llvm.ppc.altivec.vaddshs
case Intrinsic::ppc_altivec_vadduhs: // llvm.ppc.altivec.vadduhs
case Intrinsic::ppc_altivec_vavgsh: // llvm.ppc.altivec.vavgsh
case Intrinsic::ppc_altivec_vavguh: // llvm.ppc.altivec.vavguh
case Intrinsic::ppc_altivec_vcmpequh: // llvm.ppc.altivec.vcmpequh
case Intrinsic::ppc_altivec_vcmpgtsh: // llvm.ppc.altivec.vcmpgtsh
case Intrinsic::ppc_altivec_vcmpgtuh: // llvm.ppc.altivec.vcmpgtuh
case Intrinsic::ppc_altivec_vmaxsh: // llvm.ppc.altivec.vmaxsh
case Intrinsic::ppc_altivec_vmaxuh: // llvm.ppc.altivec.vmaxuh
case Intrinsic::ppc_altivec_vminsh: // llvm.ppc.altivec.vminsh
case Intrinsic::ppc_altivec_vminuh: // llvm.ppc.altivec.vminuh
case Intrinsic::ppc_altivec_vrlh: // llvm.ppc.altivec.vrlh
case Intrinsic::ppc_altivec_vslh: // llvm.ppc.altivec.vslh
case Intrinsic::ppc_altivec_vsrah: // llvm.ppc.altivec.vsrah
case Intrinsic::ppc_altivec_vsrh: // llvm.ppc.altivec.vsrh
case Intrinsic::ppc_altivec_vsubshs: // llvm.ppc.altivec.vsubshs
case Intrinsic::ppc_altivec_vsubuhs: // llvm.ppc.altivec.vsubuhs
case Intrinsic::spu_si_ah: // llvm.spu.si.ah
case Intrinsic::spu_si_ceqh: // llvm.spu.si.ceqh
case Intrinsic::spu_si_cgth: // llvm.spu.si.cgth
case Intrinsic::spu_si_clgth: // llvm.spu.si.clgth
case Intrinsic::spu_si_sfh: // llvm.spu.si.sfh
case Intrinsic::x86_sse2_padds_w: // llvm.x86.sse2.padds.w
case Intrinsic::x86_sse2_paddus_w: // llvm.x86.sse2.paddus.w
case Intrinsic::x86_sse2_pavg_w: // llvm.x86.sse2.pavg.w
case Intrinsic::x86_sse2_pmaxs_w: // llvm.x86.sse2.pmaxs.w
case Intrinsic::x86_sse2_pmins_w: // llvm.x86.sse2.pmins.w
case Intrinsic::x86_sse2_pmulh_w: // llvm.x86.sse2.pmulh.w
case Intrinsic::x86_sse2_pmulhu_w: // llvm.x86.sse2.pmulhu.w
case Intrinsic::x86_sse2_psll_w: // llvm.x86.sse2.psll.w
case Intrinsic::x86_sse2_psra_w: // llvm.x86.sse2.psra.w
case Intrinsic::x86_sse2_psrl_w: // llvm.x86.sse2.psrl.w
case Intrinsic::x86_sse2_psubs_w: // llvm.x86.sse2.psubs.w
case Intrinsic::x86_sse2_psubus_w: // llvm.x86.sse2.psubus.w
case Intrinsic::x86_sse41_pmaxuw: // llvm.x86.sse41.pmaxuw
case Intrinsic::x86_sse41_pminuw: // llvm.x86.sse41.pminuw
case Intrinsic::x86_ssse3_phadd_sw_128: // llvm.x86.ssse3.phadd.sw.128
case Intrinsic::x86_ssse3_phadd_w_128: // llvm.x86.ssse3.phadd.w.128
case Intrinsic::x86_ssse3_phsub_sw_128: // llvm.x86.ssse3.phsub.sw.128
case Intrinsic::x86_ssse3_phsub_w_128: // llvm.x86.ssse3.phsub.w.128
case Intrinsic::x86_ssse3_pmul_hr_sw_128: // llvm.x86.ssse3.pmul.hr.sw.128
case Intrinsic::x86_ssse3_psign_w_128: // llvm.x86.ssse3.psign.w.128
case Intrinsic::x86_xop_vpcomequw: // llvm.x86.xop.vpcomequw
case Intrinsic::x86_xop_vpcomeqw: // llvm.x86.xop.vpcomeqw
case Intrinsic::x86_xop_vpcomfalseuw: // llvm.x86.xop.vpcomfalseuw
case Intrinsic::x86_xop_vpcomfalsew: // llvm.x86.xop.vpcomfalsew
case Intrinsic::x86_xop_vpcomgeuw: // llvm.x86.xop.vpcomgeuw
case Intrinsic::x86_xop_vpcomgew: // llvm.x86.xop.vpcomgew
case Intrinsic::x86_xop_vpcomgtuw: // llvm.x86.xop.vpcomgtuw
case Intrinsic::x86_xop_vpcomgtw: // llvm.x86.xop.vpcomgtw
case Intrinsic::x86_xop_vpcomleuw: // llvm.x86.xop.vpcomleuw
case Intrinsic::x86_xop_vpcomlew: // llvm.x86.xop.vpcomlew
case Intrinsic::x86_xop_vpcomltuw: // llvm.x86.xop.vpcomltuw
case Intrinsic::x86_xop_vpcomltw: // llvm.x86.xop.vpcomltw
case Intrinsic::x86_xop_vpcomneuw: // llvm.x86.xop.vpcomneuw
case Intrinsic::x86_xop_vpcomnew: // llvm.x86.xop.vpcomnew
case Intrinsic::x86_xop_vpcomtrueuw: // llvm.x86.xop.vpcomtrueuw
case Intrinsic::x86_xop_vpcomtruew: // llvm.x86.xop.vpcomtruew
case Intrinsic::x86_xop_vprotw: // llvm.x86.xop.vprotw
case Intrinsic::x86_xop_vpshaw: // llvm.x86.xop.vpshaw
case Intrinsic::x86_xop_vpshlw: // llvm.x86.xop.vpshlw
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::v8i16);
break;
case Intrinsic::x86_sse41_pblendw: // llvm.x86.sse41.pblendw
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i16, MVT::v8i16, MVT::v8i16, MVT::i32);
break;
case Intrinsic::ppc_altivec_vmhaddshs: // llvm.ppc.altivec.vmhaddshs
case Intrinsic::ppc_altivec_vmhraddshs: // llvm.ppc.altivec.vmhraddshs
case Intrinsic::ppc_altivec_vmladduhm: // llvm.ppc.altivec.vmladduhm
case Intrinsic::x86_xop_vpmacssww: // llvm.x86.xop.vpmacssww
case Intrinsic::x86_xop_vpmacsww: // llvm.x86.xop.vpmacsww
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i16, MVT::v8i16, MVT::v8i16, MVT::v8i16);
break;
case Intrinsic::x86_avx2_maskload_d_256: // llvm.x86.avx2.maskload.d.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i32, MVT::iPTR, MVT::v8i32);
break;
case Intrinsic::x86_avx2_pmadd_wd: // llvm.x86.avx2.pmadd.wd
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i32, MVT::v16i16, MVT::v16i16);
break;
case Intrinsic::x86_avx2_pmovsxbd: // llvm.x86.avx2.pmovsxbd
case Intrinsic::x86_avx2_pmovzxbd: // llvm.x86.avx2.pmovzxbd
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i32, MVT::v16i8);
break;
case Intrinsic::x86_avx2_pbroadcastd_256: // llvm.x86.avx2.pbroadcastd.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i32, MVT::v4i32);
break;
case Intrinsic::x86_avx_cvt_ps2dq_256: // llvm.x86.avx.cvt.ps2dq.256
case Intrinsic::x86_avx_cvtt_ps2dq_256: // llvm.x86.avx.cvtt.ps2dq.256
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i32, MVT::v8f32);
break;
case Intrinsic::x86_avx2_pmovsxwd: // llvm.x86.avx2.pmovsxwd
case Intrinsic::x86_avx2_pmovzxwd: // llvm.x86.avx2.pmovzxwd
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i32, MVT::v8i16);
break;
case Intrinsic::x86_avx2_pabs_d: // llvm.x86.avx2.pabs.d
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i32, MVT::v8i32);
break;
case Intrinsic::x86_avx2_pslli_d: // llvm.x86.avx2.pslli.d
case Intrinsic::x86_avx2_psrai_d: // llvm.x86.avx2.psrai.d
case Intrinsic::x86_avx2_psrli_d: // llvm.x86.avx2.psrli.d
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i32, MVT::v8i32, MVT::i32);
break;
case Intrinsic::x86_avx2_psll_d: // llvm.x86.avx2.psll.d
case Intrinsic::x86_avx2_psra_d: // llvm.x86.avx2.psra.d
case Intrinsic::x86_avx2_psrl_d: // llvm.x86.avx2.psrl.d
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i32, MVT::v8i32, MVT::v4i32);
break;
case Intrinsic::x86_avx_vinsertf128_si_256: // llvm.x86.avx.vinsertf128.si.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i32, MVT::v8i32, MVT::v4i32, MVT::i8);
break;
case Intrinsic::x86_avx2_permd: // llvm.x86.avx2.permd
case Intrinsic::x86_avx2_phadd_d: // llvm.x86.avx2.phadd.d
case Intrinsic::x86_avx2_phsub_d: // llvm.x86.avx2.phsub.d
case Intrinsic::x86_avx2_pmaxs_d: // llvm.x86.avx2.pmaxs.d
case Intrinsic::x86_avx2_pmaxu_d: // llvm.x86.avx2.pmaxu.d
case Intrinsic::x86_avx2_pmins_d: // llvm.x86.avx2.pmins.d
case Intrinsic::x86_avx2_pminu_d: // llvm.x86.avx2.pminu.d
case Intrinsic::x86_avx2_psign_d: // llvm.x86.avx2.psign.d
case Intrinsic::x86_avx2_psllv_d_256: // llvm.x86.avx2.psllv.d.256
case Intrinsic::x86_avx2_psrav_d_256: // llvm.x86.avx2.psrav.d.256
case Intrinsic::x86_avx2_psrlv_d_256: // llvm.x86.avx2.psrlv.d.256
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i32, MVT::v8i32, MVT::v8i32);
break;
case Intrinsic::x86_avx2_pblendd_256: // llvm.x86.avx2.pblendd.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i32, MVT::v8i32, MVT::v8i32, MVT::i32);
break;
case Intrinsic::x86_avx_vperm2f128_si_256: // llvm.x86.avx.vperm2f128.si.256
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i32, MVT::v8i32, MVT::v8i32, MVT::i8);
break;
case Intrinsic::arm_neon_vtbl1: // llvm.arm.neon.vtbl1
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i8, MVT::v8i8, MVT::v8i8);
break;
case Intrinsic::arm_neon_vtbl2: // llvm.arm.neon.vtbl2
case Intrinsic::arm_neon_vtbx1: // llvm.arm.neon.vtbx1
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
break;
case Intrinsic::arm_neon_vtbl3: // llvm.arm.neon.vtbl3
case Intrinsic::arm_neon_vtbx2: // llvm.arm.neon.vtbx2
VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
break;
case Intrinsic::arm_neon_vtbl4: // llvm.arm.neon.vtbl4
case Intrinsic::arm_neon_vtbx3: // llvm.arm.neon.vtbx3
VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
break;
case Intrinsic::arm_neon_vtbx4: // llvm.arm.neon.vtbx4
VerifyIntrinsicPrototype(ID, IF, 1, 6, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
break;
case Intrinsic::x86_sse_cvtpd2pi: // llvm.x86.sse.cvtpd2pi
case Intrinsic::x86_sse_cvttpd2pi: // llvm.x86.sse.cvttpd2pi
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::x86mmx, MVT::v2f64);
break;
case Intrinsic::x86_sse_cvtps2pi: // llvm.x86.sse.cvtps2pi
case Intrinsic::x86_sse_cvttps2pi: // llvm.x86.sse.cvttps2pi
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::x86mmx, MVT::v4f32);
break;
case Intrinsic::x86_3dnow_pf2id: // llvm.x86.3dnow.pf2id
case Intrinsic::x86_3dnow_pfrcp: // llvm.x86.3dnow.pfrcp
case Intrinsic::x86_3dnow_pfrsqrt: // llvm.x86.3dnow.pfrsqrt
case Intrinsic::x86_3dnow_pi2fd: // llvm.x86.3dnow.pi2fd
case Intrinsic::x86_3dnowa_pf2iw: // llvm.x86.3dnowa.pf2iw
case Intrinsic::x86_3dnowa_pi2fw: // llvm.x86.3dnowa.pi2fw
case Intrinsic::x86_3dnowa_pswapd: // llvm.x86.3dnowa.pswapd
case Intrinsic::x86_ssse3_pabs_b: // llvm.x86.ssse3.pabs.b
case Intrinsic::x86_ssse3_pabs_d: // llvm.x86.ssse3.pabs.d
case Intrinsic::x86_ssse3_pabs_w: // llvm.x86.ssse3.pabs.w
VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::x86mmx, MVT::x86mmx);
break;
case Intrinsic::x86_mmx_pslli_d: // llvm.x86.mmx.pslli.d
case Intrinsic::x86_mmx_pslli_q: // llvm.x86.mmx.pslli.q
case Intrinsic::x86_mmx_pslli_w: // llvm.x86.mmx.pslli.w
case Intrinsic::x86_mmx_psrai_d: // llvm.x86.mmx.psrai.d
case Intrinsic::x86_mmx_psrai_w: // llvm.x86.mmx.psrai.w
case Intrinsic::x86_mmx_psrli_d: // llvm.x86.mmx.psrli.d
case Intrinsic::x86_mmx_psrli_q: // llvm.x86.mmx.psrli.q
case Intrinsic::x86_mmx_psrli_w: // llvm.x86.mmx.psrli.w
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::x86mmx, MVT::x86mmx, MVT::i32);
break;
case Intrinsic::x86_mmx_pinsr_w: // llvm.x86.mmx.pinsr.w
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::x86mmx, MVT::x86mmx, MVT::i32, MVT::i32);
break;
case Intrinsic::x86_sse_pshuf_w: // llvm.x86.sse.pshuf.w
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::x86mmx, MVT::x86mmx, MVT::i8);
break;
case Intrinsic::x86_3dnow_pavgusb: // llvm.x86.3dnow.pavgusb
case Intrinsic::x86_3dnow_pfacc: // llvm.x86.3dnow.pfacc
case Intrinsic::x86_3dnow_pfadd: // llvm.x86.3dnow.pfadd
case Intrinsic::x86_3dnow_pfcmpeq: // llvm.x86.3dnow.pfcmpeq
case Intrinsic::x86_3dnow_pfcmpge: // llvm.x86.3dnow.pfcmpge
case Intrinsic::x86_3dnow_pfcmpgt: // llvm.x86.3dnow.pfcmpgt
case Intrinsic::x86_3dnow_pfmax: // llvm.x86.3dnow.pfmax
case Intrinsic::x86_3dnow_pfmin: // llvm.x86.3dnow.pfmin
case Intrinsic::x86_3dnow_pfmul: // llvm.x86.3dnow.pfmul
case Intrinsic::x86_3dnow_pfrcpit1: // llvm.x86.3dnow.pfrcpit1
case Intrinsic::x86_3dnow_pfrcpit2: // llvm.x86.3dnow.pfrcpit2
case Intrinsic::x86_3dnow_pfrsqit1: // llvm.x86.3dnow.pfrsqit1
case Intrinsic::x86_3dnow_pfsub: // llvm.x86.3dnow.pfsub
case Intrinsic::x86_3dnow_pfsubr: // llvm.x86.3dnow.pfsubr
case Intrinsic::x86_3dnow_pmulhrw: // llvm.x86.3dnow.pmulhrw
case Intrinsic::x86_3dnowa_pfnacc: // llvm.x86.3dnowa.pfnacc
case Intrinsic::x86_3dnowa_pfpnacc: // llvm.x86.3dnowa.pfpnacc
case Intrinsic::x86_mmx_packssdw: // llvm.x86.mmx.packssdw
case Intrinsic::x86_mmx_packsswb: // llvm.x86.mmx.packsswb
case Intrinsic::x86_mmx_packuswb: // llvm.x86.mmx.packuswb
case Intrinsic::x86_mmx_padd_b: // llvm.x86.mmx.padd.b
case Intrinsic::x86_mmx_padd_d: // llvm.x86.mmx.padd.d
case Intrinsic::x86_mmx_padd_q: // llvm.x86.mmx.padd.q
case Intrinsic::x86_mmx_padd_w: // llvm.x86.mmx.padd.w
case Intrinsic::x86_mmx_padds_b: // llvm.x86.mmx.padds.b
case Intrinsic::x86_mmx_padds_w: // llvm.x86.mmx.padds.w
case Intrinsic::x86_mmx_paddus_b: // llvm.x86.mmx.paddus.b
case Intrinsic::x86_mmx_paddus_w: // llvm.x86.mmx.paddus.w
case Intrinsic::x86_mmx_pand: // llvm.x86.mmx.pand
case Intrinsic::x86_mmx_pandn: // llvm.x86.mmx.pandn
case Intrinsic::x86_mmx_pavg_b: // llvm.x86.mmx.pavg.b
case Intrinsic::x86_mmx_pavg_w: // llvm.x86.mmx.pavg.w
case Intrinsic::x86_mmx_pcmpeq_b: // llvm.x86.mmx.pcmpeq.b
case Intrinsic::x86_mmx_pcmpeq_d: // llvm.x86.mmx.pcmpeq.d
case Intrinsic::x86_mmx_pcmpeq_w: // llvm.x86.mmx.pcmpeq.w
case Intrinsic::x86_mmx_pcmpgt_b: // llvm.x86.mmx.pcmpgt.b
case Intrinsic::x86_mmx_pcmpgt_d: // llvm.x86.mmx.pcmpgt.d
case Intrinsic::x86_mmx_pcmpgt_w: // llvm.x86.mmx.pcmpgt.w
case Intrinsic::x86_mmx_pmadd_wd: // llvm.x86.mmx.pmadd.wd
case Intrinsic::x86_mmx_pmaxs_w: // llvm.x86.mmx.pmaxs.w
case Intrinsic::x86_mmx_pmaxu_b: // llvm.x86.mmx.pmaxu.b
case Intrinsic::x86_mmx_pmins_w: // llvm.x86.mmx.pmins.w
case Intrinsic::x86_mmx_pminu_b: // llvm.x86.mmx.pminu.b
case Intrinsic::x86_mmx_pmulh_w: // llvm.x86.mmx.pmulh.w
case Intrinsic::x86_mmx_pmulhu_w: // llvm.x86.mmx.pmulhu.w
case Intrinsic::x86_mmx_pmull_w: // llvm.x86.mmx.pmull.w
case Intrinsic::x86_mmx_pmulu_dq: // llvm.x86.mmx.pmulu.dq
case Intrinsic::x86_mmx_por: // llvm.x86.mmx.por
case Intrinsic::x86_mmx_psad_bw: // llvm.x86.mmx.psad.bw
case Intrinsic::x86_mmx_psll_d: // llvm.x86.mmx.psll.d
case Intrinsic::x86_mmx_psll_q: // llvm.x86.mmx.psll.q
case Intrinsic::x86_mmx_psll_w: // llvm.x86.mmx.psll.w
case Intrinsic::x86_mmx_psra_d: // llvm.x86.mmx.psra.d
case Intrinsic::x86_mmx_psra_w: // llvm.x86.mmx.psra.w
case Intrinsic::x86_mmx_psrl_d: // llvm.x86.mmx.psrl.d
case Intrinsic::x86_mmx_psrl_q: // llvm.x86.mmx.psrl.q
case Intrinsic::x86_mmx_psrl_w: // llvm.x86.mmx.psrl.w
case Intrinsic::x86_mmx_psub_b: // llvm.x86.mmx.psub.b
case Intrinsic::x86_mmx_psub_d: // llvm.x86.mmx.psub.d
case Intrinsic::x86_mmx_psub_q: // llvm.x86.mmx.psub.q
case Intrinsic::x86_mmx_psub_w: // llvm.x86.mmx.psub.w
case Intrinsic::x86_mmx_psubs_b: // llvm.x86.mmx.psubs.b
case Intrinsic::x86_mmx_psubs_w: // llvm.x86.mmx.psubs.w
case Intrinsic::x86_mmx_psubus_b: // llvm.x86.mmx.psubus.b
case Intrinsic::x86_mmx_psubus_w: // llvm.x86.mmx.psubus.w
case Intrinsic::x86_mmx_punpckhbw: // llvm.x86.mmx.punpckhbw
case Intrinsic::x86_mmx_punpckhdq: // llvm.x86.mmx.punpckhdq
case Intrinsic::x86_mmx_punpckhwd: // llvm.x86.mmx.punpckhwd
case Intrinsic::x86_mmx_punpcklbw: // llvm.x86.mmx.punpcklbw
case Intrinsic::x86_mmx_punpckldq: // llvm.x86.mmx.punpckldq
case Intrinsic::x86_mmx_punpcklwd: // llvm.x86.mmx.punpcklwd
case Intrinsic::x86_mmx_pxor: // llvm.x86.mmx.pxor
case Intrinsic::x86_ssse3_phadd_d: // llvm.x86.ssse3.phadd.d
case Intrinsic::x86_ssse3_phadd_sw: // llvm.x86.ssse3.phadd.sw
case Intrinsic::x86_ssse3_phadd_w: // llvm.x86.ssse3.phadd.w
case Intrinsic::x86_ssse3_phsub_d: // llvm.x86.ssse3.phsub.d
case Intrinsic::x86_ssse3_phsub_sw: // llvm.x86.ssse3.phsub.sw
case Intrinsic::x86_ssse3_phsub_w: // llvm.x86.ssse3.phsub.w
case Intrinsic::x86_ssse3_pmadd_ub_sw: // llvm.x86.ssse3.pmadd.ub.sw
case Intrinsic::x86_ssse3_pmul_hr_sw: // llvm.x86.ssse3.pmul.hr.sw
case Intrinsic::x86_ssse3_pshuf_b: // llvm.x86.ssse3.pshuf.b
case Intrinsic::x86_ssse3_psign_b: // llvm.x86.ssse3.psign.b
case Intrinsic::x86_ssse3_psign_d: // llvm.x86.ssse3.psign.d
case Intrinsic::x86_ssse3_psign_w: // llvm.x86.ssse3.psign.w
VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::x86mmx, MVT::x86mmx, MVT::x86mmx);
break;
case Intrinsic::x86_mmx_palignr_b: // llvm.x86.mmx.palignr.b
VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::x86mmx, MVT::x86mmx, MVT::x86mmx, MVT::i8);
break;
}
#endif
// Code for generating Intrinsic function declarations.
#ifdef GET_INTRINSIC_GENERATOR
switch (id) {
default: llvm_unreachable("Invalid intrinsic!");
case Intrinsic::eh_unwind_init: // llvm.eh.unwind.init
case Intrinsic::ppc_altivec_dssall: // llvm.ppc.altivec.dssall
case Intrinsic::ppc_sync: // llvm.ppc.sync
case Intrinsic::trap: // llvm.trap
case Intrinsic::x86_avx_vzeroall: // llvm.x86.avx.vzeroall
case Intrinsic::x86_avx_vzeroupper: // llvm.x86.avx.vzeroupper
case Intrinsic::x86_mmx_emms: // llvm.x86.mmx.emms
case Intrinsic::x86_mmx_femms: // llvm.x86.mmx.femms
case Intrinsic::x86_sse2_lfence: // llvm.x86.sse2.lfence
case Intrinsic::x86_sse2_mfence: // llvm.x86.sse2.mfence
case Intrinsic::x86_sse_sfence: // llvm.x86.sse.sfence
case Intrinsic::xcore_clre: // llvm.xcore.clre
case Intrinsic::xcore_ssync: // llvm.xcore.ssync
ResultTy = Type::getVoidTy(Context);
break;
case Intrinsic::H: // llvm.H
case Intrinsic::NOT: // llvm.rkqc.NOT
case Intrinsic::S: // llvm.S
case Intrinsic::Sdag: // llvm.Sdag
case Intrinsic::T: // llvm.T
case Intrinsic::Tdag: // llvm.Tdag
case Intrinsic::X: // llvm.X
case Intrinsic::Y: // llvm.Y
case Intrinsic::Z: // llvm.Z
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::CNOT: // llvm.CNOT
case Intrinsic::cnot: // llvm.rkqc.cnot
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[1]);
break;
case Intrinsic::Fredkin: // llvm.Fredkin
case Intrinsic::Toffoli: // llvm.Toffoli
case Intrinsic::toffoli: // llvm.rkqc.toffoli
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[1]);
ArgTys.push_back(Tys[2]);
break;
case Intrinsic::a_eq_a_plus_b_times_c: // llvm.rkqc.a_eq_a_plus_b_times_c
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[1]);
ArgTys.push_back(Tys[2]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::a_eq_a_minus_b: // llvm.rkqc.a_eq_a_minus_b
case Intrinsic::a_eq_a_plus_b: // llvm.rkqc.a_eq_a_plus_b
case Intrinsic::a_swap_b: // llvm.rkqc.a_swap_b
case Intrinsic::assign_value_of_b_to_a: // llvm.rkqc.assign_value_of_b_to_a
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[1]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::Rx: // llvm.Rx
case Intrinsic::Ry: // llvm.Ry
case Intrinsic::Rz: // llvm.Rz
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Type::getDoubleTy(Context));
break;
case Intrinsic::PrepX: // llvm.PrepX
case Intrinsic::PrepZ: // llvm.PrepZ
case Intrinsic::assign_value_of_0_to_a: // llvm.rkqc.assign_value_of_0_to_a
case Intrinsic::assign_value_of_1_to_a: // llvm.rkqc.assign_value_of_1_to_a
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::xcore_eeu: // llvm.xcore.eeu
case Intrinsic::xcore_freer: // llvm.xcore.freer
case Intrinsic::xcore_mjoin: // llvm.xcore.mjoin
case Intrinsic::xcore_msync: // llvm.xcore.msync
case Intrinsic::xcore_syncr: // llvm.xcore.syncr
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back((0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::xcore_setclk: // llvm.xcore.setclk
case Intrinsic::xcore_setrdy: // llvm.xcore.setrdy
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back((0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back((1 < Tys.size()) ? Tys[1] : PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::memcpy: // llvm.memcpy
case Intrinsic::memmove: // llvm.memmove
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back((0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back((1 < Tys.size()) ? Tys[1] : PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[2]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 1));
break;
case Intrinsic::xcore_chkct: // llvm.xcore.chkct
case Intrinsic::xcore_out: // llvm.xcore.out
case Intrinsic::xcore_outct: // llvm.xcore.outct
case Intrinsic::xcore_outt: // llvm.xcore.outt
case Intrinsic::xcore_setc: // llvm.xcore.setc
case Intrinsic::xcore_setd: // llvm.xcore.setd
case Intrinsic::xcore_setpsc: // llvm.xcore.setpsc
case Intrinsic::xcore_setpt: // llvm.xcore.setpt
case Intrinsic::xcore_settw: // llvm.xcore.settw
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back((0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::memset: // llvm.memset
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back((0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 8));
ArgTys.push_back(Tys[1]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 1));
break;
case Intrinsic::xcore_initcp: // llvm.xcore.initcp
case Intrinsic::xcore_initdp: // llvm.xcore.initdp
case Intrinsic::xcore_initlr: // llvm.xcore.initlr
case Intrinsic::xcore_initpc: // llvm.xcore.initpc
case Intrinsic::xcore_initsp: // llvm.xcore.initsp
case Intrinsic::xcore_setev: // llvm.xcore.setev
case Intrinsic::xcore_setv: // llvm.xcore.setv
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back((0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::invariant_end: // llvm.invariant.end
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(StructType::get(Context)));
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::arm_set_fpscr: // llvm.arm.set.fpscr
case Intrinsic::eh_sjlj_callsite: // llvm.eh.sjlj.callsite
case Intrinsic::pcmarker: // llvm.pcmarker
case Intrinsic::ppc_altivec_dss: // llvm.ppc.altivec.dss
case Intrinsic::ptx_bar_sync: // llvm.ptx.bar.sync
case Intrinsic::x86_wrfsbase_32: // llvm.x86.wrfsbase.32
case Intrinsic::x86_wrgsbase_32: // llvm.x86.wrgsbase.32
case Intrinsic::xcore_clrsr: // llvm.xcore.clrsr
case Intrinsic::xcore_setsr: // llvm.xcore.setsr
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse3_mwait: // llvm.x86.sse3.mwait
case Intrinsic::xcore_setps: // llvm.xcore.setps
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_mcrr: // llvm.arm.mcrr
case Intrinsic::arm_mcrr2: // llvm.arm.mcrr2
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_cdp: // llvm.arm.cdp
case Intrinsic::arm_cdp2: // llvm.arm.cdp2
case Intrinsic::arm_mcr: // llvm.arm.mcr
case Intrinsic::arm_mcr2: // llvm.arm.mcr2
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::eh_return_i32: // llvm.eh.return.i32
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_wrfsbase_64: // llvm.x86.wrfsbase.64
case Intrinsic::x86_wrgsbase_64: // llvm.x86.wrgsbase.64
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::eh_return_i64: // llvm.eh.return.i64
case Intrinsic::lifetime_end: // llvm.lifetime.end
case Intrinsic::lifetime_start: // llvm.lifetime.start
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_int: // llvm.x86.int
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::dbg_value: // llvm.dbg.value
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Type::getMetadataTy(Context));
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(Type::getMetadataTy(Context));
break;
case Intrinsic::dbg_declare: // llvm.dbg.declare
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Type::getMetadataTy(Context));
ArgTys.push_back(Type::getMetadataTy(Context));
break;
case Intrinsic::eh_sjlj_functioncontext: // llvm.eh.sjlj.functioncontext
case Intrinsic::eh_sjlj_longjmp: // llvm.eh.sjlj.longjmp
case Intrinsic::ppc_dcba: // llvm.ppc.dcba
case Intrinsic::ppc_dcbf: // llvm.ppc.dcbf
case Intrinsic::ppc_dcbi: // llvm.ppc.dcbi
case Intrinsic::ppc_dcbst: // llvm.ppc.dcbst
case Intrinsic::ppc_dcbt: // llvm.ppc.dcbt
case Intrinsic::ppc_dcbtst: // llvm.ppc.dcbtst
case Intrinsic::ppc_dcbz: // llvm.ppc.dcbz
case Intrinsic::ppc_dcbzl: // llvm.ppc.dcbzl
case Intrinsic::stackrestore: // llvm.stackrestore
case Intrinsic::vaend: // llvm.va_end
case Intrinsic::vastart: // llvm.va_start
case Intrinsic::x86_sse2_clflush: // llvm.x86.sse2.clflush
case Intrinsic::x86_sse_ldmxcsr: // llvm.x86.sse.ldmxcsr
case Intrinsic::x86_sse_stmxcsr: // llvm.x86.sse.stmxcsr
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::arm_neon_vst2: // llvm.arm.neon.vst2
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vst3: // llvm.arm.neon.vst3
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vst4: // llvm.arm.neon.vst4
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vst2lane: // llvm.arm.neon.vst2lane
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vst3lane: // llvm.arm.neon.vst3lane
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vst4lane: // llvm.arm.neon.vst4lane
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vst1: // llvm.arm.neon.vst1
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::longjmp: // llvm.longjmp
case Intrinsic::siglongjmp: // llvm.siglongjmp
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::ppc_altivec_dst: // llvm.ppc.altivec.dst
case Intrinsic::ppc_altivec_dstst: // llvm.ppc.altivec.dstst
case Intrinsic::ppc_altivec_dststt: // llvm.ppc.altivec.dststt
case Intrinsic::ppc_altivec_dstt: // llvm.ppc.altivec.dstt
case Intrinsic::x86_sse3_monitor: // llvm.x86.sse3.monitor
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::prefetch: // llvm.prefetch
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::vacopy: // llvm.va_copy
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::init_trampoline: // llvm.init.trampoline
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::var_annotation: // llvm.var.annotation
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::gcwrite: // llvm.gcwrite
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
break;
case Intrinsic::stackprotector: // llvm.stackprotector
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
break;
case Intrinsic::x86_sse2_storeu_dq: // llvm.x86.sse2.storeu.dq
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_sse2_storeu_pd: // llvm.x86.sse2.storeu.pd
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_avx_maskstore_pd: // llvm.x86.avx.maskstore.pd
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_avx2_maskstore_q: // llvm.x86.avx2.maskstore.q
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_avx_storeu_dq_256: // llvm.x86.avx.storeu.dq.256
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
break;
case Intrinsic::x86_sse_storeu_ps: // llvm.x86.sse.storeu.ps
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_avx_maskstore_ps: // llvm.x86.avx.maskstore.ps
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_avx_movnt_pd_256: // llvm.x86.avx.movnt.pd.256
case Intrinsic::x86_avx_storeu_pd_256: // llvm.x86.avx.storeu.pd.256
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::x86_avx_maskstore_pd_256: // llvm.x86.avx.maskstore.pd.256
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::x86_sse2_storel_dq: // llvm.x86.sse2.storel.dq
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_avx2_maskstore_d: // llvm.x86.avx2.maskstore.d
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_avx_movnt_dq_256: // llvm.x86.avx.movnt.dq.256
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
break;
case Intrinsic::x86_avx2_maskstore_q_256: // llvm.x86.avx2.maskstore.q.256
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
break;
case Intrinsic::x86_avx_movnt_ps_256: // llvm.x86.avx.movnt.ps.256
case Intrinsic::x86_avx_storeu_ps_256: // llvm.x86.avx.storeu.ps.256
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
break;
case Intrinsic::x86_avx_maskstore_ps_256: // llvm.x86.avx.maskstore.ps.256
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
break;
case Intrinsic::x86_avx2_maskstore_d_256: // llvm.x86.avx2.maskstore.d.256
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
break;
case Intrinsic::gcroot: // llvm.gcroot
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_mmx_movnt_dq: // llvm.x86.mmx.movnt.dq
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(PointerType::getUnqual(Type::getX86_MMXTy(Context)));
ArgTys.push_back(Type::getX86_MMXTy(Context));
break;
case Intrinsic::ppc_altivec_stvebx: // llvm.ppc.altivec.stvebx
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_sse2_maskmov_dqu: // llvm.x86.sse2.maskmov.dqu
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::ppc_altivec_mtvscr: // llvm.ppc.altivec.mtvscr
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::ppc_altivec_stvewx: // llvm.ppc.altivec.stvewx
case Intrinsic::ppc_altivec_stvx: // llvm.ppc.altivec.stvx
case Intrinsic::ppc_altivec_stvxl: // llvm.ppc.altivec.stvxl
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::ppc_altivec_stvehx: // llvm.ppc.altivec.stvehx
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_mmx_maskmovq: // llvm.x86.mmx.maskmovq
ResultTy = Type::getVoidTy(Context);
ArgTys.push_back(Type::getX86_MMXTy(Context));
ArgTys.push_back(Type::getX86_MMXTy(Context));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::ptr_annotation: // llvm.ptr.annotation
ResultTy = (0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::sin: // llvm.sin
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::cos: // llvm.cos
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::pow: // llvm.pow
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::log: // llvm.log
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::log10: // llvm.log10
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::log2: // llvm.log2
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::exp: // llvm.exp
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::exp2: // llvm.exp2
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::fma: // llvm.fma
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::sqrt: // llvm.sqrt
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::powi: // llvm.powi
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::convertff: // llvm.convertff
ResultTy = Tys[0];
ArgTys.push_back(Tys[1]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vcvtfxs2fp: // llvm.arm.neon.vcvtfxs2fp
case Intrinsic::arm_neon_vcvtfxu2fp: // llvm.arm.neon.vcvtfxu2fp
ResultTy = Tys[0];
ArgTys.push_back(Tys[1]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::convertfsi: // llvm.convertfsi
case Intrinsic::convertfui: // llvm.convertfui
ResultTy = Tys[0];
ArgTys.push_back(Tys[1]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::expect: // llvm.expect
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::bswap: // llvm.bswap
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::ctpop: // llvm.ctpop
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::ctlz: // llvm.ctlz
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 1));
break;
case Intrinsic::cttz: // llvm.cttz
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 1));
break;
case Intrinsic::annotation: // llvm.annotation
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vcvtfp2fxs: // llvm.arm.neon.vcvtfp2fxs
case Intrinsic::arm_neon_vcvtfp2fxu: // llvm.arm.neon.vcvtfp2fxu
ResultTy = Tys[0];
ArgTys.push_back(Tys[1]);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::convertsif: // llvm.convertsif
case Intrinsic::convertuif: // llvm.convertuif
ResultTy = Tys[0];
ArgTys.push_back(Tys[1]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::convertss: // llvm.convertss
case Intrinsic::convertsu: // llvm.convertsu
case Intrinsic::convertus: // llvm.convertus
case Intrinsic::convertuu: // llvm.convertuu
ResultTy = Tys[0];
ArgTys.push_back(Tys[1]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::objectsize: // llvm.objectsize
ResultTy = Tys[0];
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 1));
break;
case Intrinsic::sadd_with_overflow: // llvm.sadd.with.overflow
ResultTy = StructType::get(Tys[0], IntegerType::get(Context, 1), NULL);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::uadd_with_overflow: // llvm.uadd.with.overflow
ResultTy = StructType::get(Tys[0], IntegerType::get(Context, 1), NULL);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::ssub_with_overflow: // llvm.ssub.with.overflow
ResultTy = StructType::get(Tys[0], IntegerType::get(Context, 1), NULL);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::usub_with_overflow: // llvm.usub.with.overflow
ResultTy = StructType::get(Tys[0], IntegerType::get(Context, 1), NULL);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::smul_with_overflow: // llvm.smul.with.overflow
ResultTy = StructType::get(Tys[0], IntegerType::get(Context, 1), NULL);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::umul_with_overflow: // llvm.umul.with.overflow
ResultTy = StructType::get(Tys[0], IntegerType::get(Context, 1), NULL);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::xcore_getst: // llvm.xcore.getst
ResultTy = (0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8));
ArgTys.push_back((1 < Tys.size()) ? Tys[1] : PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::xcore_getr: // llvm.xcore.getr
ResultTy = (0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vabs: // llvm.arm.neon.vabs
case Intrinsic::arm_neon_vcls: // llvm.arm.neon.vcls
case Intrinsic::arm_neon_vclz: // llvm.arm.neon.vclz
case Intrinsic::arm_neon_vcnt: // llvm.arm.neon.vcnt
case Intrinsic::arm_neon_vqabs: // llvm.arm.neon.vqabs
case Intrinsic::arm_neon_vqneg: // llvm.arm.neon.vqneg
case Intrinsic::arm_neon_vrecpe: // llvm.arm.neon.vrecpe
case Intrinsic::arm_neon_vrsqrte: // llvm.arm.neon.vrsqrte
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::arm_neon_vqmovns: // llvm.arm.neon.vqmovns
case Intrinsic::arm_neon_vqmovnsu: // llvm.arm.neon.vqmovnsu
case Intrinsic::arm_neon_vqmovnu: // llvm.arm.neon.vqmovnu
ResultTy = Tys[0];
ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0])));
break;
case Intrinsic::arm_neon_vabds: // llvm.arm.neon.vabds
case Intrinsic::arm_neon_vabdu: // llvm.arm.neon.vabdu
case Intrinsic::arm_neon_vhadds: // llvm.arm.neon.vhadds
case Intrinsic::arm_neon_vhaddu: // llvm.arm.neon.vhaddu
case Intrinsic::arm_neon_vhsubs: // llvm.arm.neon.vhsubs
case Intrinsic::arm_neon_vhsubu: // llvm.arm.neon.vhsubu
case Intrinsic::arm_neon_vmaxs: // llvm.arm.neon.vmaxs
case Intrinsic::arm_neon_vmaxu: // llvm.arm.neon.vmaxu
case Intrinsic::arm_neon_vmins: // llvm.arm.neon.vmins
case Intrinsic::arm_neon_vminu: // llvm.arm.neon.vminu
case Intrinsic::arm_neon_vmulp: // llvm.arm.neon.vmulp
case Intrinsic::arm_neon_vpadd: // llvm.arm.neon.vpadd
case Intrinsic::arm_neon_vpmaxs: // llvm.arm.neon.vpmaxs
case Intrinsic::arm_neon_vpmaxu: // llvm.arm.neon.vpmaxu
case Intrinsic::arm_neon_vpmins: // llvm.arm.neon.vpmins
case Intrinsic::arm_neon_vpminu: // llvm.arm.neon.vpminu
case Intrinsic::arm_neon_vqadds: // llvm.arm.neon.vqadds
case Intrinsic::arm_neon_vqaddu: // llvm.arm.neon.vqaddu
case Intrinsic::arm_neon_vqdmulh: // llvm.arm.neon.vqdmulh
case Intrinsic::arm_neon_vqrdmulh: // llvm.arm.neon.vqrdmulh
case Intrinsic::arm_neon_vqrshifts: // llvm.arm.neon.vqrshifts
case Intrinsic::arm_neon_vqrshiftu: // llvm.arm.neon.vqrshiftu
case Intrinsic::arm_neon_vqshifts: // llvm.arm.neon.vqshifts
case Intrinsic::arm_neon_vqshiftsu: // llvm.arm.neon.vqshiftsu
case Intrinsic::arm_neon_vqshiftu: // llvm.arm.neon.vqshiftu
case Intrinsic::arm_neon_vqsubs: // llvm.arm.neon.vqsubs
case Intrinsic::arm_neon_vqsubu: // llvm.arm.neon.vqsubu
case Intrinsic::arm_neon_vrecps: // llvm.arm.neon.vrecps
case Intrinsic::arm_neon_vrhadds: // llvm.arm.neon.vrhadds
case Intrinsic::arm_neon_vrhaddu: // llvm.arm.neon.vrhaddu
case Intrinsic::arm_neon_vrshifts: // llvm.arm.neon.vrshifts
case Intrinsic::arm_neon_vrshiftu: // llvm.arm.neon.vrshiftu
case Intrinsic::arm_neon_vrsqrts: // llvm.arm.neon.vrsqrts
case Intrinsic::arm_neon_vshifts: // llvm.arm.neon.vshifts
case Intrinsic::arm_neon_vshiftu: // llvm.arm.neon.vshiftu
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::arm_neon_vaddhn: // llvm.arm.neon.vaddhn
case Intrinsic::arm_neon_vqrshiftns: // llvm.arm.neon.vqrshiftns
case Intrinsic::arm_neon_vqrshiftnsu: // llvm.arm.neon.vqrshiftnsu
case Intrinsic::arm_neon_vqrshiftnu: // llvm.arm.neon.vqrshiftnu
case Intrinsic::arm_neon_vqshiftns: // llvm.arm.neon.vqshiftns
case Intrinsic::arm_neon_vqshiftnsu: // llvm.arm.neon.vqshiftnsu
case Intrinsic::arm_neon_vqshiftnu: // llvm.arm.neon.vqshiftnu
case Intrinsic::arm_neon_vraddhn: // llvm.arm.neon.vraddhn
case Intrinsic::arm_neon_vrshiftn: // llvm.arm.neon.vrshiftn
case Intrinsic::arm_neon_vrsubhn: // llvm.arm.neon.vrsubhn
case Intrinsic::arm_neon_vshiftn: // llvm.arm.neon.vshiftn
case Intrinsic::arm_neon_vsubhn: // llvm.arm.neon.vsubhn
ResultTy = Tys[0];
ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0])));
ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0])));
break;
case Intrinsic::arm_neon_vmullp: // llvm.arm.neon.vmullp
case Intrinsic::arm_neon_vmulls: // llvm.arm.neon.vmulls
case Intrinsic::arm_neon_vmullu: // llvm.arm.neon.vmullu
case Intrinsic::arm_neon_vqdmull: // llvm.arm.neon.vqdmull
case Intrinsic::arm_neon_vshiftls: // llvm.arm.neon.vshiftls
case Intrinsic::arm_neon_vshiftlu: // llvm.arm.neon.vshiftlu
ResultTy = Tys[0];
ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
break;
case Intrinsic::arm_neon_vshiftins: // llvm.arm.neon.vshiftins
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::arm_neon_vqdmlal: // llvm.arm.neon.vqdmlal
case Intrinsic::arm_neon_vqdmlsl: // llvm.arm.neon.vqdmlsl
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
break;
case Intrinsic::arm_neon_vpadals: // llvm.arm.neon.vpadals
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[1]);
break;
case Intrinsic::arm_neon_vpadalu: // llvm.arm.neon.vpadalu
ResultTy = Tys[0];
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[1]);
break;
case Intrinsic::arm_neon_vpaddls: // llvm.arm.neon.vpaddls
case Intrinsic::arm_neon_vpaddlu: // llvm.arm.neon.vpaddlu
ResultTy = Tys[0];
ArgTys.push_back(Tys[1]);
break;
case Intrinsic::arm_neon_vld1: // llvm.arm.neon.vld1
ResultTy = Tys[0];
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vld2: // llvm.arm.neon.vld2
ResultTy = StructType::get(Tys[0], Tys[0], NULL);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vld3: // llvm.arm.neon.vld3
ResultTy = StructType::get(Tys[0], Tys[0], Tys[0], NULL);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vld4: // llvm.arm.neon.vld4
ResultTy = StructType::get(Tys[0], Tys[0], Tys[0], Tys[0], NULL);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vld2lane: // llvm.arm.neon.vld2lane
ResultTy = StructType::get(Tys[0], Tys[0], NULL);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vld3lane: // llvm.arm.neon.vld3lane
ResultTy = StructType::get(Tys[0], Tys[0], Tys[0], NULL);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vld4lane: // llvm.arm.neon.vld4lane
ResultTy = StructType::get(Tys[0], Tys[0], Tys[0], Tys[0], NULL);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(Tys[0]);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::MeasX: // llvm.MeasX
case Intrinsic::MeasZ: // llvm.MeasZ
ResultTy = IntegerType::get(Context, 1);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::invariant_start: // llvm.invariant.start
ResultTy = PointerType::getUnqual(StructType::get(Context));
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::arm_vcvtr: // llvm.arm.vcvtr
case Intrinsic::arm_vcvtru: // llvm.arm.vcvtru
ResultTy = Type::getFloatTy(Context);
ArgTys.push_back(Tys[0]);
break;
case Intrinsic::convert_from_fp16: // llvm.convert.from.fp16
ResultTy = Type::getFloatTy(Context);
ArgTys.push_back(IntegerType::get(Context, 16));
break;
case Intrinsic::convert_to_fp16: // llvm.convert.to.fp16
ResultTy = IntegerType::get(Context, 16);
ArgTys.push_back(Type::getFloatTy(Context));
break;
case Intrinsic::hexagon_C2_all8: // llvm.hexagon.C2.all8
case Intrinsic::hexagon_C2_any8: // llvm.hexagon.C2.any8
case Intrinsic::hexagon_C2_not: // llvm.hexagon.C2.not
case Intrinsic::hexagon_C2_pxfer_map: // llvm.hexagon.C2.pxfer.map
case Intrinsic::hexagon_C2_tfrrp: // llvm.hexagon.C2.tfrrp
ResultTy = IntegerType::get(Context, 1);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_C2_and: // llvm.hexagon.C2.and
case Intrinsic::hexagon_C2_andn: // llvm.hexagon.C2.andn
case Intrinsic::hexagon_C2_bitsclr: // llvm.hexagon.C2.bitsclr
case Intrinsic::hexagon_C2_bitsclri: // llvm.hexagon.C2.bitsclri
case Intrinsic::hexagon_C2_bitsset: // llvm.hexagon.C2.bitsset
case Intrinsic::hexagon_C2_cmpeq: // llvm.hexagon.C2.cmpeq
case Intrinsic::hexagon_C2_cmpeqi: // llvm.hexagon.C2.cmpeqi
case Intrinsic::hexagon_C2_cmpgei: // llvm.hexagon.C2.cmpgei
case Intrinsic::hexagon_C2_cmpgeui: // llvm.hexagon.C2.cmpgeui
case Intrinsic::hexagon_C2_cmpgt: // llvm.hexagon.C2.cmpgt
case Intrinsic::hexagon_C2_cmpgti: // llvm.hexagon.C2.cmpgti
case Intrinsic::hexagon_C2_cmpgtu: // llvm.hexagon.C2.cmpgtu
case Intrinsic::hexagon_C2_cmpgtui: // llvm.hexagon.C2.cmpgtui
case Intrinsic::hexagon_C2_cmplt: // llvm.hexagon.C2.cmplt
case Intrinsic::hexagon_C2_cmpltu: // llvm.hexagon.C2.cmpltu
case Intrinsic::hexagon_C2_or: // llvm.hexagon.C2.or
case Intrinsic::hexagon_C2_orn: // llvm.hexagon.C2.orn
case Intrinsic::hexagon_C2_xor: // llvm.hexagon.C2.xor
case Intrinsic::hexagon_C4_cmplte: // llvm.hexagon.C4.cmplte
case Intrinsic::hexagon_C4_cmpltei: // llvm.hexagon.C4.cmpltei
case Intrinsic::hexagon_C4_cmplteu: // llvm.hexagon.C4.cmplteu
case Intrinsic::hexagon_C4_cmplteui: // llvm.hexagon.C4.cmplteui
case Intrinsic::hexagon_C4_cmpneq: // llvm.hexagon.C4.cmpneq
case Intrinsic::hexagon_C4_cmpneqi: // llvm.hexagon.C4.cmpneqi
case Intrinsic::hexagon_C4_fastcorner9: // llvm.hexagon.C4.fastcorner9
case Intrinsic::hexagon_C4_fastcorner9_not: // llvm.hexagon.C4.fastcorner9.not
case Intrinsic::hexagon_S2_tstbit_i: // llvm.hexagon.S2.tstbit.i
case Intrinsic::hexagon_S2_tstbit_r: // llvm.hexagon.S2.tstbit.r
ResultTy = IntegerType::get(Context, 1);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_C4_and_and: // llvm.hexagon.C4.and.and
case Intrinsic::hexagon_C4_and_andn: // llvm.hexagon.C4.and.andn
case Intrinsic::hexagon_C4_and_or: // llvm.hexagon.C4.and.or
case Intrinsic::hexagon_C4_and_orn: // llvm.hexagon.C4.and.orn
case Intrinsic::hexagon_C4_or_and: // llvm.hexagon.C4.or.and
case Intrinsic::hexagon_C4_or_andn: // llvm.hexagon.C4.or.andn
case Intrinsic::hexagon_C4_or_or: // llvm.hexagon.C4.or.or
case Intrinsic::hexagon_C4_or_orn: // llvm.hexagon.C4.or.orn
ResultTy = IntegerType::get(Context, 1);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_A2_vcmpbeq: // llvm.hexagon.A2.vcmpbeq
case Intrinsic::hexagon_A2_vcmpbgtu: // llvm.hexagon.A2.vcmpbgtu
case Intrinsic::hexagon_A2_vcmpheq: // llvm.hexagon.A2.vcmpheq
case Intrinsic::hexagon_A2_vcmphgt: // llvm.hexagon.A2.vcmphgt
case Intrinsic::hexagon_A2_vcmphgtu: // llvm.hexagon.A2.vcmphgtu
case Intrinsic::hexagon_A2_vcmpweq: // llvm.hexagon.A2.vcmpweq
case Intrinsic::hexagon_A2_vcmpwgt: // llvm.hexagon.A2.vcmpwgt
case Intrinsic::hexagon_A2_vcmpwgtu: // llvm.hexagon.A2.vcmpwgtu
case Intrinsic::hexagon_C2_cmpeqp: // llvm.hexagon.C2.cmpeqp
case Intrinsic::hexagon_C2_cmpgtp: // llvm.hexagon.C2.cmpgtp
case Intrinsic::hexagon_C2_cmpgtup: // llvm.hexagon.C2.cmpgtup
ResultTy = IntegerType::get(Context, 1);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::arm_get_fpscr: // llvm.arm.get.fpscr
case Intrinsic::flt_rounds: // llvm.flt.rounds
case Intrinsic::ptx_read_clock: // llvm.ptx.read.clock
case Intrinsic::ptx_read_ctaid_w: // llvm.ptx.read.ctaid.w
case Intrinsic::ptx_read_ctaid_x: // llvm.ptx.read.ctaid.x
case Intrinsic::ptx_read_ctaid_y: // llvm.ptx.read.ctaid.y
case Intrinsic::ptx_read_ctaid_z: // llvm.ptx.read.ctaid.z
case Intrinsic::ptx_read_gridid: // llvm.ptx.read.gridid
case Intrinsic::ptx_read_laneid: // llvm.ptx.read.laneid
case Intrinsic::ptx_read_lanemask_eq: // llvm.ptx.read.lanemask.eq
case Intrinsic::ptx_read_lanemask_ge: // llvm.ptx.read.lanemask.ge
case Intrinsic::ptx_read_lanemask_gt: // llvm.ptx.read.lanemask.gt
case Intrinsic::ptx_read_lanemask_le: // llvm.ptx.read.lanemask.le
case Intrinsic::ptx_read_lanemask_lt: // llvm.ptx.read.lanemask.lt
case Intrinsic::ptx_read_nctaid_w: // llvm.ptx.read.nctaid.w
case Intrinsic::ptx_read_nctaid_x: // llvm.ptx.read.nctaid.x
case Intrinsic::ptx_read_nctaid_y: // llvm.ptx.read.nctaid.y
case Intrinsic::ptx_read_nctaid_z: // llvm.ptx.read.nctaid.z
case Intrinsic::ptx_read_nsmid: // llvm.ptx.read.nsmid
case Intrinsic::ptx_read_ntid_w: // llvm.ptx.read.ntid.w
case Intrinsic::ptx_read_ntid_x: // llvm.ptx.read.ntid.x
case Intrinsic::ptx_read_ntid_y: // llvm.ptx.read.ntid.y
case Intrinsic::ptx_read_ntid_z: // llvm.ptx.read.ntid.z
case Intrinsic::ptx_read_nwarpid: // llvm.ptx.read.nwarpid
case Intrinsic::ptx_read_pm0: // llvm.ptx.read.pm0
case Intrinsic::ptx_read_pm1: // llvm.ptx.read.pm1
case Intrinsic::ptx_read_pm2: // llvm.ptx.read.pm2
case Intrinsic::ptx_read_pm3: // llvm.ptx.read.pm3
case Intrinsic::ptx_read_smid: // llvm.ptx.read.smid
case Intrinsic::ptx_read_tid_w: // llvm.ptx.read.tid.w
case Intrinsic::ptx_read_tid_x: // llvm.ptx.read.tid.x
case Intrinsic::ptx_read_tid_y: // llvm.ptx.read.tid.y
case Intrinsic::ptx_read_tid_z: // llvm.ptx.read.tid.z
case Intrinsic::ptx_read_warpid: // llvm.ptx.read.warpid
case Intrinsic::x86_rdfsbase_32: // llvm.x86.rdfsbase.32
case Intrinsic::x86_rdgsbase_32: // llvm.x86.rdgsbase.32
case Intrinsic::xcore_geted: // llvm.xcore.geted
case Intrinsic::xcore_getet: // llvm.xcore.getet
case Intrinsic::xcore_getid: // llvm.xcore.getid
ResultTy = IntegerType::get(Context, 32);
break;
case Intrinsic::xcore_endin: // llvm.xcore.endin
case Intrinsic::xcore_getts: // llvm.xcore.getts
case Intrinsic::xcore_in: // llvm.xcore.in
case Intrinsic::xcore_inct: // llvm.xcore.inct
case Intrinsic::xcore_int: // llvm.xcore.int
case Intrinsic::xcore_peek: // llvm.xcore.peek
case Intrinsic::xcore_testct: // llvm.xcore.testct
case Intrinsic::xcore_testwct: // llvm.xcore.testwct
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back((0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::xcore_inshr: // llvm.xcore.inshr
case Intrinsic::xcore_outshr: // llvm.xcore.outshr
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back((0 < Tys.size()) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_A2_abs: // llvm.hexagon.A2.abs
case Intrinsic::hexagon_A2_abssat: // llvm.hexagon.A2.abssat
case Intrinsic::hexagon_A2_aslh: // llvm.hexagon.A2.aslh
case Intrinsic::hexagon_A2_asrh: // llvm.hexagon.A2.asrh
case Intrinsic::hexagon_A2_neg: // llvm.hexagon.A2.neg
case Intrinsic::hexagon_A2_negsat: // llvm.hexagon.A2.negsat
case Intrinsic::hexagon_A2_not: // llvm.hexagon.A2.not
case Intrinsic::hexagon_A2_satb: // llvm.hexagon.A2.satb
case Intrinsic::hexagon_A2_sath: // llvm.hexagon.A2.sath
case Intrinsic::hexagon_A2_satub: // llvm.hexagon.A2.satub
case Intrinsic::hexagon_A2_satuh: // llvm.hexagon.A2.satuh
case Intrinsic::hexagon_A2_swiz: // llvm.hexagon.A2.swiz
case Intrinsic::hexagon_A2_sxtb: // llvm.hexagon.A2.sxtb
case Intrinsic::hexagon_A2_sxth: // llvm.hexagon.A2.sxth
case Intrinsic::hexagon_A2_tfr: // llvm.hexagon.A2.tfr
case Intrinsic::hexagon_A2_tfrsi: // llvm.hexagon.A2.tfrsi
case Intrinsic::hexagon_A2_zxtb: // llvm.hexagon.A2.zxtb
case Intrinsic::hexagon_A2_zxth: // llvm.hexagon.A2.zxth
case Intrinsic::hexagon_C2_tfrpr: // llvm.hexagon.C2.tfrpr
case Intrinsic::hexagon_S2_brev: // llvm.hexagon.S2.brev
case Intrinsic::hexagon_S2_cl0: // llvm.hexagon.S2.cl0
case Intrinsic::hexagon_S2_cl1: // llvm.hexagon.S2.cl1
case Intrinsic::hexagon_S2_clb: // llvm.hexagon.S2.clb
case Intrinsic::hexagon_S2_clbnorm: // llvm.hexagon.S2.clbnorm
case Intrinsic::hexagon_S2_ct0: // llvm.hexagon.S2.ct0
case Intrinsic::hexagon_S2_ct1: // llvm.hexagon.S2.ct1
case Intrinsic::hexagon_S2_svsathb: // llvm.hexagon.S2.svsathb
case Intrinsic::hexagon_S2_svsathub: // llvm.hexagon.S2.svsathub
case Intrinsic::hexagon_S2_vsplatrb: // llvm.hexagon.S2.vsplatrb
case Intrinsic::hexagon_SI_to_SXTHI_asrh: // llvm.hexagon.SI.to.SXTHI.asrh
case Intrinsic::xcore_bitrev: // llvm.xcore.bitrev
case Intrinsic::xcore_getps: // llvm.xcore.getps
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse42_crc32_32_16: // llvm.x86.sse42.crc32.32.16
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 16));
break;
case Intrinsic::arm_qadd: // llvm.arm.qadd
case Intrinsic::arm_qsub: // llvm.arm.qsub
case Intrinsic::arm_ssat: // llvm.arm.ssat
case Intrinsic::arm_usat: // llvm.arm.usat
case Intrinsic::hexagon_A2_add: // llvm.hexagon.A2.add
case Intrinsic::hexagon_A2_addh_h16_hh: // llvm.hexagon.A2.addh.h16.hh
case Intrinsic::hexagon_A2_addh_h16_hl: // llvm.hexagon.A2.addh.h16.hl
case Intrinsic::hexagon_A2_addh_h16_lh: // llvm.hexagon.A2.addh.h16.lh
case Intrinsic::hexagon_A2_addh_h16_ll: // llvm.hexagon.A2.addh.h16.ll
case Intrinsic::hexagon_A2_addh_h16_sat_hh: // llvm.hexagon.A2.addh.h16.sat.hh
case Intrinsic::hexagon_A2_addh_h16_sat_hl: // llvm.hexagon.A2.addh.h16.sat.hl
case Intrinsic::hexagon_A2_addh_h16_sat_lh: // llvm.hexagon.A2.addh.h16.sat.lh
case Intrinsic::hexagon_A2_addh_h16_sat_ll: // llvm.hexagon.A2.addh.h16.sat.ll
case Intrinsic::hexagon_A2_addh_l16_hh: // llvm.hexagon.A2.addh.l16.hh
case Intrinsic::hexagon_A2_addh_l16_hl: // llvm.hexagon.A2.addh.l16.hl
case Intrinsic::hexagon_A2_addh_l16_lh: // llvm.hexagon.A2.addh.l16.lh
case Intrinsic::hexagon_A2_addh_l16_ll: // llvm.hexagon.A2.addh.l16.ll
case Intrinsic::hexagon_A2_addh_l16_sat_hh: // llvm.hexagon.A2.addh.l16.sat.hh
case Intrinsic::hexagon_A2_addh_l16_sat_hl: // llvm.hexagon.A2.addh.l16.sat.hl
case Intrinsic::hexagon_A2_addh_l16_sat_lh: // llvm.hexagon.A2.addh.l16.sat.lh
case Intrinsic::hexagon_A2_addh_l16_sat_ll: // llvm.hexagon.A2.addh.l16.sat.ll
case Intrinsic::hexagon_A2_addi: // llvm.hexagon.A2.addi
case Intrinsic::hexagon_A2_addsat: // llvm.hexagon.A2.addsat
case Intrinsic::hexagon_A2_and: // llvm.hexagon.A2.and
case Intrinsic::hexagon_A2_andir: // llvm.hexagon.A2.andir
case Intrinsic::hexagon_A2_combine_hh: // llvm.hexagon.A2.combine.hh
case Intrinsic::hexagon_A2_combine_hl: // llvm.hexagon.A2.combine.hl
case Intrinsic::hexagon_A2_combine_lh: // llvm.hexagon.A2.combine.lh
case Intrinsic::hexagon_A2_combine_ll: // llvm.hexagon.A2.combine.ll
case Intrinsic::hexagon_A2_max: // llvm.hexagon.A2.max
case Intrinsic::hexagon_A2_maxu: // llvm.hexagon.A2.maxu
case Intrinsic::hexagon_A2_min: // llvm.hexagon.A2.min
case Intrinsic::hexagon_A2_minu: // llvm.hexagon.A2.minu
case Intrinsic::hexagon_A2_or: // llvm.hexagon.A2.or
case Intrinsic::hexagon_A2_orir: // llvm.hexagon.A2.orir
case Intrinsic::hexagon_A2_sub: // llvm.hexagon.A2.sub
case Intrinsic::hexagon_A2_subh_h16_hh: // llvm.hexagon.A2.subh.h16.hh
case Intrinsic::hexagon_A2_subh_h16_hl: // llvm.hexagon.A2.subh.h16.hl
case Intrinsic::hexagon_A2_subh_h16_lh: // llvm.hexagon.A2.subh.h16.lh
case Intrinsic::hexagon_A2_subh_h16_ll: // llvm.hexagon.A2.subh.h16.ll
case Intrinsic::hexagon_A2_subh_h16_sat_hh: // llvm.hexagon.A2.subh.h16.sat.hh
case Intrinsic::hexagon_A2_subh_h16_sat_hl: // llvm.hexagon.A2.subh.h16.sat.hl
case Intrinsic::hexagon_A2_subh_h16_sat_lh: // llvm.hexagon.A2.subh.h16.sat.lh
case Intrinsic::hexagon_A2_subh_h16_sat_ll: // llvm.hexagon.A2.subh.h16.sat.ll
case Intrinsic::hexagon_A2_subh_l16_hl: // llvm.hexagon.A2.subh.l16.hl
case Intrinsic::hexagon_A2_subh_l16_ll: // llvm.hexagon.A2.subh.l16.ll
case Intrinsic::hexagon_A2_subh_l16_sat_hl: // llvm.hexagon.A2.subh.l16.sat.hl
case Intrinsic::hexagon_A2_subh_l16_sat_ll: // llvm.hexagon.A2.subh.l16.sat.ll
case Intrinsic::hexagon_A2_subri: // llvm.hexagon.A2.subri
case Intrinsic::hexagon_A2_subsat: // llvm.hexagon.A2.subsat
case Intrinsic::hexagon_A2_svaddh: // llvm.hexagon.A2.svaddh
case Intrinsic::hexagon_A2_svaddhs: // llvm.hexagon.A2.svaddhs
case Intrinsic::hexagon_A2_svadduhs: // llvm.hexagon.A2.svadduhs
case Intrinsic::hexagon_A2_svavgh: // llvm.hexagon.A2.svavgh
case Intrinsic::hexagon_A2_svavghs: // llvm.hexagon.A2.svavghs
case Intrinsic::hexagon_A2_svnavgh: // llvm.hexagon.A2.svnavgh
case Intrinsic::hexagon_A2_svsubh: // llvm.hexagon.A2.svsubh
case Intrinsic::hexagon_A2_svsubhs: // llvm.hexagon.A2.svsubhs
case Intrinsic::hexagon_A2_svsubuhs: // llvm.hexagon.A2.svsubuhs
case Intrinsic::hexagon_A2_tfrih: // llvm.hexagon.A2.tfrih
case Intrinsic::hexagon_A2_tfril: // llvm.hexagon.A2.tfril
case Intrinsic::hexagon_A2_xor: // llvm.hexagon.A2.xor
case Intrinsic::hexagon_A4_andn: // llvm.hexagon.A4.andn
case Intrinsic::hexagon_A4_cround_ri: // llvm.hexagon.A4.cround.ri
case Intrinsic::hexagon_A4_cround_rr: // llvm.hexagon.A4.cround.rr
case Intrinsic::hexagon_A4_modwrapu: // llvm.hexagon.A4.modwrapu
case Intrinsic::hexagon_A4_orn: // llvm.hexagon.A4.orn
case Intrinsic::hexagon_A4_rcmpeq: // llvm.hexagon.A4.rcmpeq
case Intrinsic::hexagon_A4_rcmpeqi: // llvm.hexagon.A4.rcmpeqi
case Intrinsic::hexagon_A4_rcmpneq: // llvm.hexagon.A4.rcmpneq
case Intrinsic::hexagon_A4_rcmpneqi: // llvm.hexagon.A4.rcmpneqi
case Intrinsic::hexagon_A4_round_ri: // llvm.hexagon.A4.round.ri
case Intrinsic::hexagon_A4_round_ri_sat: // llvm.hexagon.A4.round.ri.sat
case Intrinsic::hexagon_A4_round_rr: // llvm.hexagon.A4.round.rr
case Intrinsic::hexagon_A4_round_rr_sat: // llvm.hexagon.A4.round.rr.sat
case Intrinsic::hexagon_C2_vitpack: // llvm.hexagon.C2.vitpack
case Intrinsic::hexagon_M2_cmpyrs_s0: // llvm.hexagon.M2.cmpyrs.s0
case Intrinsic::hexagon_M2_cmpyrs_s1: // llvm.hexagon.M2.cmpyrs.s1
case Intrinsic::hexagon_M2_cmpyrsc_s0: // llvm.hexagon.M2.cmpyrsc.s0
case Intrinsic::hexagon_M2_cmpyrsc_s1: // llvm.hexagon.M2.cmpyrsc.s1
case Intrinsic::hexagon_M2_dpmpyss_rnd_s0: // llvm.hexagon.M2.dpmpyss.rnd.s0
case Intrinsic::hexagon_M2_hmmpyh_rs1: // llvm.hexagon.M2.hmmpyh.rs1
case Intrinsic::hexagon_M2_hmmpyl_rs1: // llvm.hexagon.M2.hmmpyl.rs1
case Intrinsic::hexagon_M2_mpy_hh_s0: // llvm.hexagon.M2.mpy.hh.s0
case Intrinsic::hexagon_M2_mpy_hh_s1: // llvm.hexagon.M2.mpy.hh.s1
case Intrinsic::hexagon_M2_mpy_hl_s0: // llvm.hexagon.M2.mpy.hl.s0
case Intrinsic::hexagon_M2_mpy_hl_s1: // llvm.hexagon.M2.mpy.hl.s1
case Intrinsic::hexagon_M2_mpy_lh_s0: // llvm.hexagon.M2.mpy.lh.s0
case Intrinsic::hexagon_M2_mpy_lh_s1: // llvm.hexagon.M2.mpy.lh.s1
case Intrinsic::hexagon_M2_mpy_ll_s0: // llvm.hexagon.M2.mpy.ll.s0
case Intrinsic::hexagon_M2_mpy_ll_s1: // llvm.hexagon.M2.mpy.ll.s1
case Intrinsic::hexagon_M2_mpy_rnd_hh_s0: // llvm.hexagon.M2.mpy.rnd.hh.s0
case Intrinsic::hexagon_M2_mpy_rnd_hh_s1: // llvm.hexagon.M2.mpy.rnd.hh.s1
case Intrinsic::hexagon_M2_mpy_rnd_hl_s0: // llvm.hexagon.M2.mpy.rnd.hl.s0
case Intrinsic::hexagon_M2_mpy_rnd_hl_s1: // llvm.hexagon.M2.mpy.rnd.hl.s1
case Intrinsic::hexagon_M2_mpy_rnd_lh_s0: // llvm.hexagon.M2.mpy.rnd.lh.s0
case Intrinsic::hexagon_M2_mpy_rnd_lh_s1: // llvm.hexagon.M2.mpy.rnd.lh.s1
case Intrinsic::hexagon_M2_mpy_rnd_ll_s0: // llvm.hexagon.M2.mpy.rnd.ll.s0
case Intrinsic::hexagon_M2_mpy_rnd_ll_s1: // llvm.hexagon.M2.mpy.rnd.ll.s1
case Intrinsic::hexagon_M2_mpy_sat_hh_s0: // llvm.hexagon.M2.mpy.sat.hh.s0
case Intrinsic::hexagon_M2_mpy_sat_hh_s1: // llvm.hexagon.M2.mpy.sat.hh.s1
case Intrinsic::hexagon_M2_mpy_sat_hl_s0: // llvm.hexagon.M2.mpy.sat.hl.s0
case Intrinsic::hexagon_M2_mpy_sat_hl_s1: // llvm.hexagon.M2.mpy.sat.hl.s1
case Intrinsic::hexagon_M2_mpy_sat_lh_s0: // llvm.hexagon.M2.mpy.sat.lh.s0
case Intrinsic::hexagon_M2_mpy_sat_lh_s1: // llvm.hexagon.M2.mpy.sat.lh.s1
case Intrinsic::hexagon_M2_mpy_sat_ll_s0: // llvm.hexagon.M2.mpy.sat.ll.s0
case Intrinsic::hexagon_M2_mpy_sat_ll_s1: // llvm.hexagon.M2.mpy.sat.ll.s1
case Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0: // llvm.hexagon.M2.mpy.sat.rnd.hh.s0
case Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1: // llvm.hexagon.M2.mpy.sat.rnd.hh.s1
case Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0: // llvm.hexagon.M2.mpy.sat.rnd.hl.s0
case Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1: // llvm.hexagon.M2.mpy.sat.rnd.hl.s1
case Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0: // llvm.hexagon.M2.mpy.sat.rnd.lh.s0
case Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1: // llvm.hexagon.M2.mpy.sat.rnd.lh.s1
case Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0: // llvm.hexagon.M2.mpy.sat.rnd.ll.s0
case Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1: // llvm.hexagon.M2.mpy.sat.rnd.ll.s1
case Intrinsic::hexagon_M2_mpy_up: // llvm.hexagon.M2.mpy.up
case Intrinsic::hexagon_M2_mpyi: // llvm.hexagon.M2.mpyi
case Intrinsic::hexagon_M2_mpysmi: // llvm.hexagon.M2.mpysmi
case Intrinsic::hexagon_M2_mpyu_hh_s0: // llvm.hexagon.M2.mpyu.hh.s0
case Intrinsic::hexagon_M2_mpyu_hh_s1: // llvm.hexagon.M2.mpyu.hh.s1
case Intrinsic::hexagon_M2_mpyu_hl_s0: // llvm.hexagon.M2.mpyu.hl.s0
case Intrinsic::hexagon_M2_mpyu_hl_s1: // llvm.hexagon.M2.mpyu.hl.s1
case Intrinsic::hexagon_M2_mpyu_lh_s0: // llvm.hexagon.M2.mpyu.lh.s0
case Intrinsic::hexagon_M2_mpyu_lh_s1: // llvm.hexagon.M2.mpyu.lh.s1
case Intrinsic::hexagon_M2_mpyu_ll_s0: // llvm.hexagon.M2.mpyu.ll.s0
case Intrinsic::hexagon_M2_mpyu_ll_s1: // llvm.hexagon.M2.mpyu.ll.s1
case Intrinsic::hexagon_M2_mpyu_up: // llvm.hexagon.M2.mpyu.up
case Intrinsic::hexagon_M2_mpyui: // llvm.hexagon.M2.mpyui
case Intrinsic::hexagon_M2_vmpy2s_s0pack: // llvm.hexagon.M2.vmpy2s.s0pack
case Intrinsic::hexagon_M2_vmpy2s_s1pack: // llvm.hexagon.M2.vmpy2s.s1pack
case Intrinsic::hexagon_S2_asl_i_r: // llvm.hexagon.S2.asl.i.r
case Intrinsic::hexagon_S2_asl_i_r_sat: // llvm.hexagon.S2.asl.i.r.sat
case Intrinsic::hexagon_S2_asl_r_r: // llvm.hexagon.S2.asl.r.r
case Intrinsic::hexagon_S2_asl_r_r_sat: // llvm.hexagon.S2.asl.r.r.sat
case Intrinsic::hexagon_S2_asr_i_r: // llvm.hexagon.S2.asr.i.r
case Intrinsic::hexagon_S2_asr_i_r_rnd: // llvm.hexagon.S2.asr.i.r.rnd
case Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax: // llvm.hexagon.S2.asr.i.r.rnd.goodsyntax
case Intrinsic::hexagon_S2_asr_r_r: // llvm.hexagon.S2.asr.r.r
case Intrinsic::hexagon_S2_asr_r_r_sat: // llvm.hexagon.S2.asr.r.r.sat
case Intrinsic::hexagon_S2_clrbit_i: // llvm.hexagon.S2.clrbit.i
case Intrinsic::hexagon_S2_clrbit_r: // llvm.hexagon.S2.clrbit.r
case Intrinsic::hexagon_S2_lsl_r_r: // llvm.hexagon.S2.lsl.r.r
case Intrinsic::hexagon_S2_lsr_i_r: // llvm.hexagon.S2.lsr.i.r
case Intrinsic::hexagon_S2_lsr_r_r: // llvm.hexagon.S2.lsr.r.r
case Intrinsic::hexagon_S2_setbit_i: // llvm.hexagon.S2.setbit.i
case Intrinsic::hexagon_S2_setbit_r: // llvm.hexagon.S2.setbit.r
case Intrinsic::hexagon_S2_togglebit_i: // llvm.hexagon.S2.togglebit.i
case Intrinsic::hexagon_S2_togglebit_r: // llvm.hexagon.S2.togglebit.r
case Intrinsic::x86_bmi_bextr_32: // llvm.x86.bmi.bextr.32
case Intrinsic::x86_bmi_bzhi_32: // llvm.x86.bmi.bzhi.32
case Intrinsic::x86_bmi_pdep_32: // llvm.x86.bmi.pdep.32
case Intrinsic::x86_bmi_pext_32: // llvm.x86.bmi.pext.32
case Intrinsic::x86_sse42_crc32_32_32: // llvm.x86.sse42.crc32.32.32
case Intrinsic::xcore_sext: // llvm.xcore.sext
case Intrinsic::xcore_zext: // llvm.xcore.zext
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_C2_mux: // llvm.hexagon.C2.mux
case Intrinsic::hexagon_C2_muxii: // llvm.hexagon.C2.muxii
case Intrinsic::hexagon_C2_muxir: // llvm.hexagon.C2.muxir
case Intrinsic::hexagon_C2_muxri: // llvm.hexagon.C2.muxri
case Intrinsic::hexagon_M2_acci: // llvm.hexagon.M2.acci
case Intrinsic::hexagon_M2_accii: // llvm.hexagon.M2.accii
case Intrinsic::hexagon_M2_maci: // llvm.hexagon.M2.maci
case Intrinsic::hexagon_M2_macsin: // llvm.hexagon.M2.macsin
case Intrinsic::hexagon_M2_macsip: // llvm.hexagon.M2.macsip
case Intrinsic::hexagon_M2_mpy_acc_hh_s0: // llvm.hexagon.M2.mpy.acc.hh.s0
case Intrinsic::hexagon_M2_mpy_acc_hh_s1: // llvm.hexagon.M2.mpy.acc.hh.s1
case Intrinsic::hexagon_M2_mpy_acc_hl_s0: // llvm.hexagon.M2.mpy.acc.hl.s0
case Intrinsic::hexagon_M2_mpy_acc_hl_s1: // llvm.hexagon.M2.mpy.acc.hl.s1
case Intrinsic::hexagon_M2_mpy_acc_lh_s0: // llvm.hexagon.M2.mpy.acc.lh.s0
case Intrinsic::hexagon_M2_mpy_acc_lh_s1: // llvm.hexagon.M2.mpy.acc.lh.s1
case Intrinsic::hexagon_M2_mpy_acc_ll_s0: // llvm.hexagon.M2.mpy.acc.ll.s0
case Intrinsic::hexagon_M2_mpy_acc_ll_s1: // llvm.hexagon.M2.mpy.acc.ll.s1
case Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0: // llvm.hexagon.M2.mpy.acc.sat.hh.s0
case Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1: // llvm.hexagon.M2.mpy.acc.sat.hh.s1
case Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0: // llvm.hexagon.M2.mpy.acc.sat.hl.s0
case Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1: // llvm.hexagon.M2.mpy.acc.sat.hl.s1
case Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0: // llvm.hexagon.M2.mpy.acc.sat.lh.s0
case Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1: // llvm.hexagon.M2.mpy.acc.sat.lh.s1
case Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0: // llvm.hexagon.M2.mpy.acc.sat.ll.s0
case Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1: // llvm.hexagon.M2.mpy.acc.sat.ll.s1
case Intrinsic::hexagon_M2_mpy_nac_hh_s0: // llvm.hexagon.M2.mpy.nac.hh.s0
case Intrinsic::hexagon_M2_mpy_nac_hh_s1: // llvm.hexagon.M2.mpy.nac.hh.s1
case Intrinsic::hexagon_M2_mpy_nac_hl_s0: // llvm.hexagon.M2.mpy.nac.hl.s0
case Intrinsic::hexagon_M2_mpy_nac_hl_s1: // llvm.hexagon.M2.mpy.nac.hl.s1
case Intrinsic::hexagon_M2_mpy_nac_lh_s0: // llvm.hexagon.M2.mpy.nac.lh.s0
case Intrinsic::hexagon_M2_mpy_nac_lh_s1: // llvm.hexagon.M2.mpy.nac.lh.s1
case Intrinsic::hexagon_M2_mpy_nac_ll_s0: // llvm.hexagon.M2.mpy.nac.ll.s0
case Intrinsic::hexagon_M2_mpy_nac_ll_s1: // llvm.hexagon.M2.mpy.nac.ll.s1
case Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0: // llvm.hexagon.M2.mpy.nac.sat.hh.s0
case Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1: // llvm.hexagon.M2.mpy.nac.sat.hh.s1
case Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0: // llvm.hexagon.M2.mpy.nac.sat.hl.s0
case Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1: // llvm.hexagon.M2.mpy.nac.sat.hl.s1
case Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0: // llvm.hexagon.M2.mpy.nac.sat.lh.s0
case Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1: // llvm.hexagon.M2.mpy.nac.sat.lh.s1
case Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0: // llvm.hexagon.M2.mpy.nac.sat.ll.s0
case Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1: // llvm.hexagon.M2.mpy.nac.sat.ll.s1
case Intrinsic::hexagon_M2_mpyu_acc_hh_s0: // llvm.hexagon.M2.mpyu.acc.hh.s0
case Intrinsic::hexagon_M2_mpyu_acc_hh_s1: // llvm.hexagon.M2.mpyu.acc.hh.s1
case Intrinsic::hexagon_M2_mpyu_acc_hl_s0: // llvm.hexagon.M2.mpyu.acc.hl.s0
case Intrinsic::hexagon_M2_mpyu_acc_hl_s1: // llvm.hexagon.M2.mpyu.acc.hl.s1
case Intrinsic::hexagon_M2_mpyu_acc_lh_s0: // llvm.hexagon.M2.mpyu.acc.lh.s0
case Intrinsic::hexagon_M2_mpyu_acc_lh_s1: // llvm.hexagon.M2.mpyu.acc.lh.s1
case Intrinsic::hexagon_M2_mpyu_acc_ll_s0: // llvm.hexagon.M2.mpyu.acc.ll.s0
case Intrinsic::hexagon_M2_mpyu_acc_ll_s1: // llvm.hexagon.M2.mpyu.acc.ll.s1
case Intrinsic::hexagon_M2_mpyu_nac_hh_s0: // llvm.hexagon.M2.mpyu.nac.hh.s0
case Intrinsic::hexagon_M2_mpyu_nac_hh_s1: // llvm.hexagon.M2.mpyu.nac.hh.s1
case Intrinsic::hexagon_M2_mpyu_nac_hl_s0: // llvm.hexagon.M2.mpyu.nac.hl.s0
case Intrinsic::hexagon_M2_mpyu_nac_hl_s1: // llvm.hexagon.M2.mpyu.nac.hl.s1
case Intrinsic::hexagon_M2_mpyu_nac_lh_s0: // llvm.hexagon.M2.mpyu.nac.lh.s0
case Intrinsic::hexagon_M2_mpyu_nac_lh_s1: // llvm.hexagon.M2.mpyu.nac.lh.s1
case Intrinsic::hexagon_M2_mpyu_nac_ll_s0: // llvm.hexagon.M2.mpyu.nac.ll.s0
case Intrinsic::hexagon_M2_mpyu_nac_ll_s1: // llvm.hexagon.M2.mpyu.nac.ll.s1
case Intrinsic::hexagon_M2_nacci: // llvm.hexagon.M2.nacci
case Intrinsic::hexagon_M2_naccii: // llvm.hexagon.M2.naccii
case Intrinsic::hexagon_M2_subacc: // llvm.hexagon.M2.subacc
case Intrinsic::hexagon_M2_xor_xacc: // llvm.hexagon.M2.xor.xacc
case Intrinsic::hexagon_M4_and_and: // llvm.hexagon.M4.and.and
case Intrinsic::hexagon_M4_and_andn: // llvm.hexagon.M4.and.andn
case Intrinsic::hexagon_M4_and_or: // llvm.hexagon.M4.and.or
case Intrinsic::hexagon_M4_and_xor: // llvm.hexagon.M4.and.xor
case Intrinsic::hexagon_M4_or_and: // llvm.hexagon.M4.or.and
case Intrinsic::hexagon_M4_or_andn: // llvm.hexagon.M4.or.andn
case Intrinsic::hexagon_M4_or_or: // llvm.hexagon.M4.or.or
case Intrinsic::hexagon_M4_or_xor: // llvm.hexagon.M4.or.xor
case Intrinsic::hexagon_M4_xor_and: // llvm.hexagon.M4.xor.and
case Intrinsic::hexagon_M4_xor_andn: // llvm.hexagon.M4.xor.andn
case Intrinsic::hexagon_M4_xor_or: // llvm.hexagon.M4.xor.or
case Intrinsic::hexagon_S2_addasl_rrri: // llvm.hexagon.S2.addasl.rrri
case Intrinsic::hexagon_S2_asl_i_r_acc: // llvm.hexagon.S2.asl.i.r.acc
case Intrinsic::hexagon_S2_asl_i_r_and: // llvm.hexagon.S2.asl.i.r.and
case Intrinsic::hexagon_S2_asl_i_r_nac: // llvm.hexagon.S2.asl.i.r.nac
case Intrinsic::hexagon_S2_asl_i_r_or: // llvm.hexagon.S2.asl.i.r.or
case Intrinsic::hexagon_S2_asl_i_r_xacc: // llvm.hexagon.S2.asl.i.r.xacc
case Intrinsic::hexagon_S2_asl_r_r_acc: // llvm.hexagon.S2.asl.r.r.acc
case Intrinsic::hexagon_S2_asl_r_r_and: // llvm.hexagon.S2.asl.r.r.and
case Intrinsic::hexagon_S2_asl_r_r_nac: // llvm.hexagon.S2.asl.r.r.nac
case Intrinsic::hexagon_S2_asl_r_r_or: // llvm.hexagon.S2.asl.r.r.or
case Intrinsic::hexagon_S2_asr_i_r_acc: // llvm.hexagon.S2.asr.i.r.acc
case Intrinsic::hexagon_S2_asr_i_r_and: // llvm.hexagon.S2.asr.i.r.and
case Intrinsic::hexagon_S2_asr_i_r_nac: // llvm.hexagon.S2.asr.i.r.nac
case Intrinsic::hexagon_S2_asr_i_r_or: // llvm.hexagon.S2.asr.i.r.or
case Intrinsic::hexagon_S2_asr_r_r_acc: // llvm.hexagon.S2.asr.r.r.acc
case Intrinsic::hexagon_S2_asr_r_r_and: // llvm.hexagon.S2.asr.r.r.and
case Intrinsic::hexagon_S2_asr_r_r_nac: // llvm.hexagon.S2.asr.r.r.nac
case Intrinsic::hexagon_S2_asr_r_r_or: // llvm.hexagon.S2.asr.r.r.or
case Intrinsic::hexagon_S2_extractu: // llvm.hexagon.S2.extractu
case Intrinsic::hexagon_S2_lsl_r_r_acc: // llvm.hexagon.S2.lsl.r.r.acc
case Intrinsic::hexagon_S2_lsl_r_r_and: // llvm.hexagon.S2.lsl.r.r.and
case Intrinsic::hexagon_S2_lsl_r_r_nac: // llvm.hexagon.S2.lsl.r.r.nac
case Intrinsic::hexagon_S2_lsl_r_r_or: // llvm.hexagon.S2.lsl.r.r.or
case Intrinsic::hexagon_S2_lsr_i_r_acc: // llvm.hexagon.S2.lsr.i.r.acc
case Intrinsic::hexagon_S2_lsr_i_r_and: // llvm.hexagon.S2.lsr.i.r.and
case Intrinsic::hexagon_S2_lsr_i_r_nac: // llvm.hexagon.S2.lsr.i.r.nac
case Intrinsic::hexagon_S2_lsr_i_r_or: // llvm.hexagon.S2.lsr.i.r.or
case Intrinsic::hexagon_S2_lsr_i_r_xacc: // llvm.hexagon.S2.lsr.i.r.xacc
case Intrinsic::hexagon_S2_lsr_r_r_acc: // llvm.hexagon.S2.lsr.r.r.acc
case Intrinsic::hexagon_S2_lsr_r_r_and: // llvm.hexagon.S2.lsr.r.r.and
case Intrinsic::hexagon_S2_lsr_r_r_nac: // llvm.hexagon.S2.lsr.r.r.nac
case Intrinsic::hexagon_S2_lsr_r_r_or: // llvm.hexagon.S2.lsr.r.r.or
case Intrinsic::hexagon_S4_addaddi: // llvm.hexagon.S4.addaddi
case Intrinsic::hexagon_S4_or_andi: // llvm.hexagon.S4.or.andi
case Intrinsic::hexagon_S4_or_andix: // llvm.hexagon.S4.or.andix
case Intrinsic::hexagon_S4_or_ori: // llvm.hexagon.S4.or.ori
case Intrinsic::hexagon_S4_subaddi: // llvm.hexagon.S4.subaddi
case Intrinsic::xcore_crc32: // llvm.xcore.crc32
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_S2_insert: // llvm.hexagon.S2.insert
case Intrinsic::hexagon_S2_tableidxb_goodsyntax: // llvm.hexagon.S2.tableidxb.goodsyntax
case Intrinsic::hexagon_S2_tableidxd_goodsyntax: // llvm.hexagon.S2.tableidxd.goodsyntax
case Intrinsic::hexagon_S2_tableidxh_goodsyntax: // llvm.hexagon.S2.tableidxh.goodsyntax
case Intrinsic::hexagon_S2_tableidxw_goodsyntax: // llvm.hexagon.S2.tableidxw.goodsyntax
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_mrc: // llvm.arm.mrc
case Intrinsic::arm_mrc2: // llvm.arm.mrc2
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_S2_insert_rp: // llvm.hexagon.S2.insert.rp
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::arm_strexd: // llvm.arm.strexd
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::hexagon_S2_extractu_rp: // llvm.hexagon.S2.extractu.rp
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::x86_sse42_crc32_32_8: // llvm.x86.sse42.crc32.32.8
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::ppc_altivec_vcmpequb_p: // llvm.ppc.altivec.vcmpequb.p
case Intrinsic::ppc_altivec_vcmpgtsb_p: // llvm.ppc.altivec.vcmpgtsb.p
case Intrinsic::ppc_altivec_vcmpgtub_p: // llvm.ppc.altivec.vcmpgtub.p
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::ppc_altivec_vcmpbfp_p: // llvm.ppc.altivec.vcmpbfp.p
case Intrinsic::ppc_altivec_vcmpeqfp_p: // llvm.ppc.altivec.vcmpeqfp.p
case Intrinsic::ppc_altivec_vcmpgefp_p: // llvm.ppc.altivec.vcmpgefp.p
case Intrinsic::ppc_altivec_vcmpgtfp_p: // llvm.ppc.altivec.vcmpgtfp.p
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::ppc_altivec_vcmpequw_p: // llvm.ppc.altivec.vcmpequw.p
case Intrinsic::ppc_altivec_vcmpgtsw_p: // llvm.ppc.altivec.vcmpgtsw.p
case Intrinsic::ppc_altivec_vcmpgtuw_p: // llvm.ppc.altivec.vcmpgtuw.p
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::ppc_altivec_vcmpequh_p: // llvm.ppc.altivec.vcmpequh.p
case Intrinsic::ppc_altivec_vcmpgtsh_p: // llvm.ppc.altivec.vcmpgtsh.p
case Intrinsic::ppc_altivec_vcmpgtuh_p: // llvm.ppc.altivec.vcmpgtuh.p
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::hexagon_A2_sat: // llvm.hexagon.A2.sat
case Intrinsic::hexagon_S2_cl0p: // llvm.hexagon.S2.cl0p
case Intrinsic::hexagon_S2_cl1p: // llvm.hexagon.S2.cl1p
case Intrinsic::hexagon_S2_clbp: // llvm.hexagon.S2.clbp
case Intrinsic::hexagon_S2_vrndpackwh: // llvm.hexagon.S2.vrndpackwh
case Intrinsic::hexagon_S2_vrndpackwhs: // llvm.hexagon.S2.vrndpackwhs
case Intrinsic::hexagon_S2_vsathb: // llvm.hexagon.S2.vsathb
case Intrinsic::hexagon_S2_vsathub: // llvm.hexagon.S2.vsathub
case Intrinsic::hexagon_S2_vsatwh: // llvm.hexagon.S2.vsatwh
case Intrinsic::hexagon_S2_vsatwuh: // llvm.hexagon.S2.vsatwuh
case Intrinsic::hexagon_S2_vtrunehb: // llvm.hexagon.S2.vtrunehb
case Intrinsic::hexagon_S2_vtrunohb: // llvm.hexagon.S2.vtrunohb
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::hexagon_M2_vrcmpys_s1rp: // llvm.hexagon.M2.vrcmpys.s1rp
case Intrinsic::hexagon_S2_asr_i_svw_trun: // llvm.hexagon.S2.asr.i.svw.trun
case Intrinsic::hexagon_S2_asr_r_svw_trun: // llvm.hexagon.S2.asr.r.svw.trun
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_M2_vdmpyrs_s0: // llvm.hexagon.M2.vdmpyrs.s0
case Intrinsic::hexagon_M2_vdmpyrs_s1: // llvm.hexagon.M2.vdmpyrs.s1
case Intrinsic::hexagon_M2_vradduh: // llvm.hexagon.M2.vradduh
case Intrinsic::hexagon_S2_parityp: // llvm.hexagon.S2.parityp
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::eh_sjlj_setjmp: // llvm.eh.sjlj.setjmp
case Intrinsic::eh_typeid_for: // llvm.eh.typeid.for
case Intrinsic::setjmp: // llvm.setjmp
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::sigsetjmp: // llvm.sigsetjmp
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse2_pmovmskb_128: // llvm.x86.sse2.pmovmskb.128
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_sse41_pextrb: // llvm.x86.sse41.pextrb
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse42_pcmpestri128: // llvm.x86.sse42.pcmpestri128
case Intrinsic::x86_sse42_pcmpestria128: // llvm.x86.sse42.pcmpestria128
case Intrinsic::x86_sse42_pcmpestric128: // llvm.x86.sse42.pcmpestric128
case Intrinsic::x86_sse42_pcmpestrio128: // llvm.x86.sse42.pcmpestrio128
case Intrinsic::x86_sse42_pcmpestris128: // llvm.x86.sse42.pcmpestris128
case Intrinsic::x86_sse42_pcmpestriz128: // llvm.x86.sse42.pcmpestriz128
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_sse42_pcmpistri128: // llvm.x86.sse42.pcmpistri128
case Intrinsic::x86_sse42_pcmpistria128: // llvm.x86.sse42.pcmpistria128
case Intrinsic::x86_sse42_pcmpistric128: // llvm.x86.sse42.pcmpistric128
case Intrinsic::x86_sse42_pcmpistrio128: // llvm.x86.sse42.pcmpistrio128
case Intrinsic::x86_sse42_pcmpistris128: // llvm.x86.sse42.pcmpistris128
case Intrinsic::x86_sse42_pcmpistriz128: // llvm.x86.sse42.pcmpistriz128
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_sse2_cvtsd2si: // llvm.x86.sse2.cvtsd2si
case Intrinsic::x86_sse2_cvttsd2si: // llvm.x86.sse2.cvttsd2si
case Intrinsic::x86_sse2_movmsk_pd: // llvm.x86.sse2.movmsk.pd
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_avx_vtestc_pd: // llvm.x86.avx.vtestc.pd
case Intrinsic::x86_avx_vtestnzc_pd: // llvm.x86.avx.vtestnzc.pd
case Intrinsic::x86_avx_vtestz_pd: // llvm.x86.avx.vtestz.pd
case Intrinsic::x86_sse2_comieq_sd: // llvm.x86.sse2.comieq.sd
case Intrinsic::x86_sse2_comige_sd: // llvm.x86.sse2.comige.sd
case Intrinsic::x86_sse2_comigt_sd: // llvm.x86.sse2.comigt.sd
case Intrinsic::x86_sse2_comile_sd: // llvm.x86.sse2.comile.sd
case Intrinsic::x86_sse2_comilt_sd: // llvm.x86.sse2.comilt.sd
case Intrinsic::x86_sse2_comineq_sd: // llvm.x86.sse2.comineq.sd
case Intrinsic::x86_sse2_ucomieq_sd: // llvm.x86.sse2.ucomieq.sd
case Intrinsic::x86_sse2_ucomige_sd: // llvm.x86.sse2.ucomige.sd
case Intrinsic::x86_sse2_ucomigt_sd: // llvm.x86.sse2.ucomigt.sd
case Intrinsic::x86_sse2_ucomile_sd: // llvm.x86.sse2.ucomile.sd
case Intrinsic::x86_sse2_ucomilt_sd: // llvm.x86.sse2.ucomilt.sd
case Intrinsic::x86_sse2_ucomineq_sd: // llvm.x86.sse2.ucomineq.sd
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_sse41_ptestc: // llvm.x86.sse41.ptestc
case Intrinsic::x86_sse41_ptestnzc: // llvm.x86.sse41.ptestnzc
case Intrinsic::x86_sse41_ptestz: // llvm.x86.sse41.ptestz
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_avx2_pmovmskb: // llvm.x86.avx2.pmovmskb
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
break;
case Intrinsic::x86_sse_cvtss2si: // llvm.x86.sse.cvtss2si
case Intrinsic::x86_sse_cvttss2si: // llvm.x86.sse.cvttss2si
case Intrinsic::x86_sse_movmsk_ps: // llvm.x86.sse.movmsk.ps
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_sse41_extractps: // llvm.x86.sse41.extractps
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx_vtestc_ps: // llvm.x86.avx.vtestc.ps
case Intrinsic::x86_avx_vtestnzc_ps: // llvm.x86.avx.vtestnzc.ps
case Intrinsic::x86_avx_vtestz_ps: // llvm.x86.avx.vtestz.ps
case Intrinsic::x86_sse_comieq_ss: // llvm.x86.sse.comieq.ss
case Intrinsic::x86_sse_comige_ss: // llvm.x86.sse.comige.ss
case Intrinsic::x86_sse_comigt_ss: // llvm.x86.sse.comigt.ss
case Intrinsic::x86_sse_comile_ss: // llvm.x86.sse.comile.ss
case Intrinsic::x86_sse_comilt_ss: // llvm.x86.sse.comilt.ss
case Intrinsic::x86_sse_comineq_ss: // llvm.x86.sse.comineq.ss
case Intrinsic::x86_sse_ucomieq_ss: // llvm.x86.sse.ucomieq.ss
case Intrinsic::x86_sse_ucomige_ss: // llvm.x86.sse.ucomige.ss
case Intrinsic::x86_sse_ucomigt_ss: // llvm.x86.sse.ucomigt.ss
case Intrinsic::x86_sse_ucomile_ss: // llvm.x86.sse.ucomile.ss
case Intrinsic::x86_sse_ucomilt_ss: // llvm.x86.sse.ucomilt.ss
case Intrinsic::x86_sse_ucomineq_ss: // llvm.x86.sse.ucomineq.ss
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_avx_movmsk_pd_256: // llvm.x86.avx.movmsk.pd.256
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::x86_avx_vtestc_pd_256: // llvm.x86.avx.vtestc.pd.256
case Intrinsic::x86_avx_vtestnzc_pd_256: // llvm.x86.avx.vtestnzc.pd.256
case Intrinsic::x86_avx_vtestz_pd_256: // llvm.x86.avx.vtestz.pd.256
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::x86_sse41_pextrd: // llvm.x86.sse41.pextrd
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx_ptestc_256: // llvm.x86.avx.ptestc.256
case Intrinsic::x86_avx_ptestnzc_256: // llvm.x86.avx.ptestnzc.256
case Intrinsic::x86_avx_ptestz_256: // llvm.x86.avx.ptestz.256
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
break;
case Intrinsic::x86_avx_movmsk_ps_256: // llvm.x86.avx.movmsk.ps.256
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
break;
case Intrinsic::x86_avx_vtestc_ps_256: // llvm.x86.avx.vtestc.ps.256
case Intrinsic::x86_avx_vtestnzc_ps_256: // llvm.x86.avx.vtestnzc.ps.256
case Intrinsic::x86_avx_vtestz_ps_256: // llvm.x86.avx.vtestz.ps.256
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
break;
case Intrinsic::x86_mmx_pmovmskb: // llvm.x86.mmx.pmovmskb
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(Type::getX86_MMXTy(Context));
break;
case Intrinsic::x86_mmx_pextr_w: // llvm.x86.mmx.pextr.w
ResultTy = IntegerType::get(Context, 32);
ArgTys.push_back(Type::getX86_MMXTy(Context));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::xcore_crc8: // llvm.xcore.crc8
ResultTy = StructType::get(IntegerType::get(Context, 32), IntegerType::get(Context, 32), NULL);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_ldrexd: // llvm.arm.ldrexd
ResultTy = StructType::get(IntegerType::get(Context, 32), IntegerType::get(Context, 32), NULL);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::ptx_read_clock64: // llvm.ptx.read.clock64
case Intrinsic::readcyclecounter: // llvm.readcyclecounter
case Intrinsic::x86_rdfsbase_64: // llvm.x86.rdfsbase.64
case Intrinsic::x86_rdgsbase_64: // llvm.x86.rdgsbase.64
ResultTy = IntegerType::get(Context, 64);
break;
case Intrinsic::hexagon_A2_sxtw: // llvm.hexagon.A2.sxtw
case Intrinsic::hexagon_A2_tfrpi: // llvm.hexagon.A2.tfrpi
case Intrinsic::hexagon_C2_mask: // llvm.hexagon.C2.mask
case Intrinsic::hexagon_S2_vsplatrh: // llvm.hexagon.S2.vsplatrh
case Intrinsic::hexagon_S2_vsxtbh: // llvm.hexagon.S2.vsxtbh
case Intrinsic::hexagon_S2_vsxthw: // llvm.hexagon.S2.vsxthw
case Intrinsic::hexagon_S2_vzxtbh: // llvm.hexagon.S2.vzxtbh
case Intrinsic::hexagon_S2_vzxthw: // llvm.hexagon.S2.vzxthw
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_A2_combineii: // llvm.hexagon.A2.combineii
case Intrinsic::hexagon_A2_combinew: // llvm.hexagon.A2.combinew
case Intrinsic::hexagon_A4_combineir: // llvm.hexagon.A4.combineir
case Intrinsic::hexagon_A4_combineri: // llvm.hexagon.A4.combineri
case Intrinsic::hexagon_M2_cmpyi_s0: // llvm.hexagon.M2.cmpyi.s0
case Intrinsic::hexagon_M2_cmpyr_s0: // llvm.hexagon.M2.cmpyr.s0
case Intrinsic::hexagon_M2_cmpys_s0: // llvm.hexagon.M2.cmpys.s0
case Intrinsic::hexagon_M2_cmpys_s1: // llvm.hexagon.M2.cmpys.s1
case Intrinsic::hexagon_M2_cmpysc_s0: // llvm.hexagon.M2.cmpysc.s0
case Intrinsic::hexagon_M2_cmpysc_s1: // llvm.hexagon.M2.cmpysc.s1
case Intrinsic::hexagon_M2_dpmpyss_s0: // llvm.hexagon.M2.dpmpyss.s0
case Intrinsic::hexagon_M2_dpmpyuu_s0: // llvm.hexagon.M2.dpmpyuu.s0
case Intrinsic::hexagon_M2_mpyd_hh_s0: // llvm.hexagon.M2.mpyd.hh.s0
case Intrinsic::hexagon_M2_mpyd_hh_s1: // llvm.hexagon.M2.mpyd.hh.s1
case Intrinsic::hexagon_M2_mpyd_hl_s0: // llvm.hexagon.M2.mpyd.hl.s0
case Intrinsic::hexagon_M2_mpyd_hl_s1: // llvm.hexagon.M2.mpyd.hl.s1
case Intrinsic::hexagon_M2_mpyd_lh_s0: // llvm.hexagon.M2.mpyd.lh.s0
case Intrinsic::hexagon_M2_mpyd_lh_s1: // llvm.hexagon.M2.mpyd.lh.s1
case Intrinsic::hexagon_M2_mpyd_ll_s0: // llvm.hexagon.M2.mpyd.ll.s0
case Intrinsic::hexagon_M2_mpyd_ll_s1: // llvm.hexagon.M2.mpyd.ll.s1
case Intrinsic::hexagon_M2_mpyd_rnd_hh_s0: // llvm.hexagon.M2.mpyd.rnd.hh.s0
case Intrinsic::hexagon_M2_mpyd_rnd_hh_s1: // llvm.hexagon.M2.mpyd.rnd.hh.s1
case Intrinsic::hexagon_M2_mpyd_rnd_hl_s0: // llvm.hexagon.M2.mpyd.rnd.hl.s0
case Intrinsic::hexagon_M2_mpyd_rnd_hl_s1: // llvm.hexagon.M2.mpyd.rnd.hl.s1
case Intrinsic::hexagon_M2_mpyd_rnd_lh_s0: // llvm.hexagon.M2.mpyd.rnd.lh.s0
case Intrinsic::hexagon_M2_mpyd_rnd_lh_s1: // llvm.hexagon.M2.mpyd.rnd.lh.s1
case Intrinsic::hexagon_M2_mpyd_rnd_ll_s0: // llvm.hexagon.M2.mpyd.rnd.ll.s0
case Intrinsic::hexagon_M2_mpyd_rnd_ll_s1: // llvm.hexagon.M2.mpyd.rnd.ll.s1
case Intrinsic::hexagon_M2_mpyud_hh_s0: // llvm.hexagon.M2.mpyud.hh.s0
case Intrinsic::hexagon_M2_mpyud_hh_s1: // llvm.hexagon.M2.mpyud.hh.s1
case Intrinsic::hexagon_M2_mpyud_hl_s0: // llvm.hexagon.M2.mpyud.hl.s0
case Intrinsic::hexagon_M2_mpyud_hl_s1: // llvm.hexagon.M2.mpyud.hl.s1
case Intrinsic::hexagon_M2_mpyud_lh_s0: // llvm.hexagon.M2.mpyud.lh.s0
case Intrinsic::hexagon_M2_mpyud_lh_s1: // llvm.hexagon.M2.mpyud.lh.s1
case Intrinsic::hexagon_M2_mpyud_ll_s0: // llvm.hexagon.M2.mpyud.ll.s0
case Intrinsic::hexagon_M2_mpyud_ll_s1: // llvm.hexagon.M2.mpyud.ll.s1
case Intrinsic::hexagon_M2_vmpy2s_s0: // llvm.hexagon.M2.vmpy2s.s0
case Intrinsic::hexagon_M2_vmpy2s_s1: // llvm.hexagon.M2.vmpy2s.s1
case Intrinsic::hexagon_S2_packhl: // llvm.hexagon.S2.packhl
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_A2_addsp: // llvm.hexagon.A2.addsp
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::hexagon_C2_vmux: // llvm.hexagon.C2.vmux
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::hexagon_A2_absp: // llvm.hexagon.A2.absp
case Intrinsic::hexagon_A2_negp: // llvm.hexagon.A2.negp
case Intrinsic::hexagon_A2_notp: // llvm.hexagon.A2.notp
case Intrinsic::hexagon_A2_tfrp: // llvm.hexagon.A2.tfrp
case Intrinsic::hexagon_A2_vabsh: // llvm.hexagon.A2.vabsh
case Intrinsic::hexagon_A2_vabshsat: // llvm.hexagon.A2.vabshsat
case Intrinsic::hexagon_A2_vabsw: // llvm.hexagon.A2.vabsw
case Intrinsic::hexagon_A2_vabswsat: // llvm.hexagon.A2.vabswsat
case Intrinsic::hexagon_A2_vconj: // llvm.hexagon.A2.vconj
case Intrinsic::hexagon_S2_deinterleave: // llvm.hexagon.S2.deinterleave
case Intrinsic::hexagon_S2_interleave: // llvm.hexagon.S2.interleave
case Intrinsic::hexagon_S2_vsathb_nopack: // llvm.hexagon.S2.vsathb.nopack
case Intrinsic::hexagon_S2_vsathub_nopack: // llvm.hexagon.S2.vsathub.nopack
case Intrinsic::hexagon_S2_vsatwh_nopack: // llvm.hexagon.S2.vsatwh.nopack
case Intrinsic::hexagon_S2_vsatwuh_nopack: // llvm.hexagon.S2.vsatwuh.nopack
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::hexagon_M2_vrcmpys_s1: // llvm.hexagon.M2.vrcmpys.s1
case Intrinsic::hexagon_S2_asl_i_p: // llvm.hexagon.S2.asl.i.p
case Intrinsic::hexagon_S2_asl_i_vh: // llvm.hexagon.S2.asl.i.vh
case Intrinsic::hexagon_S2_asl_i_vw: // llvm.hexagon.S2.asl.i.vw
case Intrinsic::hexagon_S2_asl_r_p: // llvm.hexagon.S2.asl.r.p
case Intrinsic::hexagon_S2_asl_r_vh: // llvm.hexagon.S2.asl.r.vh
case Intrinsic::hexagon_S2_asl_r_vw: // llvm.hexagon.S2.asl.r.vw
case Intrinsic::hexagon_S2_asr_i_p: // llvm.hexagon.S2.asr.i.p
case Intrinsic::hexagon_S2_asr_i_vh: // llvm.hexagon.S2.asr.i.vh
case Intrinsic::hexagon_S2_asr_i_vw: // llvm.hexagon.S2.asr.i.vw
case Intrinsic::hexagon_S2_asr_r_p: // llvm.hexagon.S2.asr.r.p
case Intrinsic::hexagon_S2_asr_r_vh: // llvm.hexagon.S2.asr.r.vh
case Intrinsic::hexagon_S2_asr_r_vw: // llvm.hexagon.S2.asr.r.vw
case Intrinsic::hexagon_S2_lsl_r_p: // llvm.hexagon.S2.lsl.r.p
case Intrinsic::hexagon_S2_lsl_r_vh: // llvm.hexagon.S2.lsl.r.vh
case Intrinsic::hexagon_S2_lsl_r_vw: // llvm.hexagon.S2.lsl.r.vw
case Intrinsic::hexagon_S2_lsr_i_p: // llvm.hexagon.S2.lsr.i.p
case Intrinsic::hexagon_S2_lsr_i_vh: // llvm.hexagon.S2.lsr.i.vh
case Intrinsic::hexagon_S2_lsr_i_vw: // llvm.hexagon.S2.lsr.i.vw
case Intrinsic::hexagon_S2_lsr_r_p: // llvm.hexagon.S2.lsr.r.p
case Intrinsic::hexagon_S2_lsr_r_vh: // llvm.hexagon.S2.lsr.r.vh
case Intrinsic::hexagon_S2_lsr_r_vw: // llvm.hexagon.S2.lsr.r.vw
case Intrinsic::hexagon_S2_vcrotate: // llvm.hexagon.S2.vcrotate
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_M2_cmaci_s0: // llvm.hexagon.M2.cmaci.s0
case Intrinsic::hexagon_M2_cmacr_s0: // llvm.hexagon.M2.cmacr.s0
case Intrinsic::hexagon_M2_cmacs_s0: // llvm.hexagon.M2.cmacs.s0
case Intrinsic::hexagon_M2_cmacs_s1: // llvm.hexagon.M2.cmacs.s1
case Intrinsic::hexagon_M2_cmacsc_s0: // llvm.hexagon.M2.cmacsc.s0
case Intrinsic::hexagon_M2_cmacsc_s1: // llvm.hexagon.M2.cmacsc.s1
case Intrinsic::hexagon_M2_cnacs_s0: // llvm.hexagon.M2.cnacs.s0
case Intrinsic::hexagon_M2_cnacs_s1: // llvm.hexagon.M2.cnacs.s1
case Intrinsic::hexagon_M2_cnacsc_s0: // llvm.hexagon.M2.cnacsc.s0
case Intrinsic::hexagon_M2_cnacsc_s1: // llvm.hexagon.M2.cnacsc.s1
case Intrinsic::hexagon_M2_dpmpyss_acc_s0: // llvm.hexagon.M2.dpmpyss.acc.s0
case Intrinsic::hexagon_M2_dpmpyss_nac_s0: // llvm.hexagon.M2.dpmpyss.nac.s0
case Intrinsic::hexagon_M2_dpmpyuu_acc_s0: // llvm.hexagon.M2.dpmpyuu.acc.s0
case Intrinsic::hexagon_M2_dpmpyuu_nac_s0: // llvm.hexagon.M2.dpmpyuu.nac.s0
case Intrinsic::hexagon_M2_mpyd_acc_hh_s0: // llvm.hexagon.M2.mpyd.acc.hh.s0
case Intrinsic::hexagon_M2_mpyd_acc_hh_s1: // llvm.hexagon.M2.mpyd.acc.hh.s1
case Intrinsic::hexagon_M2_mpyd_acc_hl_s0: // llvm.hexagon.M2.mpyd.acc.hl.s0
case Intrinsic::hexagon_M2_mpyd_acc_hl_s1: // llvm.hexagon.M2.mpyd.acc.hl.s1
case Intrinsic::hexagon_M2_mpyd_acc_lh_s0: // llvm.hexagon.M2.mpyd.acc.lh.s0
case Intrinsic::hexagon_M2_mpyd_acc_lh_s1: // llvm.hexagon.M2.mpyd.acc.lh.s1
case Intrinsic::hexagon_M2_mpyd_acc_ll_s0: // llvm.hexagon.M2.mpyd.acc.ll.s0
case Intrinsic::hexagon_M2_mpyd_acc_ll_s1: // llvm.hexagon.M2.mpyd.acc.ll.s1
case Intrinsic::hexagon_M2_mpyd_nac_hh_s0: // llvm.hexagon.M2.mpyd.nac.hh.s0
case Intrinsic::hexagon_M2_mpyd_nac_hh_s1: // llvm.hexagon.M2.mpyd.nac.hh.s1
case Intrinsic::hexagon_M2_mpyd_nac_hl_s0: // llvm.hexagon.M2.mpyd.nac.hl.s0
case Intrinsic::hexagon_M2_mpyd_nac_hl_s1: // llvm.hexagon.M2.mpyd.nac.hl.s1
case Intrinsic::hexagon_M2_mpyd_nac_lh_s0: // llvm.hexagon.M2.mpyd.nac.lh.s0
case Intrinsic::hexagon_M2_mpyd_nac_lh_s1: // llvm.hexagon.M2.mpyd.nac.lh.s1
case Intrinsic::hexagon_M2_mpyd_nac_ll_s0: // llvm.hexagon.M2.mpyd.nac.ll.s0
case Intrinsic::hexagon_M2_mpyd_nac_ll_s1: // llvm.hexagon.M2.mpyd.nac.ll.s1
case Intrinsic::hexagon_M2_mpyud_acc_hh_s0: // llvm.hexagon.M2.mpyud.acc.hh.s0
case Intrinsic::hexagon_M2_mpyud_acc_hh_s1: // llvm.hexagon.M2.mpyud.acc.hh.s1
case Intrinsic::hexagon_M2_mpyud_acc_hl_s0: // llvm.hexagon.M2.mpyud.acc.hl.s0
case Intrinsic::hexagon_M2_mpyud_acc_hl_s1: // llvm.hexagon.M2.mpyud.acc.hl.s1
case Intrinsic::hexagon_M2_mpyud_acc_lh_s0: // llvm.hexagon.M2.mpyud.acc.lh.s0
case Intrinsic::hexagon_M2_mpyud_acc_lh_s1: // llvm.hexagon.M2.mpyud.acc.lh.s1
case Intrinsic::hexagon_M2_mpyud_acc_ll_s0: // llvm.hexagon.M2.mpyud.acc.ll.s0
case Intrinsic::hexagon_M2_mpyud_acc_ll_s1: // llvm.hexagon.M2.mpyud.acc.ll.s1
case Intrinsic::hexagon_M2_mpyud_nac_hh_s0: // llvm.hexagon.M2.mpyud.nac.hh.s0
case Intrinsic::hexagon_M2_mpyud_nac_hh_s1: // llvm.hexagon.M2.mpyud.nac.hh.s1
case Intrinsic::hexagon_M2_mpyud_nac_hl_s0: // llvm.hexagon.M2.mpyud.nac.hl.s0
case Intrinsic::hexagon_M2_mpyud_nac_hl_s1: // llvm.hexagon.M2.mpyud.nac.hl.s1
case Intrinsic::hexagon_M2_mpyud_nac_lh_s0: // llvm.hexagon.M2.mpyud.nac.lh.s0
case Intrinsic::hexagon_M2_mpyud_nac_lh_s1: // llvm.hexagon.M2.mpyud.nac.lh.s1
case Intrinsic::hexagon_M2_mpyud_nac_ll_s0: // llvm.hexagon.M2.mpyud.nac.ll.s0
case Intrinsic::hexagon_M2_mpyud_nac_ll_s1: // llvm.hexagon.M2.mpyud.nac.ll.s1
case Intrinsic::hexagon_M2_vmac2: // llvm.hexagon.M2.vmac2
case Intrinsic::hexagon_M2_vmac2s_s0: // llvm.hexagon.M2.vmac2s.s0
case Intrinsic::hexagon_M2_vmac2s_s1: // llvm.hexagon.M2.vmac2s.s1
case Intrinsic::hexagon_S2_extractup: // llvm.hexagon.S2.extractup
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_A2_addp: // llvm.hexagon.A2.addp
case Intrinsic::hexagon_A2_addpsat: // llvm.hexagon.A2.addpsat
case Intrinsic::hexagon_A2_andp: // llvm.hexagon.A2.andp
case Intrinsic::hexagon_A2_maxp: // llvm.hexagon.A2.maxp
case Intrinsic::hexagon_A2_maxup: // llvm.hexagon.A2.maxup
case Intrinsic::hexagon_A2_minp: // llvm.hexagon.A2.minp
case Intrinsic::hexagon_A2_minup: // llvm.hexagon.A2.minup
case Intrinsic::hexagon_A2_orp: // llvm.hexagon.A2.orp
case Intrinsic::hexagon_A2_subp: // llvm.hexagon.A2.subp
case Intrinsic::hexagon_A2_vaddh: // llvm.hexagon.A2.vaddh
case Intrinsic::hexagon_A2_vaddhs: // llvm.hexagon.A2.vaddhs
case Intrinsic::hexagon_A2_vaddub: // llvm.hexagon.A2.vaddub
case Intrinsic::hexagon_A2_vaddubs: // llvm.hexagon.A2.vaddubs
case Intrinsic::hexagon_A2_vadduhs: // llvm.hexagon.A2.vadduhs
case Intrinsic::hexagon_A2_vaddw: // llvm.hexagon.A2.vaddw
case Intrinsic::hexagon_A2_vaddws: // llvm.hexagon.A2.vaddws
case Intrinsic::hexagon_A2_vavgh: // llvm.hexagon.A2.vavgh
case Intrinsic::hexagon_A2_vavghcr: // llvm.hexagon.A2.vavghcr
case Intrinsic::hexagon_A2_vavghr: // llvm.hexagon.A2.vavghr
case Intrinsic::hexagon_A2_vavgub: // llvm.hexagon.A2.vavgub
case Intrinsic::hexagon_A2_vavgubr: // llvm.hexagon.A2.vavgubr
case Intrinsic::hexagon_A2_vavguh: // llvm.hexagon.A2.vavguh
case Intrinsic::hexagon_A2_vavguhr: // llvm.hexagon.A2.vavguhr
case Intrinsic::hexagon_A2_vavguw: // llvm.hexagon.A2.vavguw
case Intrinsic::hexagon_A2_vavguwr: // llvm.hexagon.A2.vavguwr
case Intrinsic::hexagon_A2_vavgw: // llvm.hexagon.A2.vavgw
case Intrinsic::hexagon_A2_vavgwcr: // llvm.hexagon.A2.vavgwcr
case Intrinsic::hexagon_A2_vavgwr: // llvm.hexagon.A2.vavgwr
case Intrinsic::hexagon_A2_vmaxh: // llvm.hexagon.A2.vmaxh
case Intrinsic::hexagon_A2_vmaxub: // llvm.hexagon.A2.vmaxub
case Intrinsic::hexagon_A2_vmaxuh: // llvm.hexagon.A2.vmaxuh
case Intrinsic::hexagon_A2_vmaxuw: // llvm.hexagon.A2.vmaxuw
case Intrinsic::hexagon_A2_vmaxw: // llvm.hexagon.A2.vmaxw
case Intrinsic::hexagon_A2_vminh: // llvm.hexagon.A2.vminh
case Intrinsic::hexagon_A2_vminub: // llvm.hexagon.A2.vminub
case Intrinsic::hexagon_A2_vminuh: // llvm.hexagon.A2.vminuh
case Intrinsic::hexagon_A2_vminuw: // llvm.hexagon.A2.vminuw
case Intrinsic::hexagon_A2_vminw: // llvm.hexagon.A2.vminw
case Intrinsic::hexagon_A2_vnavgh: // llvm.hexagon.A2.vnavgh
case Intrinsic::hexagon_A2_vnavghcr: // llvm.hexagon.A2.vnavghcr
case Intrinsic::hexagon_A2_vnavghr: // llvm.hexagon.A2.vnavghr
case Intrinsic::hexagon_A2_vnavgw: // llvm.hexagon.A2.vnavgw
case Intrinsic::hexagon_A2_vnavgwcr: // llvm.hexagon.A2.vnavgwcr
case Intrinsic::hexagon_A2_vnavgwr: // llvm.hexagon.A2.vnavgwr
case Intrinsic::hexagon_A2_vraddub: // llvm.hexagon.A2.vraddub
case Intrinsic::hexagon_A2_vrsadub: // llvm.hexagon.A2.vrsadub
case Intrinsic::hexagon_A2_vsubh: // llvm.hexagon.A2.vsubh
case Intrinsic::hexagon_A2_vsubhs: // llvm.hexagon.A2.vsubhs
case Intrinsic::hexagon_A2_vsubub: // llvm.hexagon.A2.vsubub
case Intrinsic::hexagon_A2_vsububs: // llvm.hexagon.A2.vsububs
case Intrinsic::hexagon_A2_vsubuhs: // llvm.hexagon.A2.vsubuhs
case Intrinsic::hexagon_A2_vsubw: // llvm.hexagon.A2.vsubw
case Intrinsic::hexagon_A2_vsubws: // llvm.hexagon.A2.vsubws
case Intrinsic::hexagon_A2_xorp: // llvm.hexagon.A2.xorp
case Intrinsic::hexagon_A4_andnp: // llvm.hexagon.A4.andnp
case Intrinsic::hexagon_A4_ornp: // llvm.hexagon.A4.ornp
case Intrinsic::hexagon_M2_mmpyh_rs0: // llvm.hexagon.M2.mmpyh.rs0
case Intrinsic::hexagon_M2_mmpyh_rs1: // llvm.hexagon.M2.mmpyh.rs1
case Intrinsic::hexagon_M2_mmpyh_s0: // llvm.hexagon.M2.mmpyh.s0
case Intrinsic::hexagon_M2_mmpyh_s1: // llvm.hexagon.M2.mmpyh.s1
case Intrinsic::hexagon_M2_mmpyl_rs0: // llvm.hexagon.M2.mmpyl.rs0
case Intrinsic::hexagon_M2_mmpyl_rs1: // llvm.hexagon.M2.mmpyl.rs1
case Intrinsic::hexagon_M2_mmpyl_s0: // llvm.hexagon.M2.mmpyl.s0
case Intrinsic::hexagon_M2_mmpyl_s1: // llvm.hexagon.M2.mmpyl.s1
case Intrinsic::hexagon_M2_mmpyuh_rs0: // llvm.hexagon.M2.mmpyuh.rs0
case Intrinsic::hexagon_M2_mmpyuh_rs1: // llvm.hexagon.M2.mmpyuh.rs1
case Intrinsic::hexagon_M2_mmpyuh_s0: // llvm.hexagon.M2.mmpyuh.s0
case Intrinsic::hexagon_M2_mmpyuh_s1: // llvm.hexagon.M2.mmpyuh.s1
case Intrinsic::hexagon_M2_mmpyul_rs0: // llvm.hexagon.M2.mmpyul.rs0
case Intrinsic::hexagon_M2_mmpyul_rs1: // llvm.hexagon.M2.mmpyul.rs1
case Intrinsic::hexagon_M2_mmpyul_s0: // llvm.hexagon.M2.mmpyul.s0
case Intrinsic::hexagon_M2_mmpyul_s1: // llvm.hexagon.M2.mmpyul.s1
case Intrinsic::hexagon_M2_vabsdiffh: // llvm.hexagon.M2.vabsdiffh
case Intrinsic::hexagon_M2_vabsdiffw: // llvm.hexagon.M2.vabsdiffw
case Intrinsic::hexagon_M2_vcmpy_s0_sat_i: // llvm.hexagon.M2.vcmpy.s0.sat.i
case Intrinsic::hexagon_M2_vcmpy_s0_sat_r: // llvm.hexagon.M2.vcmpy.s0.sat.r
case Intrinsic::hexagon_M2_vcmpy_s1_sat_i: // llvm.hexagon.M2.vcmpy.s1.sat.i
case Intrinsic::hexagon_M2_vcmpy_s1_sat_r: // llvm.hexagon.M2.vcmpy.s1.sat.r
case Intrinsic::hexagon_M2_vdmpys_s0: // llvm.hexagon.M2.vdmpys.s0
case Intrinsic::hexagon_M2_vdmpys_s1: // llvm.hexagon.M2.vdmpys.s1
case Intrinsic::hexagon_M2_vmpy2es_s0: // llvm.hexagon.M2.vmpy2es.s0
case Intrinsic::hexagon_M2_vmpy2es_s1: // llvm.hexagon.M2.vmpy2es.s1
case Intrinsic::hexagon_M2_vrcmpyi_s0: // llvm.hexagon.M2.vrcmpyi.s0
case Intrinsic::hexagon_M2_vrcmpyi_s0c: // llvm.hexagon.M2.vrcmpyi.s0c
case Intrinsic::hexagon_M2_vrcmpyr_s0: // llvm.hexagon.M2.vrcmpyr.s0
case Intrinsic::hexagon_M2_vrcmpyr_s0c: // llvm.hexagon.M2.vrcmpyr.s0c
case Intrinsic::hexagon_M2_vrmpy_s0: // llvm.hexagon.M2.vrmpy.s0
case Intrinsic::hexagon_S2_extractup_rp: // llvm.hexagon.S2.extractup.rp
case Intrinsic::hexagon_S2_lfsp: // llvm.hexagon.S2.lfsp
case Intrinsic::hexagon_S2_shuffeb: // llvm.hexagon.S2.shuffeb
case Intrinsic::hexagon_S2_shuffeh: // llvm.hexagon.S2.shuffeh
case Intrinsic::hexagon_S2_shuffob: // llvm.hexagon.S2.shuffob
case Intrinsic::hexagon_S2_shuffoh: // llvm.hexagon.S2.shuffoh
case Intrinsic::hexagon_S2_vtrunewh: // llvm.hexagon.S2.vtrunewh
case Intrinsic::hexagon_S2_vtrunowh: // llvm.hexagon.S2.vtrunowh
case Intrinsic::hexagon_S4_andnp: // llvm.hexagon.S4.andnp
case Intrinsic::hexagon_S4_ornp: // llvm.hexagon.S4.ornp
case Intrinsic::x86_bmi_bextr_64: // llvm.x86.bmi.bextr.64
case Intrinsic::x86_bmi_bzhi_64: // llvm.x86.bmi.bzhi.64
case Intrinsic::x86_bmi_pdep_64: // llvm.x86.bmi.pdep.64
case Intrinsic::x86_bmi_pext_64: // llvm.x86.bmi.pext.64
case Intrinsic::x86_sse42_crc32_64_64: // llvm.x86.sse42.crc32.64.64
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::hexagon_M2_vrcmpys_acc_s1: // llvm.hexagon.M2.vrcmpys.acc.s1
case Intrinsic::hexagon_S2_asl_i_p_acc: // llvm.hexagon.S2.asl.i.p.acc
case Intrinsic::hexagon_S2_asl_i_p_and: // llvm.hexagon.S2.asl.i.p.and
case Intrinsic::hexagon_S2_asl_i_p_nac: // llvm.hexagon.S2.asl.i.p.nac
case Intrinsic::hexagon_S2_asl_i_p_or: // llvm.hexagon.S2.asl.i.p.or
case Intrinsic::hexagon_S2_asl_i_p_xacc: // llvm.hexagon.S2.asl.i.p.xacc
case Intrinsic::hexagon_S2_asl_r_p_acc: // llvm.hexagon.S2.asl.r.p.acc
case Intrinsic::hexagon_S2_asl_r_p_and: // llvm.hexagon.S2.asl.r.p.and
case Intrinsic::hexagon_S2_asl_r_p_nac: // llvm.hexagon.S2.asl.r.p.nac
case Intrinsic::hexagon_S2_asl_r_p_or: // llvm.hexagon.S2.asl.r.p.or
case Intrinsic::hexagon_S2_asr_i_p_acc: // llvm.hexagon.S2.asr.i.p.acc
case Intrinsic::hexagon_S2_asr_i_p_and: // llvm.hexagon.S2.asr.i.p.and
case Intrinsic::hexagon_S2_asr_i_p_nac: // llvm.hexagon.S2.asr.i.p.nac
case Intrinsic::hexagon_S2_asr_i_p_or: // llvm.hexagon.S2.asr.i.p.or
case Intrinsic::hexagon_S2_asr_r_p_acc: // llvm.hexagon.S2.asr.r.p.acc
case Intrinsic::hexagon_S2_asr_r_p_and: // llvm.hexagon.S2.asr.r.p.and
case Intrinsic::hexagon_S2_asr_r_p_nac: // llvm.hexagon.S2.asr.r.p.nac
case Intrinsic::hexagon_S2_asr_r_p_or: // llvm.hexagon.S2.asr.r.p.or
case Intrinsic::hexagon_S2_lsl_r_p_acc: // llvm.hexagon.S2.lsl.r.p.acc
case Intrinsic::hexagon_S2_lsl_r_p_and: // llvm.hexagon.S2.lsl.r.p.and
case Intrinsic::hexagon_S2_lsl_r_p_nac: // llvm.hexagon.S2.lsl.r.p.nac
case Intrinsic::hexagon_S2_lsl_r_p_or: // llvm.hexagon.S2.lsl.r.p.or
case Intrinsic::hexagon_S2_lsr_i_p_acc: // llvm.hexagon.S2.lsr.i.p.acc
case Intrinsic::hexagon_S2_lsr_i_p_and: // llvm.hexagon.S2.lsr.i.p.and
case Intrinsic::hexagon_S2_lsr_i_p_nac: // llvm.hexagon.S2.lsr.i.p.nac
case Intrinsic::hexagon_S2_lsr_i_p_or: // llvm.hexagon.S2.lsr.i.p.or
case Intrinsic::hexagon_S2_lsr_i_p_xacc: // llvm.hexagon.S2.lsr.i.p.xacc
case Intrinsic::hexagon_S2_lsr_r_p_acc: // llvm.hexagon.S2.lsr.r.p.acc
case Intrinsic::hexagon_S2_lsr_r_p_and: // llvm.hexagon.S2.lsr.r.p.and
case Intrinsic::hexagon_S2_lsr_r_p_nac: // llvm.hexagon.S2.lsr.r.p.nac
case Intrinsic::hexagon_S2_lsr_r_p_or: // llvm.hexagon.S2.lsr.r.p.or
case Intrinsic::hexagon_S2_valignib: // llvm.hexagon.S2.valignib
case Intrinsic::hexagon_S2_valignrb: // llvm.hexagon.S2.valignrb
case Intrinsic::hexagon_S2_vspliceib: // llvm.hexagon.S2.vspliceib
case Intrinsic::hexagon_S2_vsplicerb: // llvm.hexagon.S2.vsplicerb
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_S2_insertp: // llvm.hexagon.S2.insertp
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::hexagon_A2_vraddub_acc: // llvm.hexagon.A2.vraddub.acc
case Intrinsic::hexagon_A2_vrsadub_acc: // llvm.hexagon.A2.vrsadub.acc
case Intrinsic::hexagon_M2_mmachs_rs0: // llvm.hexagon.M2.mmachs.rs0
case Intrinsic::hexagon_M2_mmachs_rs1: // llvm.hexagon.M2.mmachs.rs1
case Intrinsic::hexagon_M2_mmachs_s0: // llvm.hexagon.M2.mmachs.s0
case Intrinsic::hexagon_M2_mmachs_s1: // llvm.hexagon.M2.mmachs.s1
case Intrinsic::hexagon_M2_mmacls_rs0: // llvm.hexagon.M2.mmacls.rs0
case Intrinsic::hexagon_M2_mmacls_rs1: // llvm.hexagon.M2.mmacls.rs1
case Intrinsic::hexagon_M2_mmacls_s0: // llvm.hexagon.M2.mmacls.s0
case Intrinsic::hexagon_M2_mmacls_s1: // llvm.hexagon.M2.mmacls.s1
case Intrinsic::hexagon_M2_mmacuhs_rs0: // llvm.hexagon.M2.mmacuhs.rs0
case Intrinsic::hexagon_M2_mmacuhs_rs1: // llvm.hexagon.M2.mmacuhs.rs1
case Intrinsic::hexagon_M2_mmacuhs_s0: // llvm.hexagon.M2.mmacuhs.s0
case Intrinsic::hexagon_M2_mmacuhs_s1: // llvm.hexagon.M2.mmacuhs.s1
case Intrinsic::hexagon_M2_mmaculs_rs0: // llvm.hexagon.M2.mmaculs.rs0
case Intrinsic::hexagon_M2_mmaculs_rs1: // llvm.hexagon.M2.mmaculs.rs1
case Intrinsic::hexagon_M2_mmaculs_s0: // llvm.hexagon.M2.mmaculs.s0
case Intrinsic::hexagon_M2_mmaculs_s1: // llvm.hexagon.M2.mmaculs.s1
case Intrinsic::hexagon_M2_vcmac_s0_sat_i: // llvm.hexagon.M2.vcmac.s0.sat.i
case Intrinsic::hexagon_M2_vcmac_s0_sat_r: // llvm.hexagon.M2.vcmac.s0.sat.r
case Intrinsic::hexagon_M2_vdmacs_s0: // llvm.hexagon.M2.vdmacs.s0
case Intrinsic::hexagon_M2_vdmacs_s1: // llvm.hexagon.M2.vdmacs.s1
case Intrinsic::hexagon_M2_vmac2es: // llvm.hexagon.M2.vmac2es
case Intrinsic::hexagon_M2_vmac2es_s0: // llvm.hexagon.M2.vmac2es.s0
case Intrinsic::hexagon_M2_vmac2es_s1: // llvm.hexagon.M2.vmac2es.s1
case Intrinsic::hexagon_M2_vrcmaci_s0: // llvm.hexagon.M2.vrcmaci.s0
case Intrinsic::hexagon_M2_vrcmaci_s0c: // llvm.hexagon.M2.vrcmaci.s0c
case Intrinsic::hexagon_M2_vrcmacr_s0: // llvm.hexagon.M2.vrcmacr.s0
case Intrinsic::hexagon_M2_vrcmacr_s0c: // llvm.hexagon.M2.vrcmacr.s0c
case Intrinsic::hexagon_M2_vrmac_s0: // llvm.hexagon.M2.vrmac.s0
case Intrinsic::hexagon_M4_xor_xacc: // llvm.hexagon.M4.xor.xacc
case Intrinsic::hexagon_S2_insertp_rp: // llvm.hexagon.S2.insertp.rp
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::x86_sse42_crc32_64_8: // llvm.x86.sse42.crc32.64.8
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(IntegerType::get(Context, 64));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_sse2_cvtsd2si64: // llvm.x86.sse2.cvtsd2si64
case Intrinsic::x86_sse2_cvttsd2si64: // llvm.x86.sse2.cvttsd2si64
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_sse41_pextrq: // llvm.x86.sse41.pextrq
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse_cvtss2si64: // llvm.x86.sse.cvtss2si64
case Intrinsic::x86_sse_cvttss2si64: // llvm.x86.sse.cvttss2si64
ResultTy = IntegerType::get(Context, 64);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::arm_thread_pointer: // llvm.arm.thread.pointer
case Intrinsic::eh_sjlj_lsda: // llvm.eh.sjlj.lsda
case Intrinsic::stacksave: // llvm.stacksave
case Intrinsic::xcore_waitevent: // llvm.xcore.waitevent
ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
break;
case Intrinsic::eh_dwarf_cfa: // llvm.eh.dwarf.cfa
case Intrinsic::frameaddress: // llvm.frameaddress
case Intrinsic::returnaddress: // llvm.returnaddress
ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::adjust_trampoline: // llvm.adjust.trampoline
case Intrinsic::xcore_checkevent: // llvm.xcore.checkevent
ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::gcread: // llvm.gcread
ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
break;
case Intrinsic::x86_avx2_pabs_w: // llvm.x86.avx2.pabs.w
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
break;
case Intrinsic::x86_avx2_pslli_w: // llvm.x86.avx2.pslli.w
case Intrinsic::x86_avx2_psrai_w: // llvm.x86.avx2.psrai.w
case Intrinsic::x86_avx2_psrli_w: // llvm.x86.avx2.psrli.w
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx2_padds_w: // llvm.x86.avx2.padds.w
case Intrinsic::x86_avx2_paddus_w: // llvm.x86.avx2.paddus.w
case Intrinsic::x86_avx2_pavg_w: // llvm.x86.avx2.pavg.w
case Intrinsic::x86_avx2_phadd_sw: // llvm.x86.avx2.phadd.sw
case Intrinsic::x86_avx2_phadd_w: // llvm.x86.avx2.phadd.w
case Intrinsic::x86_avx2_phsub_sw: // llvm.x86.avx2.phsub.sw
case Intrinsic::x86_avx2_phsub_w: // llvm.x86.avx2.phsub.w
case Intrinsic::x86_avx2_pmaxs_w: // llvm.x86.avx2.pmaxs.w
case Intrinsic::x86_avx2_pmaxu_w: // llvm.x86.avx2.pmaxu.w
case Intrinsic::x86_avx2_pmins_w: // llvm.x86.avx2.pmins.w
case Intrinsic::x86_avx2_pminu_w: // llvm.x86.avx2.pminu.w
case Intrinsic::x86_avx2_pmul_hr_sw: // llvm.x86.avx2.pmul.hr.sw
case Intrinsic::x86_avx2_pmulh_w: // llvm.x86.avx2.pmulh.w
case Intrinsic::x86_avx2_pmulhu_w: // llvm.x86.avx2.pmulhu.w
case Intrinsic::x86_avx2_psign_w: // llvm.x86.avx2.psign.w
case Intrinsic::x86_avx2_psubs_w: // llvm.x86.avx2.psubs.w
case Intrinsic::x86_avx2_psubus_w: // llvm.x86.avx2.psubus.w
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
break;
case Intrinsic::x86_avx2_pblendw: // llvm.x86.avx2.pblendw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx2_psll_w: // llvm.x86.avx2.psll.w
case Intrinsic::x86_avx2_psra_w: // llvm.x86.avx2.psra.w
case Intrinsic::x86_avx2_psrl_w: // llvm.x86.avx2.psrl.w
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx2_pmovsxbw: // llvm.x86.avx2.pmovsxbw
case Intrinsic::x86_avx2_pmovzxbw: // llvm.x86.avx2.pmovzxbw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_avx2_pmadd_ub_sw: // llvm.x86.avx2.pmadd.ub.sw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
break;
case Intrinsic::x86_avx2_mpsadbw: // llvm.x86.avx2.mpsadbw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx2_pbroadcastw_256: // llvm.x86.avx2.pbroadcastw.256
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx2_packssdw: // llvm.x86.avx2.packssdw
case Intrinsic::x86_avx2_packusdw: // llvm.x86.avx2.packusdw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
break;
case Intrinsic::ppc_altivec_lvebx: // llvm.ppc.altivec.lvebx
case Intrinsic::ppc_altivec_lvsl: // llvm.ppc.altivec.lvsl
case Intrinsic::ppc_altivec_lvsr: // llvm.ppc.altivec.lvsr
case Intrinsic::x86_sse3_ldu_dq: // llvm.x86.sse3.ldu.dq
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_avx2_pbroadcastb_128: // llvm.x86.avx2.pbroadcastb.128
case Intrinsic::x86_ssse3_pabs_b_128: // llvm.x86.ssse3.pabs.b.128
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::spu_si_shlqbii: // llvm.spu.si.shlqbii
case Intrinsic::spu_si_shlqbyi: // llvm.spu.si.shlqbyi
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_sse42_pcmpestrm128: // llvm.x86.sse42.pcmpestrm128
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::spu_si_andbi: // llvm.spu.si.andbi
case Intrinsic::spu_si_ceqbi: // llvm.spu.si.ceqbi
case Intrinsic::spu_si_cgtbi: // llvm.spu.si.cgtbi
case Intrinsic::spu_si_clgtbi: // llvm.spu.si.clgtbi
case Intrinsic::spu_si_orbi: // llvm.spu.si.orbi
case Intrinsic::spu_si_xorbi: // llvm.spu.si.xorbi
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::ppc_altivec_vaddsbs: // llvm.ppc.altivec.vaddsbs
case Intrinsic::ppc_altivec_vaddubs: // llvm.ppc.altivec.vaddubs
case Intrinsic::ppc_altivec_vavgsb: // llvm.ppc.altivec.vavgsb
case Intrinsic::ppc_altivec_vavgub: // llvm.ppc.altivec.vavgub
case Intrinsic::ppc_altivec_vcmpequb: // llvm.ppc.altivec.vcmpequb
case Intrinsic::ppc_altivec_vcmpgtsb: // llvm.ppc.altivec.vcmpgtsb
case Intrinsic::ppc_altivec_vcmpgtub: // llvm.ppc.altivec.vcmpgtub
case Intrinsic::ppc_altivec_vmaxsb: // llvm.ppc.altivec.vmaxsb
case Intrinsic::ppc_altivec_vmaxub: // llvm.ppc.altivec.vmaxub
case Intrinsic::ppc_altivec_vminsb: // llvm.ppc.altivec.vminsb
case Intrinsic::ppc_altivec_vminub: // llvm.ppc.altivec.vminub
case Intrinsic::ppc_altivec_vrlb: // llvm.ppc.altivec.vrlb
case Intrinsic::ppc_altivec_vslb: // llvm.ppc.altivec.vslb
case Intrinsic::ppc_altivec_vsrab: // llvm.ppc.altivec.vsrab
case Intrinsic::ppc_altivec_vsrb: // llvm.ppc.altivec.vsrb
case Intrinsic::ppc_altivec_vsubsbs: // llvm.ppc.altivec.vsubsbs
case Intrinsic::ppc_altivec_vsububs: // llvm.ppc.altivec.vsububs
case Intrinsic::spu_si_ceqb: // llvm.spu.si.ceqb
case Intrinsic::spu_si_cgtb: // llvm.spu.si.cgtb
case Intrinsic::spu_si_clgtb: // llvm.spu.si.clgtb
case Intrinsic::x86_sse2_padds_b: // llvm.x86.sse2.padds.b
case Intrinsic::x86_sse2_paddus_b: // llvm.x86.sse2.paddus.b
case Intrinsic::x86_sse2_pavg_b: // llvm.x86.sse2.pavg.b
case Intrinsic::x86_sse2_pmaxu_b: // llvm.x86.sse2.pmaxu.b
case Intrinsic::x86_sse2_pminu_b: // llvm.x86.sse2.pminu.b
case Intrinsic::x86_sse2_psubs_b: // llvm.x86.sse2.psubs.b
case Intrinsic::x86_sse2_psubus_b: // llvm.x86.sse2.psubus.b
case Intrinsic::x86_sse41_pmaxsb: // llvm.x86.sse41.pmaxsb
case Intrinsic::x86_sse41_pminsb: // llvm.x86.sse41.pminsb
case Intrinsic::x86_ssse3_pshuf_b_128: // llvm.x86.ssse3.pshuf.b.128
case Intrinsic::x86_ssse3_psign_b_128: // llvm.x86.ssse3.psign.b.128
case Intrinsic::x86_xop_vpcomeqb: // llvm.x86.xop.vpcomeqb
case Intrinsic::x86_xop_vpcomequb: // llvm.x86.xop.vpcomequb
case Intrinsic::x86_xop_vpcomfalseb: // llvm.x86.xop.vpcomfalseb
case Intrinsic::x86_xop_vpcomfalseub: // llvm.x86.xop.vpcomfalseub
case Intrinsic::x86_xop_vpcomgeb: // llvm.x86.xop.vpcomgeb
case Intrinsic::x86_xop_vpcomgeub: // llvm.x86.xop.vpcomgeub
case Intrinsic::x86_xop_vpcomgtb: // llvm.x86.xop.vpcomgtb
case Intrinsic::x86_xop_vpcomgtub: // llvm.x86.xop.vpcomgtub
case Intrinsic::x86_xop_vpcomleb: // llvm.x86.xop.vpcomleb
case Intrinsic::x86_xop_vpcomleub: // llvm.x86.xop.vpcomleub
case Intrinsic::x86_xop_vpcomltb: // llvm.x86.xop.vpcomltb
case Intrinsic::x86_xop_vpcomltub: // llvm.x86.xop.vpcomltub
case Intrinsic::x86_xop_vpcomneb: // llvm.x86.xop.vpcomneb
case Intrinsic::x86_xop_vpcomneub: // llvm.x86.xop.vpcomneub
case Intrinsic::x86_xop_vpcomtrueb: // llvm.x86.xop.vpcomtrueb
case Intrinsic::x86_xop_vpcomtrueub: // llvm.x86.xop.vpcomtrueub
case Intrinsic::x86_xop_vprotb: // llvm.x86.xop.vprotb
case Intrinsic::x86_xop_vpshab: // llvm.x86.xop.vpshab
case Intrinsic::x86_xop_vpshlb: // llvm.x86.xop.vpshlb
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_sse42_pcmpistrm128: // llvm.x86.sse42.pcmpistrm128
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_sse41_pblendvb: // llvm.x86.sse41.pblendvb
case Intrinsic::x86_xop_vpperm: // llvm.x86.xop.vpperm
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::ppc_altivec_vpkswss: // llvm.ppc.altivec.vpkswss
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::ppc_altivec_vpkshss: // llvm.ppc.altivec.vpkshss
case Intrinsic::ppc_altivec_vpkshus: // llvm.ppc.altivec.vpkshus
case Intrinsic::ppc_altivec_vpkuhus: // llvm.ppc.altivec.vpkuhus
case Intrinsic::x86_sse2_packsswb_128: // llvm.x86.sse2.packsswb.128
case Intrinsic::x86_sse2_packuswb_128: // llvm.x86.sse2.packuswb.128
ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx_maskload_pd: // llvm.x86.avx.maskload.pd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_sse2_sqrt_pd: // llvm.x86.sse2.sqrt.pd
case Intrinsic::x86_sse2_sqrt_sd: // llvm.x86.sse2.sqrt.sd
case Intrinsic::x86_xop_vfrcz_pd: // llvm.x86.xop.vfrcz.pd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_sse2_cvtsi2sd: // llvm.x86.sse2.cvtsi2sd
case Intrinsic::x86_sse41_round_pd: // llvm.x86.sse41.round.pd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse2_cvtsi642sd: // llvm.x86.sse2.cvtsi642sd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::spu_si_dfa: // llvm.spu.si.dfa
case Intrinsic::spu_si_dfm: // llvm.spu.si.dfm
case Intrinsic::spu_si_dfma: // llvm.spu.si.dfma
case Intrinsic::spu_si_dfms: // llvm.spu.si.dfms
case Intrinsic::spu_si_dfnma: // llvm.spu.si.dfnma
case Intrinsic::spu_si_dfnms: // llvm.spu.si.dfnms
case Intrinsic::spu_si_dfs: // llvm.spu.si.dfs
case Intrinsic::x86_sse2_add_sd: // llvm.x86.sse2.add.sd
case Intrinsic::x86_sse2_div_sd: // llvm.x86.sse2.div.sd
case Intrinsic::x86_sse2_max_pd: // llvm.x86.sse2.max.pd
case Intrinsic::x86_sse2_max_sd: // llvm.x86.sse2.max.sd
case Intrinsic::x86_sse2_min_pd: // llvm.x86.sse2.min.pd
case Intrinsic::x86_sse2_min_sd: // llvm.x86.sse2.min.sd
case Intrinsic::x86_sse2_mul_sd: // llvm.x86.sse2.mul.sd
case Intrinsic::x86_sse2_sub_sd: // llvm.x86.sse2.sub.sd
case Intrinsic::x86_sse3_addsub_pd: // llvm.x86.sse3.addsub.pd
case Intrinsic::x86_sse3_hadd_pd: // llvm.x86.sse3.hadd.pd
case Intrinsic::x86_sse3_hsub_pd: // llvm.x86.sse3.hsub.pd
case Intrinsic::x86_xop_vfrcz_sd: // llvm.x86.xop.vfrcz.sd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_sse41_blendpd: // llvm.x86.sse41.blendpd
case Intrinsic::x86_sse41_dppd: // llvm.x86.sse41.dppd
case Intrinsic::x86_sse41_round_sd: // llvm.x86.sse41.round.sd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse2_cmp_pd: // llvm.x86.sse2.cmp.pd
case Intrinsic::x86_sse2_cmp_sd: // llvm.x86.sse2.cmp.sd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_fma4_vfmadd_pd: // llvm.x86.fma4.vfmadd.pd
case Intrinsic::x86_fma4_vfmadd_sd: // llvm.x86.fma4.vfmadd.sd
case Intrinsic::x86_fma4_vfmaddsub_pd: // llvm.x86.fma4.vfmaddsub.pd
case Intrinsic::x86_fma4_vfmsub_pd: // llvm.x86.fma4.vfmsub.pd
case Intrinsic::x86_fma4_vfmsub_sd: // llvm.x86.fma4.vfmsub.sd
case Intrinsic::x86_fma4_vfmsubadd_pd: // llvm.x86.fma4.vfmsubadd.pd
case Intrinsic::x86_fma4_vfnmadd_pd: // llvm.x86.fma4.vfnmadd.pd
case Intrinsic::x86_fma4_vfnmadd_sd: // llvm.x86.fma4.vfnmadd.sd
case Intrinsic::x86_fma4_vfnmsub_pd: // llvm.x86.fma4.vfnmsub.pd
case Intrinsic::x86_fma4_vfnmsub_sd: // llvm.x86.fma4.vfnmsub.sd
case Intrinsic::x86_sse41_blendvpd: // llvm.x86.sse41.blendvpd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_xop_vpermil2pd: // llvm.x86.xop.vpermil2pd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx_vpermilvar_pd: // llvm.x86.avx.vpermilvar.pd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_sse2_cvtss2sd: // llvm.x86.sse2.cvtss2sd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_sse2_cvtps2pd: // llvm.x86.sse2.cvtps2pd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_avx_vextractf128_pd_256: // llvm.x86.avx.vextractf128.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_sse2_cvtdq2pd: // llvm.x86.sse2.cvtdq2pd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_sse_cvtpi2pd: // llvm.x86.sse.cvtpi2pd
ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
ArgTys.push_back(Type::getX86_MMXTy(Context));
break;
case Intrinsic::arm_neon_vacged: // llvm.arm.neon.vacged
case Intrinsic::arm_neon_vacgtd: // llvm.arm.neon.vacgtd
ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 2));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 2));
break;
case Intrinsic::x86_sse41_movntdqa: // llvm.x86.sse41.movntdqa
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_avx2_maskload_q: // llvm.x86.avx2.maskload.q
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_sse41_pmovsxbq: // llvm.x86.sse41.pmovsxbq
case Intrinsic::x86_sse41_pmovzxbq: // llvm.x86.sse41.pmovzxbq
case Intrinsic::x86_xop_vphaddbq: // llvm.x86.xop.vphaddbq
case Intrinsic::x86_xop_vphaddubq: // llvm.x86.xop.vphaddubq
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_sse2_psad_bw: // llvm.x86.sse2.psad.bw
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_aesni_aesimc: // llvm.x86.aesni.aesimc
case Intrinsic::x86_avx2_pbroadcastq_128: // llvm.x86.avx2.pbroadcastq.128
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_sse2_psll_dq: // llvm.x86.sse2.psll.dq
case Intrinsic::x86_sse2_psll_dq_bs: // llvm.x86.sse2.psll.dq.bs
case Intrinsic::x86_sse2_pslli_q: // llvm.x86.sse2.pslli.q
case Intrinsic::x86_sse2_psrl_dq: // llvm.x86.sse2.psrl.dq
case Intrinsic::x86_sse2_psrl_dq_bs: // llvm.x86.sse2.psrl.dq.bs
case Intrinsic::x86_sse2_psrli_q: // llvm.x86.sse2.psrli.q
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_aesni_aeskeygenassist: // llvm.x86.aesni.aeskeygenassist
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_aesni_aesdec: // llvm.x86.aesni.aesdec
case Intrinsic::x86_aesni_aesdeclast: // llvm.x86.aesni.aesdeclast
case Intrinsic::x86_aesni_aesenc: // llvm.x86.aesni.aesenc
case Intrinsic::x86_aesni_aesenclast: // llvm.x86.aesni.aesenclast
case Intrinsic::x86_avx2_psllv_q: // llvm.x86.avx2.psllv.q
case Intrinsic::x86_avx2_psrlv_q: // llvm.x86.avx2.psrlv.q
case Intrinsic::x86_sse2_psll_q: // llvm.x86.sse2.psll.q
case Intrinsic::x86_sse2_psrl_q: // llvm.x86.sse2.psrl.q
case Intrinsic::x86_xop_vpcomeqq: // llvm.x86.xop.vpcomeqq
case Intrinsic::x86_xop_vpcomequq: // llvm.x86.xop.vpcomequq
case Intrinsic::x86_xop_vpcomfalseq: // llvm.x86.xop.vpcomfalseq
case Intrinsic::x86_xop_vpcomfalseuq: // llvm.x86.xop.vpcomfalseuq
case Intrinsic::x86_xop_vpcomgeq: // llvm.x86.xop.vpcomgeq
case Intrinsic::x86_xop_vpcomgeuq: // llvm.x86.xop.vpcomgeuq
case Intrinsic::x86_xop_vpcomgtq: // llvm.x86.xop.vpcomgtq
case Intrinsic::x86_xop_vpcomgtuq: // llvm.x86.xop.vpcomgtuq
case Intrinsic::x86_xop_vpcomleq: // llvm.x86.xop.vpcomleq
case Intrinsic::x86_xop_vpcomleuq: // llvm.x86.xop.vpcomleuq
case Intrinsic::x86_xop_vpcomltq: // llvm.x86.xop.vpcomltq
case Intrinsic::x86_xop_vpcomltuq: // llvm.x86.xop.vpcomltuq
case Intrinsic::x86_xop_vpcomneq: // llvm.x86.xop.vpcomneq
case Intrinsic::x86_xop_vpcomneuq: // llvm.x86.xop.vpcomneuq
case Intrinsic::x86_xop_vpcomtrueq: // llvm.x86.xop.vpcomtrueq
case Intrinsic::x86_xop_vpcomtrueuq: // llvm.x86.xop.vpcomtrueuq
case Intrinsic::x86_xop_vprotq: // llvm.x86.xop.vprotq
case Intrinsic::x86_xop_vpshaq: // llvm.x86.xop.vpshaq
case Intrinsic::x86_xop_vpshlq: // llvm.x86.xop.vpshlq
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_xop_vpcmov: // llvm.x86.xop.vpcmov
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_sse41_pmovsxdq: // llvm.x86.sse41.pmovsxdq
case Intrinsic::x86_sse41_pmovzxdq: // llvm.x86.sse41.pmovzxdq
case Intrinsic::x86_xop_vphadddq: // llvm.x86.xop.vphadddq
case Intrinsic::x86_xop_vphaddudq: // llvm.x86.xop.vphaddudq
case Intrinsic::x86_xop_vphsubdq: // llvm.x86.xop.vphsubdq
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_sse2_pmulu_dq: // llvm.x86.sse2.pmulu.dq
case Intrinsic::x86_sse41_pmuldq: // llvm.x86.sse41.pmuldq
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_xop_vpmacsdqh: // llvm.x86.xop.vpmacsdqh
case Intrinsic::x86_xop_vpmacsdql: // llvm.x86.xop.vpmacsdql
case Intrinsic::x86_xop_vpmacssdqh: // llvm.x86.xop.vpmacssdqh
case Intrinsic::x86_xop_vpmacssdql: // llvm.x86.xop.vpmacssdql
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_avx2_vextracti128: // llvm.x86.avx2.vextracti128
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_sse41_pmovsxwq: // llvm.x86.sse41.pmovsxwq
case Intrinsic::x86_sse41_pmovzxwq: // llvm.x86.sse41.pmovzxwq
case Intrinsic::x86_xop_vphadduwq: // llvm.x86.xop.vphadduwq
case Intrinsic::x86_xop_vphaddwq: // llvm.x86.xop.vphaddwq
ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx_ldu_dq_256: // llvm.x86.avx.ldu.dq.256
ResultTy = VectorType::get(IntegerType::get(Context, 8), 32);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_avx2_packsswb: // llvm.x86.avx2.packsswb
case Intrinsic::x86_avx2_packuswb: // llvm.x86.avx2.packuswb
ResultTy = VectorType::get(IntegerType::get(Context, 8), 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
break;
case Intrinsic::x86_avx2_pbroadcastb_256: // llvm.x86.avx2.pbroadcastb.256
ResultTy = VectorType::get(IntegerType::get(Context, 8), 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_avx2_pabs_b: // llvm.x86.avx2.pabs.b
ResultTy = VectorType::get(IntegerType::get(Context, 8), 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
break;
case Intrinsic::x86_avx2_padds_b: // llvm.x86.avx2.padds.b
case Intrinsic::x86_avx2_paddus_b: // llvm.x86.avx2.paddus.b
case Intrinsic::x86_avx2_pavg_b: // llvm.x86.avx2.pavg.b
case Intrinsic::x86_avx2_pmaxs_b: // llvm.x86.avx2.pmaxs.b
case Intrinsic::x86_avx2_pmaxu_b: // llvm.x86.avx2.pmaxu.b
case Intrinsic::x86_avx2_pmins_b: // llvm.x86.avx2.pmins.b
case Intrinsic::x86_avx2_pminu_b: // llvm.x86.avx2.pminu.b
case Intrinsic::x86_avx2_pshuf_b: // llvm.x86.avx2.pshuf.b
case Intrinsic::x86_avx2_psign_b: // llvm.x86.avx2.psign.b
case Intrinsic::x86_avx2_psubs_b: // llvm.x86.avx2.psubs.b
case Intrinsic::x86_avx2_psubus_b: // llvm.x86.avx2.psubus.b
ResultTy = VectorType::get(IntegerType::get(Context, 8), 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
break;
case Intrinsic::x86_avx2_pblendvb: // llvm.x86.avx2.pblendvb
ResultTy = VectorType::get(IntegerType::get(Context, 8), 32);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
break;
case Intrinsic::x86_avx_vbroadcast_ss: // llvm.x86.avx.vbroadcast.ss
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_avx_maskload_ps: // llvm.x86.avx.maskload.ps
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_sse2_cvtpd2ps: // llvm.x86.sse2.cvtpd2ps
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::ppc_altivec_vexptefp: // llvm.ppc.altivec.vexptefp
case Intrinsic::ppc_altivec_vlogefp: // llvm.ppc.altivec.vlogefp
case Intrinsic::ppc_altivec_vrefp: // llvm.ppc.altivec.vrefp
case Intrinsic::ppc_altivec_vrfim: // llvm.ppc.altivec.vrfim
case Intrinsic::ppc_altivec_vrfin: // llvm.ppc.altivec.vrfin
case Intrinsic::ppc_altivec_vrfip: // llvm.ppc.altivec.vrfip
case Intrinsic::ppc_altivec_vrfiz: // llvm.ppc.altivec.vrfiz
case Intrinsic::ppc_altivec_vrsqrtefp: // llvm.ppc.altivec.vrsqrtefp
case Intrinsic::x86_avx2_vbroadcast_ss_ps: // llvm.x86.avx2.vbroadcast.ss.ps
case Intrinsic::x86_sse_rcp_ps: // llvm.x86.sse.rcp.ps
case Intrinsic::x86_sse_rcp_ss: // llvm.x86.sse.rcp.ss
case Intrinsic::x86_sse_rsqrt_ps: // llvm.x86.sse.rsqrt.ps
case Intrinsic::x86_sse_rsqrt_ss: // llvm.x86.sse.rsqrt.ss
case Intrinsic::x86_sse_sqrt_ps: // llvm.x86.sse.sqrt.ps
case Intrinsic::x86_sse_sqrt_ss: // llvm.x86.sse.sqrt.ss
case Intrinsic::x86_xop_vfrcz_ps: // llvm.x86.xop.vfrcz.ps
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_sse41_round_ps: // llvm.x86.sse41.round.ps
case Intrinsic::x86_sse_cvtsi2ss: // llvm.x86.sse.cvtsi2ss
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse_cvtsi642ss: // llvm.x86.sse.cvtsi642ss
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 64));
break;
case Intrinsic::x86_sse2_cvtsd2ss: // llvm.x86.sse2.cvtsd2ss
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::ppc_altivec_vmaxfp: // llvm.ppc.altivec.vmaxfp
case Intrinsic::ppc_altivec_vminfp: // llvm.ppc.altivec.vminfp
case Intrinsic::spu_si_fa: // llvm.spu.si.fa
case Intrinsic::spu_si_fceq: // llvm.spu.si.fceq
case Intrinsic::spu_si_fcgt: // llvm.spu.si.fcgt
case Intrinsic::spu_si_fcmeq: // llvm.spu.si.fcmeq
case Intrinsic::spu_si_fcmgt: // llvm.spu.si.fcmgt
case Intrinsic::spu_si_fm: // llvm.spu.si.fm
case Intrinsic::spu_si_fs: // llvm.spu.si.fs
case Intrinsic::x86_sse3_addsub_ps: // llvm.x86.sse3.addsub.ps
case Intrinsic::x86_sse3_hadd_ps: // llvm.x86.sse3.hadd.ps
case Intrinsic::x86_sse3_hsub_ps: // llvm.x86.sse3.hsub.ps
case Intrinsic::x86_sse_add_ss: // llvm.x86.sse.add.ss
case Intrinsic::x86_sse_div_ss: // llvm.x86.sse.div.ss
case Intrinsic::x86_sse_max_ps: // llvm.x86.sse.max.ps
case Intrinsic::x86_sse_max_ss: // llvm.x86.sse.max.ss
case Intrinsic::x86_sse_min_ps: // llvm.x86.sse.min.ps
case Intrinsic::x86_sse_min_ss: // llvm.x86.sse.min.ss
case Intrinsic::x86_sse_mul_ss: // llvm.x86.sse.mul.ss
case Intrinsic::x86_sse_sub_ss: // llvm.x86.sse.sub.ss
case Intrinsic::x86_xop_vfrcz_ss: // llvm.x86.xop.vfrcz.ss
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_sse41_blendps: // llvm.x86.sse41.blendps
case Intrinsic::x86_sse41_dpps: // llvm.x86.sse41.dpps
case Intrinsic::x86_sse41_insertps: // llvm.x86.sse41.insertps
case Intrinsic::x86_sse41_round_ss: // llvm.x86.sse41.round.ss
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse_cmp_ps: // llvm.x86.sse.cmp.ps
case Intrinsic::x86_sse_cmp_ss: // llvm.x86.sse.cmp.ss
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::ppc_altivec_vmaddfp: // llvm.ppc.altivec.vmaddfp
case Intrinsic::ppc_altivec_vnmsubfp: // llvm.ppc.altivec.vnmsubfp
case Intrinsic::spu_si_fma: // llvm.spu.si.fma
case Intrinsic::spu_si_fms: // llvm.spu.si.fms
case Intrinsic::spu_si_fnms: // llvm.spu.si.fnms
case Intrinsic::x86_fma4_vfmadd_ps: // llvm.x86.fma4.vfmadd.ps
case Intrinsic::x86_fma4_vfmadd_ss: // llvm.x86.fma4.vfmadd.ss
case Intrinsic::x86_fma4_vfmaddsub_ps: // llvm.x86.fma4.vfmaddsub.ps
case Intrinsic::x86_fma4_vfmsub_ps: // llvm.x86.fma4.vfmsub.ps
case Intrinsic::x86_fma4_vfmsub_ss: // llvm.x86.fma4.vfmsub.ss
case Intrinsic::x86_fma4_vfmsubadd_ps: // llvm.x86.fma4.vfmsubadd.ps
case Intrinsic::x86_fma4_vfnmadd_ps: // llvm.x86.fma4.vfnmadd.ps
case Intrinsic::x86_fma4_vfnmadd_ss: // llvm.x86.fma4.vfnmadd.ss
case Intrinsic::x86_fma4_vfnmsub_ps: // llvm.x86.fma4.vfnmsub.ps
case Intrinsic::x86_fma4_vfnmsub_ss: // llvm.x86.fma4.vfnmsub.ss
case Intrinsic::x86_sse41_blendvps: // llvm.x86.sse41.blendvps
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_xop_vpermil2ps: // llvm.x86.xop.vpermil2ps
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx_vpermilvar_ps: // llvm.x86.avx.vpermilvar.ps
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_sse_cvtpi2ps: // llvm.x86.sse.cvtpi2ps
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(Type::getX86_MMXTy(Context));
break;
case Intrinsic::x86_avx_cvt_pd2_ps_256: // llvm.x86.avx.cvt.pd2.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::arm_neon_vcvthf2fp: // llvm.arm.neon.vcvthf2fp
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
break;
case Intrinsic::x86_sse2_cvtdq2ps: // llvm.x86.sse2.cvtdq2ps
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::ppc_altivec_vcfsx: // llvm.ppc.altivec.vcfsx
case Intrinsic::ppc_altivec_vcfux: // llvm.ppc.altivec.vcfux
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx_vextractf128_ps_256: // llvm.x86.avx.vextractf128.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_vcvtph2ps_128: // llvm.x86.vcvtph2ps.128
ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx_vbroadcast_sd_256: // llvm.x86.avx.vbroadcast.sd.256
case Intrinsic::x86_avx_vbroadcastf128_pd_256: // llvm.x86.avx.vbroadcastf128.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_avx_maskload_pd_256: // llvm.x86.avx.maskload.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::x86_avx2_vbroadcast_sd_pd_256: // llvm.x86.avx2.vbroadcast.sd.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_avx_cvt_ps2_pd_256: // llvm.x86.avx.cvt.ps2.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_avx_sqrt_pd_256: // llvm.x86.avx.sqrt.pd.256
case Intrinsic::x86_xop_vfrcz_pd_256: // llvm.x86.xop.vfrcz.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::x86_avx_round_pd_256: // llvm.x86.avx.round.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx_vinsertf128_pd_256: // llvm.x86.avx.vinsertf128.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx_addsub_pd_256: // llvm.x86.avx.addsub.pd.256
case Intrinsic::x86_avx_hadd_pd_256: // llvm.x86.avx.hadd.pd.256
case Intrinsic::x86_avx_hsub_pd_256: // llvm.x86.avx.hsub.pd.256
case Intrinsic::x86_avx_max_pd_256: // llvm.x86.avx.max.pd.256
case Intrinsic::x86_avx_min_pd_256: // llvm.x86.avx.min.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::x86_avx_blend_pd_256: // llvm.x86.avx.blend.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx_cmp_pd_256: // llvm.x86.avx.cmp.pd.256
case Intrinsic::x86_avx_vperm2f128_pd_256: // llvm.x86.avx.vperm2f128.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx_blendv_pd_256: // llvm.x86.avx.blendv.pd.256
case Intrinsic::x86_fma4_vfmadd_pd_256: // llvm.x86.fma4.vfmadd.pd.256
case Intrinsic::x86_fma4_vfmaddsub_pd_256: // llvm.x86.fma4.vfmaddsub.pd.256
case Intrinsic::x86_fma4_vfmsub_pd_256: // llvm.x86.fma4.vfmsub.pd.256
case Intrinsic::x86_fma4_vfmsubadd_pd_256: // llvm.x86.fma4.vfmsubadd.pd.256
case Intrinsic::x86_fma4_vfnmadd_pd_256: // llvm.x86.fma4.vfnmadd.pd.256
case Intrinsic::x86_fma4_vfnmsub_pd_256: // llvm.x86.fma4.vfnmsub.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::x86_xop_vpermil2pd_256: // llvm.x86.xop.vpermil2pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx_vpermilvar_pd_256: // llvm.x86.avx.vpermilvar.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
break;
case Intrinsic::x86_avx_cvtdq2_pd_256: // llvm.x86.avx.cvtdq2.pd.256
ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::arm_neon_vcvtfp2hf: // llvm.arm.neon.vcvtfp2hf
ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::ppc_altivec_lvewx: // llvm.ppc.altivec.lvewx
case Intrinsic::ppc_altivec_lvx: // llvm.ppc.altivec.lvx
case Intrinsic::ppc_altivec_lvxl: // llvm.ppc.altivec.lvxl
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_avx2_maskload_d: // llvm.x86.avx2.maskload.d
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_sse41_pmovsxbd: // llvm.x86.sse41.pmovsxbd
case Intrinsic::x86_sse41_pmovzxbd: // llvm.x86.sse41.pmovzxbd
case Intrinsic::x86_xop_vphaddbd: // llvm.x86.xop.vphaddbd
case Intrinsic::x86_xop_vphaddubd: // llvm.x86.xop.vphaddubd
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::ppc_altivec_vmsummbm: // llvm.ppc.altivec.vmsummbm
case Intrinsic::ppc_altivec_vmsumubm: // llvm.ppc.altivec.vmsumubm
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::ppc_altivec_vsum4sbs: // llvm.ppc.altivec.vsum4sbs
case Intrinsic::ppc_altivec_vsum4ubs: // llvm.ppc.altivec.vsum4ubs
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_sse2_cvtpd2dq: // llvm.x86.sse2.cvtpd2dq
case Intrinsic::x86_sse2_cvttpd2dq: // llvm.x86.sse2.cvttpd2dq
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_sse2_cvtps2dq: // llvm.x86.sse2.cvtps2dq
case Intrinsic::x86_sse2_cvttps2dq: // llvm.x86.sse2.cvttps2dq
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::ppc_altivec_vctsxs: // llvm.ppc.altivec.vctsxs
case Intrinsic::ppc_altivec_vctuxs: // llvm.ppc.altivec.vctuxs
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::arm_neon_vacgeq: // llvm.arm.neon.vacgeq
case Intrinsic::arm_neon_vacgtq: // llvm.arm.neon.vacgtq
case Intrinsic::ppc_altivec_vcmpbfp: // llvm.ppc.altivec.vcmpbfp
case Intrinsic::ppc_altivec_vcmpeqfp: // llvm.ppc.altivec.vcmpeqfp
case Intrinsic::ppc_altivec_vcmpgefp: // llvm.ppc.altivec.vcmpgefp
case Intrinsic::ppc_altivec_vcmpgtfp: // llvm.ppc.altivec.vcmpgtfp
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_avx_cvt_pd2dq_256: // llvm.x86.avx.cvt.pd2dq.256
case Intrinsic::x86_avx_cvtt_pd2dq_256: // llvm.x86.avx.cvtt.pd2dq.256
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
break;
case Intrinsic::x86_avx2_pbroadcastd_128: // llvm.x86.avx2.pbroadcastd.128
case Intrinsic::x86_ssse3_pabs_d_128: // llvm.x86.ssse3.pabs.d.128
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::spu_si_shli: // llvm.spu.si.shli
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::spu_si_ai: // llvm.spu.si.ai
case Intrinsic::spu_si_andi: // llvm.spu.si.andi
case Intrinsic::spu_si_ceqi: // llvm.spu.si.ceqi
case Intrinsic::spu_si_cgti: // llvm.spu.si.cgti
case Intrinsic::spu_si_clgti: // llvm.spu.si.clgti
case Intrinsic::spu_si_ori: // llvm.spu.si.ori
case Intrinsic::spu_si_sfi: // llvm.spu.si.sfi
case Intrinsic::spu_si_xori: // llvm.spu.si.xori
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(IntegerType::get(Context, 16));
break;
case Intrinsic::x86_sse2_pslli_d: // llvm.x86.sse2.pslli.d
case Intrinsic::x86_sse2_psrai_d: // llvm.x86.sse2.psrai.d
case Intrinsic::x86_sse2_psrli_d: // llvm.x86.sse2.psrli.d
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::ppc_altivec_vaddcuw: // llvm.ppc.altivec.vaddcuw
case Intrinsic::ppc_altivec_vaddsws: // llvm.ppc.altivec.vaddsws
case Intrinsic::ppc_altivec_vadduws: // llvm.ppc.altivec.vadduws
case Intrinsic::ppc_altivec_vavgsw: // llvm.ppc.altivec.vavgsw
case Intrinsic::ppc_altivec_vavguw: // llvm.ppc.altivec.vavguw
case Intrinsic::ppc_altivec_vcmpequw: // llvm.ppc.altivec.vcmpequw
case Intrinsic::ppc_altivec_vcmpgtsw: // llvm.ppc.altivec.vcmpgtsw
case Intrinsic::ppc_altivec_vcmpgtuw: // llvm.ppc.altivec.vcmpgtuw
case Intrinsic::ppc_altivec_vmaxsw: // llvm.ppc.altivec.vmaxsw
case Intrinsic::ppc_altivec_vmaxuw: // llvm.ppc.altivec.vmaxuw
case Intrinsic::ppc_altivec_vminsw: // llvm.ppc.altivec.vminsw
case Intrinsic::ppc_altivec_vminuw: // llvm.ppc.altivec.vminuw
case Intrinsic::ppc_altivec_vrlw: // llvm.ppc.altivec.vrlw
case Intrinsic::ppc_altivec_vsl: // llvm.ppc.altivec.vsl
case Intrinsic::ppc_altivec_vslo: // llvm.ppc.altivec.vslo
case Intrinsic::ppc_altivec_vslw: // llvm.ppc.altivec.vslw
case Intrinsic::ppc_altivec_vsr: // llvm.ppc.altivec.vsr
case Intrinsic::ppc_altivec_vsraw: // llvm.ppc.altivec.vsraw
case Intrinsic::ppc_altivec_vsro: // llvm.ppc.altivec.vsro
case Intrinsic::ppc_altivec_vsrw: // llvm.ppc.altivec.vsrw
case Intrinsic::ppc_altivec_vsubcuw: // llvm.ppc.altivec.vsubcuw
case Intrinsic::ppc_altivec_vsubsws: // llvm.ppc.altivec.vsubsws
case Intrinsic::ppc_altivec_vsubuws: // llvm.ppc.altivec.vsubuws
case Intrinsic::ppc_altivec_vsum2sws: // llvm.ppc.altivec.vsum2sws
case Intrinsic::ppc_altivec_vsumsws: // llvm.ppc.altivec.vsumsws
case Intrinsic::spu_si_a: // llvm.spu.si.a
case Intrinsic::spu_si_addx: // llvm.spu.si.addx
case Intrinsic::spu_si_and: // llvm.spu.si.and
case Intrinsic::spu_si_andc: // llvm.spu.si.andc
case Intrinsic::spu_si_bg: // llvm.spu.si.bg
case Intrinsic::spu_si_bgx: // llvm.spu.si.bgx
case Intrinsic::spu_si_ceq: // llvm.spu.si.ceq
case Intrinsic::spu_si_cg: // llvm.spu.si.cg
case Intrinsic::spu_si_cgt: // llvm.spu.si.cgt
case Intrinsic::spu_si_cgx: // llvm.spu.si.cgx
case Intrinsic::spu_si_clgt: // llvm.spu.si.clgt
case Intrinsic::spu_si_nand: // llvm.spu.si.nand
case Intrinsic::spu_si_nor: // llvm.spu.si.nor
case Intrinsic::spu_si_or: // llvm.spu.si.or
case Intrinsic::spu_si_orc: // llvm.spu.si.orc
case Intrinsic::spu_si_sf: // llvm.spu.si.sf
case Intrinsic::spu_si_sfx: // llvm.spu.si.sfx
case Intrinsic::spu_si_xor: // llvm.spu.si.xor
case Intrinsic::x86_avx2_psllv_d: // llvm.x86.avx2.psllv.d
case Intrinsic::x86_avx2_psrav_d: // llvm.x86.avx2.psrav.d
case Intrinsic::x86_avx2_psrlv_d: // llvm.x86.avx2.psrlv.d
case Intrinsic::x86_sse2_psll_d: // llvm.x86.sse2.psll.d
case Intrinsic::x86_sse2_psra_d: // llvm.x86.sse2.psra.d
case Intrinsic::x86_sse2_psrl_d: // llvm.x86.sse2.psrl.d
case Intrinsic::x86_sse41_pmaxsd: // llvm.x86.sse41.pmaxsd
case Intrinsic::x86_sse41_pmaxud: // llvm.x86.sse41.pmaxud
case Intrinsic::x86_sse41_pminsd: // llvm.x86.sse41.pminsd
case Intrinsic::x86_sse41_pminud: // llvm.x86.sse41.pminud
case Intrinsic::x86_ssse3_phadd_d_128: // llvm.x86.ssse3.phadd.d.128
case Intrinsic::x86_ssse3_phsub_d_128: // llvm.x86.ssse3.phsub.d.128
case Intrinsic::x86_ssse3_psign_d_128: // llvm.x86.ssse3.psign.d.128
case Intrinsic::x86_xop_vpcomeqd: // llvm.x86.xop.vpcomeqd
case Intrinsic::x86_xop_vpcomequd: // llvm.x86.xop.vpcomequd
case Intrinsic::x86_xop_vpcomfalsed: // llvm.x86.xop.vpcomfalsed
case Intrinsic::x86_xop_vpcomfalseud: // llvm.x86.xop.vpcomfalseud
case Intrinsic::x86_xop_vpcomged: // llvm.x86.xop.vpcomged
case Intrinsic::x86_xop_vpcomgeud: // llvm.x86.xop.vpcomgeud
case Intrinsic::x86_xop_vpcomgtd: // llvm.x86.xop.vpcomgtd
case Intrinsic::x86_xop_vpcomgtud: // llvm.x86.xop.vpcomgtud
case Intrinsic::x86_xop_vpcomled: // llvm.x86.xop.vpcomled
case Intrinsic::x86_xop_vpcomleud: // llvm.x86.xop.vpcomleud
case Intrinsic::x86_xop_vpcomltd: // llvm.x86.xop.vpcomltd
case Intrinsic::x86_xop_vpcomltud: // llvm.x86.xop.vpcomltud
case Intrinsic::x86_xop_vpcomned: // llvm.x86.xop.vpcomned
case Intrinsic::x86_xop_vpcomneud: // llvm.x86.xop.vpcomneud
case Intrinsic::x86_xop_vpcomtrued: // llvm.x86.xop.vpcomtrued
case Intrinsic::x86_xop_vpcomtrueud: // llvm.x86.xop.vpcomtrueud
case Intrinsic::x86_xop_vprotd: // llvm.x86.xop.vprotd
case Intrinsic::x86_xop_vpshad: // llvm.x86.xop.vpshad
case Intrinsic::x86_xop_vpshld: // llvm.x86.xop.vpshld
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_avx2_pblendd_128: // llvm.x86.avx2.pblendd.128
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::ppc_altivec_vperm: // llvm.ppc.altivec.vperm
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::ppc_altivec_vsel: // llvm.ppc.altivec.vsel
case Intrinsic::x86_xop_vpmacsdd: // llvm.x86.xop.vpmacsdd
case Intrinsic::x86_xop_vpmacssdd: // llvm.x86.xop.vpmacssdd
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::spu_si_mpyh: // llvm.spu.si.mpyh
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::ppc_altivec_vupkhpx: // llvm.ppc.altivec.vupkhpx
case Intrinsic::ppc_altivec_vupkhsh: // llvm.ppc.altivec.vupkhsh
case Intrinsic::ppc_altivec_vupklpx: // llvm.ppc.altivec.vupklpx
case Intrinsic::ppc_altivec_vupklsh: // llvm.ppc.altivec.vupklsh
case Intrinsic::x86_sse41_pmovsxwd: // llvm.x86.sse41.pmovsxwd
case Intrinsic::x86_sse41_pmovzxwd: // llvm.x86.sse41.pmovzxwd
case Intrinsic::x86_xop_vphadduwd: // llvm.x86.xop.vphadduwd
case Intrinsic::x86_xop_vphaddwd: // llvm.x86.xop.vphaddwd
case Intrinsic::x86_xop_vphsubwd: // llvm.x86.xop.vphsubwd
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::spu_si_mpyi: // llvm.spu.si.mpyi
case Intrinsic::spu_si_mpyui: // llvm.spu.si.mpyui
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(IntegerType::get(Context, 16));
break;
case Intrinsic::ppc_altivec_vsum4shs: // llvm.ppc.altivec.vsum4shs
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::ppc_altivec_vmulesh: // llvm.ppc.altivec.vmulesh
case Intrinsic::ppc_altivec_vmuleuh: // llvm.ppc.altivec.vmuleuh
case Intrinsic::ppc_altivec_vmulosh: // llvm.ppc.altivec.vmulosh
case Intrinsic::ppc_altivec_vmulouh: // llvm.ppc.altivec.vmulouh
case Intrinsic::spu_si_mpy: // llvm.spu.si.mpy
case Intrinsic::spu_si_mpyhh: // llvm.spu.si.mpyhh
case Intrinsic::spu_si_mpyhha: // llvm.spu.si.mpyhha
case Intrinsic::spu_si_mpyhhau: // llvm.spu.si.mpyhhau
case Intrinsic::spu_si_mpyhhu: // llvm.spu.si.mpyhhu
case Intrinsic::spu_si_mpys: // llvm.spu.si.mpys
case Intrinsic::spu_si_mpyu: // llvm.spu.si.mpyu
case Intrinsic::x86_sse2_pmadd_wd: // llvm.x86.sse2.pmadd.wd
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::ppc_altivec_vmsumshm: // llvm.ppc.altivec.vmsumshm
case Intrinsic::ppc_altivec_vmsumshs: // llvm.ppc.altivec.vmsumshs
case Intrinsic::ppc_altivec_vmsumuhm: // llvm.ppc.altivec.vmsumuhm
case Intrinsic::ppc_altivec_vmsumuhs: // llvm.ppc.altivec.vmsumuhs
case Intrinsic::x86_xop_vpmacsswd: // llvm.x86.xop.vpmacsswd
case Intrinsic::x86_xop_vpmacswd: // llvm.x86.xop.vpmacswd
case Intrinsic::x86_xop_vpmadcsswd: // llvm.x86.xop.vpmadcsswd
case Intrinsic::x86_xop_vpmadcswd: // llvm.x86.xop.vpmadcswd
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::spu_si_mpya: // llvm.spu.si.mpya
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx_vextractf128_si_256: // llvm.x86.avx.vextractf128.si.256
ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx2_movntdqa: // llvm.x86.avx2.movntdqa
case Intrinsic::x86_avx2_vbroadcasti128: // llvm.x86.avx2.vbroadcasti128
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_avx2_maskload_q_256: // llvm.x86.avx2.maskload.q.256
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
break;
case Intrinsic::x86_avx2_pmovsxbq: // llvm.x86.avx2.pmovsxbq
case Intrinsic::x86_avx2_pmovzxbq: // llvm.x86.avx2.pmovzxbq
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_avx2_pbroadcastq_256: // llvm.x86.avx2.pbroadcastq.256
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_avx2_psad_bw: // llvm.x86.avx2.psad.bw
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
break;
case Intrinsic::x86_avx2_pmovsxdq: // llvm.x86.avx2.pmovsxdq
case Intrinsic::x86_avx2_pmovzxdq: // llvm.x86.avx2.pmovzxdq
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_avx2_psll_dq: // llvm.x86.avx2.psll.dq
case Intrinsic::x86_avx2_psll_dq_bs: // llvm.x86.avx2.psll.dq.bs
case Intrinsic::x86_avx2_pslli_q: // llvm.x86.avx2.pslli.q
case Intrinsic::x86_avx2_psrl_dq: // llvm.x86.avx2.psrl.dq
case Intrinsic::x86_avx2_psrl_dq_bs: // llvm.x86.avx2.psrl.dq.bs
case Intrinsic::x86_avx2_psrli_q: // llvm.x86.avx2.psrli.q
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx2_psll_q: // llvm.x86.avx2.psll.q
case Intrinsic::x86_avx2_psrl_q: // llvm.x86.avx2.psrl.q
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
break;
case Intrinsic::x86_avx2_vinserti128: // llvm.x86.avx2.vinserti128
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx2_psllv_q_256: // llvm.x86.avx2.psllv.q.256
case Intrinsic::x86_avx2_psrlv_q_256: // llvm.x86.avx2.psrlv.q.256
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
break;
case Intrinsic::x86_avx2_vperm2i128: // llvm.x86.avx2.vperm2i128
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_xop_vpcmov_256: // llvm.x86.xop.vpcmov.256
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
break;
case Intrinsic::x86_avx2_pmovsxwq: // llvm.x86.avx2.pmovsxwq
case Intrinsic::x86_avx2_pmovzxwq: // llvm.x86.avx2.pmovzxwq
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx2_pmul_dq: // llvm.x86.avx2.pmul.dq
case Intrinsic::x86_avx2_pmulu_dq: // llvm.x86.avx2.pmulu.dq
ResultTy = VectorType::get(IntegerType::get(Context, 64), 4);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
break;
case Intrinsic::x86_avx_vbroadcast_ss_256: // llvm.x86.avx.vbroadcast.ss.256
case Intrinsic::x86_avx_vbroadcastf128_ps_256: // llvm.x86.avx.vbroadcastf128.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::x86_avx_maskload_ps_256: // llvm.x86.avx.maskload.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
break;
case Intrinsic::x86_avx2_vbroadcast_ss_ps_256: // llvm.x86.avx2.vbroadcast.ss.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_avx_rcp_ps_256: // llvm.x86.avx.rcp.ps.256
case Intrinsic::x86_avx_rsqrt_ps_256: // llvm.x86.avx.rsqrt.ps.256
case Intrinsic::x86_avx_sqrt_ps_256: // llvm.x86.avx.sqrt.ps.256
case Intrinsic::x86_xop_vfrcz_ps_256: // llvm.x86.xop.vfrcz.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
break;
case Intrinsic::x86_avx_round_ps_256: // llvm.x86.avx.round.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx_vinsertf128_ps_256: // llvm.x86.avx.vinsertf128.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx2_permps: // llvm.x86.avx2.permps
case Intrinsic::x86_avx_addsub_ps_256: // llvm.x86.avx.addsub.ps.256
case Intrinsic::x86_avx_hadd_ps_256: // llvm.x86.avx.hadd.ps.256
case Intrinsic::x86_avx_hsub_ps_256: // llvm.x86.avx.hsub.ps.256
case Intrinsic::x86_avx_max_ps_256: // llvm.x86.avx.max.ps.256
case Intrinsic::x86_avx_min_ps_256: // llvm.x86.avx.min.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
break;
case Intrinsic::x86_avx_blend_ps_256: // llvm.x86.avx.blend.ps.256
case Intrinsic::x86_avx_dp_ps_256: // llvm.x86.avx.dp.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx_cmp_ps_256: // llvm.x86.avx.cmp.ps.256
case Intrinsic::x86_avx_vperm2f128_ps_256: // llvm.x86.avx.vperm2f128.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx_blendv_ps_256: // llvm.x86.avx.blendv.ps.256
case Intrinsic::x86_fma4_vfmadd_ps_256: // llvm.x86.fma4.vfmadd.ps.256
case Intrinsic::x86_fma4_vfmaddsub_ps_256: // llvm.x86.fma4.vfmaddsub.ps.256
case Intrinsic::x86_fma4_vfmsub_ps_256: // llvm.x86.fma4.vfmsub.ps.256
case Intrinsic::x86_fma4_vfmsubadd_ps_256: // llvm.x86.fma4.vfmsubadd.ps.256
case Intrinsic::x86_fma4_vfnmadd_ps_256: // llvm.x86.fma4.vfnmadd.ps.256
case Intrinsic::x86_fma4_vfnmsub_ps_256: // llvm.x86.fma4.vfnmsub.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
break;
case Intrinsic::x86_xop_vpermil2ps_256: // llvm.x86.xop.vpermil2ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx_vpermilvar_ps_256: // llvm.x86.avx.vpermilvar.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
break;
case Intrinsic::x86_vcvtph2ps_256: // llvm.x86.vcvtph2ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx_cvtdq2_ps_256: // llvm.x86.avx.cvtdq2.ps.256
ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
break;
case Intrinsic::ppc_altivec_mfvscr: // llvm.ppc.altivec.mfvscr
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
break;
case Intrinsic::ppc_altivec_lvehx: // llvm.ppc.altivec.lvehx
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
break;
case Intrinsic::ppc_altivec_vupkhsb: // llvm.ppc.altivec.vupkhsb
case Intrinsic::ppc_altivec_vupklsb: // llvm.ppc.altivec.vupklsb
case Intrinsic::x86_sse41_pmovsxbw: // llvm.x86.sse41.pmovsxbw
case Intrinsic::x86_sse41_pmovzxbw: // llvm.x86.sse41.pmovzxbw
case Intrinsic::x86_xop_vphaddbw: // llvm.x86.xop.vphaddbw
case Intrinsic::x86_xop_vphaddubw: // llvm.x86.xop.vphaddubw
case Intrinsic::x86_xop_vphsubbw: // llvm.x86.xop.vphsubbw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::ppc_altivec_vmulesb: // llvm.ppc.altivec.vmulesb
case Intrinsic::ppc_altivec_vmuleub: // llvm.ppc.altivec.vmuleub
case Intrinsic::ppc_altivec_vmulosb: // llvm.ppc.altivec.vmulosb
case Intrinsic::ppc_altivec_vmuloub: // llvm.ppc.altivec.vmuloub
case Intrinsic::x86_ssse3_pmadd_ub_sw_128: // llvm.x86.ssse3.pmadd.ub.sw.128
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_sse41_mpsadbw: // llvm.x86.sse41.mpsadbw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_vcvtps2ph_128: // llvm.x86.vcvtps2ph.128
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::ppc_altivec_vpkpx: // llvm.ppc.altivec.vpkpx
case Intrinsic::ppc_altivec_vpkswus: // llvm.ppc.altivec.vpkswus
case Intrinsic::ppc_altivec_vpkuwus: // llvm.ppc.altivec.vpkuwus
case Intrinsic::x86_sse2_packssdw_128: // llvm.x86.sse2.packssdw.128
case Intrinsic::x86_sse41_packusdw: // llvm.x86.sse41.packusdw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_vcvtps2ph_256: // llvm.x86.vcvtps2ph.256
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx2_pbroadcastw_128: // llvm.x86.avx2.pbroadcastw.128
case Intrinsic::x86_sse41_phminposuw: // llvm.x86.sse41.phminposuw
case Intrinsic::x86_ssse3_pabs_w_128: // llvm.x86.ssse3.pabs.w.128
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::spu_si_ahi: // llvm.spu.si.ahi
case Intrinsic::spu_si_andhi: // llvm.spu.si.andhi
case Intrinsic::spu_si_ceqhi: // llvm.spu.si.ceqhi
case Intrinsic::spu_si_cgthi: // llvm.spu.si.cgthi
case Intrinsic::spu_si_clgthi: // llvm.spu.si.clgthi
case Intrinsic::spu_si_fsmbi: // llvm.spu.si.fsmbi
case Intrinsic::spu_si_orhi: // llvm.spu.si.orhi
case Intrinsic::spu_si_sfhi: // llvm.spu.si.sfhi
case Intrinsic::spu_si_xorhi: // llvm.spu.si.xorhi
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(IntegerType::get(Context, 16));
break;
case Intrinsic::spu_si_shlqbi: // llvm.spu.si.shlqbi
case Intrinsic::spu_si_shlqby: // llvm.spu.si.shlqby
case Intrinsic::x86_sse2_pslli_w: // llvm.x86.sse2.pslli.w
case Intrinsic::x86_sse2_psrai_w: // llvm.x86.sse2.psrai.w
case Intrinsic::x86_sse2_psrli_w: // llvm.x86.sse2.psrli.w
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::ppc_altivec_vaddshs: // llvm.ppc.altivec.vaddshs
case Intrinsic::ppc_altivec_vadduhs: // llvm.ppc.altivec.vadduhs
case Intrinsic::ppc_altivec_vavgsh: // llvm.ppc.altivec.vavgsh
case Intrinsic::ppc_altivec_vavguh: // llvm.ppc.altivec.vavguh
case Intrinsic::ppc_altivec_vcmpequh: // llvm.ppc.altivec.vcmpequh
case Intrinsic::ppc_altivec_vcmpgtsh: // llvm.ppc.altivec.vcmpgtsh
case Intrinsic::ppc_altivec_vcmpgtuh: // llvm.ppc.altivec.vcmpgtuh
case Intrinsic::ppc_altivec_vmaxsh: // llvm.ppc.altivec.vmaxsh
case Intrinsic::ppc_altivec_vmaxuh: // llvm.ppc.altivec.vmaxuh
case Intrinsic::ppc_altivec_vminsh: // llvm.ppc.altivec.vminsh
case Intrinsic::ppc_altivec_vminuh: // llvm.ppc.altivec.vminuh
case Intrinsic::ppc_altivec_vrlh: // llvm.ppc.altivec.vrlh
case Intrinsic::ppc_altivec_vslh: // llvm.ppc.altivec.vslh
case Intrinsic::ppc_altivec_vsrah: // llvm.ppc.altivec.vsrah
case Intrinsic::ppc_altivec_vsrh: // llvm.ppc.altivec.vsrh
case Intrinsic::ppc_altivec_vsubshs: // llvm.ppc.altivec.vsubshs
case Intrinsic::ppc_altivec_vsubuhs: // llvm.ppc.altivec.vsubuhs
case Intrinsic::spu_si_ah: // llvm.spu.si.ah
case Intrinsic::spu_si_ceqh: // llvm.spu.si.ceqh
case Intrinsic::spu_si_cgth: // llvm.spu.si.cgth
case Intrinsic::spu_si_clgth: // llvm.spu.si.clgth
case Intrinsic::spu_si_sfh: // llvm.spu.si.sfh
case Intrinsic::x86_sse2_padds_w: // llvm.x86.sse2.padds.w
case Intrinsic::x86_sse2_paddus_w: // llvm.x86.sse2.paddus.w
case Intrinsic::x86_sse2_pavg_w: // llvm.x86.sse2.pavg.w
case Intrinsic::x86_sse2_pmaxs_w: // llvm.x86.sse2.pmaxs.w
case Intrinsic::x86_sse2_pmins_w: // llvm.x86.sse2.pmins.w
case Intrinsic::x86_sse2_pmulh_w: // llvm.x86.sse2.pmulh.w
case Intrinsic::x86_sse2_pmulhu_w: // llvm.x86.sse2.pmulhu.w
case Intrinsic::x86_sse2_psll_w: // llvm.x86.sse2.psll.w
case Intrinsic::x86_sse2_psra_w: // llvm.x86.sse2.psra.w
case Intrinsic::x86_sse2_psrl_w: // llvm.x86.sse2.psrl.w
case Intrinsic::x86_sse2_psubs_w: // llvm.x86.sse2.psubs.w
case Intrinsic::x86_sse2_psubus_w: // llvm.x86.sse2.psubus.w
case Intrinsic::x86_sse41_pmaxuw: // llvm.x86.sse41.pmaxuw
case Intrinsic::x86_sse41_pminuw: // llvm.x86.sse41.pminuw
case Intrinsic::x86_ssse3_phadd_sw_128: // llvm.x86.ssse3.phadd.sw.128
case Intrinsic::x86_ssse3_phadd_w_128: // llvm.x86.ssse3.phadd.w.128
case Intrinsic::x86_ssse3_phsub_sw_128: // llvm.x86.ssse3.phsub.sw.128
case Intrinsic::x86_ssse3_phsub_w_128: // llvm.x86.ssse3.phsub.w.128
case Intrinsic::x86_ssse3_pmul_hr_sw_128: // llvm.x86.ssse3.pmul.hr.sw.128
case Intrinsic::x86_ssse3_psign_w_128: // llvm.x86.ssse3.psign.w.128
case Intrinsic::x86_xop_vpcomequw: // llvm.x86.xop.vpcomequw
case Intrinsic::x86_xop_vpcomeqw: // llvm.x86.xop.vpcomeqw
case Intrinsic::x86_xop_vpcomfalseuw: // llvm.x86.xop.vpcomfalseuw
case Intrinsic::x86_xop_vpcomfalsew: // llvm.x86.xop.vpcomfalsew
case Intrinsic::x86_xop_vpcomgeuw: // llvm.x86.xop.vpcomgeuw
case Intrinsic::x86_xop_vpcomgew: // llvm.x86.xop.vpcomgew
case Intrinsic::x86_xop_vpcomgtuw: // llvm.x86.xop.vpcomgtuw
case Intrinsic::x86_xop_vpcomgtw: // llvm.x86.xop.vpcomgtw
case Intrinsic::x86_xop_vpcomleuw: // llvm.x86.xop.vpcomleuw
case Intrinsic::x86_xop_vpcomlew: // llvm.x86.xop.vpcomlew
case Intrinsic::x86_xop_vpcomltuw: // llvm.x86.xop.vpcomltuw
case Intrinsic::x86_xop_vpcomltw: // llvm.x86.xop.vpcomltw
case Intrinsic::x86_xop_vpcomneuw: // llvm.x86.xop.vpcomneuw
case Intrinsic::x86_xop_vpcomnew: // llvm.x86.xop.vpcomnew
case Intrinsic::x86_xop_vpcomtrueuw: // llvm.x86.xop.vpcomtrueuw
case Intrinsic::x86_xop_vpcomtruew: // llvm.x86.xop.vpcomtruew
case Intrinsic::x86_xop_vprotw: // llvm.x86.xop.vprotw
case Intrinsic::x86_xop_vpshaw: // llvm.x86.xop.vpshaw
case Intrinsic::x86_xop_vpshlw: // llvm.x86.xop.vpshlw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_sse41_pblendw: // llvm.x86.sse41.pblendw
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::ppc_altivec_vmhaddshs: // llvm.ppc.altivec.vmhaddshs
case Intrinsic::ppc_altivec_vmhraddshs: // llvm.ppc.altivec.vmhraddshs
case Intrinsic::ppc_altivec_vmladduhm: // llvm.ppc.altivec.vmladduhm
case Intrinsic::x86_xop_vpmacssww: // llvm.x86.xop.vpmacssww
case Intrinsic::x86_xop_vpmacsww: // llvm.x86.xop.vpmacsww
ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx2_maskload_d_256: // llvm.x86.avx2.maskload.d.256
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
break;
case Intrinsic::x86_avx2_pmadd_wd: // llvm.x86.avx2.pmadd.wd
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 16));
break;
case Intrinsic::x86_avx2_pmovsxbd: // llvm.x86.avx2.pmovsxbd
case Intrinsic::x86_avx2_pmovzxbd: // llvm.x86.avx2.pmovzxbd
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
break;
case Intrinsic::x86_avx2_pbroadcastd_256: // llvm.x86.avx2.pbroadcastd.256
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_avx_cvt_ps2dq_256: // llvm.x86.avx.cvt.ps2dq.256
case Intrinsic::x86_avx_cvtt_ps2dq_256: // llvm.x86.avx.cvtt.ps2dq.256
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
break;
case Intrinsic::x86_avx2_pmovsxwd: // llvm.x86.avx2.pmovsxwd
case Intrinsic::x86_avx2_pmovzxwd: // llvm.x86.avx2.pmovzxwd
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
break;
case Intrinsic::x86_avx2_pabs_d: // llvm.x86.avx2.pabs.d
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
break;
case Intrinsic::x86_avx2_pslli_d: // llvm.x86.avx2.pslli.d
case Intrinsic::x86_avx2_psrai_d: // llvm.x86.avx2.psrai.d
case Intrinsic::x86_avx2_psrli_d: // llvm.x86.avx2.psrli.d
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx2_psll_d: // llvm.x86.avx2.psll.d
case Intrinsic::x86_avx2_psra_d: // llvm.x86.avx2.psra.d
case Intrinsic::x86_avx2_psrl_d: // llvm.x86.avx2.psrl.d
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
break;
case Intrinsic::x86_avx_vinsertf128_si_256: // llvm.x86.avx.vinsertf128.si.256
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_avx2_permd: // llvm.x86.avx2.permd
case Intrinsic::x86_avx2_phadd_d: // llvm.x86.avx2.phadd.d
case Intrinsic::x86_avx2_phsub_d: // llvm.x86.avx2.phsub.d
case Intrinsic::x86_avx2_pmaxs_d: // llvm.x86.avx2.pmaxs.d
case Intrinsic::x86_avx2_pmaxu_d: // llvm.x86.avx2.pmaxu.d
case Intrinsic::x86_avx2_pmins_d: // llvm.x86.avx2.pmins.d
case Intrinsic::x86_avx2_pminu_d: // llvm.x86.avx2.pminu.d
case Intrinsic::x86_avx2_psign_d: // llvm.x86.avx2.psign.d
case Intrinsic::x86_avx2_psllv_d_256: // llvm.x86.avx2.psllv.d.256
case Intrinsic::x86_avx2_psrav_d_256: // llvm.x86.avx2.psrav.d.256
case Intrinsic::x86_avx2_psrlv_d_256: // llvm.x86.avx2.psrlv.d.256
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
break;
case Intrinsic::x86_avx2_pblendd_256: // llvm.x86.avx2.pblendd.256
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_avx_vperm2f128_si_256: // llvm.x86.avx.vperm2f128.si.256
ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::arm_neon_vtbl1: // llvm.arm.neon.vtbl1
ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
break;
case Intrinsic::arm_neon_vtbl2: // llvm.arm.neon.vtbl2
case Intrinsic::arm_neon_vtbx1: // llvm.arm.neon.vtbx1
ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
break;
case Intrinsic::arm_neon_vtbl3: // llvm.arm.neon.vtbl3
case Intrinsic::arm_neon_vtbx2: // llvm.arm.neon.vtbx2
ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
break;
case Intrinsic::arm_neon_vtbl4: // llvm.arm.neon.vtbl4
case Intrinsic::arm_neon_vtbx3: // llvm.arm.neon.vtbx3
ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
break;
case Intrinsic::arm_neon_vtbx4: // llvm.arm.neon.vtbx4
ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
break;
case Intrinsic::x86_sse_cvtpd2pi: // llvm.x86.sse.cvtpd2pi
case Intrinsic::x86_sse_cvttpd2pi: // llvm.x86.sse.cvttpd2pi
ResultTy = Type::getX86_MMXTy(Context);
ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
break;
case Intrinsic::x86_sse_cvtps2pi: // llvm.x86.sse.cvtps2pi
case Intrinsic::x86_sse_cvttps2pi: // llvm.x86.sse.cvttps2pi
ResultTy = Type::getX86_MMXTy(Context);
ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
break;
case Intrinsic::x86_3dnow_pf2id: // llvm.x86.3dnow.pf2id
case Intrinsic::x86_3dnow_pfrcp: // llvm.x86.3dnow.pfrcp
case Intrinsic::x86_3dnow_pfrsqrt: // llvm.x86.3dnow.pfrsqrt
case Intrinsic::x86_3dnow_pi2fd: // llvm.x86.3dnow.pi2fd
case Intrinsic::x86_3dnowa_pf2iw: // llvm.x86.3dnowa.pf2iw
case Intrinsic::x86_3dnowa_pi2fw: // llvm.x86.3dnowa.pi2fw
case Intrinsic::x86_3dnowa_pswapd: // llvm.x86.3dnowa.pswapd
case Intrinsic::x86_ssse3_pabs_b: // llvm.x86.ssse3.pabs.b
case Intrinsic::x86_ssse3_pabs_d: // llvm.x86.ssse3.pabs.d
case Intrinsic::x86_ssse3_pabs_w: // llvm.x86.ssse3.pabs.w
ResultTy = Type::getX86_MMXTy(Context);
ArgTys.push_back(Type::getX86_MMXTy(Context));
break;
case Intrinsic::x86_mmx_pslli_d: // llvm.x86.mmx.pslli.d
case Intrinsic::x86_mmx_pslli_q: // llvm.x86.mmx.pslli.q
case Intrinsic::x86_mmx_pslli_w: // llvm.x86.mmx.pslli.w
case Intrinsic::x86_mmx_psrai_d: // llvm.x86.mmx.psrai.d
case Intrinsic::x86_mmx_psrai_w: // llvm.x86.mmx.psrai.w
case Intrinsic::x86_mmx_psrli_d: // llvm.x86.mmx.psrli.d
case Intrinsic::x86_mmx_psrli_q: // llvm.x86.mmx.psrli.q
case Intrinsic::x86_mmx_psrli_w: // llvm.x86.mmx.psrli.w
ResultTy = Type::getX86_MMXTy(Context);
ArgTys.push_back(Type::getX86_MMXTy(Context));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_mmx_pinsr_w: // llvm.x86.mmx.pinsr.w
ResultTy = Type::getX86_MMXTy(Context);
ArgTys.push_back(Type::getX86_MMXTy(Context));
ArgTys.push_back(IntegerType::get(Context, 32));
ArgTys.push_back(IntegerType::get(Context, 32));
break;
case Intrinsic::x86_sse_pshuf_w: // llvm.x86.sse.pshuf.w
ResultTy = Type::getX86_MMXTy(Context);
ArgTys.push_back(Type::getX86_MMXTy(Context));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
case Intrinsic::x86_3dnow_pavgusb: // llvm.x86.3dnow.pavgusb
case Intrinsic::x86_3dnow_pfacc: // llvm.x86.3dnow.pfacc
case Intrinsic::x86_3dnow_pfadd: // llvm.x86.3dnow.pfadd
case Intrinsic::x86_3dnow_pfcmpeq: // llvm.x86.3dnow.pfcmpeq
case Intrinsic::x86_3dnow_pfcmpge: // llvm.x86.3dnow.pfcmpge
case Intrinsic::x86_3dnow_pfcmpgt: // llvm.x86.3dnow.pfcmpgt
case Intrinsic::x86_3dnow_pfmax: // llvm.x86.3dnow.pfmax
case Intrinsic::x86_3dnow_pfmin: // llvm.x86.3dnow.pfmin
case Intrinsic::x86_3dnow_pfmul: // llvm.x86.3dnow.pfmul
case Intrinsic::x86_3dnow_pfrcpit1: // llvm.x86.3dnow.pfrcpit1
case Intrinsic::x86_3dnow_pfrcpit2: // llvm.x86.3dnow.pfrcpit2
case Intrinsic::x86_3dnow_pfrsqit1: // llvm.x86.3dnow.pfrsqit1
case Intrinsic::x86_3dnow_pfsub: // llvm.x86.3dnow.pfsub
case Intrinsic::x86_3dnow_pfsubr: // llvm.x86.3dnow.pfsubr
case Intrinsic::x86_3dnow_pmulhrw: // llvm.x86.3dnow.pmulhrw
case Intrinsic::x86_3dnowa_pfnacc: // llvm.x86.3dnowa.pfnacc
case Intrinsic::x86_3dnowa_pfpnacc: // llvm.x86.3dnowa.pfpnacc
case Intrinsic::x86_mmx_packssdw: // llvm.x86.mmx.packssdw
case Intrinsic::x86_mmx_packsswb: // llvm.x86.mmx.packsswb
case Intrinsic::x86_mmx_packuswb: // llvm.x86.mmx.packuswb
case Intrinsic::x86_mmx_padd_b: // llvm.x86.mmx.padd.b
case Intrinsic::x86_mmx_padd_d: // llvm.x86.mmx.padd.d
case Intrinsic::x86_mmx_padd_q: // llvm.x86.mmx.padd.q
case Intrinsic::x86_mmx_padd_w: // llvm.x86.mmx.padd.w
case Intrinsic::x86_mmx_padds_b: // llvm.x86.mmx.padds.b
case Intrinsic::x86_mmx_padds_w: // llvm.x86.mmx.padds.w
case Intrinsic::x86_mmx_paddus_b: // llvm.x86.mmx.paddus.b
case Intrinsic::x86_mmx_paddus_w: // llvm.x86.mmx.paddus.w
case Intrinsic::x86_mmx_pand: // llvm.x86.mmx.pand
case Intrinsic::x86_mmx_pandn: // llvm.x86.mmx.pandn
case Intrinsic::x86_mmx_pavg_b: // llvm.x86.mmx.pavg.b
case Intrinsic::x86_mmx_pavg_w: // llvm.x86.mmx.pavg.w
case Intrinsic::x86_mmx_pcmpeq_b: // llvm.x86.mmx.pcmpeq.b
case Intrinsic::x86_mmx_pcmpeq_d: // llvm.x86.mmx.pcmpeq.d
case Intrinsic::x86_mmx_pcmpeq_w: // llvm.x86.mmx.pcmpeq.w
case Intrinsic::x86_mmx_pcmpgt_b: // llvm.x86.mmx.pcmpgt.b
case Intrinsic::x86_mmx_pcmpgt_d: // llvm.x86.mmx.pcmpgt.d
case Intrinsic::x86_mmx_pcmpgt_w: // llvm.x86.mmx.pcmpgt.w
case Intrinsic::x86_mmx_pmadd_wd: // llvm.x86.mmx.pmadd.wd
case Intrinsic::x86_mmx_pmaxs_w: // llvm.x86.mmx.pmaxs.w
case Intrinsic::x86_mmx_pmaxu_b: // llvm.x86.mmx.pmaxu.b
case Intrinsic::x86_mmx_pmins_w: // llvm.x86.mmx.pmins.w
case Intrinsic::x86_mmx_pminu_b: // llvm.x86.mmx.pminu.b
case Intrinsic::x86_mmx_pmulh_w: // llvm.x86.mmx.pmulh.w
case Intrinsic::x86_mmx_pmulhu_w: // llvm.x86.mmx.pmulhu.w
case Intrinsic::x86_mmx_pmull_w: // llvm.x86.mmx.pmull.w
case Intrinsic::x86_mmx_pmulu_dq: // llvm.x86.mmx.pmulu.dq
case Intrinsic::x86_mmx_por: // llvm.x86.mmx.por
case Intrinsic::x86_mmx_psad_bw: // llvm.x86.mmx.psad.bw
case Intrinsic::x86_mmx_psll_d: // llvm.x86.mmx.psll.d
case Intrinsic::x86_mmx_psll_q: // llvm.x86.mmx.psll.q
case Intrinsic::x86_mmx_psll_w: // llvm.x86.mmx.psll.w
case Intrinsic::x86_mmx_psra_d: // llvm.x86.mmx.psra.d
case Intrinsic::x86_mmx_psra_w: // llvm.x86.mmx.psra.w
case Intrinsic::x86_mmx_psrl_d: // llvm.x86.mmx.psrl.d
case Intrinsic::x86_mmx_psrl_q: // llvm.x86.mmx.psrl.q
case Intrinsic::x86_mmx_psrl_w: // llvm.x86.mmx.psrl.w
case Intrinsic::x86_mmx_psub_b: // llvm.x86.mmx.psub.b
case Intrinsic::x86_mmx_psub_d: // llvm.x86.mmx.psub.d
case Intrinsic::x86_mmx_psub_q: // llvm.x86.mmx.psub.q
case Intrinsic::x86_mmx_psub_w: // llvm.x86.mmx.psub.w
case Intrinsic::x86_mmx_psubs_b: // llvm.x86.mmx.psubs.b
case Intrinsic::x86_mmx_psubs_w: // llvm.x86.mmx.psubs.w
case Intrinsic::x86_mmx_psubus_b: // llvm.x86.mmx.psubus.b
case Intrinsic::x86_mmx_psubus_w: // llvm.x86.mmx.psubus.w
case Intrinsic::x86_mmx_punpckhbw: // llvm.x86.mmx.punpckhbw
case Intrinsic::x86_mmx_punpckhdq: // llvm.x86.mmx.punpckhdq
case Intrinsic::x86_mmx_punpckhwd: // llvm.x86.mmx.punpckhwd
case Intrinsic::x86_mmx_punpcklbw: // llvm.x86.mmx.punpcklbw
case Intrinsic::x86_mmx_punpckldq: // llvm.x86.mmx.punpckldq
case Intrinsic::x86_mmx_punpcklwd: // llvm.x86.mmx.punpcklwd
case Intrinsic::x86_mmx_pxor: // llvm.x86.mmx.pxor
case Intrinsic::x86_ssse3_phadd_d: // llvm.x86.ssse3.phadd.d
case Intrinsic::x86_ssse3_phadd_sw: // llvm.x86.ssse3.phadd.sw
case Intrinsic::x86_ssse3_phadd_w: // llvm.x86.ssse3.phadd.w
case Intrinsic::x86_ssse3_phsub_d: // llvm.x86.ssse3.phsub.d
case Intrinsic::x86_ssse3_phsub_sw: // llvm.x86.ssse3.phsub.sw
case Intrinsic::x86_ssse3_phsub_w: // llvm.x86.ssse3.phsub.w
case Intrinsic::x86_ssse3_pmadd_ub_sw: // llvm.x86.ssse3.pmadd.ub.sw
case Intrinsic::x86_ssse3_pmul_hr_sw: // llvm.x86.ssse3.pmul.hr.sw
case Intrinsic::x86_ssse3_pshuf_b: // llvm.x86.ssse3.pshuf.b
case Intrinsic::x86_ssse3_psign_b: // llvm.x86.ssse3.psign.b
case Intrinsic::x86_ssse3_psign_d: // llvm.x86.ssse3.psign.d
case Intrinsic::x86_ssse3_psign_w: // llvm.x86.ssse3.psign.w
ResultTy = Type::getX86_MMXTy(Context);
ArgTys.push_back(Type::getX86_MMXTy(Context));
ArgTys.push_back(Type::getX86_MMXTy(Context));
break;
case Intrinsic::x86_mmx_palignr_b: // llvm.x86.mmx.palignr.b
ResultTy = Type::getX86_MMXTy(Context);
ArgTys.push_back(Type::getX86_MMXTy(Context));
ArgTys.push_back(Type::getX86_MMXTy(Context));
ArgTys.push_back(IntegerType::get(Context, 8));
break;
}
#endif
// Add parameter attributes that are not common to all intrinsics.
#ifdef GET_INTRINSIC_ATTRIBUTES
AttrListPtr Intrinsic::getAttributes(ID id) {
static const uint8_t IntrinsicsToAttributesMap[] = {
1, // llvm.CNOT
1, // llvm.Fredkin
1, // llvm.H
1, // llvm.MeasX
1, // llvm.MeasZ
1, // llvm.rkqc.NOT
1, // llvm.PrepX
1, // llvm.PrepZ
1, // llvm.Rx
1, // llvm.Ry
1, // llvm.Rz
1, // llvm.S
1, // llvm.Sdag
1, // llvm.T
1, // llvm.Tdag
1, // llvm.Toffoli
1, // llvm.X
1, // llvm.Y
1, // llvm.Z
1, // llvm.rkqc.a_eq_a_minus_b
1, // llvm.rkqc.a_eq_a_plus_b
1, // llvm.rkqc.a_eq_a_plus_b_times_c
1, // llvm.rkqc.a_swap_b
2, // llvm.adjust.trampoline
1, // llvm.annotation
1, // llvm.arm.cdp
1, // llvm.arm.cdp2
3, // llvm.arm.get.fpscr
2, // llvm.arm.ldrexd
1, // llvm.arm.mcr
1, // llvm.arm.mcr2
1, // llvm.arm.mcrr
1, // llvm.arm.mcrr2
1, // llvm.arm.mrc
1, // llvm.arm.mrc2
3, // llvm.arm.neon.vabds
3, // llvm.arm.neon.vabdu
3, // llvm.arm.neon.vabs
3, // llvm.arm.neon.vacged
3, // llvm.arm.neon.vacgeq
3, // llvm.arm.neon.vacgtd
3, // llvm.arm.neon.vacgtq
3, // llvm.arm.neon.vaddhn
3, // llvm.arm.neon.vcls
3, // llvm.arm.neon.vclz
3, // llvm.arm.neon.vcnt
3, // llvm.arm.neon.vcvtfp2fxs
3, // llvm.arm.neon.vcvtfp2fxu
3, // llvm.arm.neon.vcvtfp2hf
3, // llvm.arm.neon.vcvtfxs2fp
3, // llvm.arm.neon.vcvtfxu2fp
3, // llvm.arm.neon.vcvthf2fp
3, // llvm.arm.neon.vhadds
3, // llvm.arm.neon.vhaddu
3, // llvm.arm.neon.vhsubs
3, // llvm.arm.neon.vhsubu
2, // llvm.arm.neon.vld1
2, // llvm.arm.neon.vld2
2, // llvm.arm.neon.vld2lane
2, // llvm.arm.neon.vld3
2, // llvm.arm.neon.vld3lane
2, // llvm.arm.neon.vld4
2, // llvm.arm.neon.vld4lane
3, // llvm.arm.neon.vmaxs
3, // llvm.arm.neon.vmaxu
3, // llvm.arm.neon.vmins
3, // llvm.arm.neon.vminu
3, // llvm.arm.neon.vmullp
3, // llvm.arm.neon.vmulls
3, // llvm.arm.neon.vmullu
3, // llvm.arm.neon.vmulp
3, // llvm.arm.neon.vpadals
3, // llvm.arm.neon.vpadalu
3, // llvm.arm.neon.vpadd
3, // llvm.arm.neon.vpaddls
3, // llvm.arm.neon.vpaddlu
3, // llvm.arm.neon.vpmaxs
3, // llvm.arm.neon.vpmaxu
3, // llvm.arm.neon.vpmins
3, // llvm.arm.neon.vpminu
3, // llvm.arm.neon.vqabs
3, // llvm.arm.neon.vqadds
3, // llvm.arm.neon.vqaddu
3, // llvm.arm.neon.vqdmlal
3, // llvm.arm.neon.vqdmlsl
3, // llvm.arm.neon.vqdmulh
3, // llvm.arm.neon.vqdmull
3, // llvm.arm.neon.vqmovns
3, // llvm.arm.neon.vqmovnsu
3, // llvm.arm.neon.vqmovnu
3, // llvm.arm.neon.vqneg
3, // llvm.arm.neon.vqrdmulh
3, // llvm.arm.neon.vqrshiftns
3, // llvm.arm.neon.vqrshiftnsu
3, // llvm.arm.neon.vqrshiftnu
3, // llvm.arm.neon.vqrshifts
3, // llvm.arm.neon.vqrshiftu
3, // llvm.arm.neon.vqshiftns
3, // llvm.arm.neon.vqshiftnsu
3, // llvm.arm.neon.vqshiftnu
3, // llvm.arm.neon.vqshifts
3, // llvm.arm.neon.vqshiftsu
3, // llvm.arm.neon.vqshiftu
3, // llvm.arm.neon.vqsubs
3, // llvm.arm.neon.vqsubu
3, // llvm.arm.neon.vraddhn
3, // llvm.arm.neon.vrecpe
3, // llvm.arm.neon.vrecps
3, // llvm.arm.neon.vrhadds
3, // llvm.arm.neon.vrhaddu
3, // llvm.arm.neon.vrshiftn
3, // llvm.arm.neon.vrshifts
3, // llvm.arm.neon.vrshiftu
3, // llvm.arm.neon.vrsqrte
3, // llvm.arm.neon.vrsqrts
3, // llvm.arm.neon.vrsubhn
3, // llvm.arm.neon.vshiftins
3, // llvm.arm.neon.vshiftls
3, // llvm.arm.neon.vshiftlu
3, // llvm.arm.neon.vshiftn
3, // llvm.arm.neon.vshifts
3, // llvm.arm.neon.vshiftu
1, // llvm.arm.neon.vst1
1, // llvm.arm.neon.vst2
1, // llvm.arm.neon.vst2lane
1, // llvm.arm.neon.vst3
1, // llvm.arm.neon.vst3lane
1, // llvm.arm.neon.vst4
1, // llvm.arm.neon.vst4lane
3, // llvm.arm.neon.vsubhn
3, // llvm.arm.neon.vtbl1
3, // llvm.arm.neon.vtbl2
3, // llvm.arm.neon.vtbl3
3, // llvm.arm.neon.vtbl4
3, // llvm.arm.neon.vtbx1
3, // llvm.arm.neon.vtbx2
3, // llvm.arm.neon.vtbx3
3, // llvm.arm.neon.vtbx4
3, // llvm.arm.qadd
3, // llvm.arm.qsub
1, // llvm.arm.set.fpscr
3, // llvm.arm.ssat
1, // llvm.arm.strexd
3, // llvm.arm.thread.pointer
3, // llvm.arm.usat
3, // llvm.arm.vcvtr
3, // llvm.arm.vcvtru
1, // llvm.rkqc.assign_value_of_0_to_a
1, // llvm.rkqc.assign_value_of_1_to_a
1, // llvm.rkqc.assign_value_of_b_to_a
3, // llvm.bswap
1, // llvm.rkqc.cnot
3, // llvm.convert.from.fp16
3, // llvm.convert.to.fp16
1, // llvm.convertff
1, // llvm.convertfsi
1, // llvm.convertfui
1, // llvm.convertsif
1, // llvm.convertss
1, // llvm.convertsu
1, // llvm.convertuif
1, // llvm.convertus
1, // llvm.convertuu
2, // llvm.cos
3, // llvm.ctlz
3, // llvm.ctpop
3, // llvm.cttz
3, // llvm.dbg.declare
3, // llvm.dbg.value
1, // llvm.eh.dwarf.cfa
1, // llvm.eh.return.i32
1, // llvm.eh.return.i64
3, // llvm.eh.sjlj.callsite
1, // llvm.eh.sjlj.functioncontext
1, // llvm.eh.sjlj.longjmp
3, // llvm.eh.sjlj.lsda
1, // llvm.eh.sjlj.setjmp
3, // llvm.eh.typeid.for
1, // llvm.eh.unwind.init
2, // llvm.exp
2, // llvm.exp2
3, // llvm.expect
1, // llvm.flt.rounds
3, // llvm.fma
3, // llvm.frameaddress
2, // llvm.gcread
1, // llvm.gcroot
4, // llvm.gcwrite
3, // llvm.hexagon.A2.abs
3, // llvm.hexagon.A2.absp
3, // llvm.hexagon.A2.abssat
3, // llvm.hexagon.A2.add
3, // llvm.hexagon.A2.addh.h16.hh
3, // llvm.hexagon.A2.addh.h16.hl
3, // llvm.hexagon.A2.addh.h16.lh
3, // llvm.hexagon.A2.addh.h16.ll
3, // llvm.hexagon.A2.addh.h16.sat.hh
3, // llvm.hexagon.A2.addh.h16.sat.hl
3, // llvm.hexagon.A2.addh.h16.sat.lh
3, // llvm.hexagon.A2.addh.h16.sat.ll
3, // llvm.hexagon.A2.addh.l16.hh
3, // llvm.hexagon.A2.addh.l16.hl
3, // llvm.hexagon.A2.addh.l16.lh
3, // llvm.hexagon.A2.addh.l16.ll
3, // llvm.hexagon.A2.addh.l16.sat.hh
3, // llvm.hexagon.A2.addh.l16.sat.hl
3, // llvm.hexagon.A2.addh.l16.sat.lh
3, // llvm.hexagon.A2.addh.l16.sat.ll
3, // llvm.hexagon.A2.addi
3, // llvm.hexagon.A2.addp
3, // llvm.hexagon.A2.addpsat
3, // llvm.hexagon.A2.addsat
3, // llvm.hexagon.A2.addsp
3, // llvm.hexagon.A2.and
3, // llvm.hexagon.A2.andir
3, // llvm.hexagon.A2.andp
3, // llvm.hexagon.A2.aslh
3, // llvm.hexagon.A2.asrh
3, // llvm.hexagon.A2.combine.hh
3, // llvm.hexagon.A2.combine.hl
3, // llvm.hexagon.A2.combine.lh
3, // llvm.hexagon.A2.combine.ll
3, // llvm.hexagon.A2.combineii
3, // llvm.hexagon.A2.combinew
3, // llvm.hexagon.A2.max
3, // llvm.hexagon.A2.maxp
3, // llvm.hexagon.A2.maxu
3, // llvm.hexagon.A2.maxup
3, // llvm.hexagon.A2.min
3, // llvm.hexagon.A2.minp
3, // llvm.hexagon.A2.minu
3, // llvm.hexagon.A2.minup
3, // llvm.hexagon.A2.neg
3, // llvm.hexagon.A2.negp
3, // llvm.hexagon.A2.negsat
3, // llvm.hexagon.A2.not
3, // llvm.hexagon.A2.notp
3, // llvm.hexagon.A2.or
3, // llvm.hexagon.A2.orir
3, // llvm.hexagon.A2.orp
3, // llvm.hexagon.A2.sat
3, // llvm.hexagon.A2.satb
3, // llvm.hexagon.A2.sath
3, // llvm.hexagon.A2.satub
3, // llvm.hexagon.A2.satuh
3, // llvm.hexagon.A2.sub
3, // llvm.hexagon.A2.subh.h16.hh
3, // llvm.hexagon.A2.subh.h16.hl
3, // llvm.hexagon.A2.subh.h16.lh
3, // llvm.hexagon.A2.subh.h16.ll
3, // llvm.hexagon.A2.subh.h16.sat.hh
3, // llvm.hexagon.A2.subh.h16.sat.hl
3, // llvm.hexagon.A2.subh.h16.sat.lh
3, // llvm.hexagon.A2.subh.h16.sat.ll
3, // llvm.hexagon.A2.subh.l16.hl
3, // llvm.hexagon.A2.subh.l16.ll
3, // llvm.hexagon.A2.subh.l16.sat.hl
3, // llvm.hexagon.A2.subh.l16.sat.ll
3, // llvm.hexagon.A2.subp
3, // llvm.hexagon.A2.subri
3, // llvm.hexagon.A2.subsat
3, // llvm.hexagon.A2.svaddh
3, // llvm.hexagon.A2.svaddhs
3, // llvm.hexagon.A2.svadduhs
3, // llvm.hexagon.A2.svavgh
3, // llvm.hexagon.A2.svavghs
3, // llvm.hexagon.A2.svnavgh
3, // llvm.hexagon.A2.svsubh
3, // llvm.hexagon.A2.svsubhs
3, // llvm.hexagon.A2.svsubuhs
3, // llvm.hexagon.A2.swiz
3, // llvm.hexagon.A2.sxtb
3, // llvm.hexagon.A2.sxth
3, // llvm.hexagon.A2.sxtw
3, // llvm.hexagon.A2.tfr
3, // llvm.hexagon.A2.tfrih
3, // llvm.hexagon.A2.tfril
3, // llvm.hexagon.A2.tfrp
3, // llvm.hexagon.A2.tfrpi
3, // llvm.hexagon.A2.tfrsi
3, // llvm.hexagon.A2.vabsh
3, // llvm.hexagon.A2.vabshsat
3, // llvm.hexagon.A2.vabsw
3, // llvm.hexagon.A2.vabswsat
3, // llvm.hexagon.A2.vaddh
3, // llvm.hexagon.A2.vaddhs
3, // llvm.hexagon.A2.vaddub
3, // llvm.hexagon.A2.vaddubs
3, // llvm.hexagon.A2.vadduhs
3, // llvm.hexagon.A2.vaddw
3, // llvm.hexagon.A2.vaddws
3, // llvm.hexagon.A2.vavgh
3, // llvm.hexagon.A2.vavghcr
3, // llvm.hexagon.A2.vavghr
3, // llvm.hexagon.A2.vavgub
3, // llvm.hexagon.A2.vavgubr
3, // llvm.hexagon.A2.vavguh
3, // llvm.hexagon.A2.vavguhr
3, // llvm.hexagon.A2.vavguw
3, // llvm.hexagon.A2.vavguwr
3, // llvm.hexagon.A2.vavgw
3, // llvm.hexagon.A2.vavgwcr
3, // llvm.hexagon.A2.vavgwr
3, // llvm.hexagon.A2.vcmpbeq
3, // llvm.hexagon.A2.vcmpbgtu
3, // llvm.hexagon.A2.vcmpheq
3, // llvm.hexagon.A2.vcmphgt
3, // llvm.hexagon.A2.vcmphgtu
3, // llvm.hexagon.A2.vcmpweq
3, // llvm.hexagon.A2.vcmpwgt
3, // llvm.hexagon.A2.vcmpwgtu
3, // llvm.hexagon.A2.vconj
3, // llvm.hexagon.A2.vmaxh
3, // llvm.hexagon.A2.vmaxub
3, // llvm.hexagon.A2.vmaxuh
3, // llvm.hexagon.A2.vmaxuw
3, // llvm.hexagon.A2.vmaxw
3, // llvm.hexagon.A2.vminh
3, // llvm.hexagon.A2.vminub
3, // llvm.hexagon.A2.vminuh
3, // llvm.hexagon.A2.vminuw
3, // llvm.hexagon.A2.vminw
3, // llvm.hexagon.A2.vnavgh
3, // llvm.hexagon.A2.vnavghcr
3, // llvm.hexagon.A2.vnavghr
3, // llvm.hexagon.A2.vnavgw
3, // llvm.hexagon.A2.vnavgwcr
3, // llvm.hexagon.A2.vnavgwr
3, // llvm.hexagon.A2.vraddub
3, // llvm.hexagon.A2.vraddub.acc
3, // llvm.hexagon.A2.vrsadub
3, // llvm.hexagon.A2.vrsadub.acc
3, // llvm.hexagon.A2.vsubh
3, // llvm.hexagon.A2.vsubhs
3, // llvm.hexagon.A2.vsubub
3, // llvm.hexagon.A2.vsububs
3, // llvm.hexagon.A2.vsubuhs
3, // llvm.hexagon.A2.vsubw
3, // llvm.hexagon.A2.vsubws
3, // llvm.hexagon.A2.xor
3, // llvm.hexagon.A2.xorp
3, // llvm.hexagon.A2.zxtb
3, // llvm.hexagon.A2.zxth
3, // llvm.hexagon.A4.andn
3, // llvm.hexagon.A4.andnp
3, // llvm.hexagon.A4.combineir
3, // llvm.hexagon.A4.combineri
3, // llvm.hexagon.A4.cround.ri
3, // llvm.hexagon.A4.cround.rr
3, // llvm.hexagon.A4.modwrapu
3, // llvm.hexagon.A4.orn
3, // llvm.hexagon.A4.ornp
3, // llvm.hexagon.A4.rcmpeq
3, // llvm.hexagon.A4.rcmpeqi
3, // llvm.hexagon.A4.rcmpneq
3, // llvm.hexagon.A4.rcmpneqi
3, // llvm.hexagon.A4.round.ri
3, // llvm.hexagon.A4.round.ri.sat
3, // llvm.hexagon.A4.round.rr
3, // llvm.hexagon.A4.round.rr.sat
3, // llvm.hexagon.C2.all8
3, // llvm.hexagon.C2.and
3, // llvm.hexagon.C2.andn
3, // llvm.hexagon.C2.any8
3, // llvm.hexagon.C2.bitsclr
3, // llvm.hexagon.C2.bitsclri
3, // llvm.hexagon.C2.bitsset
3, // llvm.hexagon.C2.cmpeq
3, // llvm.hexagon.C2.cmpeqi
3, // llvm.hexagon.C2.cmpeqp
3, // llvm.hexagon.C2.cmpgei
3, // llvm.hexagon.C2.cmpgeui
3, // llvm.hexagon.C2.cmpgt
3, // llvm.hexagon.C2.cmpgti
3, // llvm.hexagon.C2.cmpgtp
3, // llvm.hexagon.C2.cmpgtu
3, // llvm.hexagon.C2.cmpgtui
3, // llvm.hexagon.C2.cmpgtup
3, // llvm.hexagon.C2.cmplt
3, // llvm.hexagon.C2.cmpltu
3, // llvm.hexagon.C2.mask
3, // llvm.hexagon.C2.mux
3, // llvm.hexagon.C2.muxii
3, // llvm.hexagon.C2.muxir
3, // llvm.hexagon.C2.muxri
3, // llvm.hexagon.C2.not
3, // llvm.hexagon.C2.or
3, // llvm.hexagon.C2.orn
3, // llvm.hexagon.C2.pxfer.map
3, // llvm.hexagon.C2.tfrpr
3, // llvm.hexagon.C2.tfrrp
3, // llvm.hexagon.C2.vitpack
3, // llvm.hexagon.C2.vmux
3, // llvm.hexagon.C2.xor
3, // llvm.hexagon.C4.and.and
3, // llvm.hexagon.C4.and.andn
3, // llvm.hexagon.C4.and.or
3, // llvm.hexagon.C4.and.orn
3, // llvm.hexagon.C4.cmplte
3, // llvm.hexagon.C4.cmpltei
3, // llvm.hexagon.C4.cmplteu
3, // llvm.hexagon.C4.cmplteui
3, // llvm.hexagon.C4.cmpneq
3, // llvm.hexagon.C4.cmpneqi
3, // llvm.hexagon.C4.fastcorner9
3, // llvm.hexagon.C4.fastcorner9.not
3, // llvm.hexagon.C4.or.and
3, // llvm.hexagon.C4.or.andn
3, // llvm.hexagon.C4.or.or
3, // llvm.hexagon.C4.or.orn
3, // llvm.hexagon.M2.acci
3, // llvm.hexagon.M2.accii
3, // llvm.hexagon.M2.cmaci.s0
3, // llvm.hexagon.M2.cmacr.s0
3, // llvm.hexagon.M2.cmacs.s0
3, // llvm.hexagon.M2.cmacs.s1
3, // llvm.hexagon.M2.cmacsc.s0
3, // llvm.hexagon.M2.cmacsc.s1
3, // llvm.hexagon.M2.cmpyi.s0
3, // llvm.hexagon.M2.cmpyr.s0
3, // llvm.hexagon.M2.cmpyrs.s0
3, // llvm.hexagon.M2.cmpyrs.s1
3, // llvm.hexagon.M2.cmpyrsc.s0
3, // llvm.hexagon.M2.cmpyrsc.s1
3, // llvm.hexagon.M2.cmpys.s0
3, // llvm.hexagon.M2.cmpys.s1
3, // llvm.hexagon.M2.cmpysc.s0
3, // llvm.hexagon.M2.cmpysc.s1
3, // llvm.hexagon.M2.cnacs.s0
3, // llvm.hexagon.M2.cnacs.s1
3, // llvm.hexagon.M2.cnacsc.s0
3, // llvm.hexagon.M2.cnacsc.s1
3, // llvm.hexagon.M2.dpmpyss.acc.s0
3, // llvm.hexagon.M2.dpmpyss.nac.s0
3, // llvm.hexagon.M2.dpmpyss.rnd.s0
3, // llvm.hexagon.M2.dpmpyss.s0
3, // llvm.hexagon.M2.dpmpyuu.acc.s0
3, // llvm.hexagon.M2.dpmpyuu.nac.s0
3, // llvm.hexagon.M2.dpmpyuu.s0
3, // llvm.hexagon.M2.hmmpyh.rs1
3, // llvm.hexagon.M2.hmmpyl.rs1
3, // llvm.hexagon.M2.maci
3, // llvm.hexagon.M2.macsin
3, // llvm.hexagon.M2.macsip
3, // llvm.hexagon.M2.mmachs.rs0
3, // llvm.hexagon.M2.mmachs.rs1
3, // llvm.hexagon.M2.mmachs.s0
3, // llvm.hexagon.M2.mmachs.s1
3, // llvm.hexagon.M2.mmacls.rs0
3, // llvm.hexagon.M2.mmacls.rs1
3, // llvm.hexagon.M2.mmacls.s0
3, // llvm.hexagon.M2.mmacls.s1
3, // llvm.hexagon.M2.mmacuhs.rs0
3, // llvm.hexagon.M2.mmacuhs.rs1
3, // llvm.hexagon.M2.mmacuhs.s0
3, // llvm.hexagon.M2.mmacuhs.s1
3, // llvm.hexagon.M2.mmaculs.rs0
3, // llvm.hexagon.M2.mmaculs.rs1
3, // llvm.hexagon.M2.mmaculs.s0
3, // llvm.hexagon.M2.mmaculs.s1
3, // llvm.hexagon.M2.mmpyh.rs0
3, // llvm.hexagon.M2.mmpyh.rs1
3, // llvm.hexagon.M2.mmpyh.s0
3, // llvm.hexagon.M2.mmpyh.s1
3, // llvm.hexagon.M2.mmpyl.rs0
3, // llvm.hexagon.M2.mmpyl.rs1
3, // llvm.hexagon.M2.mmpyl.s0
3, // llvm.hexagon.M2.mmpyl.s1
3, // llvm.hexagon.M2.mmpyuh.rs0
3, // llvm.hexagon.M2.mmpyuh.rs1
3, // llvm.hexagon.M2.mmpyuh.s0
3, // llvm.hexagon.M2.mmpyuh.s1
3, // llvm.hexagon.M2.mmpyul.rs0
3, // llvm.hexagon.M2.mmpyul.rs1
3, // llvm.hexagon.M2.mmpyul.s0
3, // llvm.hexagon.M2.mmpyul.s1
3, // llvm.hexagon.M2.mpy.acc.hh.s0
3, // llvm.hexagon.M2.mpy.acc.hh.s1
3, // llvm.hexagon.M2.mpy.acc.hl.s0
3, // llvm.hexagon.M2.mpy.acc.hl.s1
3, // llvm.hexagon.M2.mpy.acc.lh.s0
3, // llvm.hexagon.M2.mpy.acc.lh.s1
3, // llvm.hexagon.M2.mpy.acc.ll.s0
3, // llvm.hexagon.M2.mpy.acc.ll.s1
3, // llvm.hexagon.M2.mpy.acc.sat.hh.s0
3, // llvm.hexagon.M2.mpy.acc.sat.hh.s1
3, // llvm.hexagon.M2.mpy.acc.sat.hl.s0
3, // llvm.hexagon.M2.mpy.acc.sat.hl.s1
3, // llvm.hexagon.M2.mpy.acc.sat.lh.s0
3, // llvm.hexagon.M2.mpy.acc.sat.lh.s1
3, // llvm.hexagon.M2.mpy.acc.sat.ll.s0
3, // llvm.hexagon.M2.mpy.acc.sat.ll.s1
3, // llvm.hexagon.M2.mpy.hh.s0
3, // llvm.hexagon.M2.mpy.hh.s1
3, // llvm.hexagon.M2.mpy.hl.s0
3, // llvm.hexagon.M2.mpy.hl.s1
3, // llvm.hexagon.M2.mpy.lh.s0
3, // llvm.hexagon.M2.mpy.lh.s1
3, // llvm.hexagon.M2.mpy.ll.s0
3, // llvm.hexagon.M2.mpy.ll.s1
3, // llvm.hexagon.M2.mpy.nac.hh.s0
3, // llvm.hexagon.M2.mpy.nac.hh.s1
3, // llvm.hexagon.M2.mpy.nac.hl.s0
3, // llvm.hexagon.M2.mpy.nac.hl.s1
3, // llvm.hexagon.M2.mpy.nac.lh.s0
3, // llvm.hexagon.M2.mpy.nac.lh.s1
3, // llvm.hexagon.M2.mpy.nac.ll.s0
3, // llvm.hexagon.M2.mpy.nac.ll.s1
3, // llvm.hexagon.M2.mpy.nac.sat.hh.s0
3, // llvm.hexagon.M2.mpy.nac.sat.hh.s1
3, // llvm.hexagon.M2.mpy.nac.sat.hl.s0
3, // llvm.hexagon.M2.mpy.nac.sat.hl.s1
3, // llvm.hexagon.M2.mpy.nac.sat.lh.s0
3, // llvm.hexagon.M2.mpy.nac.sat.lh.s1
3, // llvm.hexagon.M2.mpy.nac.sat.ll.s0
3, // llvm.hexagon.M2.mpy.nac.sat.ll.s1
3, // llvm.hexagon.M2.mpy.rnd.hh.s0
3, // llvm.hexagon.M2.mpy.rnd.hh.s1
3, // llvm.hexagon.M2.mpy.rnd.hl.s0
3, // llvm.hexagon.M2.mpy.rnd.hl.s1
3, // llvm.hexagon.M2.mpy.rnd.lh.s0
3, // llvm.hexagon.M2.mpy.rnd.lh.s1
3, // llvm.hexagon.M2.mpy.rnd.ll.s0
3, // llvm.hexagon.M2.mpy.rnd.ll.s1
3, // llvm.hexagon.M2.mpy.sat.hh.s0
3, // llvm.hexagon.M2.mpy.sat.hh.s1
3, // llvm.hexagon.M2.mpy.sat.hl.s0
3, // llvm.hexagon.M2.mpy.sat.hl.s1
3, // llvm.hexagon.M2.mpy.sat.lh.s0
3, // llvm.hexagon.M2.mpy.sat.lh.s1
3, // llvm.hexagon.M2.mpy.sat.ll.s0
3, // llvm.hexagon.M2.mpy.sat.ll.s1
3, // llvm.hexagon.M2.mpy.sat.rnd.hh.s0
3, // llvm.hexagon.M2.mpy.sat.rnd.hh.s1
3, // llvm.hexagon.M2.mpy.sat.rnd.hl.s0
3, // llvm.hexagon.M2.mpy.sat.rnd.hl.s1
3, // llvm.hexagon.M2.mpy.sat.rnd.lh.s0
3, // llvm.hexagon.M2.mpy.sat.rnd.lh.s1
3, // llvm.hexagon.M2.mpy.sat.rnd.ll.s0
3, // llvm.hexagon.M2.mpy.sat.rnd.ll.s1
3, // llvm.hexagon.M2.mpy.up
3, // llvm.hexagon.M2.mpyd.acc.hh.s0
3, // llvm.hexagon.M2.mpyd.acc.hh.s1
3, // llvm.hexagon.M2.mpyd.acc.hl.s0
3, // llvm.hexagon.M2.mpyd.acc.hl.s1
3, // llvm.hexagon.M2.mpyd.acc.lh.s0
3, // llvm.hexagon.M2.mpyd.acc.lh.s1
3, // llvm.hexagon.M2.mpyd.acc.ll.s0
3, // llvm.hexagon.M2.mpyd.acc.ll.s1
3, // llvm.hexagon.M2.mpyd.hh.s0
3, // llvm.hexagon.M2.mpyd.hh.s1
3, // llvm.hexagon.M2.mpyd.hl.s0
3, // llvm.hexagon.M2.mpyd.hl.s1
3, // llvm.hexagon.M2.mpyd.lh.s0
3, // llvm.hexagon.M2.mpyd.lh.s1
3, // llvm.hexagon.M2.mpyd.ll.s0
3, // llvm.hexagon.M2.mpyd.ll.s1
3, // llvm.hexagon.M2.mpyd.nac.hh.s0
3, // llvm.hexagon.M2.mpyd.nac.hh.s1
3, // llvm.hexagon.M2.mpyd.nac.hl.s0
3, // llvm.hexagon.M2.mpyd.nac.hl.s1
3, // llvm.hexagon.M2.mpyd.nac.lh.s0
3, // llvm.hexagon.M2.mpyd.nac.lh.s1
3, // llvm.hexagon.M2.mpyd.nac.ll.s0
3, // llvm.hexagon.M2.mpyd.nac.ll.s1
3, // llvm.hexagon.M2.mpyd.rnd.hh.s0
3, // llvm.hexagon.M2.mpyd.rnd.hh.s1
3, // llvm.hexagon.M2.mpyd.rnd.hl.s0
3, // llvm.hexagon.M2.mpyd.rnd.hl.s1
3, // llvm.hexagon.M2.mpyd.rnd.lh.s0
3, // llvm.hexagon.M2.mpyd.rnd.lh.s1
3, // llvm.hexagon.M2.mpyd.rnd.ll.s0
3, // llvm.hexagon.M2.mpyd.rnd.ll.s1
3, // llvm.hexagon.M2.mpyi
3, // llvm.hexagon.M2.mpysmi
3, // llvm.hexagon.M2.mpyu.acc.hh.s0
3, // llvm.hexagon.M2.mpyu.acc.hh.s1
3, // llvm.hexagon.M2.mpyu.acc.hl.s0
3, // llvm.hexagon.M2.mpyu.acc.hl.s1
3, // llvm.hexagon.M2.mpyu.acc.lh.s0
3, // llvm.hexagon.M2.mpyu.acc.lh.s1
3, // llvm.hexagon.M2.mpyu.acc.ll.s0
3, // llvm.hexagon.M2.mpyu.acc.ll.s1
3, // llvm.hexagon.M2.mpyu.hh.s0
3, // llvm.hexagon.M2.mpyu.hh.s1
3, // llvm.hexagon.M2.mpyu.hl.s0
3, // llvm.hexagon.M2.mpyu.hl.s1
3, // llvm.hexagon.M2.mpyu.lh.s0
3, // llvm.hexagon.M2.mpyu.lh.s1
3, // llvm.hexagon.M2.mpyu.ll.s0
3, // llvm.hexagon.M2.mpyu.ll.s1
3, // llvm.hexagon.M2.mpyu.nac.hh.s0
3, // llvm.hexagon.M2.mpyu.nac.hh.s1
3, // llvm.hexagon.M2.mpyu.nac.hl.s0
3, // llvm.hexagon.M2.mpyu.nac.hl.s1
3, // llvm.hexagon.M2.mpyu.nac.lh.s0
3, // llvm.hexagon.M2.mpyu.nac.lh.s1
3, // llvm.hexagon.M2.mpyu.nac.ll.s0
3, // llvm.hexagon.M2.mpyu.nac.ll.s1
3, // llvm.hexagon.M2.mpyu.up
3, // llvm.hexagon.M2.mpyud.acc.hh.s0
3, // llvm.hexagon.M2.mpyud.acc.hh.s1
3, // llvm.hexagon.M2.mpyud.acc.hl.s0
3, // llvm.hexagon.M2.mpyud.acc.hl.s1
3, // llvm.hexagon.M2.mpyud.acc.lh.s0
3, // llvm.hexagon.M2.mpyud.acc.lh.s1
3, // llvm.hexagon.M2.mpyud.acc.ll.s0
3, // llvm.hexagon.M2.mpyud.acc.ll.s1
3, // llvm.hexagon.M2.mpyud.hh.s0
3, // llvm.hexagon.M2.mpyud.hh.s1
3, // llvm.hexagon.M2.mpyud.hl.s0
3, // llvm.hexagon.M2.mpyud.hl.s1
3, // llvm.hexagon.M2.mpyud.lh.s0
3, // llvm.hexagon.M2.mpyud.lh.s1
3, // llvm.hexagon.M2.mpyud.ll.s0
3, // llvm.hexagon.M2.mpyud.ll.s1
3, // llvm.hexagon.M2.mpyud.nac.hh.s0
3, // llvm.hexagon.M2.mpyud.nac.hh.s1
3, // llvm.hexagon.M2.mpyud.nac.hl.s0
3, // llvm.hexagon.M2.mpyud.nac.hl.s1
3, // llvm.hexagon.M2.mpyud.nac.lh.s0
3, // llvm.hexagon.M2.mpyud.nac.lh.s1
3, // llvm.hexagon.M2.mpyud.nac.ll.s0
3, // llvm.hexagon.M2.mpyud.nac.ll.s1
3, // llvm.hexagon.M2.mpyui
3, // llvm.hexagon.M2.nacci
3, // llvm.hexagon.M2.naccii
3, // llvm.hexagon.M2.subacc
3, // llvm.hexagon.M2.vabsdiffh
3, // llvm.hexagon.M2.vabsdiffw
3, // llvm.hexagon.M2.vcmac.s0.sat.i
3, // llvm.hexagon.M2.vcmac.s0.sat.r
3, // llvm.hexagon.M2.vcmpy.s0.sat.i
3, // llvm.hexagon.M2.vcmpy.s0.sat.r
3, // llvm.hexagon.M2.vcmpy.s1.sat.i
3, // llvm.hexagon.M2.vcmpy.s1.sat.r
3, // llvm.hexagon.M2.vdmacs.s0
3, // llvm.hexagon.M2.vdmacs.s1
3, // llvm.hexagon.M2.vdmpyrs.s0
3, // llvm.hexagon.M2.vdmpyrs.s1
3, // llvm.hexagon.M2.vdmpys.s0
3, // llvm.hexagon.M2.vdmpys.s1
3, // llvm.hexagon.M2.vmac2
3, // llvm.hexagon.M2.vmac2es
3, // llvm.hexagon.M2.vmac2es.s0
3, // llvm.hexagon.M2.vmac2es.s1
3, // llvm.hexagon.M2.vmac2s.s0
3, // llvm.hexagon.M2.vmac2s.s1
3, // llvm.hexagon.M2.vmpy2es.s0
3, // llvm.hexagon.M2.vmpy2es.s1
3, // llvm.hexagon.M2.vmpy2s.s0
3, // llvm.hexagon.M2.vmpy2s.s0pack
3, // llvm.hexagon.M2.vmpy2s.s1
3, // llvm.hexagon.M2.vmpy2s.s1pack
3, // llvm.hexagon.M2.vradduh
3, // llvm.hexagon.M2.vrcmaci.s0
3, // llvm.hexagon.M2.vrcmaci.s0c
3, // llvm.hexagon.M2.vrcmacr.s0
3, // llvm.hexagon.M2.vrcmacr.s0c
3, // llvm.hexagon.M2.vrcmpyi.s0
3, // llvm.hexagon.M2.vrcmpyi.s0c
3, // llvm.hexagon.M2.vrcmpyr.s0
3, // llvm.hexagon.M2.vrcmpyr.s0c
3, // llvm.hexagon.M2.vrcmpys.acc.s1
3, // llvm.hexagon.M2.vrcmpys.s1
3, // llvm.hexagon.M2.vrcmpys.s1rp
3, // llvm.hexagon.M2.vrmac.s0
3, // llvm.hexagon.M2.vrmpy.s0
3, // llvm.hexagon.M2.xor.xacc
3, // llvm.hexagon.M4.and.and
3, // llvm.hexagon.M4.and.andn
3, // llvm.hexagon.M4.and.or
3, // llvm.hexagon.M4.and.xor
3, // llvm.hexagon.M4.or.and
3, // llvm.hexagon.M4.or.andn
3, // llvm.hexagon.M4.or.or
3, // llvm.hexagon.M4.or.xor
3, // llvm.hexagon.M4.xor.and
3, // llvm.hexagon.M4.xor.andn
3, // llvm.hexagon.M4.xor.or
3, // llvm.hexagon.M4.xor.xacc
3, // llvm.hexagon.S2.addasl.rrri
3, // llvm.hexagon.S2.asl.i.p
3, // llvm.hexagon.S2.asl.i.p.acc
3, // llvm.hexagon.S2.asl.i.p.and
3, // llvm.hexagon.S2.asl.i.p.nac
3, // llvm.hexagon.S2.asl.i.p.or
3, // llvm.hexagon.S2.asl.i.p.xacc
3, // llvm.hexagon.S2.asl.i.r
3, // llvm.hexagon.S2.asl.i.r.acc
3, // llvm.hexagon.S2.asl.i.r.and
3, // llvm.hexagon.S2.asl.i.r.nac
3, // llvm.hexagon.S2.asl.i.r.or
3, // llvm.hexagon.S2.asl.i.r.sat
3, // llvm.hexagon.S2.asl.i.r.xacc
3, // llvm.hexagon.S2.asl.i.vh
3, // llvm.hexagon.S2.asl.i.vw
3, // llvm.hexagon.S2.asl.r.p
3, // llvm.hexagon.S2.asl.r.p.acc
3, // llvm.hexagon.S2.asl.r.p.and
3, // llvm.hexagon.S2.asl.r.p.nac
3, // llvm.hexagon.S2.asl.r.p.or
3, // llvm.hexagon.S2.asl.r.r
3, // llvm.hexagon.S2.asl.r.r.acc
3, // llvm.hexagon.S2.asl.r.r.and
3, // llvm.hexagon.S2.asl.r.r.nac
3, // llvm.hexagon.S2.asl.r.r.or
3, // llvm.hexagon.S2.asl.r.r.sat
3, // llvm.hexagon.S2.asl.r.vh
3, // llvm.hexagon.S2.asl.r.vw
3, // llvm.hexagon.S2.asr.i.p
3, // llvm.hexagon.S2.asr.i.p.acc
3, // llvm.hexagon.S2.asr.i.p.and
3, // llvm.hexagon.S2.asr.i.p.nac
3, // llvm.hexagon.S2.asr.i.p.or
3, // llvm.hexagon.S2.asr.i.r
3, // llvm.hexagon.S2.asr.i.r.acc
3, // llvm.hexagon.S2.asr.i.r.and
3, // llvm.hexagon.S2.asr.i.r.nac
3, // llvm.hexagon.S2.asr.i.r.or
3, // llvm.hexagon.S2.asr.i.r.rnd
3, // llvm.hexagon.S2.asr.i.r.rnd.goodsyntax
3, // llvm.hexagon.S2.asr.i.svw.trun
3, // llvm.hexagon.S2.asr.i.vh
3, // llvm.hexagon.S2.asr.i.vw
3, // llvm.hexagon.S2.asr.r.p
3, // llvm.hexagon.S2.asr.r.p.acc
3, // llvm.hexagon.S2.asr.r.p.and
3, // llvm.hexagon.S2.asr.r.p.nac
3, // llvm.hexagon.S2.asr.r.p.or
3, // llvm.hexagon.S2.asr.r.r
3, // llvm.hexagon.S2.asr.r.r.acc
3, // llvm.hexagon.S2.asr.r.r.and
3, // llvm.hexagon.S2.asr.r.r.nac
3, // llvm.hexagon.S2.asr.r.r.or
3, // llvm.hexagon.S2.asr.r.r.sat
3, // llvm.hexagon.S2.asr.r.svw.trun
3, // llvm.hexagon.S2.asr.r.vh
3, // llvm.hexagon.S2.asr.r.vw
3, // llvm.hexagon.S2.brev
3, // llvm.hexagon.S2.cl0
3, // llvm.hexagon.S2.cl0p
3, // llvm.hexagon.S2.cl1
3, // llvm.hexagon.S2.cl1p
3, // llvm.hexagon.S2.clb
3, // llvm.hexagon.S2.clbnorm
3, // llvm.hexagon.S2.clbp
3, // llvm.hexagon.S2.clrbit.i
3, // llvm.hexagon.S2.clrbit.r
3, // llvm.hexagon.S2.ct0
3, // llvm.hexagon.S2.ct1
3, // llvm.hexagon.S2.deinterleave
3, // llvm.hexagon.S2.extractu
3, // llvm.hexagon.S2.extractu.rp
3, // llvm.hexagon.S2.extractup
3, // llvm.hexagon.S2.extractup.rp
3, // llvm.hexagon.S2.insert
3, // llvm.hexagon.S2.insert.rp
3, // llvm.hexagon.S2.insertp
3, // llvm.hexagon.S2.insertp.rp
3, // llvm.hexagon.S2.interleave
3, // llvm.hexagon.S2.lfsp
3, // llvm.hexagon.S2.lsl.r.p
3, // llvm.hexagon.S2.lsl.r.p.acc
3, // llvm.hexagon.S2.lsl.r.p.and
3, // llvm.hexagon.S2.lsl.r.p.nac
3, // llvm.hexagon.S2.lsl.r.p.or
3, // llvm.hexagon.S2.lsl.r.r
3, // llvm.hexagon.S2.lsl.r.r.acc
3, // llvm.hexagon.S2.lsl.r.r.and
3, // llvm.hexagon.S2.lsl.r.r.nac
3, // llvm.hexagon.S2.lsl.r.r.or
3, // llvm.hexagon.S2.lsl.r.vh
3, // llvm.hexagon.S2.lsl.r.vw
3, // llvm.hexagon.S2.lsr.i.p
3, // llvm.hexagon.S2.lsr.i.p.acc
3, // llvm.hexagon.S2.lsr.i.p.and
3, // llvm.hexagon.S2.lsr.i.p.nac
3, // llvm.hexagon.S2.lsr.i.p.or
3, // llvm.hexagon.S2.lsr.i.p.xacc
3, // llvm.hexagon.S2.lsr.i.r
3, // llvm.hexagon.S2.lsr.i.r.acc
3, // llvm.hexagon.S2.lsr.i.r.and
3, // llvm.hexagon.S2.lsr.i.r.nac
3, // llvm.hexagon.S2.lsr.i.r.or
3, // llvm.hexagon.S2.lsr.i.r.xacc
3, // llvm.hexagon.S2.lsr.i.vh
3, // llvm.hexagon.S2.lsr.i.vw
3, // llvm.hexagon.S2.lsr.r.p
3, // llvm.hexagon.S2.lsr.r.p.acc
3, // llvm.hexagon.S2.lsr.r.p.and
3, // llvm.hexagon.S2.lsr.r.p.nac
3, // llvm.hexagon.S2.lsr.r.p.or
3, // llvm.hexagon.S2.lsr.r.r
3, // llvm.hexagon.S2.lsr.r.r.acc
3, // llvm.hexagon.S2.lsr.r.r.and
3, // llvm.hexagon.S2.lsr.r.r.nac
3, // llvm.hexagon.S2.lsr.r.r.or
3, // llvm.hexagon.S2.lsr.r.vh
3, // llvm.hexagon.S2.lsr.r.vw
3, // llvm.hexagon.S2.packhl
3, // llvm.hexagon.S2.parityp
3, // llvm.hexagon.S2.setbit.i
3, // llvm.hexagon.S2.setbit.r
3, // llvm.hexagon.S2.shuffeb
3, // llvm.hexagon.S2.shuffeh
3, // llvm.hexagon.S2.shuffob
3, // llvm.hexagon.S2.shuffoh
3, // llvm.hexagon.S2.svsathb
3, // llvm.hexagon.S2.svsathub
3, // llvm.hexagon.S2.tableidxb.goodsyntax
3, // llvm.hexagon.S2.tableidxd.goodsyntax
3, // llvm.hexagon.S2.tableidxh.goodsyntax
3, // llvm.hexagon.S2.tableidxw.goodsyntax
3, // llvm.hexagon.S2.togglebit.i
3, // llvm.hexagon.S2.togglebit.r
3, // llvm.hexagon.S2.tstbit.i
3, // llvm.hexagon.S2.tstbit.r
3, // llvm.hexagon.S2.valignib
3, // llvm.hexagon.S2.valignrb
3, // llvm.hexagon.S2.vcrotate
3, // llvm.hexagon.S2.vrndpackwh
3, // llvm.hexagon.S2.vrndpackwhs
3, // llvm.hexagon.S2.vsathb
3, // llvm.hexagon.S2.vsathb.nopack
3, // llvm.hexagon.S2.vsathub
3, // llvm.hexagon.S2.vsathub.nopack
3, // llvm.hexagon.S2.vsatwh
3, // llvm.hexagon.S2.vsatwh.nopack
3, // llvm.hexagon.S2.vsatwuh
3, // llvm.hexagon.S2.vsatwuh.nopack
3, // llvm.hexagon.S2.vsplatrb
3, // llvm.hexagon.S2.vsplatrh
3, // llvm.hexagon.S2.vspliceib
3, // llvm.hexagon.S2.vsplicerb
3, // llvm.hexagon.S2.vsxtbh
3, // llvm.hexagon.S2.vsxthw
3, // llvm.hexagon.S2.vtrunehb
3, // llvm.hexagon.S2.vtrunewh
3, // llvm.hexagon.S2.vtrunohb
3, // llvm.hexagon.S2.vtrunowh
3, // llvm.hexagon.S2.vzxtbh
3, // llvm.hexagon.S2.vzxthw
3, // llvm.hexagon.S4.addaddi
3, // llvm.hexagon.S4.andnp
3, // llvm.hexagon.S4.or.andi
3, // llvm.hexagon.S4.or.andix
3, // llvm.hexagon.S4.or.ori
3, // llvm.hexagon.S4.ornp
3, // llvm.hexagon.S4.subaddi
3, // llvm.hexagon.SI.to.SXTHI.asrh
5, // llvm.init.trampoline
6, // llvm.invariant.end
7, // llvm.invariant.start
7, // llvm.lifetime.end
7, // llvm.lifetime.start
2, // llvm.log
2, // llvm.log10
2, // llvm.log2
1, // llvm.longjmp
8, // llvm.memcpy
8, // llvm.memmove
5, // llvm.memset
3, // llvm.objectsize
1, // llvm.pcmarker
2, // llvm.pow
2, // llvm.powi
1, // llvm.ppc.altivec.dss
1, // llvm.ppc.altivec.dssall
1, // llvm.ppc.altivec.dst
1, // llvm.ppc.altivec.dstst
1, // llvm.ppc.altivec.dststt
1, // llvm.ppc.altivec.dstt
2, // llvm.ppc.altivec.lvebx
2, // llvm.ppc.altivec.lvehx
2, // llvm.ppc.altivec.lvewx
3, // llvm.ppc.altivec.lvsl
3, // llvm.ppc.altivec.lvsr
2, // llvm.ppc.altivec.lvx
2, // llvm.ppc.altivec.lvxl
2, // llvm.ppc.altivec.mfvscr
1, // llvm.ppc.altivec.mtvscr
1, // llvm.ppc.altivec.stvebx
1, // llvm.ppc.altivec.stvehx
1, // llvm.ppc.altivec.stvewx
1, // llvm.ppc.altivec.stvx
1, // llvm.ppc.altivec.stvxl
3, // llvm.ppc.altivec.vaddcuw
3, // llvm.ppc.altivec.vaddsbs
3, // llvm.ppc.altivec.vaddshs
3, // llvm.ppc.altivec.vaddsws
3, // llvm.ppc.altivec.vaddubs
3, // llvm.ppc.altivec.vadduhs
3, // llvm.ppc.altivec.vadduws
3, // llvm.ppc.altivec.vavgsb
3, // llvm.ppc.altivec.vavgsh
3, // llvm.ppc.altivec.vavgsw
3, // llvm.ppc.altivec.vavgub
3, // llvm.ppc.altivec.vavguh
3, // llvm.ppc.altivec.vavguw
3, // llvm.ppc.altivec.vcfsx
3, // llvm.ppc.altivec.vcfux
3, // llvm.ppc.altivec.vcmpbfp
3, // llvm.ppc.altivec.vcmpbfp.p
3, // llvm.ppc.altivec.vcmpeqfp
3, // llvm.ppc.altivec.vcmpeqfp.p
3, // llvm.ppc.altivec.vcmpequb
3, // llvm.ppc.altivec.vcmpequb.p
3, // llvm.ppc.altivec.vcmpequh
3, // llvm.ppc.altivec.vcmpequh.p
3, // llvm.ppc.altivec.vcmpequw
3, // llvm.ppc.altivec.vcmpequw.p
3, // llvm.ppc.altivec.vcmpgefp
3, // llvm.ppc.altivec.vcmpgefp.p
3, // llvm.ppc.altivec.vcmpgtfp
3, // llvm.ppc.altivec.vcmpgtfp.p
3, // llvm.ppc.altivec.vcmpgtsb
3, // llvm.ppc.altivec.vcmpgtsb.p
3, // llvm.ppc.altivec.vcmpgtsh
3, // llvm.ppc.altivec.vcmpgtsh.p
3, // llvm.ppc.altivec.vcmpgtsw
3, // llvm.ppc.altivec.vcmpgtsw.p
3, // llvm.ppc.altivec.vcmpgtub
3, // llvm.ppc.altivec.vcmpgtub.p
3, // llvm.ppc.altivec.vcmpgtuh
3, // llvm.ppc.altivec.vcmpgtuh.p
3, // llvm.ppc.altivec.vcmpgtuw
3, // llvm.ppc.altivec.vcmpgtuw.p
3, // llvm.ppc.altivec.vctsxs
3, // llvm.ppc.altivec.vctuxs
3, // llvm.ppc.altivec.vexptefp
3, // llvm.ppc.altivec.vlogefp
3, // llvm.ppc.altivec.vmaddfp
3, // llvm.ppc.altivec.vmaxfp
3, // llvm.ppc.altivec.vmaxsb
3, // llvm.ppc.altivec.vmaxsh
3, // llvm.ppc.altivec.vmaxsw
3, // llvm.ppc.altivec.vmaxub
3, // llvm.ppc.altivec.vmaxuh
3, // llvm.ppc.altivec.vmaxuw
3, // llvm.ppc.altivec.vmhaddshs
3, // llvm.ppc.altivec.vmhraddshs
3, // llvm.ppc.altivec.vminfp
3, // llvm.ppc.altivec.vminsb
3, // llvm.ppc.altivec.vminsh
3, // llvm.ppc.altivec.vminsw
3, // llvm.ppc.altivec.vminub
3, // llvm.ppc.altivec.vminuh
3, // llvm.ppc.altivec.vminuw
3, // llvm.ppc.altivec.vmladduhm
3, // llvm.ppc.altivec.vmsummbm
3, // llvm.ppc.altivec.vmsumshm
3, // llvm.ppc.altivec.vmsumshs
3, // llvm.ppc.altivec.vmsumubm
3, // llvm.ppc.altivec.vmsumuhm
3, // llvm.ppc.altivec.vmsumuhs
3, // llvm.ppc.altivec.vmulesb
3, // llvm.ppc.altivec.vmulesh
3, // llvm.ppc.altivec.vmuleub
3, // llvm.ppc.altivec.vmuleuh
3, // llvm.ppc.altivec.vmulosb
3, // llvm.ppc.altivec.vmulosh
3, // llvm.ppc.altivec.vmuloub
3, // llvm.ppc.altivec.vmulouh
3, // llvm.ppc.altivec.vnmsubfp
3, // llvm.ppc.altivec.vperm
3, // llvm.ppc.altivec.vpkpx
3, // llvm.ppc.altivec.vpkshss
3, // llvm.ppc.altivec.vpkshus
3, // llvm.ppc.altivec.vpkswss
3, // llvm.ppc.altivec.vpkswus
3, // llvm.ppc.altivec.vpkuhus
3, // llvm.ppc.altivec.vpkuwus
3, // llvm.ppc.altivec.vrefp
3, // llvm.ppc.altivec.vrfim
3, // llvm.ppc.altivec.vrfin
3, // llvm.ppc.altivec.vrfip
3, // llvm.ppc.altivec.vrfiz
3, // llvm.ppc.altivec.vrlb
3, // llvm.ppc.altivec.vrlh
3, // llvm.ppc.altivec.vrlw
3, // llvm.ppc.altivec.vrsqrtefp
3, // llvm.ppc.altivec.vsel
3, // llvm.ppc.altivec.vsl
3, // llvm.ppc.altivec.vslb
3, // llvm.ppc.altivec.vslh
3, // llvm.ppc.altivec.vslo
3, // llvm.ppc.altivec.vslw
3, // llvm.ppc.altivec.vsr
3, // llvm.ppc.altivec.vsrab
3, // llvm.ppc.altivec.vsrah
3, // llvm.ppc.altivec.vsraw
3, // llvm.ppc.altivec.vsrb
3, // llvm.ppc.altivec.vsrh
3, // llvm.ppc.altivec.vsro
3, // llvm.ppc.altivec.vsrw
3, // llvm.ppc.altivec.vsubcuw
3, // llvm.ppc.altivec.vsubsbs
3, // llvm.ppc.altivec.vsubshs
3, // llvm.ppc.altivec.vsubsws
3, // llvm.ppc.altivec.vsububs
3, // llvm.ppc.altivec.vsubuhs
3, // llvm.ppc.altivec.vsubuws
3, // llvm.ppc.altivec.vsum2sws
3, // llvm.ppc.altivec.vsum4sbs
3, // llvm.ppc.altivec.vsum4shs
3, // llvm.ppc.altivec.vsum4ubs
3, // llvm.ppc.altivec.vsumsws
3, // llvm.ppc.altivec.vupkhpx
3, // llvm.ppc.altivec.vupkhsb
3, // llvm.ppc.altivec.vupkhsh
3, // llvm.ppc.altivec.vupklpx
3, // llvm.ppc.altivec.vupklsb
3, // llvm.ppc.altivec.vupklsh
1, // llvm.ppc.dcba
1, // llvm.ppc.dcbf
1, // llvm.ppc.dcbi
1, // llvm.ppc.dcbst
1, // llvm.ppc.dcbt
1, // llvm.ppc.dcbtst
1, // llvm.ppc.dcbz
1, // llvm.ppc.dcbzl
1, // llvm.ppc.sync
5, // llvm.prefetch
1, // llvm.ptr.annotation
1, // llvm.ptx.bar.sync
3, // llvm.ptx.read.clock
3, // llvm.ptx.read.clock64
3, // llvm.ptx.read.ctaid.w
3, // llvm.ptx.read.ctaid.x
3, // llvm.ptx.read.ctaid.y
3, // llvm.ptx.read.ctaid.z
3, // llvm.ptx.read.gridid
3, // llvm.ptx.read.laneid
3, // llvm.ptx.read.lanemask.eq
3, // llvm.ptx.read.lanemask.ge
3, // llvm.ptx.read.lanemask.gt
3, // llvm.ptx.read.lanemask.le
3, // llvm.ptx.read.lanemask.lt
3, // llvm.ptx.read.nctaid.w
3, // llvm.ptx.read.nctaid.x
3, // llvm.ptx.read.nctaid.y
3, // llvm.ptx.read.nctaid.z
3, // llvm.ptx.read.nsmid
3, // llvm.ptx.read.ntid.w
3, // llvm.ptx.read.ntid.x
3, // llvm.ptx.read.ntid.y
3, // llvm.ptx.read.ntid.z
3, // llvm.ptx.read.nwarpid
3, // llvm.ptx.read.pm0
3, // llvm.ptx.read.pm1
3, // llvm.ptx.read.pm2
3, // llvm.ptx.read.pm3
3, // llvm.ptx.read.smid
3, // llvm.ptx.read.tid.w
3, // llvm.ptx.read.tid.x
3, // llvm.ptx.read.tid.y
3, // llvm.ptx.read.tid.z
3, // llvm.ptx.read.warpid
1, // llvm.readcyclecounter
3, // llvm.returnaddress
3, // llvm.sadd.with.overflow
1, // llvm.setjmp
1, // llvm.siglongjmp
1, // llvm.sigsetjmp
2, // llvm.sin
3, // llvm.smul.with.overflow
3, // llvm.spu.si.a
3, // llvm.spu.si.addx
3, // llvm.spu.si.ah
3, // llvm.spu.si.ahi
3, // llvm.spu.si.ai
3, // llvm.spu.si.and
3, // llvm.spu.si.andbi
3, // llvm.spu.si.andc
3, // llvm.spu.si.andhi
3, // llvm.spu.si.andi
3, // llvm.spu.si.bg
3, // llvm.spu.si.bgx
3, // llvm.spu.si.ceq
3, // llvm.spu.si.ceqb
3, // llvm.spu.si.ceqbi
3, // llvm.spu.si.ceqh
3, // llvm.spu.si.ceqhi
3, // llvm.spu.si.ceqi
3, // llvm.spu.si.cg
3, // llvm.spu.si.cgt
3, // llvm.spu.si.cgtb
3, // llvm.spu.si.cgtbi
3, // llvm.spu.si.cgth
3, // llvm.spu.si.cgthi
3, // llvm.spu.si.cgti
3, // llvm.spu.si.cgx
3, // llvm.spu.si.clgt
3, // llvm.spu.si.clgtb
3, // llvm.spu.si.clgtbi
3, // llvm.spu.si.clgth
3, // llvm.spu.si.clgthi
3, // llvm.spu.si.clgti
3, // llvm.spu.si.dfa
3, // llvm.spu.si.dfm
3, // llvm.spu.si.dfma
3, // llvm.spu.si.dfms
3, // llvm.spu.si.dfnma
3, // llvm.spu.si.dfnms
3, // llvm.spu.si.dfs
3, // llvm.spu.si.fa
3, // llvm.spu.si.fceq
3, // llvm.spu.si.fcgt
3, // llvm.spu.si.fcmeq
3, // llvm.spu.si.fcmgt
3, // llvm.spu.si.fm
3, // llvm.spu.si.fma
3, // llvm.spu.si.fms
3, // llvm.spu.si.fnms
3, // llvm.spu.si.fs
3, // llvm.spu.si.fsmbi
3, // llvm.spu.si.mpy
3, // llvm.spu.si.mpya
3, // llvm.spu.si.mpyh
3, // llvm.spu.si.mpyhh
3, // llvm.spu.si.mpyhha
3, // llvm.spu.si.mpyhhau
3, // llvm.spu.si.mpyhhu
3, // llvm.spu.si.mpyi
3, // llvm.spu.si.mpys
3, // llvm.spu.si.mpyu
3, // llvm.spu.si.mpyui
3, // llvm.spu.si.nand
3, // llvm.spu.si.nor
3, // llvm.spu.si.or
3, // llvm.spu.si.orbi
3, // llvm.spu.si.orc
3, // llvm.spu.si.orhi
3, // llvm.spu.si.ori
3, // llvm.spu.si.sf
3, // llvm.spu.si.sfh
3, // llvm.spu.si.sfhi
3, // llvm.spu.si.sfi
3, // llvm.spu.si.sfx
3, // llvm.spu.si.shli
3, // llvm.spu.si.shlqbi
3, // llvm.spu.si.shlqbii
3, // llvm.spu.si.shlqby
3, // llvm.spu.si.shlqbyi
3, // llvm.spu.si.xor
3, // llvm.spu.si.xorbi
3, // llvm.spu.si.xorhi
3, // llvm.spu.si.xori
2, // llvm.sqrt
3, // llvm.ssub.with.overflow
1, // llvm.stackprotector
1, // llvm.stackrestore
1, // llvm.stacksave
1, // llvm.rkqc.toffoli
1, // llvm.trap
3, // llvm.uadd.with.overflow
3, // llvm.umul.with.overflow
3, // llvm.usub.with.overflow
1, // llvm.va_copy
1, // llvm.va_end
1, // llvm.var.annotation
1, // llvm.va_start
3, // llvm.x86.3dnow.pavgusb
3, // llvm.x86.3dnow.pf2id
3, // llvm.x86.3dnow.pfacc
3, // llvm.x86.3dnow.pfadd
3, // llvm.x86.3dnow.pfcmpeq
3, // llvm.x86.3dnow.pfcmpge
3, // llvm.x86.3dnow.pfcmpgt
3, // llvm.x86.3dnow.pfmax
3, // llvm.x86.3dnow.pfmin
3, // llvm.x86.3dnow.pfmul
3, // llvm.x86.3dnow.pfrcp
3, // llvm.x86.3dnow.pfrcpit1
3, // llvm.x86.3dnow.pfrcpit2
3, // llvm.x86.3dnow.pfrsqit1
3, // llvm.x86.3dnow.pfrsqrt
3, // llvm.x86.3dnow.pfsub
3, // llvm.x86.3dnow.pfsubr
3, // llvm.x86.3dnow.pi2fd
3, // llvm.x86.3dnow.pmulhrw
3, // llvm.x86.3dnowa.pf2iw
3, // llvm.x86.3dnowa.pfnacc
3, // llvm.x86.3dnowa.pfpnacc
3, // llvm.x86.3dnowa.pi2fw
3, // llvm.x86.3dnowa.pswapd
3, // llvm.x86.aesni.aesdec
3, // llvm.x86.aesni.aesdeclast
3, // llvm.x86.aesni.aesenc
3, // llvm.x86.aesni.aesenclast
3, // llvm.x86.aesni.aesimc
3, // llvm.x86.aesni.aeskeygenassist
2, // llvm.x86.avx2.maskload.d
2, // llvm.x86.avx2.maskload.d.256
2, // llvm.x86.avx2.maskload.q
2, // llvm.x86.avx2.maskload.q.256
1, // llvm.x86.avx2.maskstore.d
1, // llvm.x86.avx2.maskstore.d.256
1, // llvm.x86.avx2.maskstore.q
1, // llvm.x86.avx2.maskstore.q.256
2, // llvm.x86.avx2.movntdqa
3, // llvm.x86.avx2.mpsadbw
3, // llvm.x86.avx2.pabs.b
3, // llvm.x86.avx2.pabs.d
3, // llvm.x86.avx2.pabs.w
3, // llvm.x86.avx2.packssdw
3, // llvm.x86.avx2.packsswb
3, // llvm.x86.avx2.packusdw
3, // llvm.x86.avx2.packuswb
3, // llvm.x86.avx2.padds.b
3, // llvm.x86.avx2.padds.w
3, // llvm.x86.avx2.paddus.b
3, // llvm.x86.avx2.paddus.w
3, // llvm.x86.avx2.pavg.b
3, // llvm.x86.avx2.pavg.w
3, // llvm.x86.avx2.pblendd.128
3, // llvm.x86.avx2.pblendd.256
3, // llvm.x86.avx2.pblendvb
3, // llvm.x86.avx2.pblendw
3, // llvm.x86.avx2.pbroadcastb.128
3, // llvm.x86.avx2.pbroadcastb.256
3, // llvm.x86.avx2.pbroadcastd.128
3, // llvm.x86.avx2.pbroadcastd.256
3, // llvm.x86.avx2.pbroadcastq.128
3, // llvm.x86.avx2.pbroadcastq.256
3, // llvm.x86.avx2.pbroadcastw.128
3, // llvm.x86.avx2.pbroadcastw.256
3, // llvm.x86.avx2.permd
3, // llvm.x86.avx2.permps
3, // llvm.x86.avx2.phadd.d
3, // llvm.x86.avx2.phadd.sw
3, // llvm.x86.avx2.phadd.w
3, // llvm.x86.avx2.phsub.d
3, // llvm.x86.avx2.phsub.sw
3, // llvm.x86.avx2.phsub.w
3, // llvm.x86.avx2.pmadd.ub.sw
3, // llvm.x86.avx2.pmadd.wd
3, // llvm.x86.avx2.pmaxs.b
3, // llvm.x86.avx2.pmaxs.d
3, // llvm.x86.avx2.pmaxs.w
3, // llvm.x86.avx2.pmaxu.b
3, // llvm.x86.avx2.pmaxu.d
3, // llvm.x86.avx2.pmaxu.w
3, // llvm.x86.avx2.pmins.b
3, // llvm.x86.avx2.pmins.d
3, // llvm.x86.avx2.pmins.w
3, // llvm.x86.avx2.pminu.b
3, // llvm.x86.avx2.pminu.d
3, // llvm.x86.avx2.pminu.w
3, // llvm.x86.avx2.pmovmskb
3, // llvm.x86.avx2.pmovsxbd
3, // llvm.x86.avx2.pmovsxbq
3, // llvm.x86.avx2.pmovsxbw
3, // llvm.x86.avx2.pmovsxdq
3, // llvm.x86.avx2.pmovsxwd
3, // llvm.x86.avx2.pmovsxwq
3, // llvm.x86.avx2.pmovzxbd
3, // llvm.x86.avx2.pmovzxbq
3, // llvm.x86.avx2.pmovzxbw
3, // llvm.x86.avx2.pmovzxdq
3, // llvm.x86.avx2.pmovzxwd
3, // llvm.x86.avx2.pmovzxwq
3, // llvm.x86.avx2.pmul.dq
3, // llvm.x86.avx2.pmul.hr.sw
3, // llvm.x86.avx2.pmulh.w
3, // llvm.x86.avx2.pmulhu.w
3, // llvm.x86.avx2.pmulu.dq
3, // llvm.x86.avx2.psad.bw
3, // llvm.x86.avx2.pshuf.b
3, // llvm.x86.avx2.psign.b
3, // llvm.x86.avx2.psign.d
3, // llvm.x86.avx2.psign.w
3, // llvm.x86.avx2.psll.d
3, // llvm.x86.avx2.psll.dq
3, // llvm.x86.avx2.psll.dq.bs
3, // llvm.x86.avx2.psll.q
3, // llvm.x86.avx2.psll.w
3, // llvm.x86.avx2.pslli.d
3, // llvm.x86.avx2.pslli.q
3, // llvm.x86.avx2.pslli.w
3, // llvm.x86.avx2.psllv.d
3, // llvm.x86.avx2.psllv.d.256
3, // llvm.x86.avx2.psllv.q
3, // llvm.x86.avx2.psllv.q.256
3, // llvm.x86.avx2.psra.d
3, // llvm.x86.avx2.psra.w
3, // llvm.x86.avx2.psrai.d
3, // llvm.x86.avx2.psrai.w
3, // llvm.x86.avx2.psrav.d
3, // llvm.x86.avx2.psrav.d.256
3, // llvm.x86.avx2.psrl.d
3, // llvm.x86.avx2.psrl.dq
3, // llvm.x86.avx2.psrl.dq.bs
3, // llvm.x86.avx2.psrl.q
3, // llvm.x86.avx2.psrl.w
3, // llvm.x86.avx2.psrli.d
3, // llvm.x86.avx2.psrli.q
3, // llvm.x86.avx2.psrli.w
3, // llvm.x86.avx2.psrlv.d
3, // llvm.x86.avx2.psrlv.d.256
3, // llvm.x86.avx2.psrlv.q
3, // llvm.x86.avx2.psrlv.q.256
3, // llvm.x86.avx2.psubs.b
3, // llvm.x86.avx2.psubs.w
3, // llvm.x86.avx2.psubus.b
3, // llvm.x86.avx2.psubus.w
3, // llvm.x86.avx2.vbroadcast.sd.pd.256
3, // llvm.x86.avx2.vbroadcast.ss.ps
3, // llvm.x86.avx2.vbroadcast.ss.ps.256
2, // llvm.x86.avx2.vbroadcasti128
3, // llvm.x86.avx2.vextracti128
3, // llvm.x86.avx2.vinserti128
3, // llvm.x86.avx2.vperm2i128
3, // llvm.x86.avx.addsub.pd.256
3, // llvm.x86.avx.addsub.ps.256
3, // llvm.x86.avx.blend.pd.256
3, // llvm.x86.avx.blend.ps.256
3, // llvm.x86.avx.blendv.pd.256
3, // llvm.x86.avx.blendv.ps.256
3, // llvm.x86.avx.cmp.pd.256
3, // llvm.x86.avx.cmp.ps.256
3, // llvm.x86.avx.cvt.pd2.ps.256
3, // llvm.x86.avx.cvt.pd2dq.256
3, // llvm.x86.avx.cvt.ps2.pd.256
3, // llvm.x86.avx.cvt.ps2dq.256
3, // llvm.x86.avx.cvtdq2.pd.256
3, // llvm.x86.avx.cvtdq2.ps.256
3, // llvm.x86.avx.cvtt.pd2dq.256
3, // llvm.x86.avx.cvtt.ps2dq.256
3, // llvm.x86.avx.dp.ps.256
3, // llvm.x86.avx.hadd.pd.256
3, // llvm.x86.avx.hadd.ps.256
3, // llvm.x86.avx.hsub.pd.256
3, // llvm.x86.avx.hsub.ps.256
2, // llvm.x86.avx.ldu.dq.256
2, // llvm.x86.avx.maskload.pd
2, // llvm.x86.avx.maskload.pd.256
2, // llvm.x86.avx.maskload.ps
2, // llvm.x86.avx.maskload.ps.256
1, // llvm.x86.avx.maskstore.pd
1, // llvm.x86.avx.maskstore.pd.256
1, // llvm.x86.avx.maskstore.ps
1, // llvm.x86.avx.maskstore.ps.256
3, // llvm.x86.avx.max.pd.256
3, // llvm.x86.avx.max.ps.256
3, // llvm.x86.avx.min.pd.256
3, // llvm.x86.avx.min.ps.256
3, // llvm.x86.avx.movmsk.pd.256
3, // llvm.x86.avx.movmsk.ps.256
1, // llvm.x86.avx.movnt.dq.256
1, // llvm.x86.avx.movnt.pd.256
1, // llvm.x86.avx.movnt.ps.256
3, // llvm.x86.avx.ptestc.256
3, // llvm.x86.avx.ptestnzc.256
3, // llvm.x86.avx.ptestz.256
3, // llvm.x86.avx.rcp.ps.256
3, // llvm.x86.avx.round.pd.256
3, // llvm.x86.avx.round.ps.256
3, // llvm.x86.avx.rsqrt.ps.256
3, // llvm.x86.avx.sqrt.pd.256
3, // llvm.x86.avx.sqrt.ps.256
1, // llvm.x86.avx.storeu.dq.256
1, // llvm.x86.avx.storeu.pd.256
1, // llvm.x86.avx.storeu.ps.256
2, // llvm.x86.avx.vbroadcast.sd.256
2, // llvm.x86.avx.vbroadcast.ss
2, // llvm.x86.avx.vbroadcast.ss.256
2, // llvm.x86.avx.vbroadcastf128.pd.256
2, // llvm.x86.avx.vbroadcastf128.ps.256
3, // llvm.x86.avx.vextractf128.pd.256
3, // llvm.x86.avx.vextractf128.ps.256
3, // llvm.x86.avx.vextractf128.si.256
3, // llvm.x86.avx.vinsertf128.pd.256
3, // llvm.x86.avx.vinsertf128.ps.256
3, // llvm.x86.avx.vinsertf128.si.256
3, // llvm.x86.avx.vperm2f128.pd.256
3, // llvm.x86.avx.vperm2f128.ps.256
3, // llvm.x86.avx.vperm2f128.si.256
3, // llvm.x86.avx.vpermilvar.pd
3, // llvm.x86.avx.vpermilvar.pd.256
3, // llvm.x86.avx.vpermilvar.ps
3, // llvm.x86.avx.vpermilvar.ps.256
3, // llvm.x86.avx.vtestc.pd
3, // llvm.x86.avx.vtestc.pd.256
3, // llvm.x86.avx.vtestc.ps
3, // llvm.x86.avx.vtestc.ps.256
3, // llvm.x86.avx.vtestnzc.pd
3, // llvm.x86.avx.vtestnzc.pd.256
3, // llvm.x86.avx.vtestnzc.ps
3, // llvm.x86.avx.vtestnzc.ps.256
3, // llvm.x86.avx.vtestz.pd
3, // llvm.x86.avx.vtestz.pd.256
3, // llvm.x86.avx.vtestz.ps
3, // llvm.x86.avx.vtestz.ps.256
1, // llvm.x86.avx.vzeroall
1, // llvm.x86.avx.vzeroupper
3, // llvm.x86.bmi.bextr.32
3, // llvm.x86.bmi.bextr.64
3, // llvm.x86.bmi.bzhi.32
3, // llvm.x86.bmi.bzhi.64
3, // llvm.x86.bmi.pdep.32
3, // llvm.x86.bmi.pdep.64
3, // llvm.x86.bmi.pext.32
3, // llvm.x86.bmi.pext.64
3, // llvm.x86.fma4.vfmadd.pd
3, // llvm.x86.fma4.vfmadd.pd.256
3, // llvm.x86.fma4.vfmadd.ps
3, // llvm.x86.fma4.vfmadd.ps.256
3, // llvm.x86.fma4.vfmadd.sd
3, // llvm.x86.fma4.vfmadd.ss
3, // llvm.x86.fma4.vfmaddsub.pd
3, // llvm.x86.fma4.vfmaddsub.pd.256
3, // llvm.x86.fma4.vfmaddsub.ps
3, // llvm.x86.fma4.vfmaddsub.ps.256
3, // llvm.x86.fma4.vfmsub.pd
3, // llvm.x86.fma4.vfmsub.pd.256
3, // llvm.x86.fma4.vfmsub.ps
3, // llvm.x86.fma4.vfmsub.ps.256
3, // llvm.x86.fma4.vfmsub.sd
3, // llvm.x86.fma4.vfmsub.ss
3, // llvm.x86.fma4.vfmsubadd.pd
3, // llvm.x86.fma4.vfmsubadd.pd.256
3, // llvm.x86.fma4.vfmsubadd.ps
3, // llvm.x86.fma4.vfmsubadd.ps.256
3, // llvm.x86.fma4.vfnmadd.pd
3, // llvm.x86.fma4.vfnmadd.pd.256
3, // llvm.x86.fma4.vfnmadd.ps
3, // llvm.x86.fma4.vfnmadd.ps.256
3, // llvm.x86.fma4.vfnmadd.sd
3, // llvm.x86.fma4.vfnmadd.ss
3, // llvm.x86.fma4.vfnmsub.pd
3, // llvm.x86.fma4.vfnmsub.pd.256
3, // llvm.x86.fma4.vfnmsub.ps
3, // llvm.x86.fma4.vfnmsub.ps.256
3, // llvm.x86.fma4.vfnmsub.sd
3, // llvm.x86.fma4.vfnmsub.ss
1, // llvm.x86.int
1, // llvm.x86.mmx.emms
1, // llvm.x86.mmx.femms
1, // llvm.x86.mmx.maskmovq
1, // llvm.x86.mmx.movnt.dq
3, // llvm.x86.mmx.packssdw
3, // llvm.x86.mmx.packsswb
3, // llvm.x86.mmx.packuswb
3, // llvm.x86.mmx.padd.b
3, // llvm.x86.mmx.padd.d
3, // llvm.x86.mmx.padd.q
3, // llvm.x86.mmx.padd.w
3, // llvm.x86.mmx.padds.b
3, // llvm.x86.mmx.padds.w
3, // llvm.x86.mmx.paddus.b
3, // llvm.x86.mmx.paddus.w
3, // llvm.x86.mmx.palignr.b
3, // llvm.x86.mmx.pand
3, // llvm.x86.mmx.pandn
3, // llvm.x86.mmx.pavg.b
3, // llvm.x86.mmx.pavg.w
3, // llvm.x86.mmx.pcmpeq.b
3, // llvm.x86.mmx.pcmpeq.d
3, // llvm.x86.mmx.pcmpeq.w
3, // llvm.x86.mmx.pcmpgt.b
3, // llvm.x86.mmx.pcmpgt.d
3, // llvm.x86.mmx.pcmpgt.w
3, // llvm.x86.mmx.pextr.w
3, // llvm.x86.mmx.pinsr.w
3, // llvm.x86.mmx.pmadd.wd
3, // llvm.x86.mmx.pmaxs.w
3, // llvm.x86.mmx.pmaxu.b
3, // llvm.x86.mmx.pmins.w
3, // llvm.x86.mmx.pminu.b
3, // llvm.x86.mmx.pmovmskb
3, // llvm.x86.mmx.pmulh.w
3, // llvm.x86.mmx.pmulhu.w
3, // llvm.x86.mmx.pmull.w
3, // llvm.x86.mmx.pmulu.dq
3, // llvm.x86.mmx.por
3, // llvm.x86.mmx.psad.bw
3, // llvm.x86.mmx.psll.d
3, // llvm.x86.mmx.psll.q
3, // llvm.x86.mmx.psll.w
3, // llvm.x86.mmx.pslli.d
3, // llvm.x86.mmx.pslli.q
3, // llvm.x86.mmx.pslli.w
3, // llvm.x86.mmx.psra.d
3, // llvm.x86.mmx.psra.w
3, // llvm.x86.mmx.psrai.d
3, // llvm.x86.mmx.psrai.w
3, // llvm.x86.mmx.psrl.d
3, // llvm.x86.mmx.psrl.q
3, // llvm.x86.mmx.psrl.w
3, // llvm.x86.mmx.psrli.d
3, // llvm.x86.mmx.psrli.q
3, // llvm.x86.mmx.psrli.w
3, // llvm.x86.mmx.psub.b
3, // llvm.x86.mmx.psub.d
3, // llvm.x86.mmx.psub.q
3, // llvm.x86.mmx.psub.w
3, // llvm.x86.mmx.psubs.b
3, // llvm.x86.mmx.psubs.w
3, // llvm.x86.mmx.psubus.b
3, // llvm.x86.mmx.psubus.w
3, // llvm.x86.mmx.punpckhbw
3, // llvm.x86.mmx.punpckhdq
3, // llvm.x86.mmx.punpckhwd
3, // llvm.x86.mmx.punpcklbw
3, // llvm.x86.mmx.punpckldq
3, // llvm.x86.mmx.punpcklwd
3, // llvm.x86.mmx.pxor
1, // llvm.x86.rdfsbase.32
1, // llvm.x86.rdfsbase.64
1, // llvm.x86.rdgsbase.32
1, // llvm.x86.rdgsbase.64
3, // llvm.x86.sse2.add.sd
1, // llvm.x86.sse2.clflush
3, // llvm.x86.sse2.cmp.pd
3, // llvm.x86.sse2.cmp.sd
3, // llvm.x86.sse2.comieq.sd
3, // llvm.x86.sse2.comige.sd
3, // llvm.x86.sse2.comigt.sd
3, // llvm.x86.sse2.comile.sd
3, // llvm.x86.sse2.comilt.sd
3, // llvm.x86.sse2.comineq.sd
3, // llvm.x86.sse2.cvtdq2pd
3, // llvm.x86.sse2.cvtdq2ps
3, // llvm.x86.sse2.cvtpd2dq
3, // llvm.x86.sse2.cvtpd2ps
3, // llvm.x86.sse2.cvtps2dq
3, // llvm.x86.sse2.cvtps2pd
3, // llvm.x86.sse2.cvtsd2si
3, // llvm.x86.sse2.cvtsd2si64
3, // llvm.x86.sse2.cvtsd2ss
3, // llvm.x86.sse2.cvtsi2sd
3, // llvm.x86.sse2.cvtsi642sd
3, // llvm.x86.sse2.cvtss2sd
3, // llvm.x86.sse2.cvttpd2dq
3, // llvm.x86.sse2.cvttps2dq
3, // llvm.x86.sse2.cvttsd2si
3, // llvm.x86.sse2.cvttsd2si64
3, // llvm.x86.sse2.div.sd
1, // llvm.x86.sse2.lfence
1, // llvm.x86.sse2.maskmov.dqu
3, // llvm.x86.sse2.max.pd
3, // llvm.x86.sse2.max.sd
1, // llvm.x86.sse2.mfence
3, // llvm.x86.sse2.min.pd
3, // llvm.x86.sse2.min.sd
3, // llvm.x86.sse2.movmsk.pd
3, // llvm.x86.sse2.mul.sd
3, // llvm.x86.sse2.packssdw.128
3, // llvm.x86.sse2.packsswb.128
3, // llvm.x86.sse2.packuswb.128
3, // llvm.x86.sse2.padds.b
3, // llvm.x86.sse2.padds.w
3, // llvm.x86.sse2.paddus.b
3, // llvm.x86.sse2.paddus.w
3, // llvm.x86.sse2.pavg.b
3, // llvm.x86.sse2.pavg.w
3, // llvm.x86.sse2.pmadd.wd
3, // llvm.x86.sse2.pmaxs.w
3, // llvm.x86.sse2.pmaxu.b
3, // llvm.x86.sse2.pmins.w
3, // llvm.x86.sse2.pminu.b
3, // llvm.x86.sse2.pmovmskb.128
3, // llvm.x86.sse2.pmulh.w
3, // llvm.x86.sse2.pmulhu.w
3, // llvm.x86.sse2.pmulu.dq
3, // llvm.x86.sse2.psad.bw
3, // llvm.x86.sse2.psll.d
3, // llvm.x86.sse2.psll.dq
3, // llvm.x86.sse2.psll.dq.bs
3, // llvm.x86.sse2.psll.q
3, // llvm.x86.sse2.psll.w
3, // llvm.x86.sse2.pslli.d
3, // llvm.x86.sse2.pslli.q
3, // llvm.x86.sse2.pslli.w
3, // llvm.x86.sse2.psra.d
3, // llvm.x86.sse2.psra.w
3, // llvm.x86.sse2.psrai.d
3, // llvm.x86.sse2.psrai.w
3, // llvm.x86.sse2.psrl.d
3, // llvm.x86.sse2.psrl.dq
3, // llvm.x86.sse2.psrl.dq.bs
3, // llvm.x86.sse2.psrl.q
3, // llvm.x86.sse2.psrl.w
3, // llvm.x86.sse2.psrli.d
3, // llvm.x86.sse2.psrli.q
3, // llvm.x86.sse2.psrli.w
3, // llvm.x86.sse2.psubs.b
3, // llvm.x86.sse2.psubs.w
3, // llvm.x86.sse2.psubus.b
3, // llvm.x86.sse2.psubus.w
3, // llvm.x86.sse2.sqrt.pd
3, // llvm.x86.sse2.sqrt.sd
1, // llvm.x86.sse2.storel.dq
1, // llvm.x86.sse2.storeu.dq
1, // llvm.x86.sse2.storeu.pd
3, // llvm.x86.sse2.sub.sd
3, // llvm.x86.sse2.ucomieq.sd
3, // llvm.x86.sse2.ucomige.sd
3, // llvm.x86.sse2.ucomigt.sd
3, // llvm.x86.sse2.ucomile.sd
3, // llvm.x86.sse2.ucomilt.sd
3, // llvm.x86.sse2.ucomineq.sd
3, // llvm.x86.sse3.addsub.pd
3, // llvm.x86.sse3.addsub.ps
3, // llvm.x86.sse3.hadd.pd
3, // llvm.x86.sse3.hadd.ps
3, // llvm.x86.sse3.hsub.pd
3, // llvm.x86.sse3.hsub.ps
2, // llvm.x86.sse3.ldu.dq
1, // llvm.x86.sse3.monitor
1, // llvm.x86.sse3.mwait
3, // llvm.x86.sse41.blendpd
3, // llvm.x86.sse41.blendps
3, // llvm.x86.sse41.blendvpd
3, // llvm.x86.sse41.blendvps
3, // llvm.x86.sse41.dppd
3, // llvm.x86.sse41.dpps
3, // llvm.x86.sse41.extractps
3, // llvm.x86.sse41.insertps
2, // llvm.x86.sse41.movntdqa
3, // llvm.x86.sse41.mpsadbw
3, // llvm.x86.sse41.packusdw
3, // llvm.x86.sse41.pblendvb
3, // llvm.x86.sse41.pblendw
3, // llvm.x86.sse41.pextrb
3, // llvm.x86.sse41.pextrd
3, // llvm.x86.sse41.pextrq
3, // llvm.x86.sse41.phminposuw
3, // llvm.x86.sse41.pmaxsb
3, // llvm.x86.sse41.pmaxsd
3, // llvm.x86.sse41.pmaxud
3, // llvm.x86.sse41.pmaxuw
3, // llvm.x86.sse41.pminsb
3, // llvm.x86.sse41.pminsd
3, // llvm.x86.sse41.pminud
3, // llvm.x86.sse41.pminuw
3, // llvm.x86.sse41.pmovsxbd
3, // llvm.x86.sse41.pmovsxbq
3, // llvm.x86.sse41.pmovsxbw
3, // llvm.x86.sse41.pmovsxdq
3, // llvm.x86.sse41.pmovsxwd
3, // llvm.x86.sse41.pmovsxwq
3, // llvm.x86.sse41.pmovzxbd
3, // llvm.x86.sse41.pmovzxbq
3, // llvm.x86.sse41.pmovzxbw
3, // llvm.x86.sse41.pmovzxdq
3, // llvm.x86.sse41.pmovzxwd
3, // llvm.x86.sse41.pmovzxwq
3, // llvm.x86.sse41.pmuldq
3, // llvm.x86.sse41.ptestc
3, // llvm.x86.sse41.ptestnzc
3, // llvm.x86.sse41.ptestz
3, // llvm.x86.sse41.round.pd
3, // llvm.x86.sse41.round.ps
3, // llvm.x86.sse41.round.sd
3, // llvm.x86.sse41.round.ss
3, // llvm.x86.sse42.crc32.32.16
3, // llvm.x86.sse42.crc32.32.32
3, // llvm.x86.sse42.crc32.32.8
3, // llvm.x86.sse42.crc32.64.64
3, // llvm.x86.sse42.crc32.64.8
3, // llvm.x86.sse42.pcmpestri128
3, // llvm.x86.sse42.pcmpestria128
3, // llvm.x86.sse42.pcmpestric128
3, // llvm.x86.sse42.pcmpestrio128
3, // llvm.x86.sse42.pcmpestris128
3, // llvm.x86.sse42.pcmpestriz128
3, // llvm.x86.sse42.pcmpestrm128
3, // llvm.x86.sse42.pcmpistri128
3, // llvm.x86.sse42.pcmpistria128
3, // llvm.x86.sse42.pcmpistric128
3, // llvm.x86.sse42.pcmpistrio128
3, // llvm.x86.sse42.pcmpistris128
3, // llvm.x86.sse42.pcmpistriz128
3, // llvm.x86.sse42.pcmpistrm128
3, // llvm.x86.sse.add.ss
3, // llvm.x86.sse.cmp.ps
3, // llvm.x86.sse.cmp.ss
3, // llvm.x86.sse.comieq.ss
3, // llvm.x86.sse.comige.ss
3, // llvm.x86.sse.comigt.ss
3, // llvm.x86.sse.comile.ss
3, // llvm.x86.sse.comilt.ss
3, // llvm.x86.sse.comineq.ss
3, // llvm.x86.sse.cvtpd2pi
3, // llvm.x86.sse.cvtpi2pd
3, // llvm.x86.sse.cvtpi2ps
3, // llvm.x86.sse.cvtps2pi
3, // llvm.x86.sse.cvtsi2ss
3, // llvm.x86.sse.cvtsi642ss
3, // llvm.x86.sse.cvtss2si
3, // llvm.x86.sse.cvtss2si64
3, // llvm.x86.sse.cvttpd2pi
3, // llvm.x86.sse.cvttps2pi
3, // llvm.x86.sse.cvttss2si
3, // llvm.x86.sse.cvttss2si64
3, // llvm.x86.sse.div.ss
1, // llvm.x86.sse.ldmxcsr
3, // llvm.x86.sse.max.ps
3, // llvm.x86.sse.max.ss
3, // llvm.x86.sse.min.ps
3, // llvm.x86.sse.min.ss
3, // llvm.x86.sse.movmsk.ps
3, // llvm.x86.sse.mul.ss
3, // llvm.x86.sse.pshuf.w
3, // llvm.x86.sse.rcp.ps
3, // llvm.x86.sse.rcp.ss
3, // llvm.x86.sse.rsqrt.ps
3, // llvm.x86.sse.rsqrt.ss
1, // llvm.x86.sse.sfence
3, // llvm.x86.sse.sqrt.ps
3, // llvm.x86.sse.sqrt.ss
1, // llvm.x86.sse.stmxcsr
1, // llvm.x86.sse.storeu.ps
3, // llvm.x86.sse.sub.ss
3, // llvm.x86.sse.ucomieq.ss
3, // llvm.x86.sse.ucomige.ss
3, // llvm.x86.sse.ucomigt.ss
3, // llvm.x86.sse.ucomile.ss
3, // llvm.x86.sse.ucomilt.ss
3, // llvm.x86.sse.ucomineq.ss
3, // llvm.x86.ssse3.pabs.b
3, // llvm.x86.ssse3.pabs.b.128
3, // llvm.x86.ssse3.pabs.d
3, // llvm.x86.ssse3.pabs.d.128
3, // llvm.x86.ssse3.pabs.w
3, // llvm.x86.ssse3.pabs.w.128
3, // llvm.x86.ssse3.phadd.d
3, // llvm.x86.ssse3.phadd.d.128
3, // llvm.x86.ssse3.phadd.sw
3, // llvm.x86.ssse3.phadd.sw.128
3, // llvm.x86.ssse3.phadd.w
3, // llvm.x86.ssse3.phadd.w.128
3, // llvm.x86.ssse3.phsub.d
3, // llvm.x86.ssse3.phsub.d.128
3, // llvm.x86.ssse3.phsub.sw
3, // llvm.x86.ssse3.phsub.sw.128
3, // llvm.x86.ssse3.phsub.w
3, // llvm.x86.ssse3.phsub.w.128
3, // llvm.x86.ssse3.pmadd.ub.sw
3, // llvm.x86.ssse3.pmadd.ub.sw.128
3, // llvm.x86.ssse3.pmul.hr.sw
3, // llvm.x86.ssse3.pmul.hr.sw.128
3, // llvm.x86.ssse3.pshuf.b
3, // llvm.x86.ssse3.pshuf.b.128
3, // llvm.x86.ssse3.psign.b
3, // llvm.x86.ssse3.psign.b.128
3, // llvm.x86.ssse3.psign.d
3, // llvm.x86.ssse3.psign.d.128
3, // llvm.x86.ssse3.psign.w
3, // llvm.x86.ssse3.psign.w.128
3, // llvm.x86.vcvtph2ps.128
3, // llvm.x86.vcvtph2ps.256
3, // llvm.x86.vcvtps2ph.128
3, // llvm.x86.vcvtps2ph.256
1, // llvm.x86.wrfsbase.32
1, // llvm.x86.wrfsbase.64
1, // llvm.x86.wrgsbase.32
1, // llvm.x86.wrgsbase.64
3, // llvm.x86.xop.vfrcz.pd
3, // llvm.x86.xop.vfrcz.pd.256
3, // llvm.x86.xop.vfrcz.ps
3, // llvm.x86.xop.vfrcz.ps.256
3, // llvm.x86.xop.vfrcz.sd
3, // llvm.x86.xop.vfrcz.ss
3, // llvm.x86.xop.vpcmov
3, // llvm.x86.xop.vpcmov.256
3, // llvm.x86.xop.vpcomeqb
3, // llvm.x86.xop.vpcomeqd
3, // llvm.x86.xop.vpcomeqq
3, // llvm.x86.xop.vpcomequb
3, // llvm.x86.xop.vpcomequd
3, // llvm.x86.xop.vpcomequq
3, // llvm.x86.xop.vpcomequw
3, // llvm.x86.xop.vpcomeqw
3, // llvm.x86.xop.vpcomfalseb
3, // llvm.x86.xop.vpcomfalsed
3, // llvm.x86.xop.vpcomfalseq
3, // llvm.x86.xop.vpcomfalseub
3, // llvm.x86.xop.vpcomfalseud
3, // llvm.x86.xop.vpcomfalseuq
3, // llvm.x86.xop.vpcomfalseuw
3, // llvm.x86.xop.vpcomfalsew
3, // llvm.x86.xop.vpcomgeb
3, // llvm.x86.xop.vpcomged
3, // llvm.x86.xop.vpcomgeq
3, // llvm.x86.xop.vpcomgeub
3, // llvm.x86.xop.vpcomgeud
3, // llvm.x86.xop.vpcomgeuq
3, // llvm.x86.xop.vpcomgeuw
3, // llvm.x86.xop.vpcomgew
3, // llvm.x86.xop.vpcomgtb
3, // llvm.x86.xop.vpcomgtd
3, // llvm.x86.xop.vpcomgtq
3, // llvm.x86.xop.vpcomgtub
3, // llvm.x86.xop.vpcomgtud
3, // llvm.x86.xop.vpcomgtuq
3, // llvm.x86.xop.vpcomgtuw
3, // llvm.x86.xop.vpcomgtw
3, // llvm.x86.xop.vpcomleb
3, // llvm.x86.xop.vpcomled
3, // llvm.x86.xop.vpcomleq
3, // llvm.x86.xop.vpcomleub
3, // llvm.x86.xop.vpcomleud
3, // llvm.x86.xop.vpcomleuq
3, // llvm.x86.xop.vpcomleuw
3, // llvm.x86.xop.vpcomlew
3, // llvm.x86.xop.vpcomltb
3, // llvm.x86.xop.vpcomltd
3, // llvm.x86.xop.vpcomltq
3, // llvm.x86.xop.vpcomltub
3, // llvm.x86.xop.vpcomltud
3, // llvm.x86.xop.vpcomltuq
3, // llvm.x86.xop.vpcomltuw
3, // llvm.x86.xop.vpcomltw
3, // llvm.x86.xop.vpcomneb
3, // llvm.x86.xop.vpcomned
3, // llvm.x86.xop.vpcomneq
3, // llvm.x86.xop.vpcomneub
3, // llvm.x86.xop.vpcomneud
3, // llvm.x86.xop.vpcomneuq
3, // llvm.x86.xop.vpcomneuw
3, // llvm.x86.xop.vpcomnew
3, // llvm.x86.xop.vpcomtrueb
3, // llvm.x86.xop.vpcomtrued
3, // llvm.x86.xop.vpcomtrueq
3, // llvm.x86.xop.vpcomtrueub
3, // llvm.x86.xop.vpcomtrueud
3, // llvm.x86.xop.vpcomtrueuq
3, // llvm.x86.xop.vpcomtrueuw
3, // llvm.x86.xop.vpcomtruew
3, // llvm.x86.xop.vpermil2pd
3, // llvm.x86.xop.vpermil2pd.256
3, // llvm.x86.xop.vpermil2ps
3, // llvm.x86.xop.vpermil2ps.256
3, // llvm.x86.xop.vphaddbd
3, // llvm.x86.xop.vphaddbq
3, // llvm.x86.xop.vphaddbw
3, // llvm.x86.xop.vphadddq
3, // llvm.x86.xop.vphaddubd
3, // llvm.x86.xop.vphaddubq
3, // llvm.x86.xop.vphaddubw
3, // llvm.x86.xop.vphaddudq
3, // llvm.x86.xop.vphadduwd
3, // llvm.x86.xop.vphadduwq
3, // llvm.x86.xop.vphaddwd
3, // llvm.x86.xop.vphaddwq
3, // llvm.x86.xop.vphsubbw
3, // llvm.x86.xop.vphsubdq
3, // llvm.x86.xop.vphsubwd
3, // llvm.x86.xop.vpmacsdd
3, // llvm.x86.xop.vpmacsdqh
3, // llvm.x86.xop.vpmacsdql
3, // llvm.x86.xop.vpmacssdd
3, // llvm.x86.xop.vpmacssdqh
3, // llvm.x86.xop.vpmacssdql
3, // llvm.x86.xop.vpmacsswd
3, // llvm.x86.xop.vpmacssww
3, // llvm.x86.xop.vpmacswd
3, // llvm.x86.xop.vpmacsww
3, // llvm.x86.xop.vpmadcsswd
3, // llvm.x86.xop.vpmadcswd
3, // llvm.x86.xop.vpperm
3, // llvm.x86.xop.vprotb
3, // llvm.x86.xop.vprotd
3, // llvm.x86.xop.vprotq
3, // llvm.x86.xop.vprotw
3, // llvm.x86.xop.vpshab
3, // llvm.x86.xop.vpshad
3, // llvm.x86.xop.vpshaq
3, // llvm.x86.xop.vpshaw
3, // llvm.x86.xop.vpshlb
3, // llvm.x86.xop.vpshld
3, // llvm.x86.xop.vpshlq
3, // llvm.x86.xop.vpshlw
3, // llvm.xcore.bitrev
1, // llvm.xcore.checkevent
5, // llvm.xcore.chkct
1, // llvm.xcore.clre
1, // llvm.xcore.clrsr
3, // llvm.xcore.crc32
3, // llvm.xcore.crc8
5, // llvm.xcore.eeu
5, // llvm.xcore.endin
5, // llvm.xcore.freer
1, // llvm.xcore.geted
1, // llvm.xcore.getet
3, // llvm.xcore.getid
1, // llvm.xcore.getps
1, // llvm.xcore.getr
5, // llvm.xcore.getst
5, // llvm.xcore.getts
5, // llvm.xcore.in
5, // llvm.xcore.inct
5, // llvm.xcore.initcp
5, // llvm.xcore.initdp
5, // llvm.xcore.initlr
5, // llvm.xcore.initpc
5, // llvm.xcore.initsp
5, // llvm.xcore.inshr
5, // llvm.xcore.int
5, // llvm.xcore.mjoin
5, // llvm.xcore.msync
5, // llvm.xcore.out
5, // llvm.xcore.outct
5, // llvm.xcore.outshr
5, // llvm.xcore.outt
5, // llvm.xcore.peek
5, // llvm.xcore.setc
8, // llvm.xcore.setclk
5, // llvm.xcore.setd
5, // llvm.xcore.setev
1, // llvm.xcore.setps
5, // llvm.xcore.setpsc
5, // llvm.xcore.setpt
8, // llvm.xcore.setrdy
1, // llvm.xcore.setsr
5, // llvm.xcore.settw
5, // llvm.xcore.setv
3, // llvm.xcore.sext
1, // llvm.xcore.ssync
5, // llvm.xcore.syncr
5, // llvm.xcore.testct
5, // llvm.xcore.testwct
2, // llvm.xcore.waitevent
3, // llvm.xcore.zext
};
AttributeWithIndex AWI[3];
unsigned NumAttrs = 0;
if (id != 0) {
switch(IntrinsicsToAttributesMap[id - 1]) {
default: llvm_unreachable("Invalid attribute number");
case 3:
AWI[0] = AttributeWithIndex::get(~0, Attribute::NoUnwind|Attribute::ReadNone);
NumAttrs = 1;
break;
case 2:
AWI[0] = AttributeWithIndex::get(~0, Attribute::NoUnwind|Attribute::ReadOnly);
NumAttrs = 1;
break;
case 1:
AWI[0] = AttributeWithIndex::get(~0, Attribute::NoUnwind);
NumAttrs = 1;
break;
case 5:
AWI[0] = AttributeWithIndex::get(1, Attribute::NoCapture);
AWI[1] = AttributeWithIndex::get(~0, Attribute::NoUnwind);
NumAttrs = 2;
break;
case 8:
AWI[0] = AttributeWithIndex::get(1, Attribute::NoCapture);
AWI[1] = AttributeWithIndex::get(2, Attribute::NoCapture);
AWI[2] = AttributeWithIndex::get(~0, Attribute::NoUnwind);
NumAttrs = 3;
break;
case 7:
AWI[0] = AttributeWithIndex::get(2, Attribute::NoCapture);
AWI[1] = AttributeWithIndex::get(~0, Attribute::NoUnwind);
NumAttrs = 2;
break;
case 4:
AWI[0] = AttributeWithIndex::get(2, Attribute::NoCapture);
AWI[1] = AttributeWithIndex::get(3, Attribute::NoCapture);
AWI[2] = AttributeWithIndex::get(~0, Attribute::NoUnwind);
NumAttrs = 3;
break;
case 6:
AWI[0] = AttributeWithIndex::get(3, Attribute::NoCapture);
AWI[1] = AttributeWithIndex::get(~0, Attribute::NoUnwind);
NumAttrs = 2;
break;
}
}
return AttrListPtr::get(AWI, NumAttrs);
}
#endif // GET_INTRINSIC_ATTRIBUTES
// Determine intrinsic alias analysis mod/ref behavior.
#ifdef GET_INTRINSIC_MODREF_BEHAVIOR
assert(iid <= Intrinsic::xcore_zext && "Unknown intrinsic.");
static const uint8_t IntrinsicModRefBehavior[] = {
/* invalid */ UnknownModRefBehavior,
/* CNOT */ UnknownModRefBehavior,
/* Fredkin */ UnknownModRefBehavior,
/* H */ UnknownModRefBehavior,
/* MeasX */ UnknownModRefBehavior,
/* MeasZ */ UnknownModRefBehavior,
/* NOT */ UnknownModRefBehavior,
/* PrepX */ UnknownModRefBehavior,
/* PrepZ */ UnknownModRefBehavior,
/* Rx */ UnknownModRefBehavior,
/* Ry */ UnknownModRefBehavior,
/* Rz */ UnknownModRefBehavior,
/* S */ UnknownModRefBehavior,
/* Sdag */ UnknownModRefBehavior,
/* T */ UnknownModRefBehavior,
/* Tdag */ UnknownModRefBehavior,
/* Toffoli */ UnknownModRefBehavior,
/* X */ UnknownModRefBehavior,
/* Y */ UnknownModRefBehavior,
/* Z */ UnknownModRefBehavior,
/* a_eq_a_minus_b */ UnknownModRefBehavior,
/* a_eq_a_plus_b */ UnknownModRefBehavior,
/* a_eq_a_plus_b_times_c */ UnknownModRefBehavior,
/* a_swap_b */ UnknownModRefBehavior,
/* adjust_trampoline */ OnlyReadsArgumentPointees,
/* annotation */ UnknownModRefBehavior,
/* arm_cdp */ UnknownModRefBehavior,
/* arm_cdp2 */ UnknownModRefBehavior,
/* arm_get_fpscr */ DoesNotAccessMemory,
/* arm_ldrexd */ OnlyReadsArgumentPointees,
/* arm_mcr */ UnknownModRefBehavior,
/* arm_mcr2 */ UnknownModRefBehavior,
/* arm_mcrr */ UnknownModRefBehavior,
/* arm_mcrr2 */ UnknownModRefBehavior,
/* arm_mrc */ UnknownModRefBehavior,
/* arm_mrc2 */ UnknownModRefBehavior,
/* arm_neon_vabds */ DoesNotAccessMemory,
/* arm_neon_vabdu */ DoesNotAccessMemory,
/* arm_neon_vabs */ DoesNotAccessMemory,
/* arm_neon_vacged */ DoesNotAccessMemory,
/* arm_neon_vacgeq */ DoesNotAccessMemory,
/* arm_neon_vacgtd */ DoesNotAccessMemory,
/* arm_neon_vacgtq */ DoesNotAccessMemory,
/* arm_neon_vaddhn */ DoesNotAccessMemory,
/* arm_neon_vcls */ DoesNotAccessMemory,
/* arm_neon_vclz */ DoesNotAccessMemory,
/* arm_neon_vcnt */ DoesNotAccessMemory,
/* arm_neon_vcvtfp2fxs */ DoesNotAccessMemory,
/* arm_neon_vcvtfp2fxu */ DoesNotAccessMemory,
/* arm_neon_vcvtfp2hf */ DoesNotAccessMemory,
/* arm_neon_vcvtfxs2fp */ DoesNotAccessMemory,
/* arm_neon_vcvtfxu2fp */ DoesNotAccessMemory,
/* arm_neon_vcvthf2fp */ DoesNotAccessMemory,
/* arm_neon_vhadds */ DoesNotAccessMemory,
/* arm_neon_vhaddu */ DoesNotAccessMemory,
/* arm_neon_vhsubs */ DoesNotAccessMemory,
/* arm_neon_vhsubu */ DoesNotAccessMemory,
/* arm_neon_vld1 */ OnlyReadsArgumentPointees,
/* arm_neon_vld2 */ OnlyReadsArgumentPointees,
/* arm_neon_vld2lane */ OnlyReadsArgumentPointees,
/* arm_neon_vld3 */ OnlyReadsArgumentPointees,
/* arm_neon_vld3lane */ OnlyReadsArgumentPointees,
/* arm_neon_vld4 */ OnlyReadsArgumentPointees,
/* arm_neon_vld4lane */ OnlyReadsArgumentPointees,
/* arm_neon_vmaxs */ DoesNotAccessMemory,
/* arm_neon_vmaxu */ DoesNotAccessMemory,
/* arm_neon_vmins */ DoesNotAccessMemory,
/* arm_neon_vminu */ DoesNotAccessMemory,
/* arm_neon_vmullp */ DoesNotAccessMemory,
/* arm_neon_vmulls */ DoesNotAccessMemory,
/* arm_neon_vmullu */ DoesNotAccessMemory,
/* arm_neon_vmulp */ DoesNotAccessMemory,
/* arm_neon_vpadals */ DoesNotAccessMemory,
/* arm_neon_vpadalu */ DoesNotAccessMemory,
/* arm_neon_vpadd */ DoesNotAccessMemory,
/* arm_neon_vpaddls */ DoesNotAccessMemory,
/* arm_neon_vpaddlu */ DoesNotAccessMemory,
/* arm_neon_vpmaxs */ DoesNotAccessMemory,
/* arm_neon_vpmaxu */ DoesNotAccessMemory,
/* arm_neon_vpmins */ DoesNotAccessMemory,
/* arm_neon_vpminu */ DoesNotAccessMemory,
/* arm_neon_vqabs */ DoesNotAccessMemory,
/* arm_neon_vqadds */ DoesNotAccessMemory,
/* arm_neon_vqaddu */ DoesNotAccessMemory,
/* arm_neon_vqdmlal */ DoesNotAccessMemory,
/* arm_neon_vqdmlsl */ DoesNotAccessMemory,
/* arm_neon_vqdmulh */ DoesNotAccessMemory,
/* arm_neon_vqdmull */ DoesNotAccessMemory,
/* arm_neon_vqmovns */ DoesNotAccessMemory,
/* arm_neon_vqmovnsu */ DoesNotAccessMemory,
/* arm_neon_vqmovnu */ DoesNotAccessMemory,
/* arm_neon_vqneg */ DoesNotAccessMemory,
/* arm_neon_vqrdmulh */ DoesNotAccessMemory,
/* arm_neon_vqrshiftns */ DoesNotAccessMemory,
/* arm_neon_vqrshiftnsu */ DoesNotAccessMemory,
/* arm_neon_vqrshiftnu */ DoesNotAccessMemory,
/* arm_neon_vqrshifts */ DoesNotAccessMemory,
/* arm_neon_vqrshiftu */ DoesNotAccessMemory,
/* arm_neon_vqshiftns */ DoesNotAccessMemory,
/* arm_neon_vqshiftnsu */ DoesNotAccessMemory,
/* arm_neon_vqshiftnu */ DoesNotAccessMemory,
/* arm_neon_vqshifts */ DoesNotAccessMemory,
/* arm_neon_vqshiftsu */ DoesNotAccessMemory,
/* arm_neon_vqshiftu */ DoesNotAccessMemory,
/* arm_neon_vqsubs */ DoesNotAccessMemory,
/* arm_neon_vqsubu */ DoesNotAccessMemory,
/* arm_neon_vraddhn */ DoesNotAccessMemory,
/* arm_neon_vrecpe */ DoesNotAccessMemory,
/* arm_neon_vrecps */ DoesNotAccessMemory,
/* arm_neon_vrhadds */ DoesNotAccessMemory,
/* arm_neon_vrhaddu */ DoesNotAccessMemory,
/* arm_neon_vrshiftn */ DoesNotAccessMemory,
/* arm_neon_vrshifts */ DoesNotAccessMemory,
/* arm_neon_vrshiftu */ DoesNotAccessMemory,
/* arm_neon_vrsqrte */ DoesNotAccessMemory,
/* arm_neon_vrsqrts */ DoesNotAccessMemory,
/* arm_neon_vrsubhn */ DoesNotAccessMemory,
/* arm_neon_vshiftins */ DoesNotAccessMemory,
/* arm_neon_vshiftls */ DoesNotAccessMemory,
/* arm_neon_vshiftlu */ DoesNotAccessMemory,
/* arm_neon_vshiftn */ DoesNotAccessMemory,
/* arm_neon_vshifts */ DoesNotAccessMemory,
/* arm_neon_vshiftu */ DoesNotAccessMemory,
/* arm_neon_vst1 */ OnlyAccessesArgumentPointees,
/* arm_neon_vst2 */ OnlyAccessesArgumentPointees,
/* arm_neon_vst2lane */ OnlyAccessesArgumentPointees,
/* arm_neon_vst3 */ OnlyAccessesArgumentPointees,
/* arm_neon_vst3lane */ OnlyAccessesArgumentPointees,
/* arm_neon_vst4 */ OnlyAccessesArgumentPointees,
/* arm_neon_vst4lane */ OnlyAccessesArgumentPointees,
/* arm_neon_vsubhn */ DoesNotAccessMemory,
/* arm_neon_vtbl1 */ DoesNotAccessMemory,
/* arm_neon_vtbl2 */ DoesNotAccessMemory,
/* arm_neon_vtbl3 */ DoesNotAccessMemory,
/* arm_neon_vtbl4 */ DoesNotAccessMemory,
/* arm_neon_vtbx1 */ DoesNotAccessMemory,
/* arm_neon_vtbx2 */ DoesNotAccessMemory,
/* arm_neon_vtbx3 */ DoesNotAccessMemory,
/* arm_neon_vtbx4 */ DoesNotAccessMemory,
/* arm_qadd */ DoesNotAccessMemory,
/* arm_qsub */ DoesNotAccessMemory,
/* arm_set_fpscr */ UnknownModRefBehavior,
/* arm_ssat */ DoesNotAccessMemory,
/* arm_strexd */ OnlyAccessesArgumentPointees,
/* arm_thread_pointer */ DoesNotAccessMemory,
/* arm_usat */ DoesNotAccessMemory,
/* arm_vcvtr */ DoesNotAccessMemory,
/* arm_vcvtru */ DoesNotAccessMemory,
/* assign_value_of_0_to_a */ UnknownModRefBehavior,
/* assign_value_of_1_to_a */ UnknownModRefBehavior,
/* assign_value_of_b_to_a */ UnknownModRefBehavior,
/* bswap */ DoesNotAccessMemory,
/* cnot */ UnknownModRefBehavior,
/* convert_from_fp16 */ DoesNotAccessMemory,
/* convert_to_fp16 */ DoesNotAccessMemory,
/* convertff */ UnknownModRefBehavior,
/* convertfsi */ UnknownModRefBehavior,
/* convertfui */ UnknownModRefBehavior,
/* convertsif */ UnknownModRefBehavior,
/* convertss */ UnknownModRefBehavior,
/* convertsu */ UnknownModRefBehavior,
/* convertuif */ UnknownModRefBehavior,
/* convertus */ UnknownModRefBehavior,
/* convertuu */ UnknownModRefBehavior,
/* cos */ OnlyReadsMemory,
/* ctlz */ DoesNotAccessMemory,
/* ctpop */ DoesNotAccessMemory,
/* cttz */ DoesNotAccessMemory,
/* dbg_declare */ DoesNotAccessMemory,
/* dbg_value */ DoesNotAccessMemory,
/* eh_dwarf_cfa */ UnknownModRefBehavior,
/* eh_return_i32 */ UnknownModRefBehavior,
/* eh_return_i64 */ UnknownModRefBehavior,
/* eh_sjlj_callsite */ DoesNotAccessMemory,
/* eh_sjlj_functioncontext */ UnknownModRefBehavior,
/* eh_sjlj_longjmp */ UnknownModRefBehavior,
/* eh_sjlj_lsda */ DoesNotAccessMemory,
/* eh_sjlj_setjmp */ UnknownModRefBehavior,
/* eh_typeid_for */ DoesNotAccessMemory,
/* eh_unwind_init */ UnknownModRefBehavior,
/* exp */ OnlyReadsMemory,
/* exp2 */ OnlyReadsMemory,
/* expect */ DoesNotAccessMemory,
/* flt_rounds */ UnknownModRefBehavior,
/* fma */ DoesNotAccessMemory,
/* frameaddress */ DoesNotAccessMemory,
/* gcread */ OnlyReadsArgumentPointees,
/* gcroot */ UnknownModRefBehavior,
/* gcwrite */ OnlyAccessesArgumentPointees,
/* hexagon_A2_abs */ DoesNotAccessMemory,
/* hexagon_A2_absp */ DoesNotAccessMemory,
/* hexagon_A2_abssat */ DoesNotAccessMemory,
/* hexagon_A2_add */ DoesNotAccessMemory,
/* hexagon_A2_addh_h16_hh */ DoesNotAccessMemory,
/* hexagon_A2_addh_h16_hl */ DoesNotAccessMemory,
/* hexagon_A2_addh_h16_lh */ DoesNotAccessMemory,
/* hexagon_A2_addh_h16_ll */ DoesNotAccessMemory,
/* hexagon_A2_addh_h16_sat_hh */ DoesNotAccessMemory,
/* hexagon_A2_addh_h16_sat_hl */ DoesNotAccessMemory,
/* hexagon_A2_addh_h16_sat_lh */ DoesNotAccessMemory,
/* hexagon_A2_addh_h16_sat_ll */ DoesNotAccessMemory,
/* hexagon_A2_addh_l16_hh */ DoesNotAccessMemory,
/* hexagon_A2_addh_l16_hl */ DoesNotAccessMemory,
/* hexagon_A2_addh_l16_lh */ DoesNotAccessMemory,
/* hexagon_A2_addh_l16_ll */ DoesNotAccessMemory,
/* hexagon_A2_addh_l16_sat_hh */ DoesNotAccessMemory,
/* hexagon_A2_addh_l16_sat_hl */ DoesNotAccessMemory,
/* hexagon_A2_addh_l16_sat_lh */ DoesNotAccessMemory,
/* hexagon_A2_addh_l16_sat_ll */ DoesNotAccessMemory,
/* hexagon_A2_addi */ DoesNotAccessMemory,
/* hexagon_A2_addp */ DoesNotAccessMemory,
/* hexagon_A2_addpsat */ DoesNotAccessMemory,
/* hexagon_A2_addsat */ DoesNotAccessMemory,
/* hexagon_A2_addsp */ DoesNotAccessMemory,
/* hexagon_A2_and */ DoesNotAccessMemory,
/* hexagon_A2_andir */ DoesNotAccessMemory,
/* hexagon_A2_andp */ DoesNotAccessMemory,
/* hexagon_A2_aslh */ DoesNotAccessMemory,
/* hexagon_A2_asrh */ DoesNotAccessMemory,
/* hexagon_A2_combine_hh */ DoesNotAccessMemory,
/* hexagon_A2_combine_hl */ DoesNotAccessMemory,
/* hexagon_A2_combine_lh */ DoesNotAccessMemory,
/* hexagon_A2_combine_ll */ DoesNotAccessMemory,
/* hexagon_A2_combineii */ DoesNotAccessMemory,
/* hexagon_A2_combinew */ DoesNotAccessMemory,
/* hexagon_A2_max */ DoesNotAccessMemory,
/* hexagon_A2_maxp */ DoesNotAccessMemory,
/* hexagon_A2_maxu */ DoesNotAccessMemory,
/* hexagon_A2_maxup */ DoesNotAccessMemory,
/* hexagon_A2_min */ DoesNotAccessMemory,
/* hexagon_A2_minp */ DoesNotAccessMemory,
/* hexagon_A2_minu */ DoesNotAccessMemory,
/* hexagon_A2_minup */ DoesNotAccessMemory,
/* hexagon_A2_neg */ DoesNotAccessMemory,
/* hexagon_A2_negp */ DoesNotAccessMemory,
/* hexagon_A2_negsat */ DoesNotAccessMemory,
/* hexagon_A2_not */ DoesNotAccessMemory,
/* hexagon_A2_notp */ DoesNotAccessMemory,
/* hexagon_A2_or */ DoesNotAccessMemory,
/* hexagon_A2_orir */ DoesNotAccessMemory,
/* hexagon_A2_orp */ DoesNotAccessMemory,
/* hexagon_A2_sat */ DoesNotAccessMemory,
/* hexagon_A2_satb */ DoesNotAccessMemory,
/* hexagon_A2_sath */ DoesNotAccessMemory,
/* hexagon_A2_satub */ DoesNotAccessMemory,
/* hexagon_A2_satuh */ DoesNotAccessMemory,
/* hexagon_A2_sub */ DoesNotAccessMemory,
/* hexagon_A2_subh_h16_hh */ DoesNotAccessMemory,
/* hexagon_A2_subh_h16_hl */ DoesNotAccessMemory,
/* hexagon_A2_subh_h16_lh */ DoesNotAccessMemory,
/* hexagon_A2_subh_h16_ll */ DoesNotAccessMemory,
/* hexagon_A2_subh_h16_sat_hh */ DoesNotAccessMemory,
/* hexagon_A2_subh_h16_sat_hl */ DoesNotAccessMemory,
/* hexagon_A2_subh_h16_sat_lh */ DoesNotAccessMemory,
/* hexagon_A2_subh_h16_sat_ll */ DoesNotAccessMemory,
/* hexagon_A2_subh_l16_hl */ DoesNotAccessMemory,
/* hexagon_A2_subh_l16_ll */ DoesNotAccessMemory,
/* hexagon_A2_subh_l16_sat_hl */ DoesNotAccessMemory,
/* hexagon_A2_subh_l16_sat_ll */ DoesNotAccessMemory,
/* hexagon_A2_subp */ DoesNotAccessMemory,
/* hexagon_A2_subri */ DoesNotAccessMemory,
/* hexagon_A2_subsat */ DoesNotAccessMemory,
/* hexagon_A2_svaddh */ DoesNotAccessMemory,
/* hexagon_A2_svaddhs */ DoesNotAccessMemory,
/* hexagon_A2_svadduhs */ DoesNotAccessMemory,
/* hexagon_A2_svavgh */ DoesNotAccessMemory,
/* hexagon_A2_svavghs */ DoesNotAccessMemory,
/* hexagon_A2_svnavgh */ DoesNotAccessMemory,
/* hexagon_A2_svsubh */ DoesNotAccessMemory,
/* hexagon_A2_svsubhs */ DoesNotAccessMemory,
/* hexagon_A2_svsubuhs */ DoesNotAccessMemory,
/* hexagon_A2_swiz */ DoesNotAccessMemory,
/* hexagon_A2_sxtb */ DoesNotAccessMemory,
/* hexagon_A2_sxth */ DoesNotAccessMemory,
/* hexagon_A2_sxtw */ DoesNotAccessMemory,
/* hexagon_A2_tfr */ DoesNotAccessMemory,
/* hexagon_A2_tfrih */ DoesNotAccessMemory,
/* hexagon_A2_tfril */ DoesNotAccessMemory,
/* hexagon_A2_tfrp */ DoesNotAccessMemory,
/* hexagon_A2_tfrpi */ DoesNotAccessMemory,
/* hexagon_A2_tfrsi */ DoesNotAccessMemory,
/* hexagon_A2_vabsh */ DoesNotAccessMemory,
/* hexagon_A2_vabshsat */ DoesNotAccessMemory,
/* hexagon_A2_vabsw */ DoesNotAccessMemory,
/* hexagon_A2_vabswsat */ DoesNotAccessMemory,
/* hexagon_A2_vaddh */ DoesNotAccessMemory,
/* hexagon_A2_vaddhs */ DoesNotAccessMemory,
/* hexagon_A2_vaddub */ DoesNotAccessMemory,
/* hexagon_A2_vaddubs */ DoesNotAccessMemory,
/* hexagon_A2_vadduhs */ DoesNotAccessMemory,
/* hexagon_A2_vaddw */ DoesNotAccessMemory,
/* hexagon_A2_vaddws */ DoesNotAccessMemory,
/* hexagon_A2_vavgh */ DoesNotAccessMemory,
/* hexagon_A2_vavghcr */ DoesNotAccessMemory,
/* hexagon_A2_vavghr */ DoesNotAccessMemory,
/* hexagon_A2_vavgub */ DoesNotAccessMemory,
/* hexagon_A2_vavgubr */ DoesNotAccessMemory,
/* hexagon_A2_vavguh */ DoesNotAccessMemory,
/* hexagon_A2_vavguhr */ DoesNotAccessMemory,
/* hexagon_A2_vavguw */ DoesNotAccessMemory,
/* hexagon_A2_vavguwr */ DoesNotAccessMemory,
/* hexagon_A2_vavgw */ DoesNotAccessMemory,
/* hexagon_A2_vavgwcr */ DoesNotAccessMemory,
/* hexagon_A2_vavgwr */ DoesNotAccessMemory,
/* hexagon_A2_vcmpbeq */ DoesNotAccessMemory,
/* hexagon_A2_vcmpbgtu */ DoesNotAccessMemory,
/* hexagon_A2_vcmpheq */ DoesNotAccessMemory,
/* hexagon_A2_vcmphgt */ DoesNotAccessMemory,
/* hexagon_A2_vcmphgtu */ DoesNotAccessMemory,
/* hexagon_A2_vcmpweq */ DoesNotAccessMemory,
/* hexagon_A2_vcmpwgt */ DoesNotAccessMemory,
/* hexagon_A2_vcmpwgtu */ DoesNotAccessMemory,
/* hexagon_A2_vconj */ DoesNotAccessMemory,
/* hexagon_A2_vmaxh */ DoesNotAccessMemory,
/* hexagon_A2_vmaxub */ DoesNotAccessMemory,
/* hexagon_A2_vmaxuh */ DoesNotAccessMemory,
/* hexagon_A2_vmaxuw */ DoesNotAccessMemory,
/* hexagon_A2_vmaxw */ DoesNotAccessMemory,
/* hexagon_A2_vminh */ DoesNotAccessMemory,
/* hexagon_A2_vminub */ DoesNotAccessMemory,
/* hexagon_A2_vminuh */ DoesNotAccessMemory,
/* hexagon_A2_vminuw */ DoesNotAccessMemory,
/* hexagon_A2_vminw */ DoesNotAccessMemory,
/* hexagon_A2_vnavgh */ DoesNotAccessMemory,
/* hexagon_A2_vnavghcr */ DoesNotAccessMemory,
/* hexagon_A2_vnavghr */ DoesNotAccessMemory,
/* hexagon_A2_vnavgw */ DoesNotAccessMemory,
/* hexagon_A2_vnavgwcr */ DoesNotAccessMemory,
/* hexagon_A2_vnavgwr */ DoesNotAccessMemory,
/* hexagon_A2_vraddub */ DoesNotAccessMemory,
/* hexagon_A2_vraddub_acc */ DoesNotAccessMemory,
/* hexagon_A2_vrsadub */ DoesNotAccessMemory,
/* hexagon_A2_vrsadub_acc */ DoesNotAccessMemory,
/* hexagon_A2_vsubh */ DoesNotAccessMemory,
/* hexagon_A2_vsubhs */ DoesNotAccessMemory,
/* hexagon_A2_vsubub */ DoesNotAccessMemory,
/* hexagon_A2_vsububs */ DoesNotAccessMemory,
/* hexagon_A2_vsubuhs */ DoesNotAccessMemory,
/* hexagon_A2_vsubw */ DoesNotAccessMemory,
/* hexagon_A2_vsubws */ DoesNotAccessMemory,
/* hexagon_A2_xor */ DoesNotAccessMemory,
/* hexagon_A2_xorp */ DoesNotAccessMemory,
/* hexagon_A2_zxtb */ DoesNotAccessMemory,
/* hexagon_A2_zxth */ DoesNotAccessMemory,
/* hexagon_A4_andn */ DoesNotAccessMemory,
/* hexagon_A4_andnp */ DoesNotAccessMemory,
/* hexagon_A4_combineir */ DoesNotAccessMemory,
/* hexagon_A4_combineri */ DoesNotAccessMemory,
/* hexagon_A4_cround_ri */ DoesNotAccessMemory,
/* hexagon_A4_cround_rr */ DoesNotAccessMemory,
/* hexagon_A4_modwrapu */ DoesNotAccessMemory,
/* hexagon_A4_orn */ DoesNotAccessMemory,
/* hexagon_A4_ornp */ DoesNotAccessMemory,
/* hexagon_A4_rcmpeq */ DoesNotAccessMemory,
/* hexagon_A4_rcmpeqi */ DoesNotAccessMemory,
/* hexagon_A4_rcmpneq */ DoesNotAccessMemory,
/* hexagon_A4_rcmpneqi */ DoesNotAccessMemory,
/* hexagon_A4_round_ri */ DoesNotAccessMemory,
/* hexagon_A4_round_ri_sat */ DoesNotAccessMemory,
/* hexagon_A4_round_rr */ DoesNotAccessMemory,
/* hexagon_A4_round_rr_sat */ DoesNotAccessMemory,
/* hexagon_C2_all8 */ DoesNotAccessMemory,
/* hexagon_C2_and */ DoesNotAccessMemory,
/* hexagon_C2_andn */ DoesNotAccessMemory,
/* hexagon_C2_any8 */ DoesNotAccessMemory,
/* hexagon_C2_bitsclr */ DoesNotAccessMemory,
/* hexagon_C2_bitsclri */ DoesNotAccessMemory,
/* hexagon_C2_bitsset */ DoesNotAccessMemory,
/* hexagon_C2_cmpeq */ DoesNotAccessMemory,
/* hexagon_C2_cmpeqi */ DoesNotAccessMemory,
/* hexagon_C2_cmpeqp */ DoesNotAccessMemory,
/* hexagon_C2_cmpgei */ DoesNotAccessMemory,
/* hexagon_C2_cmpgeui */ DoesNotAccessMemory,
/* hexagon_C2_cmpgt */ DoesNotAccessMemory,
/* hexagon_C2_cmpgti */ DoesNotAccessMemory,
/* hexagon_C2_cmpgtp */ DoesNotAccessMemory,
/* hexagon_C2_cmpgtu */ DoesNotAccessMemory,
/* hexagon_C2_cmpgtui */ DoesNotAccessMemory,
/* hexagon_C2_cmpgtup */ DoesNotAccessMemory,
/* hexagon_C2_cmplt */ DoesNotAccessMemory,
/* hexagon_C2_cmpltu */ DoesNotAccessMemory,
/* hexagon_C2_mask */ DoesNotAccessMemory,
/* hexagon_C2_mux */ DoesNotAccessMemory,
/* hexagon_C2_muxii */ DoesNotAccessMemory,
/* hexagon_C2_muxir */ DoesNotAccessMemory,
/* hexagon_C2_muxri */ DoesNotAccessMemory,
/* hexagon_C2_not */ DoesNotAccessMemory,
/* hexagon_C2_or */ DoesNotAccessMemory,
/* hexagon_C2_orn */ DoesNotAccessMemory,
/* hexagon_C2_pxfer_map */ DoesNotAccessMemory,
/* hexagon_C2_tfrpr */ DoesNotAccessMemory,
/* hexagon_C2_tfrrp */ DoesNotAccessMemory,
/* hexagon_C2_vitpack */ DoesNotAccessMemory,
/* hexagon_C2_vmux */ DoesNotAccessMemory,
/* hexagon_C2_xor */ DoesNotAccessMemory,
/* hexagon_C4_and_and */ DoesNotAccessMemory,
/* hexagon_C4_and_andn */ DoesNotAccessMemory,
/* hexagon_C4_and_or */ DoesNotAccessMemory,
/* hexagon_C4_and_orn */ DoesNotAccessMemory,
/* hexagon_C4_cmplte */ DoesNotAccessMemory,
/* hexagon_C4_cmpltei */ DoesNotAccessMemory,
/* hexagon_C4_cmplteu */ DoesNotAccessMemory,
/* hexagon_C4_cmplteui */ DoesNotAccessMemory,
/* hexagon_C4_cmpneq */ DoesNotAccessMemory,
/* hexagon_C4_cmpneqi */ DoesNotAccessMemory,
/* hexagon_C4_fastcorner9 */ DoesNotAccessMemory,
/* hexagon_C4_fastcorner9_not */ DoesNotAccessMemory,
/* hexagon_C4_or_and */ DoesNotAccessMemory,
/* hexagon_C4_or_andn */ DoesNotAccessMemory,
/* hexagon_C4_or_or */ DoesNotAccessMemory,
/* hexagon_C4_or_orn */ DoesNotAccessMemory,
/* hexagon_M2_acci */ DoesNotAccessMemory,
/* hexagon_M2_accii */ DoesNotAccessMemory,
/* hexagon_M2_cmaci_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmacr_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmacs_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmacs_s1 */ DoesNotAccessMemory,
/* hexagon_M2_cmacsc_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmacsc_s1 */ DoesNotAccessMemory,
/* hexagon_M2_cmpyi_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmpyr_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmpyrs_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmpyrs_s1 */ DoesNotAccessMemory,
/* hexagon_M2_cmpyrsc_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmpyrsc_s1 */ DoesNotAccessMemory,
/* hexagon_M2_cmpys_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmpys_s1 */ DoesNotAccessMemory,
/* hexagon_M2_cmpysc_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cmpysc_s1 */ DoesNotAccessMemory,
/* hexagon_M2_cnacs_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cnacs_s1 */ DoesNotAccessMemory,
/* hexagon_M2_cnacsc_s0 */ DoesNotAccessMemory,
/* hexagon_M2_cnacsc_s1 */ DoesNotAccessMemory,
/* hexagon_M2_dpmpyss_acc_s0 */ DoesNotAccessMemory,
/* hexagon_M2_dpmpyss_nac_s0 */ DoesNotAccessMemory,
/* hexagon_M2_dpmpyss_rnd_s0 */ DoesNotAccessMemory,
/* hexagon_M2_dpmpyss_s0 */ DoesNotAccessMemory,
/* hexagon_M2_dpmpyuu_acc_s0 */ DoesNotAccessMemory,
/* hexagon_M2_dpmpyuu_nac_s0 */ DoesNotAccessMemory,
/* hexagon_M2_dpmpyuu_s0 */ DoesNotAccessMemory,
/* hexagon_M2_hmmpyh_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_hmmpyl_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_maci */ DoesNotAccessMemory,
/* hexagon_M2_macsin */ DoesNotAccessMemory,
/* hexagon_M2_macsip */ DoesNotAccessMemory,
/* hexagon_M2_mmachs_rs0 */ DoesNotAccessMemory,
/* hexagon_M2_mmachs_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_mmachs_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mmachs_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mmacls_rs0 */ DoesNotAccessMemory,
/* hexagon_M2_mmacls_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_mmacls_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mmacls_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mmacuhs_rs0 */ DoesNotAccessMemory,
/* hexagon_M2_mmacuhs_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_mmacuhs_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mmacuhs_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mmaculs_rs0 */ DoesNotAccessMemory,
/* hexagon_M2_mmaculs_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_mmaculs_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mmaculs_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyh_rs0 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyh_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyl_rs0 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyl_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyuh_rs0 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyuh_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyuh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyuh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyul_rs0 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyul_rs1 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyul_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mmpyul_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_sat_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_sat_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_sat_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_sat_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_sat_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_sat_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_sat_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_acc_sat_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_sat_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_sat_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_sat_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_sat_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_sat_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_sat_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_sat_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_nac_sat_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_rnd_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_rnd_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_rnd_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_rnd_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_rnd_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_rnd_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_rnd_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_rnd_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_rnd_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_rnd_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_rnd_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_rnd_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_rnd_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_rnd_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_rnd_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_sat_rnd_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpy_up */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_acc_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_acc_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_acc_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_acc_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_acc_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_acc_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_acc_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_acc_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_nac_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_nac_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_nac_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_nac_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_nac_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_nac_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_nac_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_nac_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_rnd_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_rnd_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_rnd_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_rnd_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_rnd_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_rnd_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_rnd_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyd_rnd_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyi */ DoesNotAccessMemory,
/* hexagon_M2_mpysmi */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_acc_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_acc_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_acc_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_acc_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_acc_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_acc_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_acc_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_acc_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_nac_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_nac_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_nac_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_nac_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_nac_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_nac_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_nac_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_nac_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyu_up */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_acc_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_acc_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_acc_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_acc_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_acc_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_acc_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_acc_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_acc_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_nac_hh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_nac_hh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_nac_hl_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_nac_hl_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_nac_lh_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_nac_lh_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_nac_ll_s0 */ DoesNotAccessMemory,
/* hexagon_M2_mpyud_nac_ll_s1 */ DoesNotAccessMemory,
/* hexagon_M2_mpyui */ DoesNotAccessMemory,
/* hexagon_M2_nacci */ DoesNotAccessMemory,
/* hexagon_M2_naccii */ DoesNotAccessMemory,
/* hexagon_M2_subacc */ DoesNotAccessMemory,
/* hexagon_M2_vabsdiffh */ DoesNotAccessMemory,
/* hexagon_M2_vabsdiffw */ DoesNotAccessMemory,
/* hexagon_M2_vcmac_s0_sat_i */ DoesNotAccessMemory,
/* hexagon_M2_vcmac_s0_sat_r */ DoesNotAccessMemory,
/* hexagon_M2_vcmpy_s0_sat_i */ DoesNotAccessMemory,
/* hexagon_M2_vcmpy_s0_sat_r */ DoesNotAccessMemory,
/* hexagon_M2_vcmpy_s1_sat_i */ DoesNotAccessMemory,
/* hexagon_M2_vcmpy_s1_sat_r */ DoesNotAccessMemory,
/* hexagon_M2_vdmacs_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vdmacs_s1 */ DoesNotAccessMemory,
/* hexagon_M2_vdmpyrs_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vdmpyrs_s1 */ DoesNotAccessMemory,
/* hexagon_M2_vdmpys_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vdmpys_s1 */ DoesNotAccessMemory,
/* hexagon_M2_vmac2 */ DoesNotAccessMemory,
/* hexagon_M2_vmac2es */ DoesNotAccessMemory,
/* hexagon_M2_vmac2es_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vmac2es_s1 */ DoesNotAccessMemory,
/* hexagon_M2_vmac2s_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vmac2s_s1 */ DoesNotAccessMemory,
/* hexagon_M2_vmpy2es_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vmpy2es_s1 */ DoesNotAccessMemory,
/* hexagon_M2_vmpy2s_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vmpy2s_s0pack */ DoesNotAccessMemory,
/* hexagon_M2_vmpy2s_s1 */ DoesNotAccessMemory,
/* hexagon_M2_vmpy2s_s1pack */ DoesNotAccessMemory,
/* hexagon_M2_vradduh */ DoesNotAccessMemory,
/* hexagon_M2_vrcmaci_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vrcmaci_s0c */ DoesNotAccessMemory,
/* hexagon_M2_vrcmacr_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vrcmacr_s0c */ DoesNotAccessMemory,
/* hexagon_M2_vrcmpyi_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vrcmpyi_s0c */ DoesNotAccessMemory,
/* hexagon_M2_vrcmpyr_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vrcmpyr_s0c */ DoesNotAccessMemory,
/* hexagon_M2_vrcmpys_acc_s1 */ DoesNotAccessMemory,
/* hexagon_M2_vrcmpys_s1 */ DoesNotAccessMemory,
/* hexagon_M2_vrcmpys_s1rp */ DoesNotAccessMemory,
/* hexagon_M2_vrmac_s0 */ DoesNotAccessMemory,
/* hexagon_M2_vrmpy_s0 */ DoesNotAccessMemory,
/* hexagon_M2_xor_xacc */ DoesNotAccessMemory,
/* hexagon_M4_and_and */ DoesNotAccessMemory,
/* hexagon_M4_and_andn */ DoesNotAccessMemory,
/* hexagon_M4_and_or */ DoesNotAccessMemory,
/* hexagon_M4_and_xor */ DoesNotAccessMemory,
/* hexagon_M4_or_and */ DoesNotAccessMemory,
/* hexagon_M4_or_andn */ DoesNotAccessMemory,
/* hexagon_M4_or_or */ DoesNotAccessMemory,
/* hexagon_M4_or_xor */ DoesNotAccessMemory,
/* hexagon_M4_xor_and */ DoesNotAccessMemory,
/* hexagon_M4_xor_andn */ DoesNotAccessMemory,
/* hexagon_M4_xor_or */ DoesNotAccessMemory,
/* hexagon_M4_xor_xacc */ DoesNotAccessMemory,
/* hexagon_S2_addasl_rrri */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_p */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_p_acc */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_p_and */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_p_nac */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_p_or */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_p_xacc */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_r */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_r_acc */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_r_and */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_r_nac */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_r_or */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_r_sat */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_r_xacc */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_vh */ DoesNotAccessMemory,
/* hexagon_S2_asl_i_vw */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_p */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_p_acc */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_p_and */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_p_nac */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_p_or */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_r */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_r_acc */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_r_and */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_r_nac */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_r_or */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_r_sat */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_vh */ DoesNotAccessMemory,
/* hexagon_S2_asl_r_vw */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_p */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_p_acc */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_p_and */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_p_nac */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_p_or */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_r */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_r_acc */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_r_and */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_r_nac */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_r_or */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_r_rnd */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_r_rnd_goodsyntax */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_svw_trun */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_vh */ DoesNotAccessMemory,
/* hexagon_S2_asr_i_vw */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_p */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_p_acc */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_p_and */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_p_nac */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_p_or */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_r */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_r_acc */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_r_and */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_r_nac */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_r_or */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_r_sat */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_svw_trun */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_vh */ DoesNotAccessMemory,
/* hexagon_S2_asr_r_vw */ DoesNotAccessMemory,
/* hexagon_S2_brev */ DoesNotAccessMemory,
/* hexagon_S2_cl0 */ DoesNotAccessMemory,
/* hexagon_S2_cl0p */ DoesNotAccessMemory,
/* hexagon_S2_cl1 */ DoesNotAccessMemory,
/* hexagon_S2_cl1p */ DoesNotAccessMemory,
/* hexagon_S2_clb */ DoesNotAccessMemory,
/* hexagon_S2_clbnorm */ DoesNotAccessMemory,
/* hexagon_S2_clbp */ DoesNotAccessMemory,
/* hexagon_S2_clrbit_i */ DoesNotAccessMemory,
/* hexagon_S2_clrbit_r */ DoesNotAccessMemory,
/* hexagon_S2_ct0 */ DoesNotAccessMemory,
/* hexagon_S2_ct1 */ DoesNotAccessMemory,
/* hexagon_S2_deinterleave */ DoesNotAccessMemory,
/* hexagon_S2_extractu */ DoesNotAccessMemory,
/* hexagon_S2_extractu_rp */ DoesNotAccessMemory,
/* hexagon_S2_extractup */ DoesNotAccessMemory,
/* hexagon_S2_extractup_rp */ DoesNotAccessMemory,
/* hexagon_S2_insert */ DoesNotAccessMemory,
/* hexagon_S2_insert_rp */ DoesNotAccessMemory,
/* hexagon_S2_insertp */ DoesNotAccessMemory,
/* hexagon_S2_insertp_rp */ DoesNotAccessMemory,
/* hexagon_S2_interleave */ DoesNotAccessMemory,
/* hexagon_S2_lfsp */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_p */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_p_acc */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_p_and */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_p_nac */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_p_or */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_r */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_r_acc */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_r_and */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_r_nac */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_r_or */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_vh */ DoesNotAccessMemory,
/* hexagon_S2_lsl_r_vw */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_p */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_p_acc */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_p_and */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_p_nac */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_p_or */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_p_xacc */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_r */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_r_acc */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_r_and */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_r_nac */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_r_or */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_r_xacc */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_vh */ DoesNotAccessMemory,
/* hexagon_S2_lsr_i_vw */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_p */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_p_acc */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_p_and */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_p_nac */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_p_or */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_r */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_r_acc */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_r_and */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_r_nac */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_r_or */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_vh */ DoesNotAccessMemory,
/* hexagon_S2_lsr_r_vw */ DoesNotAccessMemory,
/* hexagon_S2_packhl */ DoesNotAccessMemory,
/* hexagon_S2_parityp */ DoesNotAccessMemory,
/* hexagon_S2_setbit_i */ DoesNotAccessMemory,
/* hexagon_S2_setbit_r */ DoesNotAccessMemory,
/* hexagon_S2_shuffeb */ DoesNotAccessMemory,
/* hexagon_S2_shuffeh */ DoesNotAccessMemory,
/* hexagon_S2_shuffob */ DoesNotAccessMemory,
/* hexagon_S2_shuffoh */ DoesNotAccessMemory,
/* hexagon_S2_svsathb */ DoesNotAccessMemory,
/* hexagon_S2_svsathub */ DoesNotAccessMemory,
/* hexagon_S2_tableidxb_goodsyntax */ DoesNotAccessMemory,
/* hexagon_S2_tableidxd_goodsyntax */ DoesNotAccessMemory,
/* hexagon_S2_tableidxh_goodsyntax */ DoesNotAccessMemory,
/* hexagon_S2_tableidxw_goodsyntax */ DoesNotAccessMemory,
/* hexagon_S2_togglebit_i */ DoesNotAccessMemory,
/* hexagon_S2_togglebit_r */ DoesNotAccessMemory,
/* hexagon_S2_tstbit_i */ DoesNotAccessMemory,
/* hexagon_S2_tstbit_r */ DoesNotAccessMemory,
/* hexagon_S2_valignib */ DoesNotAccessMemory,
/* hexagon_S2_valignrb */ DoesNotAccessMemory,
/* hexagon_S2_vcrotate */ DoesNotAccessMemory,
/* hexagon_S2_vrndpackwh */ DoesNotAccessMemory,
/* hexagon_S2_vrndpackwhs */ DoesNotAccessMemory,
/* hexagon_S2_vsathb */ DoesNotAccessMemory,
/* hexagon_S2_vsathb_nopack */ DoesNotAccessMemory,
/* hexagon_S2_vsathub */ DoesNotAccessMemory,
/* hexagon_S2_vsathub_nopack */ DoesNotAccessMemory,
/* hexagon_S2_vsatwh */ DoesNotAccessMemory,
/* hexagon_S2_vsatwh_nopack */ DoesNotAccessMemory,
/* hexagon_S2_vsatwuh */ DoesNotAccessMemory,
/* hexagon_S2_vsatwuh_nopack */ DoesNotAccessMemory,
/* hexagon_S2_vsplatrb */ DoesNotAccessMemory,
/* hexagon_S2_vsplatrh */ DoesNotAccessMemory,
/* hexagon_S2_vspliceib */ DoesNotAccessMemory,
/* hexagon_S2_vsplicerb */ DoesNotAccessMemory,
/* hexagon_S2_vsxtbh */ DoesNotAccessMemory,
/* hexagon_S2_vsxthw */ DoesNotAccessMemory,
/* hexagon_S2_vtrunehb */ DoesNotAccessMemory,
/* hexagon_S2_vtrunewh */ DoesNotAccessMemory,
/* hexagon_S2_vtrunohb */ DoesNotAccessMemory,
/* hexagon_S2_vtrunowh */ DoesNotAccessMemory,
/* hexagon_S2_vzxtbh */ DoesNotAccessMemory,
/* hexagon_S2_vzxthw */ DoesNotAccessMemory,
/* hexagon_S4_addaddi */ DoesNotAccessMemory,
/* hexagon_S4_andnp */ DoesNotAccessMemory,
/* hexagon_S4_or_andi */ DoesNotAccessMemory,
/* hexagon_S4_or_andix */ DoesNotAccessMemory,
/* hexagon_S4_or_ori */ DoesNotAccessMemory,
/* hexagon_S4_ornp */ DoesNotAccessMemory,
/* hexagon_S4_subaddi */ DoesNotAccessMemory,
/* hexagon_SI_to_SXTHI_asrh */ DoesNotAccessMemory,
/* init_trampoline */ OnlyAccessesArgumentPointees,
/* invariant_end */ OnlyAccessesArgumentPointees,
/* invariant_start */ OnlyAccessesArgumentPointees,
/* lifetime_end */ OnlyAccessesArgumentPointees,
/* lifetime_start */ OnlyAccessesArgumentPointees,
/* log */ OnlyReadsMemory,
/* log10 */ OnlyReadsMemory,
/* log2 */ OnlyReadsMemory,
/* longjmp */ UnknownModRefBehavior,
/* memcpy */ OnlyAccessesArgumentPointees,
/* memmove */ OnlyAccessesArgumentPointees,
/* memset */ OnlyAccessesArgumentPointees,
/* objectsize */ DoesNotAccessMemory,
/* pcmarker */ UnknownModRefBehavior,
/* pow */ OnlyReadsMemory,
/* powi */ OnlyReadsMemory,
/* ppc_altivec_dss */ UnknownModRefBehavior,
/* ppc_altivec_dssall */ UnknownModRefBehavior,
/* ppc_altivec_dst */ UnknownModRefBehavior,
/* ppc_altivec_dstst */ UnknownModRefBehavior,
/* ppc_altivec_dststt */ UnknownModRefBehavior,
/* ppc_altivec_dstt */ UnknownModRefBehavior,
/* ppc_altivec_lvebx */ OnlyReadsMemory,
/* ppc_altivec_lvehx */ OnlyReadsMemory,
/* ppc_altivec_lvewx */ OnlyReadsMemory,
/* ppc_altivec_lvsl */ DoesNotAccessMemory,
/* ppc_altivec_lvsr */ DoesNotAccessMemory,
/* ppc_altivec_lvx */ OnlyReadsMemory,
/* ppc_altivec_lvxl */ OnlyReadsMemory,
/* ppc_altivec_mfvscr */ OnlyReadsMemory,
/* ppc_altivec_mtvscr */ UnknownModRefBehavior,
/* ppc_altivec_stvebx */ UnknownModRefBehavior,
/* ppc_altivec_stvehx */ UnknownModRefBehavior,
/* ppc_altivec_stvewx */ UnknownModRefBehavior,
/* ppc_altivec_stvx */ UnknownModRefBehavior,
/* ppc_altivec_stvxl */ UnknownModRefBehavior,
/* ppc_altivec_vaddcuw */ DoesNotAccessMemory,
/* ppc_altivec_vaddsbs */ DoesNotAccessMemory,
/* ppc_altivec_vaddshs */ DoesNotAccessMemory,
/* ppc_altivec_vaddsws */ DoesNotAccessMemory,
/* ppc_altivec_vaddubs */ DoesNotAccessMemory,
/* ppc_altivec_vadduhs */ DoesNotAccessMemory,
/* ppc_altivec_vadduws */ DoesNotAccessMemory,
/* ppc_altivec_vavgsb */ DoesNotAccessMemory,
/* ppc_altivec_vavgsh */ DoesNotAccessMemory,
/* ppc_altivec_vavgsw */ DoesNotAccessMemory,
/* ppc_altivec_vavgub */ DoesNotAccessMemory,
/* ppc_altivec_vavguh */ DoesNotAccessMemory,
/* ppc_altivec_vavguw */ DoesNotAccessMemory,
/* ppc_altivec_vcfsx */ DoesNotAccessMemory,
/* ppc_altivec_vcfux */ DoesNotAccessMemory,
/* ppc_altivec_vcmpbfp */ DoesNotAccessMemory,
/* ppc_altivec_vcmpbfp_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpeqfp */ DoesNotAccessMemory,
/* ppc_altivec_vcmpeqfp_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpequb */ DoesNotAccessMemory,
/* ppc_altivec_vcmpequb_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpequh */ DoesNotAccessMemory,
/* ppc_altivec_vcmpequh_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpequw */ DoesNotAccessMemory,
/* ppc_altivec_vcmpequw_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgefp */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgefp_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtfp */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtfp_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtsb */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtsb_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtsh */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtsh_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtsw */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtsw_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtub */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtub_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtuh */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtuh_p */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtuw */ DoesNotAccessMemory,
/* ppc_altivec_vcmpgtuw_p */ DoesNotAccessMemory,
/* ppc_altivec_vctsxs */ DoesNotAccessMemory,
/* ppc_altivec_vctuxs */ DoesNotAccessMemory,
/* ppc_altivec_vexptefp */ DoesNotAccessMemory,
/* ppc_altivec_vlogefp */ DoesNotAccessMemory,
/* ppc_altivec_vmaddfp */ DoesNotAccessMemory,
/* ppc_altivec_vmaxfp */ DoesNotAccessMemory,
/* ppc_altivec_vmaxsb */ DoesNotAccessMemory,
/* ppc_altivec_vmaxsh */ DoesNotAccessMemory,
/* ppc_altivec_vmaxsw */ DoesNotAccessMemory,
/* ppc_altivec_vmaxub */ DoesNotAccessMemory,
/* ppc_altivec_vmaxuh */ DoesNotAccessMemory,
/* ppc_altivec_vmaxuw */ DoesNotAccessMemory,
/* ppc_altivec_vmhaddshs */ DoesNotAccessMemory,
/* ppc_altivec_vmhraddshs */ DoesNotAccessMemory,
/* ppc_altivec_vminfp */ DoesNotAccessMemory,
/* ppc_altivec_vminsb */ DoesNotAccessMemory,
/* ppc_altivec_vminsh */ DoesNotAccessMemory,
/* ppc_altivec_vminsw */ DoesNotAccessMemory,
/* ppc_altivec_vminub */ DoesNotAccessMemory,
/* ppc_altivec_vminuh */ DoesNotAccessMemory,
/* ppc_altivec_vminuw */ DoesNotAccessMemory,
/* ppc_altivec_vmladduhm */ DoesNotAccessMemory,
/* ppc_altivec_vmsummbm */ DoesNotAccessMemory,
/* ppc_altivec_vmsumshm */ DoesNotAccessMemory,
/* ppc_altivec_vmsumshs */ DoesNotAccessMemory,
/* ppc_altivec_vmsumubm */ DoesNotAccessMemory,
/* ppc_altivec_vmsumuhm */ DoesNotAccessMemory,
/* ppc_altivec_vmsumuhs */ DoesNotAccessMemory,
/* ppc_altivec_vmulesb */ DoesNotAccessMemory,
/* ppc_altivec_vmulesh */ DoesNotAccessMemory,
/* ppc_altivec_vmuleub */ DoesNotAccessMemory,
/* ppc_altivec_vmuleuh */ DoesNotAccessMemory,
/* ppc_altivec_vmulosb */ DoesNotAccessMemory,
/* ppc_altivec_vmulosh */ DoesNotAccessMemory,
/* ppc_altivec_vmuloub */ DoesNotAccessMemory,
/* ppc_altivec_vmulouh */ DoesNotAccessMemory,
/* ppc_altivec_vnmsubfp */ DoesNotAccessMemory,
/* ppc_altivec_vperm */ DoesNotAccessMemory,
/* ppc_altivec_vpkpx */ DoesNotAccessMemory,
/* ppc_altivec_vpkshss */ DoesNotAccessMemory,
/* ppc_altivec_vpkshus */ DoesNotAccessMemory,
/* ppc_altivec_vpkswss */ DoesNotAccessMemory,
/* ppc_altivec_vpkswus */ DoesNotAccessMemory,
/* ppc_altivec_vpkuhus */ DoesNotAccessMemory,
/* ppc_altivec_vpkuwus */ DoesNotAccessMemory,
/* ppc_altivec_vrefp */ DoesNotAccessMemory,
/* ppc_altivec_vrfim */ DoesNotAccessMemory,
/* ppc_altivec_vrfin */ DoesNotAccessMemory,
/* ppc_altivec_vrfip */ DoesNotAccessMemory,
/* ppc_altivec_vrfiz */ DoesNotAccessMemory,
/* ppc_altivec_vrlb */ DoesNotAccessMemory,
/* ppc_altivec_vrlh */ DoesNotAccessMemory,
/* ppc_altivec_vrlw */ DoesNotAccessMemory,
/* ppc_altivec_vrsqrtefp */ DoesNotAccessMemory,
/* ppc_altivec_vsel */ DoesNotAccessMemory,
/* ppc_altivec_vsl */ DoesNotAccessMemory,
/* ppc_altivec_vslb */ DoesNotAccessMemory,
/* ppc_altivec_vslh */ DoesNotAccessMemory,
/* ppc_altivec_vslo */ DoesNotAccessMemory,
/* ppc_altivec_vslw */ DoesNotAccessMemory,
/* ppc_altivec_vsr */ DoesNotAccessMemory,
/* ppc_altivec_vsrab */ DoesNotAccessMemory,
/* ppc_altivec_vsrah */ DoesNotAccessMemory,
/* ppc_altivec_vsraw */ DoesNotAccessMemory,
/* ppc_altivec_vsrb */ DoesNotAccessMemory,
/* ppc_altivec_vsrh */ DoesNotAccessMemory,
/* ppc_altivec_vsro */ DoesNotAccessMemory,
/* ppc_altivec_vsrw */ DoesNotAccessMemory,
/* ppc_altivec_vsubcuw */ DoesNotAccessMemory,
/* ppc_altivec_vsubsbs */ DoesNotAccessMemory,
/* ppc_altivec_vsubshs */ DoesNotAccessMemory,
/* ppc_altivec_vsubsws */ DoesNotAccessMemory,
/* ppc_altivec_vsububs */ DoesNotAccessMemory,
/* ppc_altivec_vsubuhs */ DoesNotAccessMemory,
/* ppc_altivec_vsubuws */ DoesNotAccessMemory,
/* ppc_altivec_vsum2sws */ DoesNotAccessMemory,
/* ppc_altivec_vsum4sbs */ DoesNotAccessMemory,
/* ppc_altivec_vsum4shs */ DoesNotAccessMemory,
/* ppc_altivec_vsum4ubs */ DoesNotAccessMemory,
/* ppc_altivec_vsumsws */ DoesNotAccessMemory,
/* ppc_altivec_vupkhpx */ DoesNotAccessMemory,
/* ppc_altivec_vupkhsb */ DoesNotAccessMemory,
/* ppc_altivec_vupkhsh */ DoesNotAccessMemory,
/* ppc_altivec_vupklpx */ DoesNotAccessMemory,
/* ppc_altivec_vupklsb */ DoesNotAccessMemory,
/* ppc_altivec_vupklsh */ DoesNotAccessMemory,
/* ppc_dcba */ UnknownModRefBehavior,
/* ppc_dcbf */ UnknownModRefBehavior,
/* ppc_dcbi */ UnknownModRefBehavior,
/* ppc_dcbst */ UnknownModRefBehavior,
/* ppc_dcbt */ UnknownModRefBehavior,
/* ppc_dcbtst */ UnknownModRefBehavior,
/* ppc_dcbz */ UnknownModRefBehavior,
/* ppc_dcbzl */ UnknownModRefBehavior,
/* ppc_sync */ UnknownModRefBehavior,
/* prefetch */ OnlyAccessesArgumentPointees,
/* ptr_annotation */ UnknownModRefBehavior,
/* ptx_bar_sync */ UnknownModRefBehavior,
/* ptx_read_clock */ DoesNotAccessMemory,
/* ptx_read_clock64 */ DoesNotAccessMemory,
/* ptx_read_ctaid_w */ DoesNotAccessMemory,
/* ptx_read_ctaid_x */ DoesNotAccessMemory,
/* ptx_read_ctaid_y */ DoesNotAccessMemory,
/* ptx_read_ctaid_z */ DoesNotAccessMemory,
/* ptx_read_gridid */ DoesNotAccessMemory,
/* ptx_read_laneid */ DoesNotAccessMemory,
/* ptx_read_lanemask_eq */ DoesNotAccessMemory,
/* ptx_read_lanemask_ge */ DoesNotAccessMemory,
/* ptx_read_lanemask_gt */ DoesNotAccessMemory,
/* ptx_read_lanemask_le */ DoesNotAccessMemory,
/* ptx_read_lanemask_lt */ DoesNotAccessMemory,
/* ptx_read_nctaid_w */ DoesNotAccessMemory,
/* ptx_read_nctaid_x */ DoesNotAccessMemory,
/* ptx_read_nctaid_y */ DoesNotAccessMemory,
/* ptx_read_nctaid_z */ DoesNotAccessMemory,
/* ptx_read_nsmid */ DoesNotAccessMemory,
/* ptx_read_ntid_w */ DoesNotAccessMemory,
/* ptx_read_ntid_x */ DoesNotAccessMemory,
/* ptx_read_ntid_y */ DoesNotAccessMemory,
/* ptx_read_ntid_z */ DoesNotAccessMemory,
/* ptx_read_nwarpid */ DoesNotAccessMemory,
/* ptx_read_pm0 */ DoesNotAccessMemory,
/* ptx_read_pm1 */ DoesNotAccessMemory,
/* ptx_read_pm2 */ DoesNotAccessMemory,
/* ptx_read_pm3 */ DoesNotAccessMemory,
/* ptx_read_smid */ DoesNotAccessMemory,
/* ptx_read_tid_w */ DoesNotAccessMemory,
/* ptx_read_tid_x */ DoesNotAccessMemory,
/* ptx_read_tid_y */ DoesNotAccessMemory,
/* ptx_read_tid_z */ DoesNotAccessMemory,
/* ptx_read_warpid */ DoesNotAccessMemory,
/* readcyclecounter */ UnknownModRefBehavior,
/* returnaddress */ DoesNotAccessMemory,
/* sadd_with_overflow */ DoesNotAccessMemory,
/* setjmp */ UnknownModRefBehavior,
/* siglongjmp */ UnknownModRefBehavior,
/* sigsetjmp */ UnknownModRefBehavior,
/* sin */ OnlyReadsMemory,
/* smul_with_overflow */ DoesNotAccessMemory,
/* spu_si_a */ DoesNotAccessMemory,
/* spu_si_addx */ DoesNotAccessMemory,
/* spu_si_ah */ DoesNotAccessMemory,
/* spu_si_ahi */ DoesNotAccessMemory,
/* spu_si_ai */ DoesNotAccessMemory,
/* spu_si_and */ DoesNotAccessMemory,
/* spu_si_andbi */ DoesNotAccessMemory,
/* spu_si_andc */ DoesNotAccessMemory,
/* spu_si_andhi */ DoesNotAccessMemory,
/* spu_si_andi */ DoesNotAccessMemory,
/* spu_si_bg */ DoesNotAccessMemory,
/* spu_si_bgx */ DoesNotAccessMemory,
/* spu_si_ceq */ DoesNotAccessMemory,
/* spu_si_ceqb */ DoesNotAccessMemory,
/* spu_si_ceqbi */ DoesNotAccessMemory,
/* spu_si_ceqh */ DoesNotAccessMemory,
/* spu_si_ceqhi */ DoesNotAccessMemory,
/* spu_si_ceqi */ DoesNotAccessMemory,
/* spu_si_cg */ DoesNotAccessMemory,
/* spu_si_cgt */ DoesNotAccessMemory,
/* spu_si_cgtb */ DoesNotAccessMemory,
/* spu_si_cgtbi */ DoesNotAccessMemory,
/* spu_si_cgth */ DoesNotAccessMemory,
/* spu_si_cgthi */ DoesNotAccessMemory,
/* spu_si_cgti */ DoesNotAccessMemory,
/* spu_si_cgx */ DoesNotAccessMemory,
/* spu_si_clgt */ DoesNotAccessMemory,
/* spu_si_clgtb */ DoesNotAccessMemory,
/* spu_si_clgtbi */ DoesNotAccessMemory,
/* spu_si_clgth */ DoesNotAccessMemory,
/* spu_si_clgthi */ DoesNotAccessMemory,
/* spu_si_clgti */ DoesNotAccessMemory,
/* spu_si_dfa */ DoesNotAccessMemory,
/* spu_si_dfm */ DoesNotAccessMemory,
/* spu_si_dfma */ DoesNotAccessMemory,
/* spu_si_dfms */ DoesNotAccessMemory,
/* spu_si_dfnma */ DoesNotAccessMemory,
/* spu_si_dfnms */ DoesNotAccessMemory,
/* spu_si_dfs */ DoesNotAccessMemory,
/* spu_si_fa */ DoesNotAccessMemory,
/* spu_si_fceq */ DoesNotAccessMemory,
/* spu_si_fcgt */ DoesNotAccessMemory,
/* spu_si_fcmeq */ DoesNotAccessMemory,
/* spu_si_fcmgt */ DoesNotAccessMemory,
/* spu_si_fm */ DoesNotAccessMemory,
/* spu_si_fma */ DoesNotAccessMemory,
/* spu_si_fms */ DoesNotAccessMemory,
/* spu_si_fnms */ DoesNotAccessMemory,
/* spu_si_fs */ DoesNotAccessMemory,
/* spu_si_fsmbi */ DoesNotAccessMemory,
/* spu_si_mpy */ DoesNotAccessMemory,
/* spu_si_mpya */ DoesNotAccessMemory,
/* spu_si_mpyh */ DoesNotAccessMemory,
/* spu_si_mpyhh */ DoesNotAccessMemory,
/* spu_si_mpyhha */ DoesNotAccessMemory,
/* spu_si_mpyhhau */ DoesNotAccessMemory,
/* spu_si_mpyhhu */ DoesNotAccessMemory,
/* spu_si_mpyi */ DoesNotAccessMemory,
/* spu_si_mpys */ DoesNotAccessMemory,
/* spu_si_mpyu */ DoesNotAccessMemory,
/* spu_si_mpyui */ DoesNotAccessMemory,
/* spu_si_nand */ DoesNotAccessMemory,
/* spu_si_nor */ DoesNotAccessMemory,
/* spu_si_or */ DoesNotAccessMemory,
/* spu_si_orbi */ DoesNotAccessMemory,
/* spu_si_orc */ DoesNotAccessMemory,
/* spu_si_orhi */ DoesNotAccessMemory,
/* spu_si_ori */ DoesNotAccessMemory,
/* spu_si_sf */ DoesNotAccessMemory,
/* spu_si_sfh */ DoesNotAccessMemory,
/* spu_si_sfhi */ DoesNotAccessMemory,
/* spu_si_sfi */ DoesNotAccessMemory,
/* spu_si_sfx */ DoesNotAccessMemory,
/* spu_si_shli */ DoesNotAccessMemory,
/* spu_si_shlqbi */ DoesNotAccessMemory,
/* spu_si_shlqbii */ DoesNotAccessMemory,
/* spu_si_shlqby */ DoesNotAccessMemory,
/* spu_si_shlqbyi */ DoesNotAccessMemory,
/* spu_si_xor */ DoesNotAccessMemory,
/* spu_si_xorbi */ DoesNotAccessMemory,
/* spu_si_xorhi */ DoesNotAccessMemory,
/* spu_si_xori */ DoesNotAccessMemory,
/* sqrt */ OnlyReadsMemory,
/* ssub_with_overflow */ DoesNotAccessMemory,
/* stackprotector */ UnknownModRefBehavior,
/* stackrestore */ UnknownModRefBehavior,
/* stacksave */ UnknownModRefBehavior,
/* toffoli */ UnknownModRefBehavior,
/* trap */ UnknownModRefBehavior,
/* uadd_with_overflow */ DoesNotAccessMemory,
/* umul_with_overflow */ DoesNotAccessMemory,
/* usub_with_overflow */ DoesNotAccessMemory,
/* vacopy */ UnknownModRefBehavior,
/* vaend */ UnknownModRefBehavior,
/* var_annotation */ UnknownModRefBehavior,
/* vastart */ UnknownModRefBehavior,
/* x86_3dnow_pavgusb */ DoesNotAccessMemory,
/* x86_3dnow_pf2id */ DoesNotAccessMemory,
/* x86_3dnow_pfacc */ DoesNotAccessMemory,
/* x86_3dnow_pfadd */ DoesNotAccessMemory,
/* x86_3dnow_pfcmpeq */ DoesNotAccessMemory,
/* x86_3dnow_pfcmpge */ DoesNotAccessMemory,
/* x86_3dnow_pfcmpgt */ DoesNotAccessMemory,
/* x86_3dnow_pfmax */ DoesNotAccessMemory,
/* x86_3dnow_pfmin */ DoesNotAccessMemory,
/* x86_3dnow_pfmul */ DoesNotAccessMemory,
/* x86_3dnow_pfrcp */ DoesNotAccessMemory,
/* x86_3dnow_pfrcpit1 */ DoesNotAccessMemory,
/* x86_3dnow_pfrcpit2 */ DoesNotAccessMemory,
/* x86_3dnow_pfrsqit1 */ DoesNotAccessMemory,
/* x86_3dnow_pfrsqrt */ DoesNotAccessMemory,
/* x86_3dnow_pfsub */ DoesNotAccessMemory,
/* x86_3dnow_pfsubr */ DoesNotAccessMemory,
/* x86_3dnow_pi2fd */ DoesNotAccessMemory,
/* x86_3dnow_pmulhrw */ DoesNotAccessMemory,
/* x86_3dnowa_pf2iw */ DoesNotAccessMemory,
/* x86_3dnowa_pfnacc */ DoesNotAccessMemory,
/* x86_3dnowa_pfpnacc */ DoesNotAccessMemory,
/* x86_3dnowa_pi2fw */ DoesNotAccessMemory,
/* x86_3dnowa_pswapd */ DoesNotAccessMemory,
/* x86_aesni_aesdec */ DoesNotAccessMemory,
/* x86_aesni_aesdeclast */ DoesNotAccessMemory,
/* x86_aesni_aesenc */ DoesNotAccessMemory,
/* x86_aesni_aesenclast */ DoesNotAccessMemory,
/* x86_aesni_aesimc */ DoesNotAccessMemory,
/* x86_aesni_aeskeygenassist */ DoesNotAccessMemory,
/* x86_avx2_maskload_d */ OnlyReadsMemory,
/* x86_avx2_maskload_d_256 */ OnlyReadsMemory,
/* x86_avx2_maskload_q */ OnlyReadsMemory,
/* x86_avx2_maskload_q_256 */ OnlyReadsMemory,
/* x86_avx2_maskstore_d */ UnknownModRefBehavior,
/* x86_avx2_maskstore_d_256 */ UnknownModRefBehavior,
/* x86_avx2_maskstore_q */ UnknownModRefBehavior,
/* x86_avx2_maskstore_q_256 */ UnknownModRefBehavior,
/* x86_avx2_movntdqa */ OnlyReadsMemory,
/* x86_avx2_mpsadbw */ DoesNotAccessMemory,
/* x86_avx2_pabs_b */ DoesNotAccessMemory,
/* x86_avx2_pabs_d */ DoesNotAccessMemory,
/* x86_avx2_pabs_w */ DoesNotAccessMemory,
/* x86_avx2_packssdw */ DoesNotAccessMemory,
/* x86_avx2_packsswb */ DoesNotAccessMemory,
/* x86_avx2_packusdw */ DoesNotAccessMemory,
/* x86_avx2_packuswb */ DoesNotAccessMemory,
/* x86_avx2_padds_b */ DoesNotAccessMemory,
/* x86_avx2_padds_w */ DoesNotAccessMemory,
/* x86_avx2_paddus_b */ DoesNotAccessMemory,
/* x86_avx2_paddus_w */ DoesNotAccessMemory,
/* x86_avx2_pavg_b */ DoesNotAccessMemory,
/* x86_avx2_pavg_w */ DoesNotAccessMemory,
/* x86_avx2_pblendd_128 */ DoesNotAccessMemory,
/* x86_avx2_pblendd_256 */ DoesNotAccessMemory,
/* x86_avx2_pblendvb */ DoesNotAccessMemory,
/* x86_avx2_pblendw */ DoesNotAccessMemory,
/* x86_avx2_pbroadcastb_128 */ DoesNotAccessMemory,
/* x86_avx2_pbroadcastb_256 */ DoesNotAccessMemory,
/* x86_avx2_pbroadcastd_128 */ DoesNotAccessMemory,
/* x86_avx2_pbroadcastd_256 */ DoesNotAccessMemory,
/* x86_avx2_pbroadcastq_128 */ DoesNotAccessMemory,
/* x86_avx2_pbroadcastq_256 */ DoesNotAccessMemory,
/* x86_avx2_pbroadcastw_128 */ DoesNotAccessMemory,
/* x86_avx2_pbroadcastw_256 */ DoesNotAccessMemory,
/* x86_avx2_permd */ DoesNotAccessMemory,
/* x86_avx2_permps */ DoesNotAccessMemory,
/* x86_avx2_phadd_d */ DoesNotAccessMemory,
/* x86_avx2_phadd_sw */ DoesNotAccessMemory,
/* x86_avx2_phadd_w */ DoesNotAccessMemory,
/* x86_avx2_phsub_d */ DoesNotAccessMemory,
/* x86_avx2_phsub_sw */ DoesNotAccessMemory,
/* x86_avx2_phsub_w */ DoesNotAccessMemory,
/* x86_avx2_pmadd_ub_sw */ DoesNotAccessMemory,
/* x86_avx2_pmadd_wd */ DoesNotAccessMemory,
/* x86_avx2_pmaxs_b */ DoesNotAccessMemory,
/* x86_avx2_pmaxs_d */ DoesNotAccessMemory,
/* x86_avx2_pmaxs_w */ DoesNotAccessMemory,
/* x86_avx2_pmaxu_b */ DoesNotAccessMemory,
/* x86_avx2_pmaxu_d */ DoesNotAccessMemory,
/* x86_avx2_pmaxu_w */ DoesNotAccessMemory,
/* x86_avx2_pmins_b */ DoesNotAccessMemory,
/* x86_avx2_pmins_d */ DoesNotAccessMemory,
/* x86_avx2_pmins_w */ DoesNotAccessMemory,
/* x86_avx2_pminu_b */ DoesNotAccessMemory,
/* x86_avx2_pminu_d */ DoesNotAccessMemory,
/* x86_avx2_pminu_w */ DoesNotAccessMemory,
/* x86_avx2_pmovmskb */ DoesNotAccessMemory,
/* x86_avx2_pmovsxbd */ DoesNotAccessMemory,
/* x86_avx2_pmovsxbq */ DoesNotAccessMemory,
/* x86_avx2_pmovsxbw */ DoesNotAccessMemory,
/* x86_avx2_pmovsxdq */ DoesNotAccessMemory,
/* x86_avx2_pmovsxwd */ DoesNotAccessMemory,
/* x86_avx2_pmovsxwq */ DoesNotAccessMemory,
/* x86_avx2_pmovzxbd */ DoesNotAccessMemory,
/* x86_avx2_pmovzxbq */ DoesNotAccessMemory,
/* x86_avx2_pmovzxbw */ DoesNotAccessMemory,
/* x86_avx2_pmovzxdq */ DoesNotAccessMemory,
/* x86_avx2_pmovzxwd */ DoesNotAccessMemory,
/* x86_avx2_pmovzxwq */ DoesNotAccessMemory,
/* x86_avx2_pmul_dq */ DoesNotAccessMemory,
/* x86_avx2_pmul_hr_sw */ DoesNotAccessMemory,
/* x86_avx2_pmulh_w */ DoesNotAccessMemory,
/* x86_avx2_pmulhu_w */ DoesNotAccessMemory,
/* x86_avx2_pmulu_dq */ DoesNotAccessMemory,
/* x86_avx2_psad_bw */ DoesNotAccessMemory,
/* x86_avx2_pshuf_b */ DoesNotAccessMemory,
/* x86_avx2_psign_b */ DoesNotAccessMemory,
/* x86_avx2_psign_d */ DoesNotAccessMemory,
/* x86_avx2_psign_w */ DoesNotAccessMemory,
/* x86_avx2_psll_d */ DoesNotAccessMemory,
/* x86_avx2_psll_dq */ DoesNotAccessMemory,
/* x86_avx2_psll_dq_bs */ DoesNotAccessMemory,
/* x86_avx2_psll_q */ DoesNotAccessMemory,
/* x86_avx2_psll_w */ DoesNotAccessMemory,
/* x86_avx2_pslli_d */ DoesNotAccessMemory,
/* x86_avx2_pslli_q */ DoesNotAccessMemory,
/* x86_avx2_pslli_w */ DoesNotAccessMemory,
/* x86_avx2_psllv_d */ DoesNotAccessMemory,
/* x86_avx2_psllv_d_256 */ DoesNotAccessMemory,
/* x86_avx2_psllv_q */ DoesNotAccessMemory,
/* x86_avx2_psllv_q_256 */ DoesNotAccessMemory,
/* x86_avx2_psra_d */ DoesNotAccessMemory,
/* x86_avx2_psra_w */ DoesNotAccessMemory,
/* x86_avx2_psrai_d */ DoesNotAccessMemory,
/* x86_avx2_psrai_w */ DoesNotAccessMemory,
/* x86_avx2_psrav_d */ DoesNotAccessMemory,
/* x86_avx2_psrav_d_256 */ DoesNotAccessMemory,
/* x86_avx2_psrl_d */ DoesNotAccessMemory,
/* x86_avx2_psrl_dq */ DoesNotAccessMemory,
/* x86_avx2_psrl_dq_bs */ DoesNotAccessMemory,
/* x86_avx2_psrl_q */ DoesNotAccessMemory,
/* x86_avx2_psrl_w */ DoesNotAccessMemory,
/* x86_avx2_psrli_d */ DoesNotAccessMemory,
/* x86_avx2_psrli_q */ DoesNotAccessMemory,
/* x86_avx2_psrli_w */ DoesNotAccessMemory,
/* x86_avx2_psrlv_d */ DoesNotAccessMemory,
/* x86_avx2_psrlv_d_256 */ DoesNotAccessMemory,
/* x86_avx2_psrlv_q */ DoesNotAccessMemory,
/* x86_avx2_psrlv_q_256 */ DoesNotAccessMemory,
/* x86_avx2_psubs_b */ DoesNotAccessMemory,
/* x86_avx2_psubs_w */ DoesNotAccessMemory,
/* x86_avx2_psubus_b */ DoesNotAccessMemory,
/* x86_avx2_psubus_w */ DoesNotAccessMemory,
/* x86_avx2_vbroadcast_sd_pd_256 */ DoesNotAccessMemory,
/* x86_avx2_vbroadcast_ss_ps */ DoesNotAccessMemory,
/* x86_avx2_vbroadcast_ss_ps_256 */ DoesNotAccessMemory,
/* x86_avx2_vbroadcasti128 */ OnlyReadsMemory,
/* x86_avx2_vextracti128 */ DoesNotAccessMemory,
/* x86_avx2_vinserti128 */ DoesNotAccessMemory,
/* x86_avx2_vperm2i128 */ DoesNotAccessMemory,
/* x86_avx_addsub_pd_256 */ DoesNotAccessMemory,
/* x86_avx_addsub_ps_256 */ DoesNotAccessMemory,
/* x86_avx_blend_pd_256 */ DoesNotAccessMemory,
/* x86_avx_blend_ps_256 */ DoesNotAccessMemory,
/* x86_avx_blendv_pd_256 */ DoesNotAccessMemory,
/* x86_avx_blendv_ps_256 */ DoesNotAccessMemory,
/* x86_avx_cmp_pd_256 */ DoesNotAccessMemory,
/* x86_avx_cmp_ps_256 */ DoesNotAccessMemory,
/* x86_avx_cvt_pd2_ps_256 */ DoesNotAccessMemory,
/* x86_avx_cvt_pd2dq_256 */ DoesNotAccessMemory,
/* x86_avx_cvt_ps2_pd_256 */ DoesNotAccessMemory,
/* x86_avx_cvt_ps2dq_256 */ DoesNotAccessMemory,
/* x86_avx_cvtdq2_pd_256 */ DoesNotAccessMemory,
/* x86_avx_cvtdq2_ps_256 */ DoesNotAccessMemory,
/* x86_avx_cvtt_pd2dq_256 */ DoesNotAccessMemory,
/* x86_avx_cvtt_ps2dq_256 */ DoesNotAccessMemory,
/* x86_avx_dp_ps_256 */ DoesNotAccessMemory,
/* x86_avx_hadd_pd_256 */ DoesNotAccessMemory,
/* x86_avx_hadd_ps_256 */ DoesNotAccessMemory,
/* x86_avx_hsub_pd_256 */ DoesNotAccessMemory,
/* x86_avx_hsub_ps_256 */ DoesNotAccessMemory,
/* x86_avx_ldu_dq_256 */ OnlyReadsMemory,
/* x86_avx_maskload_pd */ OnlyReadsMemory,
/* x86_avx_maskload_pd_256 */ OnlyReadsMemory,
/* x86_avx_maskload_ps */ OnlyReadsMemory,
/* x86_avx_maskload_ps_256 */ OnlyReadsMemory,
/* x86_avx_maskstore_pd */ UnknownModRefBehavior,
/* x86_avx_maskstore_pd_256 */ UnknownModRefBehavior,
/* x86_avx_maskstore_ps */ UnknownModRefBehavior,
/* x86_avx_maskstore_ps_256 */ UnknownModRefBehavior,
/* x86_avx_max_pd_256 */ DoesNotAccessMemory,
/* x86_avx_max_ps_256 */ DoesNotAccessMemory,
/* x86_avx_min_pd_256 */ DoesNotAccessMemory,
/* x86_avx_min_ps_256 */ DoesNotAccessMemory,
/* x86_avx_movmsk_pd_256 */ DoesNotAccessMemory,
/* x86_avx_movmsk_ps_256 */ DoesNotAccessMemory,
/* x86_avx_movnt_dq_256 */ UnknownModRefBehavior,
/* x86_avx_movnt_pd_256 */ UnknownModRefBehavior,
/* x86_avx_movnt_ps_256 */ UnknownModRefBehavior,
/* x86_avx_ptestc_256 */ DoesNotAccessMemory,
/* x86_avx_ptestnzc_256 */ DoesNotAccessMemory,
/* x86_avx_ptestz_256 */ DoesNotAccessMemory,
/* x86_avx_rcp_ps_256 */ DoesNotAccessMemory,
/* x86_avx_round_pd_256 */ DoesNotAccessMemory,
/* x86_avx_round_ps_256 */ DoesNotAccessMemory,
/* x86_avx_rsqrt_ps_256 */ DoesNotAccessMemory,
/* x86_avx_sqrt_pd_256 */ DoesNotAccessMemory,
/* x86_avx_sqrt_ps_256 */ DoesNotAccessMemory,
/* x86_avx_storeu_dq_256 */ UnknownModRefBehavior,
/* x86_avx_storeu_pd_256 */ UnknownModRefBehavior,
/* x86_avx_storeu_ps_256 */ UnknownModRefBehavior,
/* x86_avx_vbroadcast_sd_256 */ OnlyReadsMemory,
/* x86_avx_vbroadcast_ss */ OnlyReadsMemory,
/* x86_avx_vbroadcast_ss_256 */ OnlyReadsMemory,
/* x86_avx_vbroadcastf128_pd_256 */ OnlyReadsMemory,
/* x86_avx_vbroadcastf128_ps_256 */ OnlyReadsMemory,
/* x86_avx_vextractf128_pd_256 */ DoesNotAccessMemory,
/* x86_avx_vextractf128_ps_256 */ DoesNotAccessMemory,
/* x86_avx_vextractf128_si_256 */ DoesNotAccessMemory,
/* x86_avx_vinsertf128_pd_256 */ DoesNotAccessMemory,
/* x86_avx_vinsertf128_ps_256 */ DoesNotAccessMemory,
/* x86_avx_vinsertf128_si_256 */ DoesNotAccessMemory,
/* x86_avx_vperm2f128_pd_256 */ DoesNotAccessMemory,
/* x86_avx_vperm2f128_ps_256 */ DoesNotAccessMemory,
/* x86_avx_vperm2f128_si_256 */ DoesNotAccessMemory,
/* x86_avx_vpermilvar_pd */ DoesNotAccessMemory,
/* x86_avx_vpermilvar_pd_256 */ DoesNotAccessMemory,
/* x86_avx_vpermilvar_ps */ DoesNotAccessMemory,
/* x86_avx_vpermilvar_ps_256 */ DoesNotAccessMemory,
/* x86_avx_vtestc_pd */ DoesNotAccessMemory,
/* x86_avx_vtestc_pd_256 */ DoesNotAccessMemory,
/* x86_avx_vtestc_ps */ DoesNotAccessMemory,
/* x86_avx_vtestc_ps_256 */ DoesNotAccessMemory,
/* x86_avx_vtestnzc_pd */ DoesNotAccessMemory,
/* x86_avx_vtestnzc_pd_256 */ DoesNotAccessMemory,
/* x86_avx_vtestnzc_ps */ DoesNotAccessMemory,
/* x86_avx_vtestnzc_ps_256 */ DoesNotAccessMemory,
/* x86_avx_vtestz_pd */ DoesNotAccessMemory,
/* x86_avx_vtestz_pd_256 */ DoesNotAccessMemory,
/* x86_avx_vtestz_ps */ DoesNotAccessMemory,
/* x86_avx_vtestz_ps_256 */ DoesNotAccessMemory,
/* x86_avx_vzeroall */ UnknownModRefBehavior,
/* x86_avx_vzeroupper */ UnknownModRefBehavior,
/* x86_bmi_bextr_32 */ DoesNotAccessMemory,
/* x86_bmi_bextr_64 */ DoesNotAccessMemory,
/* x86_bmi_bzhi_32 */ DoesNotAccessMemory,
/* x86_bmi_bzhi_64 */ DoesNotAccessMemory,
/* x86_bmi_pdep_32 */ DoesNotAccessMemory,
/* x86_bmi_pdep_64 */ DoesNotAccessMemory,
/* x86_bmi_pext_32 */ DoesNotAccessMemory,
/* x86_bmi_pext_64 */ DoesNotAccessMemory,
/* x86_fma4_vfmadd_pd */ DoesNotAccessMemory,
/* x86_fma4_vfmadd_pd_256 */ DoesNotAccessMemory,
/* x86_fma4_vfmadd_ps */ DoesNotAccessMemory,
/* x86_fma4_vfmadd_ps_256 */ DoesNotAccessMemory,
/* x86_fma4_vfmadd_sd */ DoesNotAccessMemory,
/* x86_fma4_vfmadd_ss */ DoesNotAccessMemory,
/* x86_fma4_vfmaddsub_pd */ DoesNotAccessMemory,
/* x86_fma4_vfmaddsub_pd_256 */ DoesNotAccessMemory,
/* x86_fma4_vfmaddsub_ps */ DoesNotAccessMemory,
/* x86_fma4_vfmaddsub_ps_256 */ DoesNotAccessMemory,
/* x86_fma4_vfmsub_pd */ DoesNotAccessMemory,
/* x86_fma4_vfmsub_pd_256 */ DoesNotAccessMemory,
/* x86_fma4_vfmsub_ps */ DoesNotAccessMemory,
/* x86_fma4_vfmsub_ps_256 */ DoesNotAccessMemory,
/* x86_fma4_vfmsub_sd */ DoesNotAccessMemory,
/* x86_fma4_vfmsub_ss */ DoesNotAccessMemory,
/* x86_fma4_vfmsubadd_pd */ DoesNotAccessMemory,
/* x86_fma4_vfmsubadd_pd_256 */ DoesNotAccessMemory,
/* x86_fma4_vfmsubadd_ps */ DoesNotAccessMemory,
/* x86_fma4_vfmsubadd_ps_256 */ DoesNotAccessMemory,
/* x86_fma4_vfnmadd_pd */ DoesNotAccessMemory,
/* x86_fma4_vfnmadd_pd_256 */ DoesNotAccessMemory,
/* x86_fma4_vfnmadd_ps */ DoesNotAccessMemory,
/* x86_fma4_vfnmadd_ps_256 */ DoesNotAccessMemory,
/* x86_fma4_vfnmadd_sd */ DoesNotAccessMemory,
/* x86_fma4_vfnmadd_ss */ DoesNotAccessMemory,
/* x86_fma4_vfnmsub_pd */ DoesNotAccessMemory,
/* x86_fma4_vfnmsub_pd_256 */ DoesNotAccessMemory,
/* x86_fma4_vfnmsub_ps */ DoesNotAccessMemory,
/* x86_fma4_vfnmsub_ps_256 */ DoesNotAccessMemory,
/* x86_fma4_vfnmsub_sd */ DoesNotAccessMemory,
/* x86_fma4_vfnmsub_ss */ DoesNotAccessMemory,
/* x86_int */ UnknownModRefBehavior,
/* x86_mmx_emms */ UnknownModRefBehavior,
/* x86_mmx_femms */ UnknownModRefBehavior,
/* x86_mmx_maskmovq */ UnknownModRefBehavior,
/* x86_mmx_movnt_dq */ UnknownModRefBehavior,
/* x86_mmx_packssdw */ DoesNotAccessMemory,
/* x86_mmx_packsswb */ DoesNotAccessMemory,
/* x86_mmx_packuswb */ DoesNotAccessMemory,
/* x86_mmx_padd_b */ DoesNotAccessMemory,
/* x86_mmx_padd_d */ DoesNotAccessMemory,
/* x86_mmx_padd_q */ DoesNotAccessMemory,
/* x86_mmx_padd_w */ DoesNotAccessMemory,
/* x86_mmx_padds_b */ DoesNotAccessMemory,
/* x86_mmx_padds_w */ DoesNotAccessMemory,
/* x86_mmx_paddus_b */ DoesNotAccessMemory,
/* x86_mmx_paddus_w */ DoesNotAccessMemory,
/* x86_mmx_palignr_b */ DoesNotAccessMemory,
/* x86_mmx_pand */ DoesNotAccessMemory,
/* x86_mmx_pandn */ DoesNotAccessMemory,
/* x86_mmx_pavg_b */ DoesNotAccessMemory,
/* x86_mmx_pavg_w */ DoesNotAccessMemory,
/* x86_mmx_pcmpeq_b */ DoesNotAccessMemory,
/* x86_mmx_pcmpeq_d */ DoesNotAccessMemory,
/* x86_mmx_pcmpeq_w */ DoesNotAccessMemory,
/* x86_mmx_pcmpgt_b */ DoesNotAccessMemory,
/* x86_mmx_pcmpgt_d */ DoesNotAccessMemory,
/* x86_mmx_pcmpgt_w */ DoesNotAccessMemory,
/* x86_mmx_pextr_w */ DoesNotAccessMemory,
/* x86_mmx_pinsr_w */ DoesNotAccessMemory,
/* x86_mmx_pmadd_wd */ DoesNotAccessMemory,
/* x86_mmx_pmaxs_w */ DoesNotAccessMemory,
/* x86_mmx_pmaxu_b */ DoesNotAccessMemory,
/* x86_mmx_pmins_w */ DoesNotAccessMemory,
/* x86_mmx_pminu_b */ DoesNotAccessMemory,
/* x86_mmx_pmovmskb */ DoesNotAccessMemory,
/* x86_mmx_pmulh_w */ DoesNotAccessMemory,
/* x86_mmx_pmulhu_w */ DoesNotAccessMemory,
/* x86_mmx_pmull_w */ DoesNotAccessMemory,
/* x86_mmx_pmulu_dq */ DoesNotAccessMemory,
/* x86_mmx_por */ DoesNotAccessMemory,
/* x86_mmx_psad_bw */ DoesNotAccessMemory,
/* x86_mmx_psll_d */ DoesNotAccessMemory,
/* x86_mmx_psll_q */ DoesNotAccessMemory,
/* x86_mmx_psll_w */ DoesNotAccessMemory,
/* x86_mmx_pslli_d */ DoesNotAccessMemory,
/* x86_mmx_pslli_q */ DoesNotAccessMemory,
/* x86_mmx_pslli_w */ DoesNotAccessMemory,
/* x86_mmx_psra_d */ DoesNotAccessMemory,
/* x86_mmx_psra_w */ DoesNotAccessMemory,
/* x86_mmx_psrai_d */ DoesNotAccessMemory,
/* x86_mmx_psrai_w */ DoesNotAccessMemory,
/* x86_mmx_psrl_d */ DoesNotAccessMemory,
/* x86_mmx_psrl_q */ DoesNotAccessMemory,
/* x86_mmx_psrl_w */ DoesNotAccessMemory,
/* x86_mmx_psrli_d */ DoesNotAccessMemory,
/* x86_mmx_psrli_q */ DoesNotAccessMemory,
/* x86_mmx_psrli_w */ DoesNotAccessMemory,
/* x86_mmx_psub_b */ DoesNotAccessMemory,
/* x86_mmx_psub_d */ DoesNotAccessMemory,
/* x86_mmx_psub_q */ DoesNotAccessMemory,
/* x86_mmx_psub_w */ DoesNotAccessMemory,
/* x86_mmx_psubs_b */ DoesNotAccessMemory,
/* x86_mmx_psubs_w */ DoesNotAccessMemory,
/* x86_mmx_psubus_b */ DoesNotAccessMemory,
/* x86_mmx_psubus_w */ DoesNotAccessMemory,
/* x86_mmx_punpckhbw */ DoesNotAccessMemory,
/* x86_mmx_punpckhdq */ DoesNotAccessMemory,
/* x86_mmx_punpckhwd */ DoesNotAccessMemory,
/* x86_mmx_punpcklbw */ DoesNotAccessMemory,
/* x86_mmx_punpckldq */ DoesNotAccessMemory,
/* x86_mmx_punpcklwd */ DoesNotAccessMemory,
/* x86_mmx_pxor */ DoesNotAccessMemory,
/* x86_rdfsbase_32 */ UnknownModRefBehavior,
/* x86_rdfsbase_64 */ UnknownModRefBehavior,
/* x86_rdgsbase_32 */ UnknownModRefBehavior,
/* x86_rdgsbase_64 */ UnknownModRefBehavior,
/* x86_sse2_add_sd */ DoesNotAccessMemory,
/* x86_sse2_clflush */ UnknownModRefBehavior,
/* x86_sse2_cmp_pd */ DoesNotAccessMemory,
/* x86_sse2_cmp_sd */ DoesNotAccessMemory,
/* x86_sse2_comieq_sd */ DoesNotAccessMemory,
/* x86_sse2_comige_sd */ DoesNotAccessMemory,
/* x86_sse2_comigt_sd */ DoesNotAccessMemory,
/* x86_sse2_comile_sd */ DoesNotAccessMemory,
/* x86_sse2_comilt_sd */ DoesNotAccessMemory,
/* x86_sse2_comineq_sd */ DoesNotAccessMemory,
/* x86_sse2_cvtdq2pd */ DoesNotAccessMemory,
/* x86_sse2_cvtdq2ps */ DoesNotAccessMemory,
/* x86_sse2_cvtpd2dq */ DoesNotAccessMemory,
/* x86_sse2_cvtpd2ps */ DoesNotAccessMemory,
/* x86_sse2_cvtps2dq */ DoesNotAccessMemory,
/* x86_sse2_cvtps2pd */ DoesNotAccessMemory,
/* x86_sse2_cvtsd2si */ DoesNotAccessMemory,
/* x86_sse2_cvtsd2si64 */ DoesNotAccessMemory,
/* x86_sse2_cvtsd2ss */ DoesNotAccessMemory,
/* x86_sse2_cvtsi2sd */ DoesNotAccessMemory,
/* x86_sse2_cvtsi642sd */ DoesNotAccessMemory,
/* x86_sse2_cvtss2sd */ DoesNotAccessMemory,
/* x86_sse2_cvttpd2dq */ DoesNotAccessMemory,
/* x86_sse2_cvttps2dq */ DoesNotAccessMemory,
/* x86_sse2_cvttsd2si */ DoesNotAccessMemory,
/* x86_sse2_cvttsd2si64 */ DoesNotAccessMemory,
/* x86_sse2_div_sd */ DoesNotAccessMemory,
/* x86_sse2_lfence */ UnknownModRefBehavior,
/* x86_sse2_maskmov_dqu */ UnknownModRefBehavior,
/* x86_sse2_max_pd */ DoesNotAccessMemory,
/* x86_sse2_max_sd */ DoesNotAccessMemory,
/* x86_sse2_mfence */ UnknownModRefBehavior,
/* x86_sse2_min_pd */ DoesNotAccessMemory,
/* x86_sse2_min_sd */ DoesNotAccessMemory,
/* x86_sse2_movmsk_pd */ DoesNotAccessMemory,
/* x86_sse2_mul_sd */ DoesNotAccessMemory,
/* x86_sse2_packssdw_128 */ DoesNotAccessMemory,
/* x86_sse2_packsswb_128 */ DoesNotAccessMemory,
/* x86_sse2_packuswb_128 */ DoesNotAccessMemory,
/* x86_sse2_padds_b */ DoesNotAccessMemory,
/* x86_sse2_padds_w */ DoesNotAccessMemory,
/* x86_sse2_paddus_b */ DoesNotAccessMemory,
/* x86_sse2_paddus_w */ DoesNotAccessMemory,
/* x86_sse2_pavg_b */ DoesNotAccessMemory,
/* x86_sse2_pavg_w */ DoesNotAccessMemory,
/* x86_sse2_pmadd_wd */ DoesNotAccessMemory,
/* x86_sse2_pmaxs_w */ DoesNotAccessMemory,
/* x86_sse2_pmaxu_b */ DoesNotAccessMemory,
/* x86_sse2_pmins_w */ DoesNotAccessMemory,
/* x86_sse2_pminu_b */ DoesNotAccessMemory,
/* x86_sse2_pmovmskb_128 */ DoesNotAccessMemory,
/* x86_sse2_pmulh_w */ DoesNotAccessMemory,
/* x86_sse2_pmulhu_w */ DoesNotAccessMemory,
/* x86_sse2_pmulu_dq */ DoesNotAccessMemory,
/* x86_sse2_psad_bw */ DoesNotAccessMemory,
/* x86_sse2_psll_d */ DoesNotAccessMemory,
/* x86_sse2_psll_dq */ DoesNotAccessMemory,
/* x86_sse2_psll_dq_bs */ DoesNotAccessMemory,
/* x86_sse2_psll_q */ DoesNotAccessMemory,
/* x86_sse2_psll_w */ DoesNotAccessMemory,
/* x86_sse2_pslli_d */ DoesNotAccessMemory,
/* x86_sse2_pslli_q */ DoesNotAccessMemory,
/* x86_sse2_pslli_w */ DoesNotAccessMemory,
/* x86_sse2_psra_d */ DoesNotAccessMemory,
/* x86_sse2_psra_w */ DoesNotAccessMemory,
/* x86_sse2_psrai_d */ DoesNotAccessMemory,
/* x86_sse2_psrai_w */ DoesNotAccessMemory,
/* x86_sse2_psrl_d */ DoesNotAccessMemory,
/* x86_sse2_psrl_dq */ DoesNotAccessMemory,
/* x86_sse2_psrl_dq_bs */ DoesNotAccessMemory,
/* x86_sse2_psrl_q */ DoesNotAccessMemory,
/* x86_sse2_psrl_w */ DoesNotAccessMemory,
/* x86_sse2_psrli_d */ DoesNotAccessMemory,
/* x86_sse2_psrli_q */ DoesNotAccessMemory,
/* x86_sse2_psrli_w */ DoesNotAccessMemory,
/* x86_sse2_psubs_b */ DoesNotAccessMemory,
/* x86_sse2_psubs_w */ DoesNotAccessMemory,
/* x86_sse2_psubus_b */ DoesNotAccessMemory,
/* x86_sse2_psubus_w */ DoesNotAccessMemory,
/* x86_sse2_sqrt_pd */ DoesNotAccessMemory,
/* x86_sse2_sqrt_sd */ DoesNotAccessMemory,
/* x86_sse2_storel_dq */ UnknownModRefBehavior,
/* x86_sse2_storeu_dq */ UnknownModRefBehavior,
/* x86_sse2_storeu_pd */ UnknownModRefBehavior,
/* x86_sse2_sub_sd */ DoesNotAccessMemory,
/* x86_sse2_ucomieq_sd */ DoesNotAccessMemory,
/* x86_sse2_ucomige_sd */ DoesNotAccessMemory,
/* x86_sse2_ucomigt_sd */ DoesNotAccessMemory,
/* x86_sse2_ucomile_sd */ DoesNotAccessMemory,
/* x86_sse2_ucomilt_sd */ DoesNotAccessMemory,
/* x86_sse2_ucomineq_sd */ DoesNotAccessMemory,
/* x86_sse3_addsub_pd */ DoesNotAccessMemory,
/* x86_sse3_addsub_ps */ DoesNotAccessMemory,
/* x86_sse3_hadd_pd */ DoesNotAccessMemory,
/* x86_sse3_hadd_ps */ DoesNotAccessMemory,
/* x86_sse3_hsub_pd */ DoesNotAccessMemory,
/* x86_sse3_hsub_ps */ DoesNotAccessMemory,
/* x86_sse3_ldu_dq */ OnlyReadsMemory,
/* x86_sse3_monitor */ UnknownModRefBehavior,
/* x86_sse3_mwait */ UnknownModRefBehavior,
/* x86_sse41_blendpd */ DoesNotAccessMemory,
/* x86_sse41_blendps */ DoesNotAccessMemory,
/* x86_sse41_blendvpd */ DoesNotAccessMemory,
/* x86_sse41_blendvps */ DoesNotAccessMemory,
/* x86_sse41_dppd */ DoesNotAccessMemory,
/* x86_sse41_dpps */ DoesNotAccessMemory,
/* x86_sse41_extractps */ DoesNotAccessMemory,
/* x86_sse41_insertps */ DoesNotAccessMemory,
/* x86_sse41_movntdqa */ OnlyReadsMemory,
/* x86_sse41_mpsadbw */ DoesNotAccessMemory,
/* x86_sse41_packusdw */ DoesNotAccessMemory,
/* x86_sse41_pblendvb */ DoesNotAccessMemory,
/* x86_sse41_pblendw */ DoesNotAccessMemory,
/* x86_sse41_pextrb */ DoesNotAccessMemory,
/* x86_sse41_pextrd */ DoesNotAccessMemory,
/* x86_sse41_pextrq */ DoesNotAccessMemory,
/* x86_sse41_phminposuw */ DoesNotAccessMemory,
/* x86_sse41_pmaxsb */ DoesNotAccessMemory,
/* x86_sse41_pmaxsd */ DoesNotAccessMemory,
/* x86_sse41_pmaxud */ DoesNotAccessMemory,
/* x86_sse41_pmaxuw */ DoesNotAccessMemory,
/* x86_sse41_pminsb */ DoesNotAccessMemory,
/* x86_sse41_pminsd */ DoesNotAccessMemory,
/* x86_sse41_pminud */ DoesNotAccessMemory,
/* x86_sse41_pminuw */ DoesNotAccessMemory,
/* x86_sse41_pmovsxbd */ DoesNotAccessMemory,
/* x86_sse41_pmovsxbq */ DoesNotAccessMemory,
/* x86_sse41_pmovsxbw */ DoesNotAccessMemory,
/* x86_sse41_pmovsxdq */ DoesNotAccessMemory,
/* x86_sse41_pmovsxwd */ DoesNotAccessMemory,
/* x86_sse41_pmovsxwq */ DoesNotAccessMemory,
/* x86_sse41_pmovzxbd */ DoesNotAccessMemory,
/* x86_sse41_pmovzxbq */ DoesNotAccessMemory,
/* x86_sse41_pmovzxbw */ DoesNotAccessMemory,
/* x86_sse41_pmovzxdq */ DoesNotAccessMemory,
/* x86_sse41_pmovzxwd */ DoesNotAccessMemory,
/* x86_sse41_pmovzxwq */ DoesNotAccessMemory,
/* x86_sse41_pmuldq */ DoesNotAccessMemory,
/* x86_sse41_ptestc */ DoesNotAccessMemory,
/* x86_sse41_ptestnzc */ DoesNotAccessMemory,
/* x86_sse41_ptestz */ DoesNotAccessMemory,
/* x86_sse41_round_pd */ DoesNotAccessMemory,
/* x86_sse41_round_ps */ DoesNotAccessMemory,
/* x86_sse41_round_sd */ DoesNotAccessMemory,
/* x86_sse41_round_ss */ DoesNotAccessMemory,
/* x86_sse42_crc32_32_16 */ DoesNotAccessMemory,
/* x86_sse42_crc32_32_32 */ DoesNotAccessMemory,
/* x86_sse42_crc32_32_8 */ DoesNotAccessMemory,
/* x86_sse42_crc32_64_64 */ DoesNotAccessMemory,
/* x86_sse42_crc32_64_8 */ DoesNotAccessMemory,
/* x86_sse42_pcmpestri128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpestria128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpestric128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpestrio128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpestris128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpestriz128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpestrm128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpistri128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpistria128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpistric128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpistrio128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpistris128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpistriz128 */ DoesNotAccessMemory,
/* x86_sse42_pcmpistrm128 */ DoesNotAccessMemory,
/* x86_sse_add_ss */ DoesNotAccessMemory,
/* x86_sse_cmp_ps */ DoesNotAccessMemory,
/* x86_sse_cmp_ss */ DoesNotAccessMemory,
/* x86_sse_comieq_ss */ DoesNotAccessMemory,
/* x86_sse_comige_ss */ DoesNotAccessMemory,
/* x86_sse_comigt_ss */ DoesNotAccessMemory,
/* x86_sse_comile_ss */ DoesNotAccessMemory,
/* x86_sse_comilt_ss */ DoesNotAccessMemory,
/* x86_sse_comineq_ss */ DoesNotAccessMemory,
/* x86_sse_cvtpd2pi */ DoesNotAccessMemory,
/* x86_sse_cvtpi2pd */ DoesNotAccessMemory,
/* x86_sse_cvtpi2ps */ DoesNotAccessMemory,
/* x86_sse_cvtps2pi */ DoesNotAccessMemory,
/* x86_sse_cvtsi2ss */ DoesNotAccessMemory,
/* x86_sse_cvtsi642ss */ DoesNotAccessMemory,
/* x86_sse_cvtss2si */ DoesNotAccessMemory,
/* x86_sse_cvtss2si64 */ DoesNotAccessMemory,
/* x86_sse_cvttpd2pi */ DoesNotAccessMemory,
/* x86_sse_cvttps2pi */ DoesNotAccessMemory,
/* x86_sse_cvttss2si */ DoesNotAccessMemory,
/* x86_sse_cvttss2si64 */ DoesNotAccessMemory,
/* x86_sse_div_ss */ DoesNotAccessMemory,
/* x86_sse_ldmxcsr */ UnknownModRefBehavior,
/* x86_sse_max_ps */ DoesNotAccessMemory,
/* x86_sse_max_ss */ DoesNotAccessMemory,
/* x86_sse_min_ps */ DoesNotAccessMemory,
/* x86_sse_min_ss */ DoesNotAccessMemory,
/* x86_sse_movmsk_ps */ DoesNotAccessMemory,
/* x86_sse_mul_ss */ DoesNotAccessMemory,
/* x86_sse_pshuf_w */ DoesNotAccessMemory,
/* x86_sse_rcp_ps */ DoesNotAccessMemory,
/* x86_sse_rcp_ss */ DoesNotAccessMemory,
/* x86_sse_rsqrt_ps */ DoesNotAccessMemory,
/* x86_sse_rsqrt_ss */ DoesNotAccessMemory,
/* x86_sse_sfence */ UnknownModRefBehavior,
/* x86_sse_sqrt_ps */ DoesNotAccessMemory,
/* x86_sse_sqrt_ss */ DoesNotAccessMemory,
/* x86_sse_stmxcsr */ UnknownModRefBehavior,
/* x86_sse_storeu_ps */ UnknownModRefBehavior,
/* x86_sse_sub_ss */ DoesNotAccessMemory,
/* x86_sse_ucomieq_ss */ DoesNotAccessMemory,
/* x86_sse_ucomige_ss */ DoesNotAccessMemory,
/* x86_sse_ucomigt_ss */ DoesNotAccessMemory,
/* x86_sse_ucomile_ss */ DoesNotAccessMemory,
/* x86_sse_ucomilt_ss */ DoesNotAccessMemory,
/* x86_sse_ucomineq_ss */ DoesNotAccessMemory,
/* x86_ssse3_pabs_b */ DoesNotAccessMemory,
/* x86_ssse3_pabs_b_128 */ DoesNotAccessMemory,
/* x86_ssse3_pabs_d */ DoesNotAccessMemory,
/* x86_ssse3_pabs_d_128 */ DoesNotAccessMemory,
/* x86_ssse3_pabs_w */ DoesNotAccessMemory,
/* x86_ssse3_pabs_w_128 */ DoesNotAccessMemory,
/* x86_ssse3_phadd_d */ DoesNotAccessMemory,
/* x86_ssse3_phadd_d_128 */ DoesNotAccessMemory,
/* x86_ssse3_phadd_sw */ DoesNotAccessMemory,
/* x86_ssse3_phadd_sw_128 */ DoesNotAccessMemory,
/* x86_ssse3_phadd_w */ DoesNotAccessMemory,
/* x86_ssse3_phadd_w_128 */ DoesNotAccessMemory,
/* x86_ssse3_phsub_d */ DoesNotAccessMemory,
/* x86_ssse3_phsub_d_128 */ DoesNotAccessMemory,
/* x86_ssse3_phsub_sw */ DoesNotAccessMemory,
/* x86_ssse3_phsub_sw_128 */ DoesNotAccessMemory,
/* x86_ssse3_phsub_w */ DoesNotAccessMemory,
/* x86_ssse3_phsub_w_128 */ DoesNotAccessMemory,
/* x86_ssse3_pmadd_ub_sw */ DoesNotAccessMemory,
/* x86_ssse3_pmadd_ub_sw_128 */ DoesNotAccessMemory,
/* x86_ssse3_pmul_hr_sw */ DoesNotAccessMemory,
/* x86_ssse3_pmul_hr_sw_128 */ DoesNotAccessMemory,
/* x86_ssse3_pshuf_b */ DoesNotAccessMemory,
/* x86_ssse3_pshuf_b_128 */ DoesNotAccessMemory,
/* x86_ssse3_psign_b */ DoesNotAccessMemory,
/* x86_ssse3_psign_b_128 */ DoesNotAccessMemory,
/* x86_ssse3_psign_d */ DoesNotAccessMemory,
/* x86_ssse3_psign_d_128 */ DoesNotAccessMemory,
/* x86_ssse3_psign_w */ DoesNotAccessMemory,
/* x86_ssse3_psign_w_128 */ DoesNotAccessMemory,
/* x86_vcvtph2ps_128 */ DoesNotAccessMemory,
/* x86_vcvtph2ps_256 */ DoesNotAccessMemory,
/* x86_vcvtps2ph_128 */ DoesNotAccessMemory,
/* x86_vcvtps2ph_256 */ DoesNotAccessMemory,
/* x86_wrfsbase_32 */ UnknownModRefBehavior,
/* x86_wrfsbase_64 */ UnknownModRefBehavior,
/* x86_wrgsbase_32 */ UnknownModRefBehavior,
/* x86_wrgsbase_64 */ UnknownModRefBehavior,
/* x86_xop_vfrcz_pd */ DoesNotAccessMemory,
/* x86_xop_vfrcz_pd_256 */ DoesNotAccessMemory,
/* x86_xop_vfrcz_ps */ DoesNotAccessMemory,
/* x86_xop_vfrcz_ps_256 */ DoesNotAccessMemory,
/* x86_xop_vfrcz_sd */ DoesNotAccessMemory,
/* x86_xop_vfrcz_ss */ DoesNotAccessMemory,
/* x86_xop_vpcmov */ DoesNotAccessMemory,
/* x86_xop_vpcmov_256 */ DoesNotAccessMemory,
/* x86_xop_vpcomeqb */ DoesNotAccessMemory,
/* x86_xop_vpcomeqd */ DoesNotAccessMemory,
/* x86_xop_vpcomeqq */ DoesNotAccessMemory,
/* x86_xop_vpcomequb */ DoesNotAccessMemory,
/* x86_xop_vpcomequd */ DoesNotAccessMemory,
/* x86_xop_vpcomequq */ DoesNotAccessMemory,
/* x86_xop_vpcomequw */ DoesNotAccessMemory,
/* x86_xop_vpcomeqw */ DoesNotAccessMemory,
/* x86_xop_vpcomfalseb */ DoesNotAccessMemory,
/* x86_xop_vpcomfalsed */ DoesNotAccessMemory,
/* x86_xop_vpcomfalseq */ DoesNotAccessMemory,
/* x86_xop_vpcomfalseub */ DoesNotAccessMemory,
/* x86_xop_vpcomfalseud */ DoesNotAccessMemory,
/* x86_xop_vpcomfalseuq */ DoesNotAccessMemory,
/* x86_xop_vpcomfalseuw */ DoesNotAccessMemory,
/* x86_xop_vpcomfalsew */ DoesNotAccessMemory,
/* x86_xop_vpcomgeb */ DoesNotAccessMemory,
/* x86_xop_vpcomged */ DoesNotAccessMemory,
/* x86_xop_vpcomgeq */ DoesNotAccessMemory,
/* x86_xop_vpcomgeub */ DoesNotAccessMemory,
/* x86_xop_vpcomgeud */ DoesNotAccessMemory,
/* x86_xop_vpcomgeuq */ DoesNotAccessMemory,
/* x86_xop_vpcomgeuw */ DoesNotAccessMemory,
/* x86_xop_vpcomgew */ DoesNotAccessMemory,
/* x86_xop_vpcomgtb */ DoesNotAccessMemory,
/* x86_xop_vpcomgtd */ DoesNotAccessMemory,
/* x86_xop_vpcomgtq */ DoesNotAccessMemory,
/* x86_xop_vpcomgtub */ DoesNotAccessMemory,
/* x86_xop_vpcomgtud */ DoesNotAccessMemory,
/* x86_xop_vpcomgtuq */ DoesNotAccessMemory,
/* x86_xop_vpcomgtuw */ DoesNotAccessMemory,
/* x86_xop_vpcomgtw */ DoesNotAccessMemory,
/* x86_xop_vpcomleb */ DoesNotAccessMemory,
/* x86_xop_vpcomled */ DoesNotAccessMemory,
/* x86_xop_vpcomleq */ DoesNotAccessMemory,
/* x86_xop_vpcomleub */ DoesNotAccessMemory,
/* x86_xop_vpcomleud */ DoesNotAccessMemory,
/* x86_xop_vpcomleuq */ DoesNotAccessMemory,
/* x86_xop_vpcomleuw */ DoesNotAccessMemory,
/* x86_xop_vpcomlew */ DoesNotAccessMemory,
/* x86_xop_vpcomltb */ DoesNotAccessMemory,
/* x86_xop_vpcomltd */ DoesNotAccessMemory,
/* x86_xop_vpcomltq */ DoesNotAccessMemory,
/* x86_xop_vpcomltub */ DoesNotAccessMemory,
/* x86_xop_vpcomltud */ DoesNotAccessMemory,
/* x86_xop_vpcomltuq */ DoesNotAccessMemory,
/* x86_xop_vpcomltuw */ DoesNotAccessMemory,
/* x86_xop_vpcomltw */ DoesNotAccessMemory,
/* x86_xop_vpcomneb */ DoesNotAccessMemory,
/* x86_xop_vpcomned */ DoesNotAccessMemory,
/* x86_xop_vpcomneq */ DoesNotAccessMemory,
/* x86_xop_vpcomneub */ DoesNotAccessMemory,
/* x86_xop_vpcomneud */ DoesNotAccessMemory,
/* x86_xop_vpcomneuq */ DoesNotAccessMemory,
/* x86_xop_vpcomneuw */ DoesNotAccessMemory,
/* x86_xop_vpcomnew */ DoesNotAccessMemory,
/* x86_xop_vpcomtrueb */ DoesNotAccessMemory,
/* x86_xop_vpcomtrued */ DoesNotAccessMemory,
/* x86_xop_vpcomtrueq */ DoesNotAccessMemory,
/* x86_xop_vpcomtrueub */ DoesNotAccessMemory,
/* x86_xop_vpcomtrueud */ DoesNotAccessMemory,
/* x86_xop_vpcomtrueuq */ DoesNotAccessMemory,
/* x86_xop_vpcomtrueuw */ DoesNotAccessMemory,
/* x86_xop_vpcomtruew */ DoesNotAccessMemory,
/* x86_xop_vpermil2pd */ DoesNotAccessMemory,
/* x86_xop_vpermil2pd_256 */ DoesNotAccessMemory,
/* x86_xop_vpermil2ps */ DoesNotAccessMemory,
/* x86_xop_vpermil2ps_256 */ DoesNotAccessMemory,
/* x86_xop_vphaddbd */ DoesNotAccessMemory,
/* x86_xop_vphaddbq */ DoesNotAccessMemory,
/* x86_xop_vphaddbw */ DoesNotAccessMemory,
/* x86_xop_vphadddq */ DoesNotAccessMemory,
/* x86_xop_vphaddubd */ DoesNotAccessMemory,
/* x86_xop_vphaddubq */ DoesNotAccessMemory,
/* x86_xop_vphaddubw */ DoesNotAccessMemory,
/* x86_xop_vphaddudq */ DoesNotAccessMemory,
/* x86_xop_vphadduwd */ DoesNotAccessMemory,
/* x86_xop_vphadduwq */ DoesNotAccessMemory,
/* x86_xop_vphaddwd */ DoesNotAccessMemory,
/* x86_xop_vphaddwq */ DoesNotAccessMemory,
/* x86_xop_vphsubbw */ DoesNotAccessMemory,
/* x86_xop_vphsubdq */ DoesNotAccessMemory,
/* x86_xop_vphsubwd */ DoesNotAccessMemory,
/* x86_xop_vpmacsdd */ DoesNotAccessMemory,
/* x86_xop_vpmacsdqh */ DoesNotAccessMemory,
/* x86_xop_vpmacsdql */ DoesNotAccessMemory,
/* x86_xop_vpmacssdd */ DoesNotAccessMemory,
/* x86_xop_vpmacssdqh */ DoesNotAccessMemory,
/* x86_xop_vpmacssdql */ DoesNotAccessMemory,
/* x86_xop_vpmacsswd */ DoesNotAccessMemory,
/* x86_xop_vpmacssww */ DoesNotAccessMemory,
/* x86_xop_vpmacswd */ DoesNotAccessMemory,
/* x86_xop_vpmacsww */ DoesNotAccessMemory,
/* x86_xop_vpmadcsswd */ DoesNotAccessMemory,
/* x86_xop_vpmadcswd */ DoesNotAccessMemory,
/* x86_xop_vpperm */ DoesNotAccessMemory,
/* x86_xop_vprotb */ DoesNotAccessMemory,
/* x86_xop_vprotd */ DoesNotAccessMemory,
/* x86_xop_vprotq */ DoesNotAccessMemory,
/* x86_xop_vprotw */ DoesNotAccessMemory,
/* x86_xop_vpshab */ DoesNotAccessMemory,
/* x86_xop_vpshad */ DoesNotAccessMemory,
/* x86_xop_vpshaq */ DoesNotAccessMemory,
/* x86_xop_vpshaw */ DoesNotAccessMemory,
/* x86_xop_vpshlb */ DoesNotAccessMemory,
/* x86_xop_vpshld */ DoesNotAccessMemory,
/* x86_xop_vpshlq */ DoesNotAccessMemory,
/* x86_xop_vpshlw */ DoesNotAccessMemory,
/* xcore_bitrev */ DoesNotAccessMemory,
/* xcore_checkevent */ UnknownModRefBehavior,
/* xcore_chkct */ UnknownModRefBehavior,
/* xcore_clre */ UnknownModRefBehavior,
/* xcore_clrsr */ UnknownModRefBehavior,
/* xcore_crc32 */ DoesNotAccessMemory,
/* xcore_crc8 */ DoesNotAccessMemory,
/* xcore_eeu */ UnknownModRefBehavior,
/* xcore_endin */ UnknownModRefBehavior,
/* xcore_freer */ UnknownModRefBehavior,
/* xcore_geted */ UnknownModRefBehavior,
/* xcore_getet */ UnknownModRefBehavior,
/* xcore_getid */ DoesNotAccessMemory,
/* xcore_getps */ UnknownModRefBehavior,
/* xcore_getr */ UnknownModRefBehavior,
/* xcore_getst */ UnknownModRefBehavior,
/* xcore_getts */ UnknownModRefBehavior,
/* xcore_in */ UnknownModRefBehavior,
/* xcore_inct */ UnknownModRefBehavior,
/* xcore_initcp */ UnknownModRefBehavior,
/* xcore_initdp */ UnknownModRefBehavior,
/* xcore_initlr */ UnknownModRefBehavior,
/* xcore_initpc */ UnknownModRefBehavior,
/* xcore_initsp */ UnknownModRefBehavior,
/* xcore_inshr */ UnknownModRefBehavior,
/* xcore_int */ UnknownModRefBehavior,
/* xcore_mjoin */ UnknownModRefBehavior,
/* xcore_msync */ UnknownModRefBehavior,
/* xcore_out */ UnknownModRefBehavior,
/* xcore_outct */ UnknownModRefBehavior,
/* xcore_outshr */ UnknownModRefBehavior,
/* xcore_outt */ UnknownModRefBehavior,
/* xcore_peek */ UnknownModRefBehavior,
/* xcore_setc */ UnknownModRefBehavior,
/* xcore_setclk */ UnknownModRefBehavior,
/* xcore_setd */ UnknownModRefBehavior,
/* xcore_setev */ UnknownModRefBehavior,
/* xcore_setps */ UnknownModRefBehavior,
/* xcore_setpsc */ UnknownModRefBehavior,
/* xcore_setpt */ UnknownModRefBehavior,
/* xcore_setrdy */ UnknownModRefBehavior,
/* xcore_setsr */ UnknownModRefBehavior,
/* xcore_settw */ UnknownModRefBehavior,
/* xcore_setv */ UnknownModRefBehavior,
/* xcore_sext */ DoesNotAccessMemory,
/* xcore_ssync */ UnknownModRefBehavior,
/* xcore_syncr */ UnknownModRefBehavior,
/* xcore_testct */ UnknownModRefBehavior,
/* xcore_testwct */ UnknownModRefBehavior,
/* xcore_waitevent */ OnlyReadsMemory,
/* xcore_zext */ DoesNotAccessMemory,
};
return static_cast<ModRefBehavior>(IntrinsicModRefBehavior[iid]);
#endif // GET_INTRINSIC_MODREF_BEHAVIOR
// Get the LLVM intrinsic that corresponds to a GCC builtin.
// This is used by the C front-end. The GCC builtin name is passed
// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed
// in as TargetPrefix. The result is assigned to 'IntrinsicID'.
#ifdef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN
Intrinsic::ID Intrinsic::getIntrinsicForGCCBuiltin(const char *TargetPrefixStr, const char *BuiltinNameStr) {
StringRef BuiltinName(BuiltinNameStr);
StringRef TargetPrefix(TargetPrefixStr);
/* Target Independent Builtins */ {
switch (BuiltinName.size()) {
default: break;
case 14: // 3 strings to match.
if (BuiltinName.substr(0, 2) != "__")
break;
switch (BuiltinName[2]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(3, 11) != "uiltin_trap")
break;
return Intrinsic::trap; // "__builtin_trap"
case 'g': // 2 strings to match.
if (BuiltinName.substr(3, 3) != "nu_")
break;
switch (BuiltinName[6]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName.substr(7, 7) != "2h_ieee")
break;
return Intrinsic::convert_to_fp16; // "__gnu_f2h_ieee"
case 'h': // 1 string to match.
if (BuiltinName.substr(7, 7) != "2f_ieee")
break;
return Intrinsic::convert_from_fp16; // "__gnu_h2f_ieee"
}
break;
}
break;
case 20: // 2 strings to match.
if (BuiltinName.substr(0, 10) != "__builtin_")
break;
switch (BuiltinName[10]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName.substr(11, 9) != "lt_rounds")
break;
return Intrinsic::flt_rounds; // "__builtin_flt_rounds"
case 's': // 1 string to match.
if (BuiltinName.substr(11, 9) != "tack_save")
break;
return Intrinsic::stacksave; // "__builtin_stack_save"
}
break;
case 21: // 16 strings to match.
if (BuiltinName.substr(0, 10) != "__builtin_")
break;
switch (BuiltinName[10]) {
default: break;
case 'i': // 14 strings to match.
if (BuiltinName.substr(11, 6) != "a32_vp")
break;
switch (BuiltinName[17]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(18, 3) != "mov")
break;
return Intrinsic::x86_xop_vpcmov; // "__builtin_ia32_vpcmov"
case 'p': // 1 string to match.
if (BuiltinName.substr(18, 3) != "erm")
break;
return Intrinsic::x86_xop_vpperm; // "__builtin_ia32_vpperm"
case 'r': // 4 strings to match.
if (BuiltinName.substr(18, 2) != "ot")
break;
switch (BuiltinName[20]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vprotb; // "__builtin_ia32_vprotb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vprotd; // "__builtin_ia32_vprotd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vprotq; // "__builtin_ia32_vprotq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vprotw; // "__builtin_ia32_vprotw"
}
break;
case 's': // 8 strings to match.
if (BuiltinName[18] != 'h')
break;
switch (BuiltinName[19]) {
default: break;
case 'a': // 4 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpshab; // "__builtin_ia32_vpshab"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpshad; // "__builtin_ia32_vpshad"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpshaq; // "__builtin_ia32_vpshaq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpshaw; // "__builtin_ia32_vpshaw"
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpshlb; // "__builtin_ia32_vpshlb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpshld; // "__builtin_ia32_vpshld"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpshlq; // "__builtin_ia32_vpshlq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpshlw; // "__builtin_ia32_vpshlw"
}
break;
}
break;
}
break;
case 'o': // 1 string to match.
if (BuiltinName.substr(11, 10) != "bject_size")
break;
return Intrinsic::objectsize; // "__builtin_object_size"
case 'u': // 1 string to match.
if (BuiltinName.substr(11, 10) != "nwind_init")
break;
return Intrinsic::eh_unwind_init; // "__builtin_unwind_init"
}
break;
case 22: // 4 strings to match.
if (BuiltinName.substr(0, 20) != "__builtin_ia32_vfrcz")
break;
switch (BuiltinName[20]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vfrcz_pd; // "__builtin_ia32_vfrczpd"
case 's': // 1 string to match.
return Intrinsic::x86_xop_vfrcz_ps; // "__builtin_ia32_vfrczps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vfrcz_sd; // "__builtin_ia32_vfrczsd"
case 's': // 1 string to match.
return Intrinsic::x86_xop_vfrcz_ss; // "__builtin_ia32_vfrczss"
}
break;
}
break;
case 23: // 37 strings to match.
if (BuiltinName.substr(0, 10) != "__builtin_")
break;
switch (BuiltinName[10]) {
default: break;
case 'i': // 36 strings to match.
if (BuiltinName.substr(11, 6) != "a32_vp")
break;
switch (BuiltinName[17]) {
default: break;
case 'c': // 24 strings to match.
if (BuiltinName.substr(18, 2) != "om")
break;
switch (BuiltinName[20]) {
default: break;
case 'e': // 4 strings to match.
if (BuiltinName[21] != 'q')
break;
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomeqb; // "__builtin_ia32_vpcomeqb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomeqd; // "__builtin_ia32_vpcomeqd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomeqq; // "__builtin_ia32_vpcomeqq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomeqw; // "__builtin_ia32_vpcomeqw"
}
break;
case 'g': // 8 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'e': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeb; // "__builtin_ia32_vpcomgeb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomged; // "__builtin_ia32_vpcomged"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeq; // "__builtin_ia32_vpcomgeq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomgew; // "__builtin_ia32_vpcomgew"
}
break;
case 't': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtb; // "__builtin_ia32_vpcomgtb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtd; // "__builtin_ia32_vpcomgtd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtq; // "__builtin_ia32_vpcomgtq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtw; // "__builtin_ia32_vpcomgtw"
}
break;
}
break;
case 'l': // 8 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'e': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomleb; // "__builtin_ia32_vpcomleb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomled; // "__builtin_ia32_vpcomled"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomleq; // "__builtin_ia32_vpcomleq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomlew; // "__builtin_ia32_vpcomlew"
}
break;
case 't': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomltb; // "__builtin_ia32_vpcomltb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomltd; // "__builtin_ia32_vpcomltd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomltq; // "__builtin_ia32_vpcomltq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomltw; // "__builtin_ia32_vpcomltw"
}
break;
}
break;
case 'n': // 4 strings to match.
if (BuiltinName[21] != 'e')
break;
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomneb; // "__builtin_ia32_vpcomneb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomned; // "__builtin_ia32_vpcomned"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomneq; // "__builtin_ia32_vpcomneq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomnew; // "__builtin_ia32_vpcomnew"
}
break;
}
break;
case 'h': // 9 strings to match.
switch (BuiltinName[18]) {
default: break;
case 'a': // 6 strings to match.
if (BuiltinName.substr(19, 2) != "dd")
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 3 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vphaddbd; // "__builtin_ia32_vphaddbd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vphaddbq; // "__builtin_ia32_vphaddbq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vphaddbw; // "__builtin_ia32_vphaddbw"
}
break;
case 'd': // 1 string to match.
if (BuiltinName[22] != 'q')
break;
return Intrinsic::x86_xop_vphadddq; // "__builtin_ia32_vphadddq"
case 'w': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vphaddwd; // "__builtin_ia32_vphaddwd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vphaddwq; // "__builtin_ia32_vphaddwq"
}
break;
}
break;
case 's': // 3 strings to match.
if (BuiltinName.substr(19, 2) != "ub")
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[22] != 'w')
break;
return Intrinsic::x86_xop_vphsubbw; // "__builtin_ia32_vphsubbw"
case 'd': // 1 string to match.
if (BuiltinName[22] != 'q')
break;
return Intrinsic::x86_xop_vphsubdq; // "__builtin_ia32_vphsubdq"
case 'w': // 1 string to match.
if (BuiltinName[22] != 'd')
break;
return Intrinsic::x86_xop_vphsubwd; // "__builtin_ia32_vphsubwd"
}
break;
}
break;
case 'm': // 3 strings to match.
if (BuiltinName.substr(18, 3) != "acs")
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[22] != 'd')
break;
return Intrinsic::x86_xop_vpmacsdd; // "__builtin_ia32_vpmacsdd"
case 'w': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpmacswd; // "__builtin_ia32_vpmacswd"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpmacsww; // "__builtin_ia32_vpmacsww"
}
break;
}
break;
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(11, 12) != "tack_restore")
break;
return Intrinsic::stackrestore; // "__builtin_stack_restore"
}
break;
case 24: // 36 strings to match.
if (BuiltinName.substr(0, 17) != "__builtin_ia32_vp")
break;
switch (BuiltinName[17]) {
default: break;
case 'c': // 24 strings to match.
if (BuiltinName.substr(18, 2) != "om")
break;
switch (BuiltinName[20]) {
default: break;
case 'e': // 4 strings to match.
if (BuiltinName.substr(21, 2) != "qu")
break;
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomequb; // "__builtin_ia32_vpcomequb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomequd; // "__builtin_ia32_vpcomequd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomequq; // "__builtin_ia32_vpcomequq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomequw; // "__builtin_ia32_vpcomequw"
}
break;
case 'g': // 8 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'e': // 4 strings to match.
if (BuiltinName[22] != 'u')
break;
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeub; // "__builtin_ia32_vpcomgeub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeud; // "__builtin_ia32_vpcomgeud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeuq; // "__builtin_ia32_vpcomgeuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomgeuw; // "__builtin_ia32_vpcomgeuw"
}
break;
case 't': // 4 strings to match.
if (BuiltinName[22] != 'u')
break;
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtub; // "__builtin_ia32_vpcomgtub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtud; // "__builtin_ia32_vpcomgtud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtuq; // "__builtin_ia32_vpcomgtuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomgtuw; // "__builtin_ia32_vpcomgtuw"
}
break;
}
break;
case 'l': // 8 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'e': // 4 strings to match.
if (BuiltinName[22] != 'u')
break;
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomleub; // "__builtin_ia32_vpcomleub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomleud; // "__builtin_ia32_vpcomleud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomleuq; // "__builtin_ia32_vpcomleuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomleuw; // "__builtin_ia32_vpcomleuw"
}
break;
case 't': // 4 strings to match.
if (BuiltinName[22] != 'u')
break;
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomltub; // "__builtin_ia32_vpcomltub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomltud; // "__builtin_ia32_vpcomltud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomltuq; // "__builtin_ia32_vpcomltuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomltuw; // "__builtin_ia32_vpcomltuw"
}
break;
}
break;
case 'n': // 4 strings to match.
if (BuiltinName.substr(21, 2) != "eu")
break;
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomneub; // "__builtin_ia32_vpcomneub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomneud; // "__builtin_ia32_vpcomneud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomneuq; // "__builtin_ia32_vpcomneuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomneuw; // "__builtin_ia32_vpcomneuw"
}
break;
}
break;
case 'h': // 6 strings to match.
if (BuiltinName.substr(18, 4) != "addu")
break;
switch (BuiltinName[22]) {
default: break;
case 'b': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vphaddubd; // "__builtin_ia32_vphaddubd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vphaddubq; // "__builtin_ia32_vphaddubq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vphaddubw; // "__builtin_ia32_vphaddubw"
}
break;
case 'd': // 1 string to match.
if (BuiltinName[23] != 'q')
break;
return Intrinsic::x86_xop_vphaddudq; // "__builtin_ia32_vphaddudq"
case 'w': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vphadduwd; // "__builtin_ia32_vphadduwd"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vphadduwq; // "__builtin_ia32_vphadduwq"
}
break;
}
break;
case 'm': // 6 strings to match.
if (BuiltinName[18] != 'a')
break;
switch (BuiltinName[19]) {
default: break;
case 'c': // 5 strings to match.
if (BuiltinName[20] != 's')
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[22] != 'q')
break;
switch (BuiltinName[23]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::x86_xop_vpmacsdqh; // "__builtin_ia32_vpmacsdqh"
case 'l': // 1 string to match.
return Intrinsic::x86_xop_vpmacsdql; // "__builtin_ia32_vpmacsdql"
}
break;
case 's': // 3 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[23] != 'd')
break;
return Intrinsic::x86_xop_vpmacssdd; // "__builtin_ia32_vpmacssdd"
case 'w': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpmacsswd; // "__builtin_ia32_vpmacsswd"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpmacssww; // "__builtin_ia32_vpmacssww"
}
break;
}
break;
}
break;
case 'd': // 1 string to match.
if (BuiltinName.substr(20, 4) != "cswd")
break;
return Intrinsic::x86_xop_vpmadcswd; // "__builtin_ia32_vpmadcswd"
}
break;
}
break;
case 25: // 13 strings to match.
if (BuiltinName.substr(0, 11) != "__builtin_i")
break;
switch (BuiltinName[11]) {
default: break;
case 'a': // 12 strings to match.
if (BuiltinName.substr(12, 4) != "32_v")
break;
switch (BuiltinName[16]) {
default: break;
case 'f': // 2 strings to match.
if (BuiltinName.substr(17, 4) != "rczp")
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(22, 3) != "256")
break;
return Intrinsic::x86_xop_vfrcz_pd_256; // "__builtin_ia32_vfrczpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(22, 3) != "256")
break;
return Intrinsic::x86_xop_vfrcz_ps_256; // "__builtin_ia32_vfrczps256"
}
break;
case 'p': // 10 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'c': // 5 strings to match.
switch (BuiltinName[18]) {
default: break;
case 'm': // 1 string to match.
if (BuiltinName.substr(19, 6) != "ov_256")
break;
return Intrinsic::x86_xop_vpcmov_256; // "__builtin_ia32_vpcmov_256"
case 'o': // 4 strings to match.
if (BuiltinName.substr(19, 5) != "mtrue")
break;
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueb; // "__builtin_ia32_vpcomtrueb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrued; // "__builtin_ia32_vpcomtrued"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueq; // "__builtin_ia32_vpcomtrueq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomtruew; // "__builtin_ia32_vpcomtruew"
}
break;
}
break;
case 'e': // 2 strings to match.
if (BuiltinName.substr(18, 6) != "rmil2p")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpermil2pd; // "__builtin_ia32_vpermil2pd"
case 's': // 1 string to match.
return Intrinsic::x86_xop_vpermil2ps; // "__builtin_ia32_vpermil2ps"
}
break;
case 'm': // 3 strings to match.
if (BuiltinName[18] != 'a')
break;
switch (BuiltinName[19]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName.substr(20, 4) != "ssdq")
break;
switch (BuiltinName[24]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::x86_xop_vpmacssdqh; // "__builtin_ia32_vpmacssdqh"
case 'l': // 1 string to match.
return Intrinsic::x86_xop_vpmacssdql; // "__builtin_ia32_vpmacssdql"
}
break;
case 'd': // 1 string to match.
if (BuiltinName.substr(20, 5) != "csswd")
break;
return Intrinsic::x86_xop_vpmadcsswd; // "__builtin_ia32_vpmadcsswd"
}
break;
}
break;
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(12, 13) != "it_trampoline")
break;
return Intrinsic::init_trampoline; // "__builtin_init_trampoline"
}
break;
case 26: // 8 strings to match.
if (BuiltinName.substr(0, 20) != "__builtin_ia32_vpcom")
break;
switch (BuiltinName[20]) {
default: break;
case 'f': // 4 strings to match.
if (BuiltinName.substr(21, 4) != "alse")
break;
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseb; // "__builtin_ia32_vpcomfalseb"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalsed; // "__builtin_ia32_vpcomfalsed"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseq; // "__builtin_ia32_vpcomfalseq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalsew; // "__builtin_ia32_vpcomfalsew"
}
break;
case 't': // 4 strings to match.
if (BuiltinName.substr(21, 4) != "rueu")
break;
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueub; // "__builtin_ia32_vpcomtrueub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueud; // "__builtin_ia32_vpcomtrueud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueuq; // "__builtin_ia32_vpcomtrueuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomtrueuw; // "__builtin_ia32_vpcomtrueuw"
}
break;
}
break;
case 27: // 5 strings to match.
if (BuiltinName.substr(0, 10) != "__builtin_")
break;
switch (BuiltinName[10]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(11, 16) != "djust_trampoline")
break;
return Intrinsic::adjust_trampoline; // "__builtin_adjust_trampoline"
case 'i': // 4 strings to match.
if (BuiltinName.substr(11, 15) != "a32_vpcomfalseu")
break;
switch (BuiltinName[26]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseub; // "__builtin_ia32_vpcomfalseub"
case 'd': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseud; // "__builtin_ia32_vpcomfalseud"
case 'q': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseuq; // "__builtin_ia32_vpcomfalseuq"
case 'w': // 1 string to match.
return Intrinsic::x86_xop_vpcomfalseuw; // "__builtin_ia32_vpcomfalseuw"
}
break;
}
break;
case 28: // 2 strings to match.
if (BuiltinName.substr(0, 24) != "__builtin_ia32_vpermil2p")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(25, 3) != "256")
break;
return Intrinsic::x86_xop_vpermil2pd_256; // "__builtin_ia32_vpermil2pd256"
case 's': // 1 string to match.
if (BuiltinName.substr(25, 3) != "256")
break;
return Intrinsic::x86_xop_vpermil2ps_256; // "__builtin_ia32_vpermil2ps256"
}
break;
}
}
if (TargetPrefix == "arm") {
switch (BuiltinName.size()) {
default: break;
case 17: // 3 strings to match.
if (BuiltinName.substr(0, 14) != "__builtin_arm_")
break;
switch (BuiltinName[14]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(15, 2) != "dp")
break;
return Intrinsic::arm_cdp; // "__builtin_arm_cdp"
case 'm': // 2 strings to match.
switch (BuiltinName[15]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[16] != 'r')
break;
return Intrinsic::arm_mcr; // "__builtin_arm_mcr"
case 'r': // 1 string to match.
if (BuiltinName[16] != 'c')
break;
return Intrinsic::arm_mrc; // "__builtin_arm_mrc"
}
break;
}
break;
case 18: // 8 strings to match.
if (BuiltinName.substr(0, 14) != "__builtin_arm_")
break;
switch (BuiltinName[14]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(15, 3) != "dp2")
break;
return Intrinsic::arm_cdp2; // "__builtin_arm_cdp2"
case 'm': // 3 strings to match.
switch (BuiltinName[15]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName[16] != 'r')
break;
switch (BuiltinName[17]) {
default: break;
case '2': // 1 string to match.
return Intrinsic::arm_mcr2; // "__builtin_arm_mcr2"
case 'r': // 1 string to match.
return Intrinsic::arm_mcrr; // "__builtin_arm_mcrr"
}
break;
case 'r': // 1 string to match.
if (BuiltinName.substr(16, 2) != "c2")
break;
return Intrinsic::arm_mrc2; // "__builtin_arm_mrc2"
}
break;
case 'q': // 2 strings to match.
switch (BuiltinName[15]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(16, 2) != "dd")
break;
return Intrinsic::arm_qadd; // "__builtin_arm_qadd"
case 's': // 1 string to match.
if (BuiltinName.substr(16, 2) != "ub")
break;
return Intrinsic::arm_qsub; // "__builtin_arm_qsub"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(15, 3) != "sat")
break;
return Intrinsic::arm_ssat; // "__builtin_arm_ssat"
case 'u': // 1 string to match.
if (BuiltinName.substr(15, 3) != "sat")
break;
return Intrinsic::arm_usat; // "__builtin_arm_usat"
}
break;
case 19: // 1 string to match.
if (BuiltinName.substr(0, 19) != "__builtin_arm_mcrr2")
break;
return Intrinsic::arm_mcrr2; // "__builtin_arm_mcrr2"
case 23: // 2 strings to match.
if (BuiltinName.substr(0, 14) != "__builtin_arm_")
break;
switch (BuiltinName[14]) {
default: break;
case 'g': // 1 string to match.
if (BuiltinName.substr(15, 8) != "et_fpscr")
break;
return Intrinsic::arm_get_fpscr; // "__builtin_arm_get_fpscr"
case 's': // 1 string to match.
if (BuiltinName.substr(15, 8) != "et_fpscr")
break;
return Intrinsic::arm_set_fpscr; // "__builtin_arm_set_fpscr"
}
break;
case 24: // 1 string to match.
if (BuiltinName.substr(0, 24) != "__builtin_thread_pointer")
break;
return Intrinsic::arm_thread_pointer; // "__builtin_thread_pointer"
}
}
if (TargetPrefix == "hexagon") {
switch (BuiltinName.size()) {
default: break;
case 23: // 2 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 1 string to match.
if (BuiltinName.substr(19, 4) != "2.or")
break;
return Intrinsic::hexagon_A2_or; // "__builtin_HEXAGON.A2.or"
case 'C': // 1 string to match.
if (BuiltinName.substr(19, 4) != "2.or")
break;
return Intrinsic::hexagon_C2_or; // "__builtin_HEXAGON.C2.or"
}
break;
case 24: // 23 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 13 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 12 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 3 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[23] != 's')
break;
return Intrinsic::hexagon_A2_abs; // "__builtin_HEXAGON.A2.abs"
case 'd': // 1 string to match.
if (BuiltinName[23] != 'd')
break;
return Intrinsic::hexagon_A2_add; // "__builtin_HEXAGON.A2.add"
case 'n': // 1 string to match.
if (BuiltinName[23] != 'd')
break;
return Intrinsic::hexagon_A2_and; // "__builtin_HEXAGON.A2.and"
}
break;
case 'm': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName[23] != 'x')
break;
return Intrinsic::hexagon_A2_max; // "__builtin_HEXAGON.A2.max"
case 'i': // 1 string to match.
if (BuiltinName[23] != 'n')
break;
return Intrinsic::hexagon_A2_min; // "__builtin_HEXAGON.A2.min"
}
break;
case 'n': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[23] != 'g')
break;
return Intrinsic::hexagon_A2_neg; // "__builtin_HEXAGON.A2.neg"
case 'o': // 1 string to match.
if (BuiltinName[23] != 't')
break;
return Intrinsic::hexagon_A2_not; // "__builtin_HEXAGON.A2.not"
}
break;
case 'o': // 1 string to match.
if (BuiltinName.substr(22, 2) != "rp")
break;
return Intrinsic::hexagon_A2_orp; // "__builtin_HEXAGON.A2.orp"
case 's': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName[23] != 't')
break;
return Intrinsic::hexagon_A2_sat; // "__builtin_HEXAGON.A2.sat"
case 'u': // 1 string to match.
if (BuiltinName[23] != 'b')
break;
return Intrinsic::hexagon_A2_sub; // "__builtin_HEXAGON.A2.sub"
}
break;
case 't': // 1 string to match.
if (BuiltinName.substr(22, 2) != "fr")
break;
return Intrinsic::hexagon_A2_tfr; // "__builtin_HEXAGON.A2.tfr"
case 'x': // 1 string to match.
if (BuiltinName.substr(22, 2) != "or")
break;
return Intrinsic::hexagon_A2_xor; // "__builtin_HEXAGON.A2.xor"
}
break;
case '4': // 1 string to match.
if (BuiltinName.substr(20, 4) != ".orn")
break;
return Intrinsic::hexagon_A4_orn; // "__builtin_HEXAGON.A4.orn"
}
break;
case 'C': // 5 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 2) != "nd")
break;
return Intrinsic::hexagon_C2_and; // "__builtin_HEXAGON.C2.and"
case 'm': // 1 string to match.
if (BuiltinName.substr(22, 2) != "ux")
break;
return Intrinsic::hexagon_C2_mux; // "__builtin_HEXAGON.C2.mux"
case 'n': // 1 string to match.
if (BuiltinName.substr(22, 2) != "ot")
break;
return Intrinsic::hexagon_C2_not; // "__builtin_HEXAGON.C2.not"
case 'o': // 1 string to match.
if (BuiltinName.substr(22, 2) != "rn")
break;
return Intrinsic::hexagon_C2_orn; // "__builtin_HEXAGON.C2.orn"
case 'x': // 1 string to match.
if (BuiltinName.substr(22, 2) != "or")
break;
return Intrinsic::hexagon_C2_xor; // "__builtin_HEXAGON.C2.xor"
}
break;
case 'S': // 5 strings to match.
if (BuiltinName.substr(19, 3) != "2.c")
break;
switch (BuiltinName[22]) {
default: break;
case 'l': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_S2_cl0; // "__builtin_HEXAGON.S2.cl0"
case '1': // 1 string to match.
return Intrinsic::hexagon_S2_cl1; // "__builtin_HEXAGON.S2.cl1"
case 'b': // 1 string to match.
return Intrinsic::hexagon_S2_clb; // "__builtin_HEXAGON.S2.clb"
}
break;
case 't': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_S2_ct0; // "__builtin_HEXAGON.S2.ct0"
case '1': // 1 string to match.
return Intrinsic::hexagon_S2_ct1; // "__builtin_HEXAGON.S2.ct1"
}
break;
}
break;
}
break;
case 25: // 40 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 26 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 24 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 6 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(23, 2) != "sp")
break;
return Intrinsic::hexagon_A2_absp; // "__builtin_HEXAGON.A2.absp"
case 'd': // 2 strings to match.
if (BuiltinName[23] != 'd')
break;
switch (BuiltinName[24]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_A2_addi; // "__builtin_HEXAGON.A2.addi"
case 'p': // 1 string to match.
return Intrinsic::hexagon_A2_addp; // "__builtin_HEXAGON.A2.addp"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(23, 2) != "dp")
break;
return Intrinsic::hexagon_A2_andp; // "__builtin_HEXAGON.A2.andp"
case 's': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'l': // 1 string to match.
if (BuiltinName[24] != 'h')
break;
return Intrinsic::hexagon_A2_aslh; // "__builtin_HEXAGON.A2.aslh"
case 'r': // 1 string to match.
if (BuiltinName[24] != 'h')
break;
return Intrinsic::hexagon_A2_asrh; // "__builtin_HEXAGON.A2.asrh"
}
break;
}
break;
case 'm': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName[23] != 'x')
break;
switch (BuiltinName[24]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_A2_maxp; // "__builtin_HEXAGON.A2.maxp"
case 'u': // 1 string to match.
return Intrinsic::hexagon_A2_maxu; // "__builtin_HEXAGON.A2.maxu"
}
break;
case 'i': // 2 strings to match.
if (BuiltinName[23] != 'n')
break;
switch (BuiltinName[24]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_A2_minp; // "__builtin_HEXAGON.A2.minp"
case 'u': // 1 string to match.
return Intrinsic::hexagon_A2_minu; // "__builtin_HEXAGON.A2.minu"
}
break;
}
break;
case 'n': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(23, 2) != "gp")
break;
return Intrinsic::hexagon_A2_negp; // "__builtin_HEXAGON.A2.negp"
case 'o': // 1 string to match.
if (BuiltinName.substr(23, 2) != "tp")
break;
return Intrinsic::hexagon_A2_notp; // "__builtin_HEXAGON.A2.notp"
}
break;
case 'o': // 1 string to match.
if (BuiltinName.substr(22, 3) != "rir")
break;
return Intrinsic::hexagon_A2_orir; // "__builtin_HEXAGON.A2.orir"
case 's': // 7 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName[23] != 't')
break;
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_satb; // "__builtin_HEXAGON.A2.satb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_sath; // "__builtin_HEXAGON.A2.sath"
}
break;
case 'u': // 1 string to match.
if (BuiltinName.substr(23, 2) != "bp")
break;
return Intrinsic::hexagon_A2_subp; // "__builtin_HEXAGON.A2.subp"
case 'w': // 1 string to match.
if (BuiltinName.substr(23, 2) != "iz")
break;
return Intrinsic::hexagon_A2_swiz; // "__builtin_HEXAGON.A2.swiz"
case 'x': // 3 strings to match.
if (BuiltinName[23] != 't')
break;
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_sxtb; // "__builtin_HEXAGON.A2.sxtb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_sxth; // "__builtin_HEXAGON.A2.sxth"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_sxtw; // "__builtin_HEXAGON.A2.sxtw"
}
break;
}
break;
case 't': // 1 string to match.
if (BuiltinName.substr(22, 3) != "frp")
break;
return Intrinsic::hexagon_A2_tfrp; // "__builtin_HEXAGON.A2.tfrp"
case 'x': // 1 string to match.
if (BuiltinName.substr(22, 3) != "orp")
break;
return Intrinsic::hexagon_A2_xorp; // "__builtin_HEXAGON.A2.xorp"
case 'z': // 2 strings to match.
if (BuiltinName.substr(22, 2) != "xt")
break;
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_zxtb; // "__builtin_HEXAGON.A2.zxtb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_zxth; // "__builtin_HEXAGON.A2.zxth"
}
break;
}
break;
case '4': // 2 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 3) != "ndn")
break;
return Intrinsic::hexagon_A4_andn; // "__builtin_HEXAGON.A4.andn"
case 'o': // 1 string to match.
if (BuiltinName.substr(22, 3) != "rnp")
break;
return Intrinsic::hexagon_A4_ornp; // "__builtin_HEXAGON.A4.ornp"
}
break;
}
break;
case 'C': // 5 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 3 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'l': // 1 string to match.
if (BuiltinName.substr(23, 2) != "l8")
break;
return Intrinsic::hexagon_C2_all8; // "__builtin_HEXAGON.C2.all8"
case 'n': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[24] != 'n')
break;
return Intrinsic::hexagon_C2_andn; // "__builtin_HEXAGON.C2.andn"
case 'y': // 1 string to match.
if (BuiltinName[24] != '8')
break;
return Intrinsic::hexagon_C2_any8; // "__builtin_HEXAGON.C2.any8"
}
break;
}
break;
case 'm': // 1 string to match.
if (BuiltinName.substr(22, 3) != "ask")
break;
return Intrinsic::hexagon_C2_mask; // "__builtin_HEXAGON.C2.mask"
case 'v': // 1 string to match.
if (BuiltinName.substr(22, 3) != "mux")
break;
return Intrinsic::hexagon_C2_vmux; // "__builtin_HEXAGON.C2.vmux"
}
break;
case 'M': // 3 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 3) != "cci")
break;
return Intrinsic::hexagon_M2_acci; // "__builtin_HEXAGON.M2.acci"
case 'm': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(23, 2) != "ci")
break;
return Intrinsic::hexagon_M2_maci; // "__builtin_HEXAGON.M2.maci"
case 'p': // 1 string to match.
if (BuiltinName.substr(23, 2) != "yi")
break;
return Intrinsic::hexagon_M2_mpyi; // "__builtin_HEXAGON.M2.mpyi"
}
break;
}
break;
case 'S': // 6 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 5 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(22, 3) != "rev")
break;
return Intrinsic::hexagon_S2_brev; // "__builtin_HEXAGON.S2.brev"
case 'c': // 3 strings to match.
if (BuiltinName[22] != 'l')
break;
switch (BuiltinName[23]) {
default: break;
case '0': // 1 string to match.
if (BuiltinName[24] != 'p')
break;
return Intrinsic::hexagon_S2_cl0p; // "__builtin_HEXAGON.S2.cl0p"
case '1': // 1 string to match.
if (BuiltinName[24] != 'p')
break;
return Intrinsic::hexagon_S2_cl1p; // "__builtin_HEXAGON.S2.cl1p"
case 'b': // 1 string to match.
if (BuiltinName[24] != 'p')
break;
return Intrinsic::hexagon_S2_clbp; // "__builtin_HEXAGON.S2.clbp"
}
break;
case 'l': // 1 string to match.
if (BuiltinName.substr(22, 3) != "fsp")
break;
return Intrinsic::hexagon_S2_lfsp; // "__builtin_HEXAGON.S2.lfsp"
}
break;
case '4': // 1 string to match.
if (BuiltinName.substr(20, 5) != ".ornp")
break;
return Intrinsic::hexagon_S4_ornp; // "__builtin_HEXAGON.S4.ornp"
}
break;
}
break;
case 26: // 41 strings to match.
if (BuiltinName.substr(0, 10) != "__builtin_")
break;
switch (BuiltinName[10]) {
default: break;
case 'H': // 40 strings to match.
if (BuiltinName.substr(11, 7) != "EXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 25 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 24 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "dsp")
break;
return Intrinsic::hexagon_A2_addsp; // "__builtin_HEXAGON.A2.addsp"
case 'n': // 1 string to match.
if (BuiltinName.substr(23, 3) != "dir")
break;
return Intrinsic::hexagon_A2_andir; // "__builtin_HEXAGON.A2.andir"
}
break;
case 'm': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(23, 3) != "xup")
break;
return Intrinsic::hexagon_A2_maxup; // "__builtin_HEXAGON.A2.maxup"
case 'i': // 1 string to match.
if (BuiltinName.substr(23, 3) != "nup")
break;
return Intrinsic::hexagon_A2_minup; // "__builtin_HEXAGON.A2.minup"
}
break;
case 's': // 3 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(23, 2) != "tu")
break;
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_satub; // "__builtin_HEXAGON.A2.satub"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_satuh; // "__builtin_HEXAGON.A2.satuh"
}
break;
case 'u': // 1 string to match.
if (BuiltinName.substr(23, 3) != "bri")
break;
return Intrinsic::hexagon_A2_subri; // "__builtin_HEXAGON.A2.subri"
}
break;
case 't': // 4 strings to match.
if (BuiltinName.substr(22, 2) != "fr")
break;
switch (BuiltinName[24]) {
default: break;
case 'i': // 2 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_tfrih; // "__builtin_HEXAGON.A2.tfrih"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_tfril; // "__builtin_HEXAGON.A2.tfril"
}
break;
case 'p': // 1 string to match.
if (BuiltinName[25] != 'i')
break;
return Intrinsic::hexagon_A2_tfrpi; // "__builtin_HEXAGON.A2.tfrpi"
case 's': // 1 string to match.
if (BuiltinName[25] != 'i')
break;
return Intrinsic::hexagon_A2_tfrsi; // "__builtin_HEXAGON.A2.tfrsi"
}
break;
case 'v': // 13 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 6 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 2 strings to match.
if (BuiltinName[24] != 's')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vabsh; // "__builtin_HEXAGON.A2.vabsh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vabsw; // "__builtin_HEXAGON.A2.vabsw"
}
break;
case 'd': // 2 strings to match.
if (BuiltinName[24] != 'd')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vaddh; // "__builtin_HEXAGON.A2.vaddh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vaddw; // "__builtin_HEXAGON.A2.vaddw"
}
break;
case 'v': // 2 strings to match.
if (BuiltinName[24] != 'g')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vavgh; // "__builtin_HEXAGON.A2.vavgh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vavgw; // "__builtin_HEXAGON.A2.vavgw"
}
break;
}
break;
case 'c': // 1 string to match.
if (BuiltinName.substr(23, 3) != "onj")
break;
return Intrinsic::hexagon_A2_vconj; // "__builtin_HEXAGON.A2.vconj"
case 'm': // 4 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName[24] != 'x')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxh; // "__builtin_HEXAGON.A2.vmaxh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxw; // "__builtin_HEXAGON.A2.vmaxw"
}
break;
case 'i': // 2 strings to match.
if (BuiltinName[24] != 'n')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vminh; // "__builtin_HEXAGON.A2.vminh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vminw; // "__builtin_HEXAGON.A2.vminw"
}
break;
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(23, 2) != "ub")
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vsubh; // "__builtin_HEXAGON.A2.vsubh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vsubw; // "__builtin_HEXAGON.A2.vsubw"
}
break;
}
break;
}
break;
case '4': // 1 string to match.
if (BuiltinName.substr(20, 6) != ".andnp")
break;
return Intrinsic::hexagon_A4_andnp; // "__builtin_HEXAGON.A4.andnp"
}
break;
case 'C': // 9 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 8 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'c': // 3 strings to match.
if (BuiltinName.substr(22, 2) != "mp")
break;
switch (BuiltinName[24]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[25] != 'q')
break;
return Intrinsic::hexagon_C2_cmpeq; // "__builtin_HEXAGON.C2.cmpeq"
case 'g': // 1 string to match.
if (BuiltinName[25] != 't')
break;
return Intrinsic::hexagon_C2_cmpgt; // "__builtin_HEXAGON.C2.cmpgt"
case 'l': // 1 string to match.
if (BuiltinName[25] != 't')
break;
return Intrinsic::hexagon_C2_cmplt; // "__builtin_HEXAGON.C2.cmplt"
}
break;
case 'm': // 3 strings to match.
if (BuiltinName.substr(22, 2) != "ux")
break;
switch (BuiltinName[24]) {
default: break;
case 'i': // 2 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C2_muxii; // "__builtin_HEXAGON.C2.muxii"
case 'r': // 1 string to match.
return Intrinsic::hexagon_C2_muxir; // "__builtin_HEXAGON.C2.muxir"
}
break;
case 'r': // 1 string to match.
if (BuiltinName[25] != 'i')
break;
return Intrinsic::hexagon_C2_muxri; // "__builtin_HEXAGON.C2.muxri"
}
break;
case 't': // 2 strings to match.
if (BuiltinName.substr(22, 2) != "fr")
break;
switch (BuiltinName[24]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName[25] != 'r')
break;
return Intrinsic::hexagon_C2_tfrpr; // "__builtin_HEXAGON.C2.tfrpr"
case 'r': // 1 string to match.
if (BuiltinName[25] != 'p')
break;
return Intrinsic::hexagon_C2_tfrrp; // "__builtin_HEXAGON.C2.tfrrp"
}
break;
}
break;
case '4': // 1 string to match.
if (BuiltinName.substr(20, 6) != ".or_or")
break;
return Intrinsic::hexagon_C4_or_or; // "__builtin_HEXAGON.C4.or_or"
}
break;
case 'M': // 5 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 4 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 4) != "ccii")
break;
return Intrinsic::hexagon_M2_accii; // "__builtin_HEXAGON.M2.accii"
case 'm': // 1 string to match.
if (BuiltinName.substr(22, 4) != "pyui")
break;
return Intrinsic::hexagon_M2_mpyui; // "__builtin_HEXAGON.M2.mpyui"
case 'n': // 1 string to match.
if (BuiltinName.substr(22, 4) != "acci")
break;
return Intrinsic::hexagon_M2_nacci; // "__builtin_HEXAGON.M2.nacci"
case 'v': // 1 string to match.
if (BuiltinName.substr(22, 4) != "mac2")
break;
return Intrinsic::hexagon_M2_vmac2; // "__builtin_HEXAGON.M2.vmac2"
}
break;
case '4': // 1 string to match.
if (BuiltinName.substr(20, 6) != ".or_or")
break;
return Intrinsic::hexagon_M4_or_or; // "__builtin_HEXAGON.M4.or_or"
}
break;
case 'S': // 1 string to match.
if (BuiltinName.substr(19, 7) != "4.andnp")
break;
return Intrinsic::hexagon_S4_andnp; // "__builtin_HEXAGON.S4.andnp"
}
break;
case 'S': // 1 string to match.
if (BuiltinName.substr(11, 15) != "I.to.SXTHI.asrh")
break;
return Intrinsic::hexagon_SI_to_SXTHI_asrh; // "__builtin_SI.to.SXTHI.asrh"
}
break;
case 27: // 58 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 27 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 26 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(23, 4) != "ssat")
break;
return Intrinsic::hexagon_A2_abssat; // "__builtin_HEXAGON.A2.abssat"
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 4) != "dsat")
break;
return Intrinsic::hexagon_A2_addsat; // "__builtin_HEXAGON.A2.addsat"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(22, 5) != "egsat")
break;
return Intrinsic::hexagon_A2_negsat; // "__builtin_HEXAGON.A2.negsat"
case 's': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'u': // 1 string to match.
if (BuiltinName.substr(23, 4) != "bsat")
break;
return Intrinsic::hexagon_A2_subsat; // "__builtin_HEXAGON.A2.subsat"
case 'v': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(25, 2) != "dh")
break;
return Intrinsic::hexagon_A2_svaddh; // "__builtin_HEXAGON.A2.svaddh"
case 'v': // 1 string to match.
if (BuiltinName.substr(25, 2) != "gh")
break;
return Intrinsic::hexagon_A2_svavgh; // "__builtin_HEXAGON.A2.svavgh"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(24, 3) != "ubh")
break;
return Intrinsic::hexagon_A2_svsubh; // "__builtin_HEXAGON.A2.svsubh"
}
break;
}
break;
case 'v': // 19 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 8 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 3 strings to match.
if (BuiltinName[24] != 'd')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[26] != 's')
break;
return Intrinsic::hexagon_A2_vaddhs; // "__builtin_HEXAGON.A2.vaddhs"
case 'u': // 1 string to match.
if (BuiltinName[26] != 'b')
break;
return Intrinsic::hexagon_A2_vaddub; // "__builtin_HEXAGON.A2.vaddub"
case 'w': // 1 string to match.
if (BuiltinName[26] != 's')
break;
return Intrinsic::hexagon_A2_vaddws; // "__builtin_HEXAGON.A2.vaddws"
}
break;
case 'v': // 5 strings to match.
if (BuiltinName[24] != 'g')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[26] != 'r')
break;
return Intrinsic::hexagon_A2_vavghr; // "__builtin_HEXAGON.A2.vavghr"
case 'u': // 3 strings to match.
switch (BuiltinName[26]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_vavgub; // "__builtin_HEXAGON.A2.vavgub"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vavguh; // "__builtin_HEXAGON.A2.vavguh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vavguw; // "__builtin_HEXAGON.A2.vavguw"
}
break;
case 'w': // 1 string to match.
if (BuiltinName[26] != 'r')
break;
return Intrinsic::hexagon_A2_vavgwr; // "__builtin_HEXAGON.A2.vavgwr"
}
break;
}
break;
case 'm': // 6 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 3 strings to match.
if (BuiltinName.substr(24, 2) != "xu")
break;
switch (BuiltinName[26]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxub; // "__builtin_HEXAGON.A2.vmaxub"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxuh; // "__builtin_HEXAGON.A2.vmaxuh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vmaxuw; // "__builtin_HEXAGON.A2.vmaxuw"
}
break;
case 'i': // 3 strings to match.
if (BuiltinName.substr(24, 2) != "nu")
break;
switch (BuiltinName[26]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_A2_vminub; // "__builtin_HEXAGON.A2.vminub"
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vminuh; // "__builtin_HEXAGON.A2.vminuh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vminuw; // "__builtin_HEXAGON.A2.vminuw"
}
break;
}
break;
case 'n': // 2 strings to match.
if (BuiltinName.substr(23, 3) != "avg")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_vnavgh; // "__builtin_HEXAGON.A2.vnavgh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_A2_vnavgw; // "__builtin_HEXAGON.A2.vnavgw"
}
break;
case 's': // 3 strings to match.
if (BuiltinName.substr(23, 2) != "ub")
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[26] != 's')
break;
return Intrinsic::hexagon_A2_vsubhs; // "__builtin_HEXAGON.A2.vsubhs"
case 'u': // 1 string to match.
if (BuiltinName[26] != 'b')
break;
return Intrinsic::hexagon_A2_vsubub; // "__builtin_HEXAGON.A2.vsubub"
case 'w': // 1 string to match.
if (BuiltinName[26] != 's')
break;
return Intrinsic::hexagon_A2_vsubws; // "__builtin_HEXAGON.A2.vsubws"
}
break;
}
break;
}
break;
case '4': // 1 string to match.
if (BuiltinName.substr(20, 7) != ".rcmpeq")
break;
return Intrinsic::hexagon_A4_rcmpeq; // "__builtin_HEXAGON.A4.rcmpeq"
}
break;
case 'C': // 12 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 7 strings to match.
if (BuiltinName.substr(20, 4) != ".cmp")
break;
switch (BuiltinName[24]) {
default: break;
case 'e': // 2 strings to match.
if (BuiltinName[25] != 'q')
break;
switch (BuiltinName[26]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C2_cmpeqi; // "__builtin_HEXAGON.C2.cmpeqi"
case 'p': // 1 string to match.
return Intrinsic::hexagon_C2_cmpeqp; // "__builtin_HEXAGON.C2.cmpeqp"
}
break;
case 'g': // 4 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[26] != 'i')
break;
return Intrinsic::hexagon_C2_cmpgei; // "__builtin_HEXAGON.C2.cmpgei"
case 't': // 3 strings to match.
switch (BuiltinName[26]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgti; // "__builtin_HEXAGON.C2.cmpgti"
case 'p': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgtp; // "__builtin_HEXAGON.C2.cmpgtp"
case 'u': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgtu; // "__builtin_HEXAGON.C2.cmpgtu"
}
break;
}
break;
case 'l': // 1 string to match.
if (BuiltinName.substr(25, 2) != "tu")
break;
return Intrinsic::hexagon_C2_cmpltu; // "__builtin_HEXAGON.C2.cmpltu"
}
break;
case '4': // 5 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 5) != "nd_or")
break;
return Intrinsic::hexagon_C4_and_or; // "__builtin_HEXAGON.C4.and_or"
case 'c': // 2 strings to match.
if (BuiltinName.substr(22, 2) != "mp")
break;
switch (BuiltinName[24]) {
default: break;
case 'l': // 1 string to match.
if (BuiltinName.substr(25, 2) != "te")
break;
return Intrinsic::hexagon_C4_cmplte; // "__builtin_HEXAGON.C4.cmplte"
case 'n': // 1 string to match.
if (BuiltinName.substr(25, 2) != "eq")
break;
return Intrinsic::hexagon_C4_cmpneq; // "__builtin_HEXAGON.C4.cmpneq"
}
break;
case 'o': // 2 strings to match.
if (BuiltinName.substr(22, 2) != "r_")
break;
switch (BuiltinName[24]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(25, 2) != "nd")
break;
return Intrinsic::hexagon_C4_or_and; // "__builtin_HEXAGON.C4.or_and"
case 'o': // 1 string to match.
if (BuiltinName.substr(25, 2) != "rn")
break;
return Intrinsic::hexagon_C4_or_orn; // "__builtin_HEXAGON.C4.or_orn"
}
break;
}
break;
}
break;
case 'M': // 10 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 6 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'm': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(23, 3) != "csi")
break;
switch (BuiltinName[26]) {
default: break;
case 'n': // 1 string to match.
return Intrinsic::hexagon_M2_macsin; // "__builtin_HEXAGON.M2.macsin"
case 'p': // 1 string to match.
return Intrinsic::hexagon_M2_macsip; // "__builtin_HEXAGON.M2.macsip"
}
break;
case 'p': // 2 strings to match.
if (BuiltinName[23] != 'y')
break;
switch (BuiltinName[24]) {
default: break;
case '.': // 1 string to match.
if (BuiltinName.substr(25, 2) != "up")
break;
return Intrinsic::hexagon_M2_mpy_up; // "__builtin_HEXAGON.M2.mpy.up"
case 's': // 1 string to match.
if (BuiltinName.substr(25, 2) != "mi")
break;
return Intrinsic::hexagon_M2_mpysmi; // "__builtin_HEXAGON.M2.mpysmi"
}
break;
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(22, 5) != "accii")
break;
return Intrinsic::hexagon_M2_naccii; // "__builtin_HEXAGON.M2.naccii"
case 's': // 1 string to match.
if (BuiltinName.substr(22, 5) != "ubacc")
break;
return Intrinsic::hexagon_M2_subacc; // "__builtin_HEXAGON.M2.subacc"
}
break;
case '4': // 4 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 5) != "nd_or")
break;
return Intrinsic::hexagon_M4_and_or; // "__builtin_HEXAGON.M4.and_or"
case 'o': // 2 strings to match.
if (BuiltinName.substr(22, 2) != "r_")
break;
switch (BuiltinName[24]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(25, 2) != "nd")
break;
return Intrinsic::hexagon_M4_or_and; // "__builtin_HEXAGON.M4.or_and"
case 'x': // 1 string to match.
if (BuiltinName.substr(25, 2) != "or")
break;
return Intrinsic::hexagon_M4_or_xor; // "__builtin_HEXAGON.M4.or_xor"
}
break;
case 'x': // 1 string to match.
if (BuiltinName.substr(22, 5) != "or_or")
break;
return Intrinsic::hexagon_M4_xor_or; // "__builtin_HEXAGON.M4.xor_or"
}
break;
}
break;
case 'S': // 9 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 8 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(22, 5) != "nsert")
break;
return Intrinsic::hexagon_S2_insert; // "__builtin_HEXAGON.S2.insert"
case 'p': // 1 string to match.
if (BuiltinName.substr(22, 5) != "ackhl")
break;
return Intrinsic::hexagon_S2_packhl; // "__builtin_HEXAGON.S2.packhl"
case 'v': // 6 strings to match.
switch (BuiltinName[22]) {
default: break;
case 's': // 4 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName[24] != 't')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[26] != 'b')
break;
return Intrinsic::hexagon_S2_vsathb; // "__builtin_HEXAGON.S2.vsathb"
case 'w': // 1 string to match.
if (BuiltinName[26] != 'h')
break;
return Intrinsic::hexagon_S2_vsatwh; // "__builtin_HEXAGON.S2.vsatwh"
}
break;
case 'x': // 2 strings to match.
if (BuiltinName[24] != 't')
break;
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[26] != 'h')
break;
return Intrinsic::hexagon_S2_vsxtbh; // "__builtin_HEXAGON.S2.vsxtbh"
case 'h': // 1 string to match.
if (BuiltinName[26] != 'w')
break;
return Intrinsic::hexagon_S2_vsxthw; // "__builtin_HEXAGON.S2.vsxthw"
}
break;
}
break;
case 'z': // 2 strings to match.
if (BuiltinName.substr(23, 2) != "xt")
break;
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[26] != 'h')
break;
return Intrinsic::hexagon_S2_vzxtbh; // "__builtin_HEXAGON.S2.vzxtbh"
case 'h': // 1 string to match.
if (BuiltinName[26] != 'w')
break;
return Intrinsic::hexagon_S2_vzxthw; // "__builtin_HEXAGON.S2.vzxthw"
}
break;
}
break;
}
break;
case '4': // 1 string to match.
if (BuiltinName.substr(20, 7) != ".or_ori")
break;
return Intrinsic::hexagon_S4_or_ori; // "__builtin_HEXAGON.S4.or_ori"
}
break;
}
break;
case 28: // 71 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 25 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 23 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 6) != "ddpsat")
break;
return Intrinsic::hexagon_A2_addpsat; // "__builtin_HEXAGON.A2.addpsat"
case 's': // 4 strings to match.
if (BuiltinName[22] != 'v')
break;
switch (BuiltinName[23]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(25, 3) != "dhs")
break;
return Intrinsic::hexagon_A2_svaddhs; // "__builtin_HEXAGON.A2.svaddhs"
case 'v': // 1 string to match.
if (BuiltinName.substr(25, 3) != "ghs")
break;
return Intrinsic::hexagon_A2_svavghs; // "__builtin_HEXAGON.A2.svavghs"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(24, 4) != "avgh")
break;
return Intrinsic::hexagon_A2_svnavgh; // "__builtin_HEXAGON.A2.svnavgh"
case 's': // 1 string to match.
if (BuiltinName.substr(24, 4) != "ubhs")
break;
return Intrinsic::hexagon_A2_svsubhs; // "__builtin_HEXAGON.A2.svsubhs"
}
break;
case 'v': // 18 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 7 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(24, 2) != "du")
break;
switch (BuiltinName[26]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[27] != 's')
break;
return Intrinsic::hexagon_A2_vaddubs; // "__builtin_HEXAGON.A2.vaddubs"
case 'h': // 1 string to match.
if (BuiltinName[27] != 's')
break;
return Intrinsic::hexagon_A2_vadduhs; // "__builtin_HEXAGON.A2.vadduhs"
}
break;
case 'v': // 5 strings to match.
if (BuiltinName[24] != 'g')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(26, 2) != "cr")
break;
return Intrinsic::hexagon_A2_vavghcr; // "__builtin_HEXAGON.A2.vavghcr"
case 'u': // 3 strings to match.
switch (BuiltinName[26]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[27] != 'r')
break;
return Intrinsic::hexagon_A2_vavgubr; // "__builtin_HEXAGON.A2.vavgubr"
case 'h': // 1 string to match.
if (BuiltinName[27] != 'r')
break;
return Intrinsic::hexagon_A2_vavguhr; // "__builtin_HEXAGON.A2.vavguhr"
case 'w': // 1 string to match.
if (BuiltinName[27] != 'r')
break;
return Intrinsic::hexagon_A2_vavguwr; // "__builtin_HEXAGON.A2.vavguwr"
}
break;
case 'w': // 1 string to match.
if (BuiltinName.substr(26, 2) != "cr")
break;
return Intrinsic::hexagon_A2_vavgwcr; // "__builtin_HEXAGON.A2.vavgwcr"
}
break;
}
break;
case 'c': // 5 strings to match.
if (BuiltinName.substr(23, 2) != "mp")
break;
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(26, 2) != "eq")
break;
return Intrinsic::hexagon_A2_vcmpbeq; // "__builtin_HEXAGON.A2.vcmpbeq"
case 'h': // 2 strings to match.
switch (BuiltinName[26]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[27] != 'q')
break;
return Intrinsic::hexagon_A2_vcmpheq; // "__builtin_HEXAGON.A2.vcmpheq"
case 'g': // 1 string to match.
if (BuiltinName[27] != 't')
break;
return Intrinsic::hexagon_A2_vcmphgt; // "__builtin_HEXAGON.A2.vcmphgt"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[26]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[27] != 'q')
break;
return Intrinsic::hexagon_A2_vcmpweq; // "__builtin_HEXAGON.A2.vcmpweq"
case 'g': // 1 string to match.
if (BuiltinName[27] != 't')
break;
return Intrinsic::hexagon_A2_vcmpwgt; // "__builtin_HEXAGON.A2.vcmpwgt"
}
break;
}
break;
case 'n': // 2 strings to match.
if (BuiltinName.substr(23, 3) != "avg")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[27] != 'r')
break;
return Intrinsic::hexagon_A2_vnavghr; // "__builtin_HEXAGON.A2.vnavghr"
case 'w': // 1 string to match.
if (BuiltinName[27] != 'r')
break;
return Intrinsic::hexagon_A2_vnavgwr; // "__builtin_HEXAGON.A2.vnavgwr"
}
break;
case 'r': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(24, 4) != "ddub")
break;
return Intrinsic::hexagon_A2_vraddub; // "__builtin_HEXAGON.A2.vraddub"
case 's': // 1 string to match.
if (BuiltinName.substr(24, 4) != "adub")
break;
return Intrinsic::hexagon_A2_vrsadub; // "__builtin_HEXAGON.A2.vrsadub"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(23, 3) != "ubu")
break;
switch (BuiltinName[26]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[27] != 's')
break;
return Intrinsic::hexagon_A2_vsububs; // "__builtin_HEXAGON.A2.vsububs"
case 'h': // 1 string to match.
if (BuiltinName[27] != 's')
break;
return Intrinsic::hexagon_A2_vsubuhs; // "__builtin_HEXAGON.A2.vsubuhs"
}
break;
}
break;
}
break;
case '4': // 2 strings to match.
if (BuiltinName.substr(20, 5) != ".rcmp")
break;
switch (BuiltinName[25]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(26, 2) != "qi")
break;
return Intrinsic::hexagon_A4_rcmpeqi; // "__builtin_HEXAGON.A4.rcmpeqi"
case 'n': // 1 string to match.
if (BuiltinName.substr(26, 2) != "eq")
break;
return Intrinsic::hexagon_A4_rcmpneq; // "__builtin_HEXAGON.A4.rcmpneq"
}
break;
}
break;
case 'C': // 12 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 6 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 2 strings to match.
if (BuiltinName.substr(22, 3) != "its")
break;
switch (BuiltinName[25]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(26, 2) != "lr")
break;
return Intrinsic::hexagon_C2_bitsclr; // "__builtin_HEXAGON.C2.bitsclr"
case 's': // 1 string to match.
if (BuiltinName.substr(26, 2) != "et")
break;
return Intrinsic::hexagon_C2_bitsset; // "__builtin_HEXAGON.C2.bitsset"
}
break;
case 'c': // 3 strings to match.
if (BuiltinName.substr(22, 3) != "mpg")
break;
switch (BuiltinName[25]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(26, 2) != "ui")
break;
return Intrinsic::hexagon_C2_cmpgeui; // "__builtin_HEXAGON.C2.cmpgeui"
case 't': // 2 strings to match.
if (BuiltinName[26] != 'u')
break;
switch (BuiltinName[27]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgtui; // "__builtin_HEXAGON.C2.cmpgtui"
case 'p': // 1 string to match.
return Intrinsic::hexagon_C2_cmpgtup; // "__builtin_HEXAGON.C2.cmpgtup"
}
break;
}
break;
case 'v': // 1 string to match.
if (BuiltinName.substr(22, 6) != "itpack")
break;
return Intrinsic::hexagon_C2_vitpack; // "__builtin_HEXAGON.C2.vitpack"
}
break;
case '4': // 6 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(22, 3) != "nd_")
break;
switch (BuiltinName[25]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(26, 2) != "nd")
break;
return Intrinsic::hexagon_C4_and_and; // "__builtin_HEXAGON.C4.and_and"
case 'o': // 1 string to match.
if (BuiltinName.substr(26, 2) != "rn")
break;
return Intrinsic::hexagon_C4_and_orn; // "__builtin_HEXAGON.C4.and_orn"
}
break;
case 'c': // 3 strings to match.
if (BuiltinName.substr(22, 2) != "mp")
break;
switch (BuiltinName[24]) {
default: break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(25, 2) != "te")
break;
switch (BuiltinName[27]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_C4_cmpltei; // "__builtin_HEXAGON.C4.cmpltei"
case 'u': // 1 string to match.
return Intrinsic::hexagon_C4_cmplteu; // "__builtin_HEXAGON.C4.cmplteu"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(25, 3) != "eqi")
break;
return Intrinsic::hexagon_C4_cmpneqi; // "__builtin_HEXAGON.C4.cmpneqi"
}
break;
case 'o': // 1 string to match.
if (BuiltinName.substr(22, 6) != "r_andn")
break;
return Intrinsic::hexagon_C4_or_andn; // "__builtin_HEXAGON.C4.or_andn"
}
break;
}
break;
case 'M': // 7 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 3 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'm': // 1 string to match.
if (BuiltinName.substr(22, 6) != "pyu.up")
break;
return Intrinsic::hexagon_M2_mpyu_up; // "__builtin_HEXAGON.M2.mpyu.up"
case 'v': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'm': // 1 string to match.
if (BuiltinName.substr(23, 5) != "ac2es")
break;
return Intrinsic::hexagon_M2_vmac2es; // "__builtin_HEXAGON.M2.vmac2es"
case 'r': // 1 string to match.
if (BuiltinName.substr(23, 5) != "adduh")
break;
return Intrinsic::hexagon_M2_vradduh; // "__builtin_HEXAGON.M2.vradduh"
}
break;
}
break;
case '4': // 4 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(22, 3) != "nd_")
break;
switch (BuiltinName[25]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(26, 2) != "nd")
break;
return Intrinsic::hexagon_M4_and_and; // "__builtin_HEXAGON.M4.and_and"
case 'x': // 1 string to match.
if (BuiltinName.substr(26, 2) != "or")
break;
return Intrinsic::hexagon_M4_and_xor; // "__builtin_HEXAGON.M4.and_xor"
}
break;
case 'o': // 1 string to match.
if (BuiltinName.substr(22, 6) != "r_andn")
break;
return Intrinsic::hexagon_M4_or_andn; // "__builtin_HEXAGON.M4.or_andn"
case 'x': // 1 string to match.
if (BuiltinName.substr(22, 6) != "or_and")
break;
return Intrinsic::hexagon_M4_xor_and; // "__builtin_HEXAGON.M4.xor_and"
}
break;
}
break;
case 'S': // 27 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 24 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName[22] != 's')
break;
switch (BuiltinName[23]) {
default: break;
case 'l': // 4 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_asl_i_p; // "__builtin_HEXAGON.S2.asl.i.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_asl_i_r; // "__builtin_HEXAGON.S2.asl.i.r"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_asl_r_p; // "__builtin_HEXAGON.S2.asl.r.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_asl_r_r; // "__builtin_HEXAGON.S2.asl.r.r"
}
break;
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_asr_i_p; // "__builtin_HEXAGON.S2.asr.i.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_asr_i_r; // "__builtin_HEXAGON.S2.asr.i.r"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_asr_r_p; // "__builtin_HEXAGON.S2.asr.r.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_asr_r_r; // "__builtin_HEXAGON.S2.asr.r.r"
}
break;
}
break;
}
break;
case 'c': // 1 string to match.
if (BuiltinName.substr(22, 6) != "lbnorm")
break;
return Intrinsic::hexagon_S2_clbnorm; // "__builtin_HEXAGON.S2.clbnorm"
case 'i': // 1 string to match.
if (BuiltinName.substr(22, 6) != "nsertp")
break;
return Intrinsic::hexagon_S2_insertp; // "__builtin_HEXAGON.S2.insertp"
case 'l': // 6 strings to match.
if (BuiltinName[22] != 's')
break;
switch (BuiltinName[23]) {
default: break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(24, 3) != ".r.")
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_lsl_r_p; // "__builtin_HEXAGON.S2.lsl.r.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_lsl_r_r; // "__builtin_HEXAGON.S2.lsl.r.r"
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_i_p; // "__builtin_HEXAGON.S2.lsr.i.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_i_r; // "__builtin_HEXAGON.S2.lsr.i.r"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_r_p; // "__builtin_HEXAGON.S2.lsr.r.p"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_r_r; // "__builtin_HEXAGON.S2.lsr.r.r"
}
break;
}
break;
}
break;
case 'p': // 1 string to match.
if (BuiltinName.substr(22, 6) != "arityp")
break;
return Intrinsic::hexagon_S2_parityp; // "__builtin_HEXAGON.S2.parityp"
case 's': // 5 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'h': // 4 strings to match.
if (BuiltinName.substr(23, 3) != "uff")
break;
switch (BuiltinName[26]) {
default: break;
case 'e': // 2 strings to match.
switch (BuiltinName[27]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_S2_shuffeb; // "__builtin_HEXAGON.S2.shuffeb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_shuffeh; // "__builtin_HEXAGON.S2.shuffeh"
}
break;
case 'o': // 2 strings to match.
switch (BuiltinName[27]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_S2_shuffob; // "__builtin_HEXAGON.S2.shuffob"
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_shuffoh; // "__builtin_HEXAGON.S2.shuffoh"
}
break;
}
break;
case 'v': // 1 string to match.
if (BuiltinName.substr(23, 5) != "sathb")
break;
return Intrinsic::hexagon_S2_svsathb; // "__builtin_HEXAGON.S2.svsathb"
}
break;
case 'v': // 2 strings to match.
if (BuiltinName.substr(22, 3) != "sat")
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(26, 2) != "ub")
break;
return Intrinsic::hexagon_S2_vsathub; // "__builtin_HEXAGON.S2.vsathub"
case 'w': // 1 string to match.
if (BuiltinName.substr(26, 2) != "uh")
break;
return Intrinsic::hexagon_S2_vsatwuh; // "__builtin_HEXAGON.S2.vsatwuh"
}
break;
}
break;
case '4': // 3 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 6) != "ddaddi")
break;
return Intrinsic::hexagon_S4_addaddi; // "__builtin_HEXAGON.S4.addaddi"
case 'o': // 1 string to match.
if (BuiltinName.substr(22, 6) != "r_andi")
break;
return Intrinsic::hexagon_S4_or_andi; // "__builtin_HEXAGON.S4.or_andi"
case 's': // 1 string to match.
if (BuiltinName.substr(22, 6) != "ubaddi")
break;
return Intrinsic::hexagon_S4_subaddi; // "__builtin_HEXAGON.S4.subaddi"
}
break;
}
break;
}
break;
case 29: // 69 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 14 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 10 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(22, 7) != "ombinew")
break;
return Intrinsic::hexagon_A2_combinew; // "__builtin_HEXAGON.A2.combinew"
case 's': // 2 strings to match.
if (BuiltinName[22] != 'v')
break;
switch (BuiltinName[23]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(24, 5) != "dduhs")
break;
return Intrinsic::hexagon_A2_svadduhs; // "__builtin_HEXAGON.A2.svadduhs"
case 's': // 1 string to match.
if (BuiltinName.substr(24, 5) != "ubuhs")
break;
return Intrinsic::hexagon_A2_svsubuhs; // "__builtin_HEXAGON.A2.svsubuhs"
}
break;
case 'v': // 7 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(23, 2) != "bs")
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(26, 3) != "sat")
break;
return Intrinsic::hexagon_A2_vabshsat; // "__builtin_HEXAGON.A2.vabshsat"
case 'w': // 1 string to match.
if (BuiltinName.substr(26, 3) != "sat")
break;
return Intrinsic::hexagon_A2_vabswsat; // "__builtin_HEXAGON.A2.vabswsat"
}
break;
case 'c': // 3 strings to match.
if (BuiltinName.substr(23, 2) != "mp")
break;
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(26, 3) != "gtu")
break;
return Intrinsic::hexagon_A2_vcmpbgtu; // "__builtin_HEXAGON.A2.vcmpbgtu"
case 'h': // 1 string to match.
if (BuiltinName.substr(26, 3) != "gtu")
break;
return Intrinsic::hexagon_A2_vcmphgtu; // "__builtin_HEXAGON.A2.vcmphgtu"
case 'w': // 1 string to match.
if (BuiltinName.substr(26, 3) != "gtu")
break;
return Intrinsic::hexagon_A2_vcmpwgtu; // "__builtin_HEXAGON.A2.vcmpwgtu"
}
break;
case 'n': // 2 strings to match.
if (BuiltinName.substr(23, 3) != "avg")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(27, 2) != "cr")
break;
return Intrinsic::hexagon_A2_vnavghcr; // "__builtin_HEXAGON.A2.vnavghcr"
case 'w': // 1 string to match.
if (BuiltinName.substr(27, 2) != "cr")
break;
return Intrinsic::hexagon_A2_vnavgwcr; // "__builtin_HEXAGON.A2.vnavgwcr"
}
break;
}
break;
}
break;
case '4': // 4 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'm': // 1 string to match.
if (BuiltinName.substr(22, 7) != "odwrapu")
break;
return Intrinsic::hexagon_A4_modwrapu; // "__builtin_HEXAGON.A4.modwrapu"
case 'r': // 3 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(23, 6) != "mpneqi")
break;
return Intrinsic::hexagon_A4_rcmpneqi; // "__builtin_HEXAGON.A4.rcmpneqi"
case 'o': // 2 strings to match.
if (BuiltinName.substr(23, 5) != "und_r")
break;
switch (BuiltinName[28]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_A4_round_ri; // "__builtin_HEXAGON.A4.round_ri"
case 'r': // 1 string to match.
return Intrinsic::hexagon_A4_round_rr; // "__builtin_HEXAGON.A4.round_rr"
}
break;
}
break;
}
break;
}
break;
case 'C': // 3 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 1 string to match.
if (BuiltinName.substr(20, 9) != ".bitsclri")
break;
return Intrinsic::hexagon_C2_bitsclri; // "__builtin_HEXAGON.C2.bitsclri"
case '4': // 2 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 7) != "nd_andn")
break;
return Intrinsic::hexagon_C4_and_andn; // "__builtin_HEXAGON.C4.and_andn"
case 'c': // 1 string to match.
if (BuiltinName.substr(22, 7) != "mplteui")
break;
return Intrinsic::hexagon_C4_cmplteui; // "__builtin_HEXAGON.C4.cmplteui"
}
break;
}
break;
case 'M': // 20 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 17 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'c': // 10 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'm': // 8 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 4 strings to match.
if (BuiltinName[24] != 'c')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(26, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_cmaci_s0; // "__builtin_HEXAGON.M2.cmaci.s0"
case 'r': // 1 string to match.
if (BuiltinName.substr(26, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_cmacr_s0; // "__builtin_HEXAGON.M2.cmacr.s0"
case 's': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".s")
break;
switch (BuiltinName[28]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmacs_s0; // "__builtin_HEXAGON.M2.cmacs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmacs_s1; // "__builtin_HEXAGON.M2.cmacs.s1"
}
break;
}
break;
case 'p': // 4 strings to match.
if (BuiltinName[24] != 'y')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(26, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_cmpyi_s0; // "__builtin_HEXAGON.M2.cmpyi.s0"
case 'r': // 1 string to match.
if (BuiltinName.substr(26, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_cmpyr_s0; // "__builtin_HEXAGON.M2.cmpyr.s0"
case 's': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".s")
break;
switch (BuiltinName[28]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmpys_s0; // "__builtin_HEXAGON.M2.cmpys.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmpys_s1; // "__builtin_HEXAGON.M2.cmpys.s1"
}
break;
}
break;
}
break;
case 'n': // 2 strings to match.
if (BuiltinName.substr(23, 5) != "acs.s")
break;
switch (BuiltinName[28]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cnacs_s0; // "__builtin_HEXAGON.M2.cnacs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cnacs_s1; // "__builtin_HEXAGON.M2.cnacs.s1"
}
break;
}
break;
case 'm': // 4 strings to match.
if (BuiltinName.substr(22, 3) != "mpy")
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".s")
break;
switch (BuiltinName[28]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyh_s0; // "__builtin_HEXAGON.M2.mmpyh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyh_s1; // "__builtin_HEXAGON.M2.mmpyh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".s")
break;
switch (BuiltinName[28]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyl_s0; // "__builtin_HEXAGON.M2.mmpyl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyl_s1; // "__builtin_HEXAGON.M2.mmpyl.s1"
}
break;
}
break;
case 'v': // 2 strings to match.
if (BuiltinName.substr(22, 2) != "rm")
break;
switch (BuiltinName[24]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(25, 4) != "c.s0")
break;
return Intrinsic::hexagon_M2_vrmac_s0; // "__builtin_HEXAGON.M2.vrmac.s0"
case 'p': // 1 string to match.
if (BuiltinName.substr(25, 4) != "y.s0")
break;
return Intrinsic::hexagon_M2_vrmpy_s0; // "__builtin_HEXAGON.M2.vrmpy.s0"
}
break;
case 'x': // 1 string to match.
if (BuiltinName.substr(22, 7) != "or.xacc")
break;
return Intrinsic::hexagon_M2_xor_xacc; // "__builtin_HEXAGON.M2.xor.xacc"
}
break;
case '4': // 3 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(22, 7) != "nd_andn")
break;
return Intrinsic::hexagon_M4_and_andn; // "__builtin_HEXAGON.M4.and_andn"
case 'x': // 2 strings to match.
if (BuiltinName.substr(22, 3) != "or_")
break;
switch (BuiltinName[25]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(26, 3) != "ndn")
break;
return Intrinsic::hexagon_M4_xor_andn; // "__builtin_HEXAGON.M4.xor_andn"
case 'x': // 1 string to match.
if (BuiltinName.substr(26, 3) != "acc")
break;
return Intrinsic::hexagon_M4_xor_xacc; // "__builtin_HEXAGON.M4.xor_xacc"
}
break;
}
break;
}
break;
case 'S': // 32 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 31 strings to match.
if (BuiltinName[20] != '.')
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName[22] != 's')
break;
switch (BuiltinName[23]) {
default: break;
case 'l': // 4 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".v")
break;
switch (BuiltinName[28]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_asl_i_vh; // "__builtin_HEXAGON.S2.asl.i.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_asl_i_vw; // "__builtin_HEXAGON.S2.asl.i.vw"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".v")
break;
switch (BuiltinName[28]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_asl_r_vh; // "__builtin_HEXAGON.S2.asl.r.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_asl_r_vw; // "__builtin_HEXAGON.S2.asl.r.vw"
}
break;
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".v")
break;
switch (BuiltinName[28]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_asr_i_vh; // "__builtin_HEXAGON.S2.asr.i.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_asr_i_vw; // "__builtin_HEXAGON.S2.asr.i.vw"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".v")
break;
switch (BuiltinName[28]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_asr_r_vh; // "__builtin_HEXAGON.S2.asr.r.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_asr_r_vw; // "__builtin_HEXAGON.S2.asr.r.vw"
}
break;
}
break;
}
break;
case 'c': // 2 strings to match.
if (BuiltinName.substr(22, 6) != "lrbit.")
break;
switch (BuiltinName[28]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_S2_clrbit_i; // "__builtin_HEXAGON.S2.clrbit.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_clrbit_r; // "__builtin_HEXAGON.S2.clrbit.r"
}
break;
case 'e': // 1 string to match.
if (BuiltinName.substr(22, 7) != "xtractu")
break;
return Intrinsic::hexagon_S2_extractu; // "__builtin_HEXAGON.S2.extractu"
case 'l': // 6 strings to match.
if (BuiltinName[22] != 's')
break;
switch (BuiltinName[23]) {
default: break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(24, 4) != ".r.v")
break;
switch (BuiltinName[28]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_lsl_r_vh; // "__builtin_HEXAGON.S2.lsl.r.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_lsl_r_vw; // "__builtin_HEXAGON.S2.lsl.r.vw"
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".v")
break;
switch (BuiltinName[28]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_i_vh; // "__builtin_HEXAGON.S2.lsr.i.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_i_vw; // "__builtin_HEXAGON.S2.lsr.i.vw"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName.substr(26, 2) != ".v")
break;
switch (BuiltinName[28]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_r_vh; // "__builtin_HEXAGON.S2.lsr.r.vh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_S2_lsr_r_vw; // "__builtin_HEXAGON.S2.lsr.r.vw"
}
break;
}
break;
}
break;
case 's': // 3 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'e': // 2 strings to match.
if (BuiltinName.substr(23, 5) != "tbit.")
break;
switch (BuiltinName[28]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_S2_setbit_i; // "__builtin_HEXAGON.S2.setbit.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_setbit_r; // "__builtin_HEXAGON.S2.setbit.r"
}
break;
case 'v': // 1 string to match.
if (BuiltinName.substr(23, 6) != "sathub")
break;
return Intrinsic::hexagon_S2_svsathub; // "__builtin_HEXAGON.S2.svsathub"
}
break;
case 't': // 2 strings to match.
if (BuiltinName.substr(22, 6) != "stbit.")
break;
switch (BuiltinName[28]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_S2_tstbit_i; // "__builtin_HEXAGON.S2.tstbit.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_tstbit_r; // "__builtin_HEXAGON.S2.tstbit.r"
}
break;
case 'v': // 9 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(23, 4) != "lign")
break;
switch (BuiltinName[27]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName[28] != 'b')
break;
return Intrinsic::hexagon_S2_valignib; // "__builtin_HEXAGON.S2.valignib"
case 'r': // 1 string to match.
if (BuiltinName[28] != 'b')
break;
return Intrinsic::hexagon_S2_valignrb; // "__builtin_HEXAGON.S2.valignrb"
}
break;
case 'c': // 1 string to match.
if (BuiltinName.substr(23, 6) != "rotate")
break;
return Intrinsic::hexagon_S2_vcrotate; // "__builtin_HEXAGON.S2.vcrotate"
case 's': // 2 strings to match.
if (BuiltinName.substr(23, 5) != "platr")
break;
switch (BuiltinName[28]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::hexagon_S2_vsplatrb; // "__builtin_HEXAGON.S2.vsplatrb"
case 'h': // 1 string to match.
return Intrinsic::hexagon_S2_vsplatrh; // "__builtin_HEXAGON.S2.vsplatrh"
}
break;
case 't': // 4 strings to match.
if (BuiltinName.substr(23, 3) != "run")
break;
switch (BuiltinName[26]) {
default: break;
case 'e': // 2 strings to match.
switch (BuiltinName[27]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[28] != 'b')
break;
return Intrinsic::hexagon_S2_vtrunehb; // "__builtin_HEXAGON.S2.vtrunehb"
case 'w': // 1 string to match.
if (BuiltinName[28] != 'h')
break;
return Intrinsic::hexagon_S2_vtrunewh; // "__builtin_HEXAGON.S2.vtrunewh"
}
break;
case 'o': // 2 strings to match.
switch (BuiltinName[27]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[28] != 'b')
break;
return Intrinsic::hexagon_S2_vtrunohb; // "__builtin_HEXAGON.S2.vtrunohb"
case 'w': // 1 string to match.
if (BuiltinName[28] != 'h')
break;
return Intrinsic::hexagon_S2_vtrunowh; // "__builtin_HEXAGON.S2.vtrunowh"
}
break;
}
break;
}
break;
}
break;
case '4': // 1 string to match.
if (BuiltinName.substr(20, 9) != ".or_andix")
break;
return Intrinsic::hexagon_S4_or_andix; // "__builtin_HEXAGON.S4.or_andix"
}
break;
}
break;
case 30: // 48 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 5 strings to match.
switch (BuiltinName[19]) {
default: break;
case '2': // 1 string to match.
if (BuiltinName.substr(20, 10) != ".combineii")
break;
return Intrinsic::hexagon_A2_combineii; // "__builtin_HEXAGON.A2.combineii"
case '4': // 4 strings to match.
if (BuiltinName.substr(20, 2) != ".c")
break;
switch (BuiltinName[22]) {
default: break;
case 'o': // 2 strings to match.
if (BuiltinName.substr(23, 5) != "mbine")
break;
switch (BuiltinName[28]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName[29] != 'r')
break;
return Intrinsic::hexagon_A4_combineir; // "__builtin_HEXAGON.A4.combineir"
case 'r': // 1 string to match.
if (BuiltinName[29] != 'i')
break;
return Intrinsic::hexagon_A4_combineri; // "__builtin_HEXAGON.A4.combineri"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName.substr(23, 6) != "ound_r")
break;
switch (BuiltinName[29]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_A4_cround_ri; // "__builtin_HEXAGON.A4.cround_ri"
case 'r': // 1 string to match.
return Intrinsic::hexagon_A4_cround_rr; // "__builtin_HEXAGON.A4.cround_rr"
}
break;
}
break;
}
break;
case 'C': // 1 string to match.
if (BuiltinName.substr(19, 11) != "2.pxfer.map")
break;
return Intrinsic::hexagon_C2_pxfer_map; // "__builtin_HEXAGON.C2.pxfer.map"
case 'M': // 38 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'c': // 8 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'm': // 6 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(24, 5) != "csc.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmacsc_s0; // "__builtin_HEXAGON.M2.cmacsc.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmacsc_s1; // "__builtin_HEXAGON.M2.cmacsc.s1"
}
break;
case 'p': // 4 strings to match.
if (BuiltinName[24] != 'y')
break;
switch (BuiltinName[25]) {
default: break;
case 'r': // 2 strings to match.
if (BuiltinName.substr(26, 3) != "s.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmpyrs_s0; // "__builtin_HEXAGON.M2.cmpyrs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmpyrs_s1; // "__builtin_HEXAGON.M2.cmpyrs.s1"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(26, 3) != "c.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmpysc_s0; // "__builtin_HEXAGON.M2.cmpysc.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmpysc_s1; // "__builtin_HEXAGON.M2.cmpysc.s1"
}
break;
}
break;
}
break;
case 'n': // 2 strings to match.
if (BuiltinName.substr(23, 6) != "acsc.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cnacsc_s0; // "__builtin_HEXAGON.M2.cnacsc.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cnacsc_s1; // "__builtin_HEXAGON.M2.cnacsc.s1"
}
break;
}
break;
case 'm': // 20 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'm': // 12 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 4 strings to match.
if (BuiltinName[24] != 'c')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(26, 3) != "s.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmachs_s0; // "__builtin_HEXAGON.M2.mmachs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmachs_s1; // "__builtin_HEXAGON.M2.mmachs.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(26, 3) != "s.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmacls_s0; // "__builtin_HEXAGON.M2.mmacls.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmacls_s1; // "__builtin_HEXAGON.M2.mmacls.s1"
}
break;
}
break;
case 'p': // 8 strings to match.
if (BuiltinName[24] != 'y')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(26, 3) != ".rs")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyh_rs0; // "__builtin_HEXAGON.M2.mmpyh.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyh_rs1; // "__builtin_HEXAGON.M2.mmpyh.rs1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(26, 3) != ".rs")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyl_rs0; // "__builtin_HEXAGON.M2.mmpyl.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyl_rs1; // "__builtin_HEXAGON.M2.mmpyl.rs1"
}
break;
case 'u': // 4 strings to match.
switch (BuiltinName[26]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(27, 2) != ".s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyuh_s0; // "__builtin_HEXAGON.M2.mmpyuh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyuh_s1; // "__builtin_HEXAGON.M2.mmpyuh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(27, 2) != ".s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyul_s0; // "__builtin_HEXAGON.M2.mmpyul.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyul_s1; // "__builtin_HEXAGON.M2.mmpyul.s1"
}
break;
}
break;
}
break;
}
break;
case 'p': // 8 strings to match.
if (BuiltinName.substr(23, 2) != "y.")
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[26]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(27, 2) != ".s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_hh_s0; // "__builtin_HEXAGON.M2.mpy.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_hh_s1; // "__builtin_HEXAGON.M2.mpy.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(27, 2) != ".s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_hl_s0; // "__builtin_HEXAGON.M2.mpy.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_hl_s1; // "__builtin_HEXAGON.M2.mpy.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[26]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(27, 2) != ".s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_lh_s0; // "__builtin_HEXAGON.M2.mpy.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_lh_s1; // "__builtin_HEXAGON.M2.mpy.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(27, 2) != ".s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_ll_s0; // "__builtin_HEXAGON.M2.mpy.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_ll_s1; // "__builtin_HEXAGON.M2.mpy.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 'v': // 10 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(23, 6) != "bsdiff")
break;
switch (BuiltinName[29]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_M2_vabsdiffh; // "__builtin_HEXAGON.M2.vabsdiffh"
case 'w': // 1 string to match.
return Intrinsic::hexagon_M2_vabsdiffw; // "__builtin_HEXAGON.M2.vabsdiffw"
}
break;
case 'd': // 4 strings to match.
if (BuiltinName[23] != 'm')
break;
switch (BuiltinName[24]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(25, 4) != "cs.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vdmacs_s0; // "__builtin_HEXAGON.M2.vdmacs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vdmacs_s1; // "__builtin_HEXAGON.M2.vdmacs.s1"
}
break;
case 'p': // 2 strings to match.
if (BuiltinName.substr(25, 4) != "ys.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vdmpys_s0; // "__builtin_HEXAGON.M2.vdmpys.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vdmpys_s1; // "__builtin_HEXAGON.M2.vdmpys.s1"
}
break;
}
break;
case 'm': // 4 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(24, 5) != "c2s.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vmac2s_s0; // "__builtin_HEXAGON.M2.vmac2s.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vmac2s_s1; // "__builtin_HEXAGON.M2.vmac2s.s1"
}
break;
case 'p': // 2 strings to match.
if (BuiltinName.substr(24, 5) != "y2s.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vmpy2s_s0; // "__builtin_HEXAGON.M2.vmpy2s.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vmpy2s_s1; // "__builtin_HEXAGON.M2.vmpy2s.s1"
}
break;
}
break;
}
break;
}
break;
case 'S': // 4 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(22, 8) != "xtractup")
break;
return Intrinsic::hexagon_S2_extractup; // "__builtin_HEXAGON.S2.extractup"
case 'i': // 1 string to match.
if (BuiltinName.substr(22, 8) != "nsert.rp")
break;
return Intrinsic::hexagon_S2_insert_rp; // "__builtin_HEXAGON.S2.insert.rp"
case 'v': // 2 strings to match.
if (BuiltinName.substr(22, 6) != "splice")
break;
switch (BuiltinName[28]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName[29] != 'b')
break;
return Intrinsic::hexagon_S2_vspliceib; // "__builtin_HEXAGON.S2.vspliceib"
case 'r': // 1 string to match.
if (BuiltinName[29] != 'b')
break;
return Intrinsic::hexagon_S2_vsplicerb; // "__builtin_HEXAGON.S2.vsplicerb"
}
break;
}
break;
}
break;
case 31: // 66 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 4 strings to match.
if (BuiltinName.substr(19, 10) != "2.combine.")
break;
switch (BuiltinName[29]) {
default: break;
case 'h': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_combine_hh; // "__builtin_HEXAGON.A2.combine.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_combine_hl; // "__builtin_HEXAGON.A2.combine.hl"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_combine_lh; // "__builtin_HEXAGON.A2.combine.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_combine_ll; // "__builtin_HEXAGON.A2.combine.ll"
}
break;
}
break;
case 'M': // 45 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName.substr(22, 8) != "mpyrsc.s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_cmpyrsc_s0; // "__builtin_HEXAGON.M2.cmpyrsc.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_cmpyrsc_s1; // "__builtin_HEXAGON.M2.cmpyrsc.s1"
}
break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(22, 4) != "pmpy")
break;
switch (BuiltinName[26]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName.substr(27, 4) != "s.s0")
break;
return Intrinsic::hexagon_M2_dpmpyss_s0; // "__builtin_HEXAGON.M2.dpmpyss.s0"
case 'u': // 1 string to match.
if (BuiltinName.substr(27, 4) != "u.s0")
break;
return Intrinsic::hexagon_M2_dpmpyuu_s0; // "__builtin_HEXAGON.M2.dpmpyuu.s0"
}
break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(22, 4) != "mmpy")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(27, 4) != ".rs1")
break;
return Intrinsic::hexagon_M2_hmmpyh_rs1; // "__builtin_HEXAGON.M2.hmmpyh.rs1"
case 'l': // 1 string to match.
if (BuiltinName.substr(27, 4) != ".rs1")
break;
return Intrinsic::hexagon_M2_hmmpyl_rs1; // "__builtin_HEXAGON.M2.hmmpyl.rs1"
}
break;
case 'm': // 28 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'm': // 12 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName[24] != 'c')
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(26, 4) != "s.rs")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmachs_rs0; // "__builtin_HEXAGON.M2.mmachs.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmachs_rs1; // "__builtin_HEXAGON.M2.mmachs.rs1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(26, 4) != "s.rs")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmacls_rs0; // "__builtin_HEXAGON.M2.mmacls.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmacls_rs1; // "__builtin_HEXAGON.M2.mmacls.rs1"
}
break;
case 'u': // 4 strings to match.
switch (BuiltinName[26]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(27, 3) != "s.s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmacuhs_s0; // "__builtin_HEXAGON.M2.mmacuhs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmacuhs_s1; // "__builtin_HEXAGON.M2.mmacuhs.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(27, 3) != "s.s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmaculs_s0; // "__builtin_HEXAGON.M2.mmaculs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmaculs_s1; // "__builtin_HEXAGON.M2.mmaculs.s1"
}
break;
}
break;
}
break;
case 'p': // 4 strings to match.
if (BuiltinName.substr(24, 2) != "yu")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(27, 3) != ".rs")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyuh_rs0; // "__builtin_HEXAGON.M2.mmpyuh.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyuh_rs1; // "__builtin_HEXAGON.M2.mmpyuh.rs1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(27, 3) != ".rs")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyul_rs0; // "__builtin_HEXAGON.M2.mmpyul.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmpyul_rs1; // "__builtin_HEXAGON.M2.mmpyul.rs1"
}
break;
}
break;
}
break;
case 'p': // 16 strings to match.
if (BuiltinName[23] != 'y')
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 8 strings to match.
if (BuiltinName[25] != '.')
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[27]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(28, 2) != ".s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_hh_s0; // "__builtin_HEXAGON.M2.mpyd.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_hh_s1; // "__builtin_HEXAGON.M2.mpyd.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(28, 2) != ".s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_hl_s0; // "__builtin_HEXAGON.M2.mpyd.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_hl_s1; // "__builtin_HEXAGON.M2.mpyd.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[27]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(28, 2) != ".s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_lh_s0; // "__builtin_HEXAGON.M2.mpyd.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_lh_s1; // "__builtin_HEXAGON.M2.mpyd.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(28, 2) != ".s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_ll_s0; // "__builtin_HEXAGON.M2.mpyd.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_ll_s1; // "__builtin_HEXAGON.M2.mpyd.ll.s1"
}
break;
}
break;
}
break;
case 'u': // 8 strings to match.
if (BuiltinName[25] != '.')
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[27]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(28, 2) != ".s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_hh_s0; // "__builtin_HEXAGON.M2.mpyu.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_hh_s1; // "__builtin_HEXAGON.M2.mpyu.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(28, 2) != ".s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_hl_s0; // "__builtin_HEXAGON.M2.mpyu.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_hl_s1; // "__builtin_HEXAGON.M2.mpyu.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[27]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(28, 2) != ".s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_lh_s0; // "__builtin_HEXAGON.M2.mpyu.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_lh_s1; // "__builtin_HEXAGON.M2.mpyu.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(28, 2) != ".s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_ll_s0; // "__builtin_HEXAGON.M2.mpyu.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_ll_s1; // "__builtin_HEXAGON.M2.mpyu.ll.s1"
}
break;
}
break;
}
break;
}
break;
}
break;
case 'v': // 11 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(23, 7) != "mpyrs.s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vdmpyrs_s0; // "__builtin_HEXAGON.M2.vdmpyrs.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vdmpyrs_s1; // "__builtin_HEXAGON.M2.vdmpyrs.s1"
}
break;
case 'm': // 4 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(24, 6) != "c2es.s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vmac2es_s0; // "__builtin_HEXAGON.M2.vmac2es.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vmac2es_s1; // "__builtin_HEXAGON.M2.vmac2es.s1"
}
break;
case 'p': // 2 strings to match.
if (BuiltinName.substr(24, 6) != "y2es.s")
break;
switch (BuiltinName[30]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_vmpy2es_s0; // "__builtin_HEXAGON.M2.vmpy2es.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_vmpy2es_s1; // "__builtin_HEXAGON.M2.vmpy2es.s1"
}
break;
}
break;
case 'r': // 5 strings to match.
if (BuiltinName.substr(23, 2) != "cm")
break;
switch (BuiltinName[25]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName[26] != 'c')
break;
switch (BuiltinName[27]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_vrcmaci_s0; // "__builtin_HEXAGON.M2.vrcmaci.s0"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_vrcmacr_s0; // "__builtin_HEXAGON.M2.vrcmacr.s0"
}
break;
case 'p': // 3 strings to match.
if (BuiltinName[26] != 'y')
break;
switch (BuiltinName[27]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_vrcmpyi_s0; // "__builtin_HEXAGON.M2.vrcmpyi.s0"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".s0")
break;
return Intrinsic::hexagon_M2_vrcmpyr_s0; // "__builtin_HEXAGON.M2.vrcmpyr.s0"
case 's': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".s1")
break;
return Intrinsic::hexagon_M2_vrcmpys_s1; // "__builtin_HEXAGON.M2.vrcmpys.s1"
}
break;
}
break;
}
break;
}
break;
case 'S': // 17 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName[22] != 's')
break;
switch (BuiltinName[23]) {
default: break;
case 'l': // 4 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asl_i_p_or; // "__builtin_HEXAGON.S2.asl.i.p.or"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asl_i_r_or; // "__builtin_HEXAGON.S2.asl.i.r.or"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asl_r_p_or; // "__builtin_HEXAGON.S2.asl.r.p.or"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asl_r_r_or; // "__builtin_HEXAGON.S2.asl.r.r.or"
}
break;
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asr_i_p_or; // "__builtin_HEXAGON.S2.asr.i.p.or"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asr_i_r_or; // "__builtin_HEXAGON.S2.asr.i.r.or"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asr_r_p_or; // "__builtin_HEXAGON.S2.asr.r.p.or"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_asr_r_r_or; // "__builtin_HEXAGON.S2.asr.r.r.or"
}
break;
}
break;
}
break;
case 'i': // 2 strings to match.
if (BuiltinName[22] != 'n')
break;
switch (BuiltinName[23]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName.substr(24, 7) != "ertp.rp")
break;
return Intrinsic::hexagon_S2_insertp_rp; // "__builtin_HEXAGON.S2.insertp.rp"
case 't': // 1 string to match.
if (BuiltinName.substr(24, 7) != "erleave")
break;
return Intrinsic::hexagon_S2_interleave; // "__builtin_HEXAGON.S2.interleave"
}
break;
case 'l': // 6 strings to match.
if (BuiltinName[22] != 's')
break;
switch (BuiltinName[23]) {
default: break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(24, 3) != ".r.")
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsl_r_p_or; // "__builtin_HEXAGON.S2.lsl.r.p.or"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsl_r_r_or; // "__builtin_HEXAGON.S2.lsl.r.r.or"
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsr_i_p_or; // "__builtin_HEXAGON.S2.lsr.i.p.or"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsr_i_r_or; // "__builtin_HEXAGON.S2.lsr.i.r.or"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsr_r_p_or; // "__builtin_HEXAGON.S2.lsr.r.p.or"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 3) != ".or")
break;
return Intrinsic::hexagon_S2_lsr_r_r_or; // "__builtin_HEXAGON.S2.lsr.r.r.or"
}
break;
}
break;
}
break;
case 'v': // 1 string to match.
if (BuiltinName.substr(22, 9) != "rndpackwh")
break;
return Intrinsic::hexagon_S2_vrndpackwh; // "__builtin_HEXAGON.S2.vrndpackwh"
}
break;
}
break;
case 32: // 84 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 16 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName.substr(22, 4) != "ddh.")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 4 strings to match.
if (BuiltinName.substr(27, 3) != "16.")
break;
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_hh; // "__builtin_HEXAGON.A2.addh.h16.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_hl; // "__builtin_HEXAGON.A2.addh.h16.hl"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_lh; // "__builtin_HEXAGON.A2.addh.h16.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_ll; // "__builtin_HEXAGON.A2.addh.h16.ll"
}
break;
}
break;
case 'l': // 4 strings to match.
if (BuiltinName.substr(27, 3) != "16.")
break;
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_hh; // "__builtin_HEXAGON.A2.addh.l16.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_hl; // "__builtin_HEXAGON.A2.addh.l16.hl"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_lh; // "__builtin_HEXAGON.A2.addh.l16.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_ll; // "__builtin_HEXAGON.A2.addh.l16.ll"
}
break;
}
break;
}
break;
case 's': // 6 strings to match.
if (BuiltinName.substr(22, 4) != "ubh.")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 4 strings to match.
if (BuiltinName.substr(27, 3) != "16.")
break;
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_hh; // "__builtin_HEXAGON.A2.subh.h16.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_hl; // "__builtin_HEXAGON.A2.subh.h16.hl"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_lh; // "__builtin_HEXAGON.A2.subh.h16.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_ll; // "__builtin_HEXAGON.A2.subh.h16.ll"
}
break;
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(27, 3) != "16.")
break;
switch (BuiltinName[30]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[31] != 'l')
break;
return Intrinsic::hexagon_A2_subh_l16_hl; // "__builtin_HEXAGON.A2.subh.l16.hl"
case 'l': // 1 string to match.
if (BuiltinName[31] != 'l')
break;
return Intrinsic::hexagon_A2_subh_l16_ll; // "__builtin_HEXAGON.A2.subh.l16.ll"
}
break;
}
break;
case 'v': // 2 strings to match.
if (BuiltinName[22] != 'r')
break;
switch (BuiltinName[23]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(24, 8) != "ddub.acc")
break;
return Intrinsic::hexagon_A2_vraddub_acc; // "__builtin_HEXAGON.A2.vraddub.acc"
case 's': // 1 string to match.
if (BuiltinName.substr(24, 8) != "adub.acc")
break;
return Intrinsic::hexagon_A2_vrsadub_acc; // "__builtin_HEXAGON.A2.vrsadub.acc"
}
break;
}
break;
case 'C': // 1 string to match.
if (BuiltinName.substr(19, 13) != "4.fastcorner9")
break;
return Intrinsic::hexagon_C4_fastcorner9; // "__builtin_HEXAGON.C4.fastcorner9"
case 'M': // 16 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'm': // 12 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'm': // 4 strings to match.
if (BuiltinName.substr(23, 3) != "acu")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(27, 4) != "s.rs")
break;
switch (BuiltinName[31]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmacuhs_rs0; // "__builtin_HEXAGON.M2.mmacuhs.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmacuhs_rs1; // "__builtin_HEXAGON.M2.mmacuhs.rs1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(27, 4) != "s.rs")
break;
switch (BuiltinName[31]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mmaculs_rs0; // "__builtin_HEXAGON.M2.mmaculs.rs0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mmaculs_rs1; // "__builtin_HEXAGON.M2.mmaculs.rs1"
}
break;
}
break;
case 'p': // 8 strings to match.
if (BuiltinName.substr(23, 4) != "yud.")
break;
switch (BuiltinName[27]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[28]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(29, 2) != ".s")
break;
switch (BuiltinName[31]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_hh_s0; // "__builtin_HEXAGON.M2.mpyud.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_hh_s1; // "__builtin_HEXAGON.M2.mpyud.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(29, 2) != ".s")
break;
switch (BuiltinName[31]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_hl_s0; // "__builtin_HEXAGON.M2.mpyud.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_hl_s1; // "__builtin_HEXAGON.M2.mpyud.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[28]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(29, 2) != ".s")
break;
switch (BuiltinName[31]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_lh_s0; // "__builtin_HEXAGON.M2.mpyud.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_lh_s1; // "__builtin_HEXAGON.M2.mpyud.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(29, 2) != ".s")
break;
switch (BuiltinName[31]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_ll_s0; // "__builtin_HEXAGON.M2.mpyud.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_ll_s1; // "__builtin_HEXAGON.M2.mpyud.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 'v': // 4 strings to match.
if (BuiltinName.substr(22, 3) != "rcm")
break;
switch (BuiltinName[25]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName[26] != 'c')
break;
switch (BuiltinName[27]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(28, 4) != ".s0c")
break;
return Intrinsic::hexagon_M2_vrcmaci_s0c; // "__builtin_HEXAGON.M2.vrcmaci.s0c"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 4) != ".s0c")
break;
return Intrinsic::hexagon_M2_vrcmacr_s0c; // "__builtin_HEXAGON.M2.vrcmacr.s0c"
}
break;
case 'p': // 2 strings to match.
if (BuiltinName[26] != 'y')
break;
switch (BuiltinName[27]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(28, 4) != ".s0c")
break;
return Intrinsic::hexagon_M2_vrcmpyi_s0c; // "__builtin_HEXAGON.M2.vrcmpyi.s0c"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 4) != ".s0c")
break;
return Intrinsic::hexagon_M2_vrcmpyr_s0c; // "__builtin_HEXAGON.M2.vrcmpyr.s0c"
}
break;
}
break;
}
break;
case 'S': // 51 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 29 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 9) != "dasl.rrri")
break;
return Intrinsic::hexagon_S2_addasl_rrri; // "__builtin_HEXAGON.S2.addasl.rrri"
case 's': // 28 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'l': // 14 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 7 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_asl_i_p_acc; // "__builtin_HEXAGON.S2.asl.i.p.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_asl_i_p_and; // "__builtin_HEXAGON.S2.asl.i.p.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asl_i_p_nac; // "__builtin_HEXAGON.S2.asl.i.p.nac"
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_asl_i_r_acc; // "__builtin_HEXAGON.S2.asl.i.r.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_asl_i_r_and; // "__builtin_HEXAGON.S2.asl.i.r.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asl_i_r_nac; // "__builtin_HEXAGON.S2.asl.i.r.nac"
case 's': // 1 string to match.
if (BuiltinName.substr(30, 2) != "at")
break;
return Intrinsic::hexagon_S2_asl_i_r_sat; // "__builtin_HEXAGON.S2.asl.i.r.sat"
}
break;
}
break;
case 'r': // 7 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_asl_r_p_acc; // "__builtin_HEXAGON.S2.asl.r.p.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_asl_r_p_and; // "__builtin_HEXAGON.S2.asl.r.p.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asl_r_p_nac; // "__builtin_HEXAGON.S2.asl.r.p.nac"
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_asl_r_r_acc; // "__builtin_HEXAGON.S2.asl.r.r.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_asl_r_r_and; // "__builtin_HEXAGON.S2.asl.r.r.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asl_r_r_nac; // "__builtin_HEXAGON.S2.asl.r.r.nac"
case 's': // 1 string to match.
if (BuiltinName.substr(30, 2) != "at")
break;
return Intrinsic::hexagon_S2_asl_r_r_sat; // "__builtin_HEXAGON.S2.asl.r.r.sat"
}
break;
}
break;
}
break;
case 'r': // 14 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 7 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_asr_i_p_acc; // "__builtin_HEXAGON.S2.asr.i.p.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_asr_i_p_and; // "__builtin_HEXAGON.S2.asr.i.p.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asr_i_p_nac; // "__builtin_HEXAGON.S2.asr.i.p.nac"
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_asr_i_r_acc; // "__builtin_HEXAGON.S2.asr.i.r.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_asr_i_r_and; // "__builtin_HEXAGON.S2.asr.i.r.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asr_i_r_nac; // "__builtin_HEXAGON.S2.asr.i.r.nac"
case 'r': // 1 string to match.
if (BuiltinName.substr(30, 2) != "nd")
break;
return Intrinsic::hexagon_S2_asr_i_r_rnd; // "__builtin_HEXAGON.S2.asr.i.r.rnd"
}
break;
}
break;
case 'r': // 7 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_asr_r_p_acc; // "__builtin_HEXAGON.S2.asr.r.p.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_asr_r_p_and; // "__builtin_HEXAGON.S2.asr.r.p.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asr_r_p_nac; // "__builtin_HEXAGON.S2.asr.r.p.nac"
}
break;
case 'r': // 4 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_asr_r_r_acc; // "__builtin_HEXAGON.S2.asr.r.r.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_asr_r_r_and; // "__builtin_HEXAGON.S2.asr.r.r.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_asr_r_r_nac; // "__builtin_HEXAGON.S2.asr.r.r.nac"
case 's': // 1 string to match.
if (BuiltinName.substr(30, 2) != "at")
break;
return Intrinsic::hexagon_S2_asr_r_r_sat; // "__builtin_HEXAGON.S2.asr.r.r.sat"
}
break;
}
break;
}
break;
}
break;
}
break;
case 'e': // 1 string to match.
if (BuiltinName.substr(22, 10) != "xtractu.rp")
break;
return Intrinsic::hexagon_S2_extractu_rp; // "__builtin_HEXAGON.S2.extractu.rp"
case 'l': // 18 strings to match.
if (BuiltinName[22] != 's')
break;
switch (BuiltinName[23]) {
default: break;
case 'l': // 6 strings to match.
if (BuiltinName.substr(24, 3) != ".r.")
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_lsl_r_p_acc; // "__builtin_HEXAGON.S2.lsl.r.p.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_lsl_r_p_and; // "__builtin_HEXAGON.S2.lsl.r.p.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsl_r_p_nac; // "__builtin_HEXAGON.S2.lsl.r.p.nac"
}
break;
case 'r': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_lsl_r_r_acc; // "__builtin_HEXAGON.S2.lsl.r.r.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_lsl_r_r_and; // "__builtin_HEXAGON.S2.lsl.r.r.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsl_r_r_nac; // "__builtin_HEXAGON.S2.lsl.r.r.nac"
}
break;
}
break;
case 'r': // 12 strings to match.
if (BuiltinName[24] != '.')
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 6 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_lsr_i_p_acc; // "__builtin_HEXAGON.S2.lsr.i.p.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_lsr_i_p_and; // "__builtin_HEXAGON.S2.lsr.i.p.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsr_i_p_nac; // "__builtin_HEXAGON.S2.lsr.i.p.nac"
}
break;
case 'r': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_lsr_i_r_acc; // "__builtin_HEXAGON.S2.lsr.i.r.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_lsr_i_r_and; // "__builtin_HEXAGON.S2.lsr.i.r.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsr_i_r_nac; // "__builtin_HEXAGON.S2.lsr.i.r.nac"
}
break;
}
break;
case 'r': // 6 strings to match.
if (BuiltinName[26] != '.')
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_lsr_r_p_acc; // "__builtin_HEXAGON.S2.lsr.r.p.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_lsr_r_p_and; // "__builtin_HEXAGON.S2.lsr.r.p.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsr_r_p_nac; // "__builtin_HEXAGON.S2.lsr.r.p.nac"
}
break;
case 'r': // 3 strings to match.
if (BuiltinName[28] != '.')
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[31] != 'c')
break;
return Intrinsic::hexagon_S2_lsr_r_r_acc; // "__builtin_HEXAGON.S2.lsr.r.r.acc"
case 'n': // 1 string to match.
if (BuiltinName[31] != 'd')
break;
return Intrinsic::hexagon_S2_lsr_r_r_and; // "__builtin_HEXAGON.S2.lsr.r.r.and"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 2) != "ac")
break;
return Intrinsic::hexagon_S2_lsr_r_r_nac; // "__builtin_HEXAGON.S2.lsr.r.r.nac"
}
break;
}
break;
}
break;
}
break;
case 't': // 2 strings to match.
if (BuiltinName.substr(22, 9) != "ogglebit.")
break;
switch (BuiltinName[31]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_S2_togglebit_i; // "__builtin_HEXAGON.S2.togglebit.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_S2_togglebit_r; // "__builtin_HEXAGON.S2.togglebit.r"
}
break;
case 'v': // 1 string to match.
if (BuiltinName.substr(22, 10) != "rndpackwhs")
break;
return Intrinsic::hexagon_S2_vrndpackwhs; // "__builtin_HEXAGON.S2.vrndpackwhs"
}
break;
}
break;
case 33: // 9 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 2 strings to match.
if (BuiltinName.substr(19, 9) != "4.round_r")
break;
switch (BuiltinName[28]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(29, 4) != "_sat")
break;
return Intrinsic::hexagon_A4_round_ri_sat; // "__builtin_HEXAGON.A4.round_ri_sat"
case 'r': // 1 string to match.
if (BuiltinName.substr(29, 4) != "_sat")
break;
return Intrinsic::hexagon_A4_round_rr_sat; // "__builtin_HEXAGON.A4.round_rr_sat"
}
break;
case 'M': // 1 string to match.
if (BuiltinName.substr(19, 14) != "2.vrcmpys.s1rp")
break;
return Intrinsic::hexagon_M2_vrcmpys_s1rp; // "__builtin_HEXAGON.M2.vrcmpys.s1rp"
case 'S': // 6 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(22, 5) != "sl.i.")
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName.substr(28, 5) != ".xacc")
break;
return Intrinsic::hexagon_S2_asl_i_p_xacc; // "__builtin_HEXAGON.S2.asl.i.p.xacc"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 5) != ".xacc")
break;
return Intrinsic::hexagon_S2_asl_i_r_xacc; // "__builtin_HEXAGON.S2.asl.i.r.xacc"
}
break;
case 'd': // 1 string to match.
if (BuiltinName.substr(22, 11) != "einterleave")
break;
return Intrinsic::hexagon_S2_deinterleave; // "__builtin_HEXAGON.S2.deinterleave"
case 'e': // 1 string to match.
if (BuiltinName.substr(22, 11) != "xtractup.rp")
break;
return Intrinsic::hexagon_S2_extractup_rp; // "__builtin_HEXAGON.S2.extractup.rp"
case 'l': // 2 strings to match.
if (BuiltinName.substr(22, 5) != "sr.i.")
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName.substr(28, 5) != ".xacc")
break;
return Intrinsic::hexagon_S2_lsr_i_p_xacc; // "__builtin_HEXAGON.S2.lsr.i.p.xacc"
case 'r': // 1 string to match.
if (BuiltinName.substr(28, 5) != ".xacc")
break;
return Intrinsic::hexagon_S2_lsr_i_r_xacc; // "__builtin_HEXAGON.S2.lsr.i.r.xacc"
}
break;
}
break;
}
break;
case 34: // 36 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'M': // 34 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'm': // 32 strings to match.
if (BuiltinName.substr(22, 3) != "py.")
break;
switch (BuiltinName[25]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName.substr(26, 3) != "cc.")
break;
switch (BuiltinName[29]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_hh_s0; // "__builtin_HEXAGON.M2.mpy.acc.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_hh_s1; // "__builtin_HEXAGON.M2.mpy.acc.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_hl_s0; // "__builtin_HEXAGON.M2.mpy.acc.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_hl_s1; // "__builtin_HEXAGON.M2.mpy.acc.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_lh_s0; // "__builtin_HEXAGON.M2.mpy.acc.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_lh_s1; // "__builtin_HEXAGON.M2.mpy.acc.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_ll_s0; // "__builtin_HEXAGON.M2.mpy.acc.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_ll_s1; // "__builtin_HEXAGON.M2.mpy.acc.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (BuiltinName.substr(26, 3) != "ac.")
break;
switch (BuiltinName[29]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_hh_s0; // "__builtin_HEXAGON.M2.mpy.nac.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_hh_s1; // "__builtin_HEXAGON.M2.mpy.nac.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_hl_s0; // "__builtin_HEXAGON.M2.mpy.nac.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_hl_s1; // "__builtin_HEXAGON.M2.mpy.nac.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_lh_s0; // "__builtin_HEXAGON.M2.mpy.nac.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_lh_s1; // "__builtin_HEXAGON.M2.mpy.nac.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_ll_s0; // "__builtin_HEXAGON.M2.mpy.nac.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_ll_s1; // "__builtin_HEXAGON.M2.mpy.nac.ll.s1"
}
break;
}
break;
}
break;
case 'r': // 8 strings to match.
if (BuiltinName.substr(26, 3) != "nd.")
break;
switch (BuiltinName[29]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_hh_s0; // "__builtin_HEXAGON.M2.mpy.rnd.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_hh_s1; // "__builtin_HEXAGON.M2.mpy.rnd.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_hl_s0; // "__builtin_HEXAGON.M2.mpy.rnd.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_hl_s1; // "__builtin_HEXAGON.M2.mpy.rnd.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_lh_s0; // "__builtin_HEXAGON.M2.mpy.rnd.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_lh_s1; // "__builtin_HEXAGON.M2.mpy.rnd.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_ll_s0; // "__builtin_HEXAGON.M2.mpy.rnd.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_rnd_ll_s1; // "__builtin_HEXAGON.M2.mpy.rnd.ll.s1"
}
break;
}
break;
}
break;
case 's': // 8 strings to match.
if (BuiltinName.substr(26, 3) != "at.")
break;
switch (BuiltinName[29]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_hh_s0; // "__builtin_HEXAGON.M2.mpy.sat.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_hh_s1; // "__builtin_HEXAGON.M2.mpy.sat.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_hl_s0; // "__builtin_HEXAGON.M2.mpy.sat.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_hl_s1; // "__builtin_HEXAGON.M2.mpy.sat.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[30]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_lh_s0; // "__builtin_HEXAGON.M2.mpy.sat.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_lh_s1; // "__builtin_HEXAGON.M2.mpy.sat.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(31, 2) != ".s")
break;
switch (BuiltinName[33]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_ll_s0; // "__builtin_HEXAGON.M2.mpy.sat.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_ll_s1; // "__builtin_HEXAGON.M2.mpy.sat.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 'v': // 2 strings to match.
if (BuiltinName.substr(22, 7) != "mpy2s.s")
break;
switch (BuiltinName[29]) {
default: break;
case '0': // 1 string to match.
if (BuiltinName.substr(30, 4) != "pack")
break;
return Intrinsic::hexagon_M2_vmpy2s_s0pack; // "__builtin_HEXAGON.M2.vmpy2s.s0pack"
case '1': // 1 string to match.
if (BuiltinName.substr(30, 4) != "pack")
break;
return Intrinsic::hexagon_M2_vmpy2s_s1pack; // "__builtin_HEXAGON.M2.vmpy2s.s1pack"
}
break;
}
break;
case 'S': // 2 strings to match.
if (BuiltinName.substr(19, 6) != "2.vsat")
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(26, 8) != "b.nopack")
break;
return Intrinsic::hexagon_S2_vsathb_nopack; // "__builtin_HEXAGON.S2.vsathb.nopack"
case 'w': // 1 string to match.
if (BuiltinName.substr(26, 8) != "h.nopack")
break;
return Intrinsic::hexagon_S2_vsatwh_nopack; // "__builtin_HEXAGON.S2.vsatwh.nopack"
}
break;
}
break;
case 35: // 56 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'M': // 52 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 5 strings to match.
if (BuiltinName.substr(22, 4) != "pmpy")
break;
switch (BuiltinName[26]) {
default: break;
case 's': // 3 strings to match.
if (BuiltinName.substr(27, 2) != "s.")
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(30, 5) != "cc.s0")
break;
return Intrinsic::hexagon_M2_dpmpyss_acc_s0; // "__builtin_HEXAGON.M2.dpmpyss.acc.s0"
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 5) != "ac.s0")
break;
return Intrinsic::hexagon_M2_dpmpyss_nac_s0; // "__builtin_HEXAGON.M2.dpmpyss.nac.s0"
case 'r': // 1 string to match.
if (BuiltinName.substr(30, 5) != "nd.s0")
break;
return Intrinsic::hexagon_M2_dpmpyss_rnd_s0; // "__builtin_HEXAGON.M2.dpmpyss.rnd.s0"
}
break;
case 'u': // 2 strings to match.
if (BuiltinName.substr(27, 2) != "u.")
break;
switch (BuiltinName[29]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(30, 5) != "cc.s0")
break;
return Intrinsic::hexagon_M2_dpmpyuu_acc_s0; // "__builtin_HEXAGON.M2.dpmpyuu.acc.s0"
case 'n': // 1 string to match.
if (BuiltinName.substr(30, 5) != "ac.s0")
break;
return Intrinsic::hexagon_M2_dpmpyuu_nac_s0; // "__builtin_HEXAGON.M2.dpmpyuu.nac.s0"
}
break;
}
break;
case 'm': // 40 strings to match.
if (BuiltinName.substr(22, 2) != "py")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 24 strings to match.
if (BuiltinName[25] != '.')
break;
switch (BuiltinName[26]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName.substr(27, 3) != "cc.")
break;
switch (BuiltinName[30]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_hh_s0; // "__builtin_HEXAGON.M2.mpyd.acc.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_hh_s1; // "__builtin_HEXAGON.M2.mpyd.acc.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_hl_s0; // "__builtin_HEXAGON.M2.mpyd.acc.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_hl_s1; // "__builtin_HEXAGON.M2.mpyd.acc.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_lh_s0; // "__builtin_HEXAGON.M2.mpyd.acc.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_lh_s1; // "__builtin_HEXAGON.M2.mpyd.acc.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_ll_s0; // "__builtin_HEXAGON.M2.mpyd.acc.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_acc_ll_s1; // "__builtin_HEXAGON.M2.mpyd.acc.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (BuiltinName.substr(27, 3) != "ac.")
break;
switch (BuiltinName[30]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_hh_s0; // "__builtin_HEXAGON.M2.mpyd.nac.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_hh_s1; // "__builtin_HEXAGON.M2.mpyd.nac.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_hl_s0; // "__builtin_HEXAGON.M2.mpyd.nac.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_hl_s1; // "__builtin_HEXAGON.M2.mpyd.nac.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_lh_s0; // "__builtin_HEXAGON.M2.mpyd.nac.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_lh_s1; // "__builtin_HEXAGON.M2.mpyd.nac.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_ll_s0; // "__builtin_HEXAGON.M2.mpyd.nac.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_nac_ll_s1; // "__builtin_HEXAGON.M2.mpyd.nac.ll.s1"
}
break;
}
break;
}
break;
case 'r': // 8 strings to match.
if (BuiltinName.substr(27, 3) != "nd.")
break;
switch (BuiltinName[30]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_hh_s0; // "__builtin_HEXAGON.M2.mpyd.rnd.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_hh_s1; // "__builtin_HEXAGON.M2.mpyd.rnd.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_hl_s0; // "__builtin_HEXAGON.M2.mpyd.rnd.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_hl_s1; // "__builtin_HEXAGON.M2.mpyd.rnd.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_lh_s0; // "__builtin_HEXAGON.M2.mpyd.rnd.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_lh_s1; // "__builtin_HEXAGON.M2.mpyd.rnd.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_ll_s0; // "__builtin_HEXAGON.M2.mpyd.rnd.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyd_rnd_ll_s1; // "__builtin_HEXAGON.M2.mpyd.rnd.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 'u': // 16 strings to match.
if (BuiltinName[25] != '.')
break;
switch (BuiltinName[26]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName.substr(27, 3) != "cc.")
break;
switch (BuiltinName[30]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_hh_s0; // "__builtin_HEXAGON.M2.mpyu.acc.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_hh_s1; // "__builtin_HEXAGON.M2.mpyu.acc.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_hl_s0; // "__builtin_HEXAGON.M2.mpyu.acc.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_hl_s1; // "__builtin_HEXAGON.M2.mpyu.acc.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_lh_s0; // "__builtin_HEXAGON.M2.mpyu.acc.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_lh_s1; // "__builtin_HEXAGON.M2.mpyu.acc.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_ll_s0; // "__builtin_HEXAGON.M2.mpyu.acc.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_acc_ll_s1; // "__builtin_HEXAGON.M2.mpyu.acc.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (BuiltinName.substr(27, 3) != "ac.")
break;
switch (BuiltinName[30]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_hh_s0; // "__builtin_HEXAGON.M2.mpyu.nac.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_hh_s1; // "__builtin_HEXAGON.M2.mpyu.nac.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_hl_s0; // "__builtin_HEXAGON.M2.mpyu.nac.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_hl_s1; // "__builtin_HEXAGON.M2.mpyu.nac.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[31]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_lh_s0; // "__builtin_HEXAGON.M2.mpyu.nac.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_lh_s1; // "__builtin_HEXAGON.M2.mpyu.nac.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(32, 2) != ".s")
break;
switch (BuiltinName[34]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_ll_s0; // "__builtin_HEXAGON.M2.mpyu.nac.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyu_nac_ll_s1; // "__builtin_HEXAGON.M2.mpyu.nac.ll.s1"
}
break;
}
break;
}
break;
}
break;
}
break;
case 'v': // 7 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'c': // 6 strings to match.
if (BuiltinName[23] != 'm')
break;
switch (BuiltinName[24]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(25, 9) != "c.s0.sat.")
break;
switch (BuiltinName[34]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_M2_vcmac_s0_sat_i; // "__builtin_HEXAGON.M2.vcmac.s0.sat.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_M2_vcmac_s0_sat_r; // "__builtin_HEXAGON.M2.vcmac.s0.sat.r"
}
break;
case 'p': // 4 strings to match.
if (BuiltinName.substr(25, 3) != "y.s")
break;
switch (BuiltinName[28]) {
default: break;
case '0': // 2 strings to match.
if (BuiltinName.substr(29, 5) != ".sat.")
break;
switch (BuiltinName[34]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_M2_vcmpy_s0_sat_i; // "__builtin_HEXAGON.M2.vcmpy.s0.sat.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_M2_vcmpy_s0_sat_r; // "__builtin_HEXAGON.M2.vcmpy.s0.sat.r"
}
break;
case '1': // 2 strings to match.
if (BuiltinName.substr(29, 5) != ".sat.")
break;
switch (BuiltinName[34]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::hexagon_M2_vcmpy_s1_sat_i; // "__builtin_HEXAGON.M2.vcmpy.s1.sat.i"
case 'r': // 1 string to match.
return Intrinsic::hexagon_M2_vcmpy_s1_sat_r; // "__builtin_HEXAGON.M2.vcmpy.s1.sat.r"
}
break;
}
break;
}
break;
case 'r': // 1 string to match.
if (BuiltinName.substr(23, 12) != "cmpys.acc.s1")
break;
return Intrinsic::hexagon_M2_vrcmpys_acc_s1; // "__builtin_HEXAGON.M2.vrcmpys.acc.s1"
}
break;
}
break;
case 'S': // 4 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(22, 3) != "sr.")
break;
switch (BuiltinName[25]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(26, 9) != ".svw.trun")
break;
return Intrinsic::hexagon_S2_asr_i_svw_trun; // "__builtin_HEXAGON.S2.asr.i.svw.trun"
case 'r': // 1 string to match.
if (BuiltinName.substr(26, 9) != ".svw.trun")
break;
return Intrinsic::hexagon_S2_asr_r_svw_trun; // "__builtin_HEXAGON.S2.asr.r.svw.trun"
}
break;
case 'v': // 2 strings to match.
if (BuiltinName.substr(22, 3) != "sat")
break;
switch (BuiltinName[25]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(26, 9) != "ub.nopack")
break;
return Intrinsic::hexagon_S2_vsathub_nopack; // "__builtin_HEXAGON.S2.vsathub.nopack"
case 'w': // 1 string to match.
if (BuiltinName.substr(26, 9) != "uh.nopack")
break;
return Intrinsic::hexagon_S2_vsatwuh_nopack; // "__builtin_HEXAGON.S2.vsatwuh.nopack"
}
break;
}
break;
}
break;
case 36: // 31 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_HEXAGON.")
break;
switch (BuiltinName[18]) {
default: break;
case 'A': // 14 strings to match.
if (BuiltinName.substr(19, 2) != "2.")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName.substr(22, 4) != "ddh.")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 4 strings to match.
if (BuiltinName.substr(27, 7) != "16.sat.")
break;
switch (BuiltinName[34]) {
default: break;
case 'h': // 2 strings to match.
switch (BuiltinName[35]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_sat_hh; // "__builtin_HEXAGON.A2.addh.h16.sat.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_sat_hl; // "__builtin_HEXAGON.A2.addh.h16.sat.hl"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[35]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_sat_lh; // "__builtin_HEXAGON.A2.addh.h16.sat.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_h16_sat_ll; // "__builtin_HEXAGON.A2.addh.h16.sat.ll"
}
break;
}
break;
case 'l': // 4 strings to match.
if (BuiltinName.substr(27, 7) != "16.sat.")
break;
switch (BuiltinName[34]) {
default: break;
case 'h': // 2 strings to match.
switch (BuiltinName[35]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_sat_hh; // "__builtin_HEXAGON.A2.addh.l16.sat.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_sat_hl; // "__builtin_HEXAGON.A2.addh.l16.sat.hl"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[35]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_sat_lh; // "__builtin_HEXAGON.A2.addh.l16.sat.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_addh_l16_sat_ll; // "__builtin_HEXAGON.A2.addh.l16.sat.ll"
}
break;
}
break;
}
break;
case 's': // 6 strings to match.
if (BuiltinName.substr(22, 4) != "ubh.")
break;
switch (BuiltinName[26]) {
default: break;
case 'h': // 4 strings to match.
if (BuiltinName.substr(27, 7) != "16.sat.")
break;
switch (BuiltinName[34]) {
default: break;
case 'h': // 2 strings to match.
switch (BuiltinName[35]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_sat_hh; // "__builtin_HEXAGON.A2.subh.h16.sat.hh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_sat_hl; // "__builtin_HEXAGON.A2.subh.h16.sat.hl"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[35]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_sat_lh; // "__builtin_HEXAGON.A2.subh.h16.sat.lh"
case 'l': // 1 string to match.
return Intrinsic::hexagon_A2_subh_h16_sat_ll; // "__builtin_HEXAGON.A2.subh.h16.sat.ll"
}
break;
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(27, 7) != "16.sat.")
break;
switch (BuiltinName[34]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[35] != 'l')
break;
return Intrinsic::hexagon_A2_subh_l16_sat_hl; // "__builtin_HEXAGON.A2.subh.l16.sat.hl"
case 'l': // 1 string to match.
if (BuiltinName[35] != 'l')
break;
return Intrinsic::hexagon_A2_subh_l16_sat_ll; // "__builtin_HEXAGON.A2.subh.l16.sat.ll"
}
break;
}
break;
}
break;
case 'C': // 1 string to match.
if (BuiltinName.substr(19, 17) != "4.fastcorner9_not")
break;
return Intrinsic::hexagon_C4_fastcorner9_not; // "__builtin_HEXAGON.C4.fastcorner9_not"
case 'M': // 16 strings to match.
if (BuiltinName.substr(19, 8) != "2.mpyud.")
break;
switch (BuiltinName[27]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName.substr(28, 3) != "cc.")
break;
switch (BuiltinName[31]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[32]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(33, 2) != ".s")
break;
switch (BuiltinName[35]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_hh_s0; // "__builtin_HEXAGON.M2.mpyud.acc.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_hh_s1; // "__builtin_HEXAGON.M2.mpyud.acc.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(33, 2) != ".s")
break;
switch (BuiltinName[35]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_hl_s0; // "__builtin_HEXAGON.M2.mpyud.acc.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_hl_s1; // "__builtin_HEXAGON.M2.mpyud.acc.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[32]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(33, 2) != ".s")
break;
switch (BuiltinName[35]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_lh_s0; // "__builtin_HEXAGON.M2.mpyud.acc.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_lh_s1; // "__builtin_HEXAGON.M2.mpyud.acc.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(33, 2) != ".s")
break;
switch (BuiltinName[35]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_ll_s0; // "__builtin_HEXAGON.M2.mpyud.acc.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_acc_ll_s1; // "__builtin_HEXAGON.M2.mpyud.acc.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (BuiltinName.substr(28, 3) != "ac.")
break;
switch (BuiltinName[31]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[32]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(33, 2) != ".s")
break;
switch (BuiltinName[35]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_hh_s0; // "__builtin_HEXAGON.M2.mpyud.nac.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_hh_s1; // "__builtin_HEXAGON.M2.mpyud.nac.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(33, 2) != ".s")
break;
switch (BuiltinName[35]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_hl_s0; // "__builtin_HEXAGON.M2.mpyud.nac.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_hl_s1; // "__builtin_HEXAGON.M2.mpyud.nac.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[32]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(33, 2) != ".s")
break;
switch (BuiltinName[35]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_lh_s0; // "__builtin_HEXAGON.M2.mpyud.nac.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_lh_s1; // "__builtin_HEXAGON.M2.mpyud.nac.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(33, 2) != ".s")
break;
switch (BuiltinName[35]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_ll_s0; // "__builtin_HEXAGON.M2.mpyud.nac.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpyud_nac_ll_s1; // "__builtin_HEXAGON.M2.mpyud.nac.ll.s1"
}
break;
}
break;
}
break;
}
break;
}
break;
case 38: // 24 strings to match.
if (BuiltinName.substr(0, 25) != "__builtin_HEXAGON.M2.mpy.")
break;
switch (BuiltinName[25]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName.substr(26, 7) != "cc.sat.")
break;
switch (BuiltinName[33]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[34]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0; // "__builtin_HEXAGON.M2.mpy.acc.sat.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1; // "__builtin_HEXAGON.M2.mpy.acc.sat.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0; // "__builtin_HEXAGON.M2.mpy.acc.sat.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1; // "__builtin_HEXAGON.M2.mpy.acc.sat.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[34]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0; // "__builtin_HEXAGON.M2.mpy.acc.sat.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1; // "__builtin_HEXAGON.M2.mpy.acc.sat.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0; // "__builtin_HEXAGON.M2.mpy.acc.sat.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1; // "__builtin_HEXAGON.M2.mpy.acc.sat.ll.s1"
}
break;
}
break;
}
break;
case 'n': // 8 strings to match.
if (BuiltinName.substr(26, 7) != "ac.sat.")
break;
switch (BuiltinName[33]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[34]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0; // "__builtin_HEXAGON.M2.mpy.nac.sat.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1; // "__builtin_HEXAGON.M2.mpy.nac.sat.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0; // "__builtin_HEXAGON.M2.mpy.nac.sat.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1; // "__builtin_HEXAGON.M2.mpy.nac.sat.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[34]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0; // "__builtin_HEXAGON.M2.mpy.nac.sat.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1; // "__builtin_HEXAGON.M2.mpy.nac.sat.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0; // "__builtin_HEXAGON.M2.mpy.nac.sat.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1; // "__builtin_HEXAGON.M2.mpy.nac.sat.ll.s1"
}
break;
}
break;
}
break;
case 's': // 8 strings to match.
if (BuiltinName.substr(26, 7) != "at.rnd.")
break;
switch (BuiltinName[33]) {
default: break;
case 'h': // 4 strings to match.
switch (BuiltinName[34]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0; // "__builtin_HEXAGON.M2.mpy.sat.rnd.hh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1; // "__builtin_HEXAGON.M2.mpy.sat.rnd.hh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0; // "__builtin_HEXAGON.M2.mpy.sat.rnd.hl.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1; // "__builtin_HEXAGON.M2.mpy.sat.rnd.hl.s1"
}
break;
}
break;
case 'l': // 4 strings to match.
switch (BuiltinName[34]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0; // "__builtin_HEXAGON.M2.mpy.sat.rnd.lh.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1; // "__builtin_HEXAGON.M2.mpy.sat.rnd.lh.s1"
}
break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(35, 2) != ".s")
break;
switch (BuiltinName[37]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0; // "__builtin_HEXAGON.M2.mpy.sat.rnd.ll.s0"
case '1': // 1 string to match.
return Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1; // "__builtin_HEXAGON.M2.mpy.sat.rnd.ll.s1"
}
break;
}
break;
}
break;
}
break;
case 41: // 4 strings to match.
if (BuiltinName.substr(0, 29) != "__builtin_HEXAGON.S2.tableidx")
break;
switch (BuiltinName[29]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(30, 11) != ".goodsyntax")
break;
return Intrinsic::hexagon_S2_tableidxb_goodsyntax; // "__builtin_HEXAGON.S2.tableidxb.goodsyntax"
case 'd': // 1 string to match.
if (BuiltinName.substr(30, 11) != ".goodsyntax")
break;
return Intrinsic::hexagon_S2_tableidxd_goodsyntax; // "__builtin_HEXAGON.S2.tableidxd.goodsyntax"
case 'h': // 1 string to match.
if (BuiltinName.substr(30, 11) != ".goodsyntax")
break;
return Intrinsic::hexagon_S2_tableidxh_goodsyntax; // "__builtin_HEXAGON.S2.tableidxh.goodsyntax"
case 'w': // 1 string to match.
if (BuiltinName.substr(30, 11) != ".goodsyntax")
break;
return Intrinsic::hexagon_S2_tableidxw_goodsyntax; // "__builtin_HEXAGON.S2.tableidxw.goodsyntax"
}
break;
case 43: // 1 string to match.
if (BuiltinName.substr(0, 43) != "__builtin_HEXAGON.S2.asr.i.r.rnd.goodsyntax")
break;
return Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax; // "__builtin_HEXAGON.S2.asr.i.r.rnd.goodsyntax"
}
}
if (TargetPrefix == "ppc") {
switch (BuiltinName.size()) {
default: break;
case 21: // 4 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_altivec_")
break;
switch (BuiltinName[18]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[19] != 's')
break;
switch (BuiltinName[20]) {
default: break;
case 's': // 1 string to match.
return Intrinsic::ppc_altivec_dss; // "__builtin_altivec_dss"
case 't': // 1 string to match.
return Intrinsic::ppc_altivec_dst; // "__builtin_altivec_dst"
}
break;
case 'v': // 2 strings to match.
if (BuiltinName[19] != 's')
break;
switch (BuiltinName[20]) {
default: break;
case 'l': // 1 string to match.
return Intrinsic::ppc_altivec_vsl; // "__builtin_altivec_vsl"
case 'r': // 1 string to match.
return Intrinsic::ppc_altivec_vsr; // "__builtin_altivec_vsr"
}
break;
}
break;
case 22: // 12 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_altivec_")
break;
switch (BuiltinName[18]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(19, 3) != "stt")
break;
return Intrinsic::ppc_altivec_dstt; // "__builtin_altivec_dstt"
case 'v': // 11 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'r': // 3 strings to match.
if (BuiltinName[20] != 'l')
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vrlb; // "__builtin_altivec_vrlb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vrlh; // "__builtin_altivec_vrlh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vrlw; // "__builtin_altivec_vrlw"
}
break;
case 's': // 8 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'l': // 4 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vslb; // "__builtin_altivec_vslb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vslh; // "__builtin_altivec_vslh"
case 'o': // 1 string to match.
return Intrinsic::ppc_altivec_vslo; // "__builtin_altivec_vslo"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vslw; // "__builtin_altivec_vslw"
}
break;
case 'r': // 4 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vsrb; // "__builtin_altivec_vsrb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vsrh; // "__builtin_altivec_vsrh"
case 'o': // 1 string to match.
return Intrinsic::ppc_altivec_vsro; // "__builtin_altivec_vsro"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vsrw; // "__builtin_altivec_vsrw"
}
break;
}
break;
}
break;
}
break;
case 23: // 12 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_altivec_")
break;
switch (BuiltinName[18]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(19, 4) != "stst")
break;
return Intrinsic::ppc_altivec_dstst; // "__builtin_altivec_dstst"
case 'v': // 11 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName[20] != 'f')
break;
switch (BuiltinName[21]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName[22] != 'x')
break;
return Intrinsic::ppc_altivec_vcfsx; // "__builtin_altivec_vcfsx"
case 'u': // 1 string to match.
if (BuiltinName[22] != 'x')
break;
return Intrinsic::ppc_altivec_vcfux; // "__builtin_altivec_vcfux"
}
break;
case 'p': // 1 string to match.
if (BuiltinName.substr(20, 3) != "kpx")
break;
return Intrinsic::ppc_altivec_vpkpx; // "__builtin_altivec_vpkpx"
case 'r': // 5 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(21, 2) != "fp")
break;
return Intrinsic::ppc_altivec_vrefp; // "__builtin_altivec_vrefp"
case 'f': // 4 strings to match.
if (BuiltinName[21] != 'i')
break;
switch (BuiltinName[22]) {
default: break;
case 'm': // 1 string to match.
return Intrinsic::ppc_altivec_vrfim; // "__builtin_altivec_vrfim"
case 'n': // 1 string to match.
return Intrinsic::ppc_altivec_vrfin; // "__builtin_altivec_vrfin"
case 'p': // 1 string to match.
return Intrinsic::ppc_altivec_vrfip; // "__builtin_altivec_vrfip"
case 'z': // 1 string to match.
return Intrinsic::ppc_altivec_vrfiz; // "__builtin_altivec_vrfiz"
}
break;
}
break;
case 's': // 3 strings to match.
if (BuiltinName.substr(20, 2) != "ra")
break;
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vsrab; // "__builtin_altivec_vsrab"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vsrah; // "__builtin_altivec_vsrah"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vsraw; // "__builtin_altivec_vsraw"
}
break;
}
break;
}
break;
case 24: // 26 strings to match.
if (BuiltinName.substr(0, 18) != "__builtin_altivec_")
break;
switch (BuiltinName[18]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[19] != 's')
break;
switch (BuiltinName[20]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName.substr(21, 3) != "all")
break;
return Intrinsic::ppc_altivec_dssall; // "__builtin_altivec_dssall"
case 't': // 1 string to match.
if (BuiltinName.substr(21, 3) != "stt")
break;
return Intrinsic::ppc_altivec_dststt; // "__builtin_altivec_dststt"
}
break;
case 'm': // 2 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName.substr(20, 4) != "vscr")
break;
return Intrinsic::ppc_altivec_mfvscr; // "__builtin_altivec_mfvscr"
case 't': // 1 string to match.
if (BuiltinName.substr(20, 4) != "vscr")
break;
return Intrinsic::ppc_altivec_mtvscr; // "__builtin_altivec_mtvscr"
}
break;
case 'v': // 22 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'a': // 6 strings to match.
if (BuiltinName.substr(20, 2) != "vg")
break;
switch (BuiltinName[22]) {
default: break;
case 's': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vavgsb; // "__builtin_altivec_vavgsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vavgsh; // "__builtin_altivec_vavgsh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vavgsw; // "__builtin_altivec_vavgsw"
}
break;
case 'u': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vavgub; // "__builtin_altivec_vavgub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vavguh; // "__builtin_altivec_vavguh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vavguw; // "__builtin_altivec_vavguw"
}
break;
}
break;
case 'c': // 2 strings to match.
if (BuiltinName[20] != 't')
break;
switch (BuiltinName[21]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName.substr(22, 2) != "xs")
break;
return Intrinsic::ppc_altivec_vctsxs; // "__builtin_altivec_vctsxs"
case 'u': // 1 string to match.
if (BuiltinName.substr(22, 2) != "xs")
break;
return Intrinsic::ppc_altivec_vctuxs; // "__builtin_altivec_vctuxs"
}
break;
case 'm': // 14 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'a': // 7 strings to match.
if (BuiltinName[21] != 'x')
break;
switch (BuiltinName[22]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName[23] != 'p')
break;
return Intrinsic::ppc_altivec_vmaxfp; // "__builtin_altivec_vmaxfp"
case 's': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxsb; // "__builtin_altivec_vmaxsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxsh; // "__builtin_altivec_vmaxsh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxsw; // "__builtin_altivec_vmaxsw"
}
break;
case 'u': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxub; // "__builtin_altivec_vmaxub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxuh; // "__builtin_altivec_vmaxuh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vmaxuw; // "__builtin_altivec_vmaxuw"
}
break;
}
break;
case 'i': // 7 strings to match.
if (BuiltinName[21] != 'n')
break;
switch (BuiltinName[22]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName[23] != 'p')
break;
return Intrinsic::ppc_altivec_vminfp; // "__builtin_altivec_vminfp"
case 's': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vminsb; // "__builtin_altivec_vminsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vminsh; // "__builtin_altivec_vminsh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vminsw; // "__builtin_altivec_vminsw"
}
break;
case 'u': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vminub; // "__builtin_altivec_vminub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vminuh; // "__builtin_altivec_vminuh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vminuw; // "__builtin_altivec_vminuw"
}
break;
}
break;
}
break;
}
break;
}
break;
case 25: // 38 strings to match.
if (BuiltinName.substr(0, 19) != "__builtin_altivec_v")
break;
switch (BuiltinName[19]) {
default: break;
case 'a': // 7 strings to match.
if (BuiltinName.substr(20, 2) != "dd")
break;
switch (BuiltinName[22]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(23, 2) != "uw")
break;
return Intrinsic::ppc_altivec_vaddcuw; // "__builtin_altivec_vaddcuw"
case 's': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vaddsbs; // "__builtin_altivec_vaddsbs"
case 'h': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vaddshs; // "__builtin_altivec_vaddshs"
case 'w': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vaddsws; // "__builtin_altivec_vaddsws"
}
break;
case 'u': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vaddubs; // "__builtin_altivec_vaddubs"
case 'h': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vadduhs; // "__builtin_altivec_vadduhs"
case 'w': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vadduws; // "__builtin_altivec_vadduws"
}
break;
}
break;
case 'c': // 1 string to match.
if (BuiltinName.substr(20, 5) != "mpbfp")
break;
return Intrinsic::ppc_altivec_vcmpbfp; // "__builtin_altivec_vcmpbfp"
case 'l': // 1 string to match.
if (BuiltinName.substr(20, 5) != "ogefp")
break;
return Intrinsic::ppc_altivec_vlogefp; // "__builtin_altivec_vlogefp"
case 'm': // 9 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(21, 4) != "ddfp")
break;
return Intrinsic::ppc_altivec_vmaddfp; // "__builtin_altivec_vmaddfp"
case 'u': // 8 strings to match.
if (BuiltinName[21] != 'l')
break;
switch (BuiltinName[22]) {
default: break;
case 'e': // 4 strings to match.
switch (BuiltinName[23]) {
default: break;
case 's': // 2 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmulesb; // "__builtin_altivec_vmulesb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmulesh; // "__builtin_altivec_vmulesh"
}
break;
case 'u': // 2 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmuleub; // "__builtin_altivec_vmuleub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmuleuh; // "__builtin_altivec_vmuleuh"
}
break;
}
break;
case 'o': // 4 strings to match.
switch (BuiltinName[23]) {
default: break;
case 's': // 2 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmulosb; // "__builtin_altivec_vmulosb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmulosh; // "__builtin_altivec_vmulosh"
}
break;
case 'u': // 2 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vmuloub; // "__builtin_altivec_vmuloub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vmulouh; // "__builtin_altivec_vmulouh"
}
break;
}
break;
}
break;
}
break;
case 'p': // 6 strings to match.
if (BuiltinName[20] != 'k')
break;
switch (BuiltinName[21]) {
default: break;
case 's': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'h': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vpkshss; // "__builtin_altivec_vpkshss"
case 'u': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vpkshus; // "__builtin_altivec_vpkshus"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vpkswss; // "__builtin_altivec_vpkswss"
case 'u': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vpkswus; // "__builtin_altivec_vpkswus"
}
break;
}
break;
case 'u': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(23, 2) != "us")
break;
return Intrinsic::ppc_altivec_vpkuhus; // "__builtin_altivec_vpkuhus"
case 'w': // 1 string to match.
if (BuiltinName.substr(23, 2) != "us")
break;
return Intrinsic::ppc_altivec_vpkuwus; // "__builtin_altivec_vpkuwus"
}
break;
}
break;
case 's': // 8 strings to match.
if (BuiltinName[20] != 'u')
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 7 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(23, 2) != "uw")
break;
return Intrinsic::ppc_altivec_vsubcuw; // "__builtin_altivec_vsubcuw"
case 's': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vsubsbs; // "__builtin_altivec_vsubsbs"
case 'h': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vsubshs; // "__builtin_altivec_vsubshs"
case 'w': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vsubsws; // "__builtin_altivec_vsubsws"
}
break;
case 'u': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vsububs; // "__builtin_altivec_vsububs"
case 'h': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vsubuhs; // "__builtin_altivec_vsubuhs"
case 'w': // 1 string to match.
if (BuiltinName[24] != 's')
break;
return Intrinsic::ppc_altivec_vsubuws; // "__builtin_altivec_vsubuws"
}
break;
}
break;
case 'm': // 1 string to match.
if (BuiltinName.substr(22, 3) != "sws")
break;
return Intrinsic::ppc_altivec_vsumsws; // "__builtin_altivec_vsumsws"
}
break;
case 'u': // 6 strings to match.
if (BuiltinName.substr(20, 2) != "pk")
break;
switch (BuiltinName[22]) {
default: break;
case 'h': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName[24] != 'x')
break;
return Intrinsic::ppc_altivec_vupkhpx; // "__builtin_altivec_vupkhpx"
case 's': // 2 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vupkhsb; // "__builtin_altivec_vupkhsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vupkhsh; // "__builtin_altivec_vupkhsh"
}
break;
}
break;
case 'l': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName[24] != 'x')
break;
return Intrinsic::ppc_altivec_vupklpx; // "__builtin_altivec_vupklpx"
case 's': // 2 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vupklsb; // "__builtin_altivec_vupklsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vupklsh; // "__builtin_altivec_vupklsh"
}
break;
}
break;
}
break;
}
break;
case 26: // 25 strings to match.
if (BuiltinName.substr(0, 19) != "__builtin_altivec_v")
break;
switch (BuiltinName[19]) {
default: break;
case 'c': // 12 strings to match.
if (BuiltinName.substr(20, 2) != "mp")
break;
switch (BuiltinName[22]) {
default: break;
case 'e': // 4 strings to match.
if (BuiltinName[23] != 'q')
break;
switch (BuiltinName[24]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName[25] != 'p')
break;
return Intrinsic::ppc_altivec_vcmpeqfp; // "__builtin_altivec_vcmpeqfp"
case 'u': // 3 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpequb; // "__builtin_altivec_vcmpequb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpequh; // "__builtin_altivec_vcmpequh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpequw; // "__builtin_altivec_vcmpequw"
}
break;
}
break;
case 'g': // 8 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(24, 2) != "fp")
break;
return Intrinsic::ppc_altivec_vcmpgefp; // "__builtin_altivec_vcmpgefp"
case 't': // 7 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName[25] != 'p')
break;
return Intrinsic::ppc_altivec_vcmpgtfp; // "__builtin_altivec_vcmpgtfp"
case 's': // 3 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtsb; // "__builtin_altivec_vcmpgtsb"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtsh; // "__builtin_altivec_vcmpgtsh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtsw; // "__builtin_altivec_vcmpgtsw"
}
break;
case 'u': // 3 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtub; // "__builtin_altivec_vcmpgtub"
case 'h': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtuh; // "__builtin_altivec_vcmpgtuh"
case 'w': // 1 string to match.
return Intrinsic::ppc_altivec_vcmpgtuw; // "__builtin_altivec_vcmpgtuw"
}
break;
}
break;
}
break;
}
break;
case 'e': // 1 string to match.
if (BuiltinName.substr(20, 6) != "xptefp")
break;
return Intrinsic::ppc_altivec_vexptefp; // "__builtin_altivec_vexptefp"
case 'm': // 6 strings to match.
if (BuiltinName.substr(20, 3) != "sum")
break;
switch (BuiltinName[23]) {
default: break;
case 'm': // 1 string to match.
if (BuiltinName.substr(24, 2) != "bm")
break;
return Intrinsic::ppc_altivec_vmsummbm; // "__builtin_altivec_vmsummbm"
case 's': // 2 strings to match.
if (BuiltinName[24] != 'h')
break;
switch (BuiltinName[25]) {
default: break;
case 'm': // 1 string to match.
return Intrinsic::ppc_altivec_vmsumshm; // "__builtin_altivec_vmsumshm"
case 's': // 1 string to match.
return Intrinsic::ppc_altivec_vmsumshs; // "__builtin_altivec_vmsumshs"
}
break;
case 'u': // 3 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[25] != 'm')
break;
return Intrinsic::ppc_altivec_vmsumubm; // "__builtin_altivec_vmsumubm"
case 'h': // 2 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'm': // 1 string to match.
return Intrinsic::ppc_altivec_vmsumuhm; // "__builtin_altivec_vmsumuhm"
case 's': // 1 string to match.
return Intrinsic::ppc_altivec_vmsumuhs; // "__builtin_altivec_vmsumuhs"
}
break;
}
break;
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(20, 6) != "msubfp")
break;
return Intrinsic::ppc_altivec_vnmsubfp; // "__builtin_altivec_vnmsubfp"
case 's': // 5 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(21, 5) != "l_4si")
break;
return Intrinsic::ppc_altivec_vsel; // "__builtin_altivec_vsel_4si"
case 'u': // 4 strings to match.
if (BuiltinName[21] != 'm')
break;
switch (BuiltinName[22]) {
default: break;
case '2': // 1 string to match.
if (BuiltinName.substr(23, 3) != "sws")
break;
return Intrinsic::ppc_altivec_vsum2sws; // "__builtin_altivec_vsum2sws"
case '4': // 3 strings to match.
switch (BuiltinName[23]) {
default: break;
case 's': // 2 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[25] != 's')
break;
return Intrinsic::ppc_altivec_vsum4sbs; // "__builtin_altivec_vsum4sbs"
case 'h': // 1 string to match.
if (BuiltinName[25] != 's')
break;
return Intrinsic::ppc_altivec_vsum4shs; // "__builtin_altivec_vsum4shs"
}
break;
case 'u': // 1 string to match.
if (BuiltinName.substr(24, 2) != "bs")
break;
return Intrinsic::ppc_altivec_vsum4ubs; // "__builtin_altivec_vsum4ubs"
}
break;
}
break;
}
break;
}
break;
case 27: // 5 strings to match.
if (BuiltinName.substr(0, 19) != "__builtin_altivec_v")
break;
switch (BuiltinName[19]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(20, 7) != "mpbfp_p")
break;
return Intrinsic::ppc_altivec_vcmpbfp_p; // "__builtin_altivec_vcmpbfp_p"
case 'm': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(21, 6) != "addshs")
break;
return Intrinsic::ppc_altivec_vmhaddshs; // "__builtin_altivec_vmhaddshs"
case 'l': // 1 string to match.
if (BuiltinName.substr(21, 6) != "adduhm")
break;
return Intrinsic::ppc_altivec_vmladduhm; // "__builtin_altivec_vmladduhm"
}
break;
case 'p': // 1 string to match.
if (BuiltinName.substr(20, 7) != "erm_4si")
break;
return Intrinsic::ppc_altivec_vperm; // "__builtin_altivec_vperm_4si"
case 'r': // 1 string to match.
if (BuiltinName.substr(20, 7) != "sqrtefp")
break;
return Intrinsic::ppc_altivec_vrsqrtefp; // "__builtin_altivec_vrsqrtefp"
}
break;
case 28: // 13 strings to match.
if (BuiltinName.substr(0, 19) != "__builtin_altivec_v")
break;
switch (BuiltinName[19]) {
default: break;
case 'c': // 12 strings to match.
if (BuiltinName.substr(20, 2) != "mp")
break;
switch (BuiltinName[22]) {
default: break;
case 'e': // 4 strings to match.
if (BuiltinName[23] != 'q')
break;
switch (BuiltinName[24]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName.substr(25, 3) != "p_p")
break;
return Intrinsic::ppc_altivec_vcmpeqfp_p; // "__builtin_altivec_vcmpeqfp_p"
case 'u': // 3 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(26, 2) != "_p")
break;
return Intrinsic::ppc_altivec_vcmpequb_p; // "__builtin_altivec_vcmpequb_p"
case 'h': // 1 string to match.
if (BuiltinName.substr(26, 2) != "_p")
break;
return Intrinsic::ppc_altivec_vcmpequh_p; // "__builtin_altivec_vcmpequh_p"
case 'w': // 1 string to match.
if (BuiltinName.substr(26, 2) != "_p")
break;
return Intrinsic::ppc_altivec_vcmpequw_p; // "__builtin_altivec_vcmpequw_p"
}
break;
}
break;
case 'g': // 8 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(24, 4) != "fp_p")
break;
return Intrinsic::ppc_altivec_vcmpgefp_p; // "__builtin_altivec_vcmpgefp_p"
case 't': // 7 strings to match.
switch (BuiltinName[24]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName.substr(25, 3) != "p_p")
break;
return Intrinsic::ppc_altivec_vcmpgtfp_p; // "__builtin_altivec_vcmpgtfp_p"
case 's': // 3 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(26, 2) != "_p")
break;
return Intrinsic::ppc_altivec_vcmpgtsb_p; // "__builtin_altivec_vcmpgtsb_p"
case 'h': // 1 string to match.
if (BuiltinName.substr(26, 2) != "_p")
break;
return Intrinsic::ppc_altivec_vcmpgtsh_p; // "__builtin_altivec_vcmpgtsh_p"
case 'w': // 1 string to match.
if (BuiltinName.substr(26, 2) != "_p")
break;
return Intrinsic::ppc_altivec_vcmpgtsw_p; // "__builtin_altivec_vcmpgtsw_p"
}
break;
case 'u': // 3 strings to match.
switch (BuiltinName[25]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(26, 2) != "_p")
break;
return Intrinsic::ppc_altivec_vcmpgtub_p; // "__builtin_altivec_vcmpgtub_p"
case 'h': // 1 string to match.
if (BuiltinName.substr(26, 2) != "_p")
break;
return Intrinsic::ppc_altivec_vcmpgtuh_p; // "__builtin_altivec_vcmpgtuh_p"
case 'w': // 1 string to match.
if (BuiltinName.substr(26, 2) != "_p")
break;
return Intrinsic::ppc_altivec_vcmpgtuw_p; // "__builtin_altivec_vcmpgtuw_p"
}
break;
}
break;
}
break;
}
break;
case 'm': // 1 string to match.
if (BuiltinName.substr(20, 8) != "hraddshs")
break;
return Intrinsic::ppc_altivec_vmhraddshs; // "__builtin_altivec_vmhraddshs"
}
break;
}
}
if (TargetPrefix == "ptx") {
switch (BuiltinName.size()) {
default: break;
case 22: // 5 strings to match.
if (BuiltinName.substr(0, 14) != "__builtin_ptx_")
break;
switch (BuiltinName[14]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(15, 7) != "ar_sync")
break;
return Intrinsic::ptx_bar_sync; // "__builtin_ptx_bar_sync"
case 'r': // 4 strings to match.
if (BuiltinName.substr(15, 6) != "ead_pm")
break;
switch (BuiltinName[21]) {
default: break;
case '0': // 1 string to match.
return Intrinsic::ptx_read_pm0; // "__builtin_ptx_read_pm0"
case '1': // 1 string to match.
return Intrinsic::ptx_read_pm1; // "__builtin_ptx_read_pm1"
case '2': // 1 string to match.
return Intrinsic::ptx_read_pm2; // "__builtin_ptx_read_pm2"
case '3': // 1 string to match.
return Intrinsic::ptx_read_pm3; // "__builtin_ptx_read_pm3"
}
break;
}
break;
case 23: // 1 string to match.
if (BuiltinName.substr(0, 23) != "__builtin_ptx_read_smid")
break;
return Intrinsic::ptx_read_smid; // "__builtin_ptx_read_smid"
case 24: // 6 strings to match.
if (BuiltinName.substr(0, 19) != "__builtin_ptx_read_")
break;
switch (BuiltinName[19]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName.substr(20, 4) != "lock")
break;
return Intrinsic::ptx_read_clock; // "__builtin_ptx_read_clock"
case 'n': // 1 string to match.
if (BuiltinName.substr(20, 4) != "smid")
break;
return Intrinsic::ptx_read_nsmid; // "__builtin_ptx_read_nsmid"
case 't': // 4 strings to match.
if (BuiltinName.substr(20, 3) != "id_")
break;
switch (BuiltinName[23]) {
default: break;
case 'w': // 1 string to match.
return Intrinsic::ptx_read_tid_w; // "__builtin_ptx_read_tid_w"
case 'x': // 1 string to match.
return Intrinsic::ptx_read_tid_x; // "__builtin_ptx_read_tid_x"
case 'y': // 1 string to match.
return Intrinsic::ptx_read_tid_y; // "__builtin_ptx_read_tid_y"
case 'z': // 1 string to match.
return Intrinsic::ptx_read_tid_z; // "__builtin_ptx_read_tid_z"
}
break;
}
break;
case 25: // 7 strings to match.
if (BuiltinName.substr(0, 19) != "__builtin_ptx_read_")
break;
switch (BuiltinName[19]) {
default: break;
case 'g': // 1 string to match.
if (BuiltinName.substr(20, 5) != "ridid")
break;
return Intrinsic::ptx_read_gridid; // "__builtin_ptx_read_gridid"
case 'l': // 1 string to match.
if (BuiltinName.substr(20, 5) != "aneid")
break;
return Intrinsic::ptx_read_laneid; // "__builtin_ptx_read_laneid"
case 'n': // 4 strings to match.
if (BuiltinName.substr(20, 4) != "tid_")
break;
switch (BuiltinName[24]) {
default: break;
case 'w': // 1 string to match.
return Intrinsic::ptx_read_ntid_w; // "__builtin_ptx_read_ntid_w"
case 'x': // 1 string to match.
return Intrinsic::ptx_read_ntid_x; // "__builtin_ptx_read_ntid_x"
case 'y': // 1 string to match.
return Intrinsic::ptx_read_ntid_y; // "__builtin_ptx_read_ntid_y"
case 'z': // 1 string to match.
return Intrinsic::ptx_read_ntid_z; // "__builtin_ptx_read_ntid_z"
}
break;
case 'w': // 1 string to match.
if (BuiltinName.substr(20, 5) != "arpid")
break;
return Intrinsic::ptx_read_warpid; // "__builtin_ptx_read_warpid"
}
break;
case 26: // 6 strings to match.
if (BuiltinName.substr(0, 19) != "__builtin_ptx_read_")
break;
switch (BuiltinName[19]) {
default: break;
case 'c': // 5 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'l': // 1 string to match.
if (BuiltinName.substr(21, 5) != "ock64")
break;
return Intrinsic::ptx_read_clock64; // "__builtin_ptx_read_clock64"
case 't': // 4 strings to match.
if (BuiltinName.substr(21, 4) != "aid_")
break;
switch (BuiltinName[25]) {
default: break;
case 'w': // 1 string to match.
return Intrinsic::ptx_read_ctaid_w; // "__builtin_ptx_read_ctaid_w"
case 'x': // 1 string to match.
return Intrinsic::ptx_read_ctaid_x; // "__builtin_ptx_read_ctaid_x"
case 'y': // 1 string to match.
return Intrinsic::ptx_read_ctaid_y; // "__builtin_ptx_read_ctaid_y"
case 'z': // 1 string to match.
return Intrinsic::ptx_read_ctaid_z; // "__builtin_ptx_read_ctaid_z"
}
break;
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(20, 6) != "warpid")
break;
return Intrinsic::ptx_read_nwarpid; // "__builtin_ptx_read_nwarpid"
}
break;
case 27: // 4 strings to match.
if (BuiltinName.substr(0, 26) != "__builtin_ptx_read_nctaid_")
break;
switch (BuiltinName[26]) {
default: break;
case 'w': // 1 string to match.
return Intrinsic::ptx_read_nctaid_w; // "__builtin_ptx_read_nctaid_w"
case 'x': // 1 string to match.
return Intrinsic::ptx_read_nctaid_x; // "__builtin_ptx_read_nctaid_x"
case 'y': // 1 string to match.
return Intrinsic::ptx_read_nctaid_y; // "__builtin_ptx_read_nctaid_y"
case 'z': // 1 string to match.
return Intrinsic::ptx_read_nctaid_z; // "__builtin_ptx_read_nctaid_z"
}
break;
case 30: // 5 strings to match.
if (BuiltinName.substr(0, 28) != "__builtin_ptx_read_lanemask_")
break;
switch (BuiltinName[28]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[29] != 'q')
break;
return Intrinsic::ptx_read_lanemask_eq; // "__builtin_ptx_read_lanemask_eq"
case 'g': // 2 strings to match.
switch (BuiltinName[29]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::ptx_read_lanemask_ge; // "__builtin_ptx_read_lanemask_ge"
case 't': // 1 string to match.
return Intrinsic::ptx_read_lanemask_gt; // "__builtin_ptx_read_lanemask_gt"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[29]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::ptx_read_lanemask_le; // "__builtin_ptx_read_lanemask_le"
case 't': // 1 string to match.
return Intrinsic::ptx_read_lanemask_lt; // "__builtin_ptx_read_lanemask_lt"
}
break;
}
break;
}
}
if (TargetPrefix == "spu") {
switch (BuiltinName.size()) {
default: break;
case 14: // 1 string to match.
if (BuiltinName.substr(0, 14) != "__builtin_si_a")
break;
return Intrinsic::spu_si_a; // "__builtin_si_a"
case 15: // 9 strings to match.
if (BuiltinName.substr(0, 13) != "__builtin_si_")
break;
switch (BuiltinName[13]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::spu_si_ah; // "__builtin_si_ah"
case 'i': // 1 string to match.
return Intrinsic::spu_si_ai; // "__builtin_si_ai"
}
break;
case 'b': // 1 string to match.
if (BuiltinName[14] != 'g')
break;
return Intrinsic::spu_si_bg; // "__builtin_si_bg"
case 'c': // 1 string to match.
if (BuiltinName[14] != 'g')
break;
return Intrinsic::spu_si_cg; // "__builtin_si_cg"
case 'f': // 3 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_fa; // "__builtin_si_fa"
case 'm': // 1 string to match.
return Intrinsic::spu_si_fm; // "__builtin_si_fm"
case 's': // 1 string to match.
return Intrinsic::spu_si_fs; // "__builtin_si_fs"
}
break;
case 'o': // 1 string to match.
if (BuiltinName[14] != 'r')
break;
return Intrinsic::spu_si_or; // "__builtin_si_or"
case 's': // 1 string to match.
if (BuiltinName[14] != 'f')
break;
return Intrinsic::spu_si_sf; // "__builtin_si_sf"
}
break;
case 16: // 19 strings to match.
if (BuiltinName.substr(0, 13) != "__builtin_si_")
break;
switch (BuiltinName[13]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[15] != 'i')
break;
return Intrinsic::spu_si_ahi; // "__builtin_si_ahi"
case 'n': // 1 string to match.
if (BuiltinName[15] != 'd')
break;
return Intrinsic::spu_si_and; // "__builtin_si_and"
}
break;
case 'b': // 1 string to match.
if (BuiltinName.substr(14, 2) != "gx")
break;
return Intrinsic::spu_si_bgx; // "__builtin_si_bgx"
case 'c': // 3 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[15] != 'q')
break;
return Intrinsic::spu_si_ceq; // "__builtin_si_ceq"
case 'g': // 2 strings to match.
switch (BuiltinName[15]) {
default: break;
case 't': // 1 string to match.
return Intrinsic::spu_si_cgt; // "__builtin_si_cgt"
case 'x': // 1 string to match.
return Intrinsic::spu_si_cgx; // "__builtin_si_cgx"
}
break;
}
break;
case 'd': // 3 strings to match.
if (BuiltinName[14] != 'f')
break;
switch (BuiltinName[15]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_dfa; // "__builtin_si_dfa"
case 'm': // 1 string to match.
return Intrinsic::spu_si_dfm; // "__builtin_si_dfm"
case 's': // 1 string to match.
return Intrinsic::spu_si_dfs; // "__builtin_si_dfs"
}
break;
case 'f': // 2 strings to match.
if (BuiltinName[14] != 'm')
break;
switch (BuiltinName[15]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_fma; // "__builtin_si_fma"
case 's': // 1 string to match.
return Intrinsic::spu_si_fms; // "__builtin_si_fms"
}
break;
case 'm': // 1 string to match.
if (BuiltinName.substr(14, 2) != "py")
break;
return Intrinsic::spu_si_mpy; // "__builtin_si_mpy"
case 'n': // 1 string to match.
if (BuiltinName.substr(14, 2) != "or")
break;
return Intrinsic::spu_si_nor; // "__builtin_si_nor"
case 'o': // 2 strings to match.
if (BuiltinName[14] != 'r')
break;
switch (BuiltinName[15]) {
default: break;
case 'c': // 1 string to match.
return Intrinsic::spu_si_orc; // "__builtin_si_orc"
case 'i': // 1 string to match.
return Intrinsic::spu_si_ori; // "__builtin_si_ori"
}
break;
case 's': // 3 strings to match.
if (BuiltinName[14] != 'f')
break;
switch (BuiltinName[15]) {
default: break;
case 'h': // 1 string to match.
return Intrinsic::spu_si_sfh; // "__builtin_si_sfh"
case 'i': // 1 string to match.
return Intrinsic::spu_si_sfi; // "__builtin_si_sfi"
case 'x': // 1 string to match.
return Intrinsic::spu_si_sfx; // "__builtin_si_sfx"
}
break;
case 'x': // 1 string to match.
if (BuiltinName.substr(14, 2) != "or")
break;
return Intrinsic::spu_si_xor; // "__builtin_si_xor"
}
break;
case 17: // 26 strings to match.
if (BuiltinName.substr(0, 13) != "__builtin_si_")
break;
switch (BuiltinName[13]) {
default: break;
case 'a': // 3 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(15, 2) != "dx")
break;
return Intrinsic::spu_si_addx; // "__builtin_si_addx"
case 'n': // 2 strings to match.
if (BuiltinName[15] != 'd')
break;
switch (BuiltinName[16]) {
default: break;
case 'c': // 1 string to match.
return Intrinsic::spu_si_andc; // "__builtin_si_andc"
case 'i': // 1 string to match.
return Intrinsic::spu_si_andi; // "__builtin_si_andi"
}
break;
}
break;
case 'c': // 7 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'e': // 3 strings to match.
if (BuiltinName[15] != 'q')
break;
switch (BuiltinName[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::spu_si_ceqb; // "__builtin_si_ceqb"
case 'h': // 1 string to match.
return Intrinsic::spu_si_ceqh; // "__builtin_si_ceqh"
case 'i': // 1 string to match.
return Intrinsic::spu_si_ceqi; // "__builtin_si_ceqi"
}
break;
case 'g': // 3 strings to match.
if (BuiltinName[15] != 't')
break;
switch (BuiltinName[16]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::spu_si_cgtb; // "__builtin_si_cgtb"
case 'h': // 1 string to match.
return Intrinsic::spu_si_cgth; // "__builtin_si_cgth"
case 'i': // 1 string to match.
return Intrinsic::spu_si_cgti; // "__builtin_si_cgti"
}
break;
case 'l': // 1 string to match.
if (BuiltinName.substr(15, 2) != "gt")
break;
return Intrinsic::spu_si_clgt; // "__builtin_si_clgt"
}
break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(14, 2) != "fm")
break;
switch (BuiltinName[16]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_dfma; // "__builtin_si_dfma"
case 's': // 1 string to match.
return Intrinsic::spu_si_dfms; // "__builtin_si_dfms"
}
break;
case 'f': // 3 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'c': // 2 strings to match.
switch (BuiltinName[15]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[16] != 'q')
break;
return Intrinsic::spu_si_fceq; // "__builtin_si_fceq"
case 'g': // 1 string to match.
if (BuiltinName[16] != 't')
break;
return Intrinsic::spu_si_fcgt; // "__builtin_si_fcgt"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(15, 2) != "ms")
break;
return Intrinsic::spu_si_fnms; // "__builtin_si_fnms"
}
break;
case 'm': // 5 strings to match.
if (BuiltinName.substr(14, 2) != "py")
break;
switch (BuiltinName[16]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_mpya; // "__builtin_si_mpya"
case 'h': // 1 string to match.
return Intrinsic::spu_si_mpyh; // "__builtin_si_mpyh"
case 'i': // 1 string to match.
return Intrinsic::spu_si_mpyi; // "__builtin_si_mpyi"
case 's': // 1 string to match.
return Intrinsic::spu_si_mpys; // "__builtin_si_mpys"
case 'u': // 1 string to match.
return Intrinsic::spu_si_mpyu; // "__builtin_si_mpyu"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(14, 3) != "and")
break;
return Intrinsic::spu_si_nand; // "__builtin_si_nand"
case 'o': // 2 strings to match.
if (BuiltinName[14] != 'r')
break;
switch (BuiltinName[15]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[16] != 'i')
break;
return Intrinsic::spu_si_orbi; // "__builtin_si_orbi"
case 'h': // 1 string to match.
if (BuiltinName[16] != 'i')
break;
return Intrinsic::spu_si_orhi; // "__builtin_si_orhi"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName.substr(15, 2) != "hi")
break;
return Intrinsic::spu_si_sfhi; // "__builtin_si_sfhi"
case 'h': // 1 string to match.
if (BuiltinName.substr(15, 2) != "li")
break;
return Intrinsic::spu_si_shli; // "__builtin_si_shli"
}
break;
case 'x': // 1 string to match.
if (BuiltinName.substr(14, 3) != "ori")
break;
return Intrinsic::spu_si_xori; // "__builtin_si_xori"
}
break;
case 18: // 18 strings to match.
if (BuiltinName.substr(0, 13) != "__builtin_si_")
break;
switch (BuiltinName[13]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(14, 2) != "nd")
break;
switch (BuiltinName[16]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[17] != 'i')
break;
return Intrinsic::spu_si_andbi; // "__builtin_si_andbi"
case 'h': // 1 string to match.
if (BuiltinName[17] != 'i')
break;
return Intrinsic::spu_si_andhi; // "__builtin_si_andhi"
}
break;
case 'c': // 7 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'e': // 2 strings to match.
if (BuiltinName[15] != 'q')
break;
switch (BuiltinName[16]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[17] != 'i')
break;
return Intrinsic::spu_si_ceqbi; // "__builtin_si_ceqbi"
case 'h': // 1 string to match.
if (BuiltinName[17] != 'i')
break;
return Intrinsic::spu_si_ceqhi; // "__builtin_si_ceqhi"
}
break;
case 'g': // 2 strings to match.
if (BuiltinName[15] != 't')
break;
switch (BuiltinName[16]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[17] != 'i')
break;
return Intrinsic::spu_si_cgtbi; // "__builtin_si_cgtbi"
case 'h': // 1 string to match.
if (BuiltinName[17] != 'i')
break;
return Intrinsic::spu_si_cgthi; // "__builtin_si_cgthi"
}
break;
case 'l': // 3 strings to match.
if (BuiltinName.substr(15, 2) != "gt")
break;
switch (BuiltinName[17]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::spu_si_clgtb; // "__builtin_si_clgtb"
case 'h': // 1 string to match.
return Intrinsic::spu_si_clgth; // "__builtin_si_clgth"
case 'i': // 1 string to match.
return Intrinsic::spu_si_clgti; // "__builtin_si_clgti"
}
break;
}
break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(14, 3) != "fnm")
break;
switch (BuiltinName[17]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_dfnma; // "__builtin_si_dfnma"
case 's': // 1 string to match.
return Intrinsic::spu_si_dfnms; // "__builtin_si_dfnms"
}
break;
case 'f': // 3 strings to match.
switch (BuiltinName[14]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName[15] != 'm')
break;
switch (BuiltinName[16]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[17] != 'q')
break;
return Intrinsic::spu_si_fcmeq; // "__builtin_si_fcmeq"
case 'g': // 1 string to match.
if (BuiltinName[17] != 't')
break;
return Intrinsic::spu_si_fcmgt; // "__builtin_si_fcmgt"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(15, 3) != "mbi")
break;
return Intrinsic::spu_si_fsmbi; // "__builtin_si_fsmbi"
}
break;
case 'm': // 2 strings to match.
if (BuiltinName.substr(14, 2) != "py")
break;
switch (BuiltinName[16]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[17] != 'h')
break;
return Intrinsic::spu_si_mpyhh; // "__builtin_si_mpyhh"
case 'u': // 1 string to match.
if (BuiltinName[17] != 'i')
break;
return Intrinsic::spu_si_mpyui; // "__builtin_si_mpyui"
}
break;
case 'x': // 2 strings to match.
if (BuiltinName.substr(14, 2) != "or")
break;
switch (BuiltinName[16]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[17] != 'i')
break;
return Intrinsic::spu_si_xorbi; // "__builtin_si_xorbi"
case 'h': // 1 string to match.
if (BuiltinName[17] != 'i')
break;
return Intrinsic::spu_si_xorhi; // "__builtin_si_xorhi"
}
break;
}
break;
case 19: // 6 strings to match.
if (BuiltinName.substr(0, 13) != "__builtin_si_")
break;
switch (BuiltinName[13]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName.substr(14, 3) != "lgt")
break;
switch (BuiltinName[17]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[18] != 'i')
break;
return Intrinsic::spu_si_clgtbi; // "__builtin_si_clgtbi"
case 'h': // 1 string to match.
if (BuiltinName[18] != 'i')
break;
return Intrinsic::spu_si_clgthi; // "__builtin_si_clgthi"
}
break;
case 'm': // 2 strings to match.
if (BuiltinName.substr(14, 4) != "pyhh")
break;
switch (BuiltinName[18]) {
default: break;
case 'a': // 1 string to match.
return Intrinsic::spu_si_mpyhha; // "__builtin_si_mpyhha"
case 'u': // 1 string to match.
return Intrinsic::spu_si_mpyhhu; // "__builtin_si_mpyhhu"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(14, 4) != "hlqb")
break;
switch (BuiltinName[18]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::spu_si_shlqbi; // "__builtin_si_shlqbi"
case 'y': // 1 string to match.
return Intrinsic::spu_si_shlqby; // "__builtin_si_shlqby"
}
break;
}
break;
case 20: // 3 strings to match.
if (BuiltinName.substr(0, 13) != "__builtin_si_")
break;
switch (BuiltinName[13]) {
default: break;
case 'm': // 1 string to match.
if (BuiltinName.substr(14, 6) != "pyhhau")
break;
return Intrinsic::spu_si_mpyhhau; // "__builtin_si_mpyhhau"
case 's': // 2 strings to match.
if (BuiltinName.substr(14, 4) != "hlqb")
break;
switch (BuiltinName[18]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName[19] != 'i')
break;
return Intrinsic::spu_si_shlqbii; // "__builtin_si_shlqbii"
case 'y': // 1 string to match.
if (BuiltinName[19] != 'i')
break;
return Intrinsic::spu_si_shlqbyi; // "__builtin_si_shlqbyi"
}
break;
}
break;
}
}
if (TargetPrefix == "x86") {
switch (BuiltinName.size()) {
default: break;
case 18: // 1 string to match.
if (BuiltinName.substr(0, 18) != "__builtin_ia32_por")
break;
return Intrinsic::x86_mmx_por; // "__builtin_ia32_por"
case 19: // 5 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(16, 2) != "pp")
break;
switch (BuiltinName[18]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_dppd; // "__builtin_ia32_dppd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_dpps; // "__builtin_ia32_dpps"
}
break;
case 'e': // 1 string to match.
if (BuiltinName.substr(16, 3) != "mms")
break;
return Intrinsic::x86_mmx_emms; // "__builtin_ia32_emms"
case 'p': // 2 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(17, 2) != "nd")
break;
return Intrinsic::x86_mmx_pand; // "__builtin_ia32_pand"
case 'x': // 1 string to match.
if (BuiltinName.substr(17, 2) != "or")
break;
return Intrinsic::x86_mmx_pxor; // "__builtin_ia32_pxor"
}
break;
}
break;
case 20: // 58 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(16, 3) != "dds")
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_add_sd; // "__builtin_ia32_addsd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_add_ss; // "__builtin_ia32_addss"
}
break;
case 'c': // 4 strings to match.
if (BuiltinName.substr(16, 2) != "mp")
break;
switch (BuiltinName[18]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_cmp_pd; // "__builtin_ia32_cmppd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_cmp_ps; // "__builtin_ia32_cmpps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_cmp_sd; // "__builtin_ia32_cmpsd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_cmp_ss; // "__builtin_ia32_cmpss"
}
break;
}
break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(16, 3) != "ivs")
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_div_sd; // "__builtin_ia32_divsd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_div_ss; // "__builtin_ia32_divss"
}
break;
case 'f': // 1 string to match.
if (BuiltinName.substr(16, 4) != "emms")
break;
return Intrinsic::x86_mmx_femms; // "__builtin_ia32_femms"
case 'l': // 1 string to match.
if (BuiltinName.substr(16, 4) != "ddqu")
break;
return Intrinsic::x86_sse3_ldu_dq; // "__builtin_ia32_lddqu"
case 'm': // 11 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 4 strings to match.
if (BuiltinName[17] != 'x')
break;
switch (BuiltinName[18]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_max_pd; // "__builtin_ia32_maxpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_max_ps; // "__builtin_ia32_maxps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_max_sd; // "__builtin_ia32_maxsd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_max_ss; // "__builtin_ia32_maxss"
}
break;
}
break;
case 'i': // 4 strings to match.
if (BuiltinName[17] != 'n')
break;
switch (BuiltinName[18]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_min_pd; // "__builtin_ia32_minpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_min_ps; // "__builtin_ia32_minps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_min_sd; // "__builtin_ia32_minsd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_min_ss; // "__builtin_ia32_minss"
}
break;
}
break;
case 'u': // 2 strings to match.
if (BuiltinName.substr(17, 2) != "ls")
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_mul_sd; // "__builtin_ia32_mulsd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_mul_ss; // "__builtin_ia32_mulss"
}
break;
case 'w': // 1 string to match.
if (BuiltinName.substr(17, 3) != "ait")
break;
return Intrinsic::x86_sse3_mwait; // "__builtin_ia32_mwait"
}
break;
case 'p': // 33 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 10 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'b': // 3 strings to match.
if (BuiltinName[18] != 's')
break;
switch (BuiltinName[19]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_ssse3_pabs_b; // "__builtin_ia32_pabsb"
case 'd': // 1 string to match.
return Intrinsic::x86_ssse3_pabs_d; // "__builtin_ia32_pabsd"
case 'w': // 1 string to match.
return Intrinsic::x86_ssse3_pabs_w; // "__builtin_ia32_pabsw"
}
break;
case 'd': // 4 strings to match.
if (BuiltinName[18] != 'd')
break;
switch (BuiltinName[19]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_padd_b; // "__builtin_ia32_paddb"
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_padd_d; // "__builtin_ia32_paddd"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_padd_q; // "__builtin_ia32_paddq"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_padd_w; // "__builtin_ia32_paddw"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(18, 2) != "dn")
break;
return Intrinsic::x86_mmx_pandn; // "__builtin_ia32_pandn"
case 'v': // 2 strings to match.
if (BuiltinName[18] != 'g')
break;
switch (BuiltinName[19]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_pavg_b; // "__builtin_ia32_pavgb"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_pavg_w; // "__builtin_ia32_pavgw"
}
break;
}
break;
case 'f': // 9 strings to match.
switch (BuiltinName[17]) {
default: break;
case '2': // 2 strings to match.
if (BuiltinName[18] != 'i')
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_3dnow_pf2id; // "__builtin_ia32_pf2id"
case 'w': // 1 string to match.
return Intrinsic::x86_3dnowa_pf2iw; // "__builtin_ia32_pf2iw"
}
break;
case 'a': // 2 strings to match.
switch (BuiltinName[18]) {
default: break;
case 'c': // 1 string to match.
if (BuiltinName[19] != 'c')
break;
return Intrinsic::x86_3dnow_pfacc; // "__builtin_ia32_pfacc"
case 'd': // 1 string to match.
if (BuiltinName[19] != 'd')
break;
return Intrinsic::x86_3dnow_pfadd; // "__builtin_ia32_pfadd"
}
break;
case 'm': // 3 strings to match.
switch (BuiltinName[18]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName[19] != 'x')
break;
return Intrinsic::x86_3dnow_pfmax; // "__builtin_ia32_pfmax"
case 'i': // 1 string to match.
if (BuiltinName[19] != 'n')
break;
return Intrinsic::x86_3dnow_pfmin; // "__builtin_ia32_pfmin"
case 'u': // 1 string to match.
if (BuiltinName[19] != 'l')
break;
return Intrinsic::x86_3dnow_pfmul; // "__builtin_ia32_pfmul"
}
break;
case 'r': // 1 string to match.
if (BuiltinName.substr(18, 2) != "cp")
break;
return Intrinsic::x86_3dnow_pfrcp; // "__builtin_ia32_pfrcp"
case 's': // 1 string to match.
if (BuiltinName.substr(18, 2) != "ub")
break;
return Intrinsic::x86_3dnow_pfsub; // "__builtin_ia32_pfsub"
}
break;
case 'i': // 2 strings to match.
if (BuiltinName.substr(17, 2) != "2f")
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_3dnow_pi2fd; // "__builtin_ia32_pi2fd"
case 'w': // 1 string to match.
return Intrinsic::x86_3dnowa_pi2fw; // "__builtin_ia32_pi2fw"
}
break;
case 's': // 12 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'l': // 3 strings to match.
if (BuiltinName[18] != 'l')
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psll_d; // "__builtin_ia32_pslld"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_psll_q; // "__builtin_ia32_psllq"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psll_w; // "__builtin_ia32_psllw"
}
break;
case 'r': // 5 strings to match.
switch (BuiltinName[18]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psra_d; // "__builtin_ia32_psrad"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psra_w; // "__builtin_ia32_psraw"
}
break;
case 'l': // 3 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psrl_d; // "__builtin_ia32_psrld"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_psrl_q; // "__builtin_ia32_psrlq"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psrl_w; // "__builtin_ia32_psrlw"
}
break;
}
break;
case 'u': // 4 strings to match.
if (BuiltinName[18] != 'b')
break;
switch (BuiltinName[19]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_psub_b; // "__builtin_ia32_psubb"
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_psub_d; // "__builtin_ia32_psubd"
case 'q': // 1 string to match.
return Intrinsic::x86_mmx_psub_q; // "__builtin_ia32_psubq"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psub_w; // "__builtin_ia32_psubw"
}
break;
}
break;
}
break;
case 'r': // 2 strings to match.
if (BuiltinName.substr(16, 2) != "cp")
break;
switch (BuiltinName[18]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName[19] != 's')
break;
return Intrinsic::x86_sse_rcp_ps; // "__builtin_ia32_rcpps"
case 's': // 1 string to match.
if (BuiltinName[19] != 's')
break;
return Intrinsic::x86_sse_rcp_ss; // "__builtin_ia32_rcpss"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(16, 3) != "ubs")
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_sub_sd; // "__builtin_ia32_subsd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_sub_ss; // "__builtin_ia32_subss"
}
break;
}
break;
case 21: // 47 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'c': // 5 strings to match.
if (BuiltinName.substr(16, 3) != "omi")
break;
switch (BuiltinName[19]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[20] != 'q')
break;
return Intrinsic::x86_sse_comieq_ss; // "__builtin_ia32_comieq"
case 'g': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_sse_comige_ss; // "__builtin_ia32_comige"
case 't': // 1 string to match.
return Intrinsic::x86_sse_comigt_ss; // "__builtin_ia32_comigt"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_sse_comile_ss; // "__builtin_ia32_comile"
case 't': // 1 string to match.
return Intrinsic::x86_sse_comilt_ss; // "__builtin_ia32_comilt"
}
break;
}
break;
case 'h': // 4 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "ddp")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse3_hadd_pd; // "__builtin_ia32_haddpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse3_hadd_ps; // "__builtin_ia32_haddps"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "ubp")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse3_hsub_pd; // "__builtin_ia32_hsubpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse3_hsub_ps; // "__builtin_ia32_hsubps"
}
break;
}
break;
case 'l': // 1 string to match.
if (BuiltinName.substr(16, 5) != "fence")
break;
return Intrinsic::x86_sse2_lfence; // "__builtin_ia32_lfence"
case 'm': // 2 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName.substr(17, 4) != "ence")
break;
return Intrinsic::x86_sse2_mfence; // "__builtin_ia32_mfence"
case 'o': // 1 string to match.
if (BuiltinName.substr(17, 4) != "vntq")
break;
return Intrinsic::x86_mmx_movnt_dq; // "__builtin_ia32_movntq"
}
break;
case 'p': // 30 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "dds")
break;
switch (BuiltinName[20]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_padds_b; // "__builtin_ia32_paddsb"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_padds_w; // "__builtin_ia32_paddsw"
}
break;
case 'f': // 2 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'n': // 1 string to match.
if (BuiltinName.substr(18, 3) != "acc")
break;
return Intrinsic::x86_3dnowa_pfnacc; // "__builtin_ia32_pfnacc"
case 's': // 1 string to match.
if (BuiltinName.substr(18, 3) != "ubr")
break;
return Intrinsic::x86_3dnow_pfsubr; // "__builtin_ia32_pfsubr"
}
break;
case 'h': // 4 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(18, 2) != "dd")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_ssse3_phadd_d; // "__builtin_ia32_phaddd"
case 'w': // 1 string to match.
return Intrinsic::x86_ssse3_phadd_w; // "__builtin_ia32_phaddw"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(18, 2) != "ub")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_ssse3_phsub_d; // "__builtin_ia32_phsubd"
case 'w': // 1 string to match.
return Intrinsic::x86_ssse3_phsub_w; // "__builtin_ia32_phsubw"
}
break;
}
break;
case 'm': // 6 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName[18] != 'x')
break;
switch (BuiltinName[19]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName[20] != 'w')
break;
return Intrinsic::x86_mmx_pmaxs_w; // "__builtin_ia32_pmaxsw"
case 'u': // 1 string to match.
if (BuiltinName[20] != 'b')
break;
return Intrinsic::x86_mmx_pmaxu_b; // "__builtin_ia32_pmaxub"
}
break;
case 'i': // 2 strings to match.
if (BuiltinName[18] != 'n')
break;
switch (BuiltinName[19]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName[20] != 'w')
break;
return Intrinsic::x86_mmx_pmins_w; // "__builtin_ia32_pminsw"
case 'u': // 1 string to match.
if (BuiltinName[20] != 'b')
break;
return Intrinsic::x86_mmx_pminu_b; // "__builtin_ia32_pminub"
}
break;
case 'u': // 2 strings to match.
if (BuiltinName[18] != 'l')
break;
switch (BuiltinName[19]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName[20] != 'w')
break;
return Intrinsic::x86_mmx_pmulh_w; // "__builtin_ia32_pmulhw"
case 'l': // 1 string to match.
if (BuiltinName[20] != 'w')
break;
return Intrinsic::x86_mmx_pmull_w; // "__builtin_ia32_pmullw"
}
break;
}
break;
case 's': // 16 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(18, 3) != "dbw")
break;
return Intrinsic::x86_mmx_psad_bw; // "__builtin_ia32_psadbw"
case 'h': // 2 strings to match.
if (BuiltinName.substr(18, 2) != "uf")
break;
switch (BuiltinName[20]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_ssse3_pshuf_b; // "__builtin_ia32_pshufb"
case 'w': // 1 string to match.
return Intrinsic::x86_sse_pshuf_w; // "__builtin_ia32_pshufw"
}
break;
case 'i': // 3 strings to match.
if (BuiltinName.substr(18, 2) != "gn")
break;
switch (BuiltinName[20]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_ssse3_psign_b; // "__builtin_ia32_psignb"
case 'd': // 1 string to match.
return Intrinsic::x86_ssse3_psign_d; // "__builtin_ia32_psignd"
case 'w': // 1 string to match.
return Intrinsic::x86_ssse3_psign_w; // "__builtin_ia32_psignw"
}
break;
case 'l': // 3 strings to match.
if (BuiltinName[18] != 'l')
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[20] != 'i')
break;
return Intrinsic::x86_mmx_pslli_d; // "__builtin_ia32_pslldi"
case 'q': // 1 string to match.
if (BuiltinName[20] != 'i')
break;
return Intrinsic::x86_mmx_pslli_q; // "__builtin_ia32_psllqi"
case 'w': // 1 string to match.
if (BuiltinName[20] != 'i')
break;
return Intrinsic::x86_mmx_pslli_w; // "__builtin_ia32_psllwi"
}
break;
case 'r': // 5 strings to match.
switch (BuiltinName[18]) {
default: break;
case 'a': // 2 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[20] != 'i')
break;
return Intrinsic::x86_mmx_psrai_d; // "__builtin_ia32_psradi"
case 'w': // 1 string to match.
if (BuiltinName[20] != 'i')
break;
return Intrinsic::x86_mmx_psrai_w; // "__builtin_ia32_psrawi"
}
break;
case 'l': // 3 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[20] != 'i')
break;
return Intrinsic::x86_mmx_psrli_d; // "__builtin_ia32_psrldi"
case 'q': // 1 string to match.
if (BuiltinName[20] != 'i')
break;
return Intrinsic::x86_mmx_psrli_q; // "__builtin_ia32_psrlqi"
case 'w': // 1 string to match.
if (BuiltinName[20] != 'i')
break;
return Intrinsic::x86_mmx_psrli_w; // "__builtin_ia32_psrlwi"
}
break;
}
break;
case 'u': // 2 strings to match.
if (BuiltinName.substr(18, 2) != "bs")
break;
switch (BuiltinName[20]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_psubs_b; // "__builtin_ia32_psubsb"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psubs_w; // "__builtin_ia32_psubsw"
}
break;
}
break;
}
break;
case 's': // 5 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName.substr(17, 4) != "ence")
break;
return Intrinsic::x86_sse_sfence; // "__builtin_ia32_sfence"
case 'q': // 4 strings to match.
if (BuiltinName.substr(17, 2) != "rt")
break;
switch (BuiltinName[19]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_sqrt_pd; // "__builtin_ia32_sqrtpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_sqrt_ps; // "__builtin_ia32_sqrtps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_sqrt_sd; // "__builtin_ia32_sqrtsd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_sqrt_ss; // "__builtin_ia32_sqrtss"
}
break;
}
break;
}
break;
}
break;
case 22: // 50 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'b': // 4 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(17, 4) != "endp")
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_blendpd; // "__builtin_ia32_blendpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_blendps; // "__builtin_ia32_blendps"
}
break;
case 'z': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "hi_")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_bmi_bzhi_64; // "__builtin_ia32_bzhi_di"
case 's': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_bmi_bzhi_32; // "__builtin_ia32_bzhi_si"
}
break;
}
break;
case 'c': // 6 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'l': // 1 string to match.
if (BuiltinName.substr(17, 5) != "flush")
break;
return Intrinsic::x86_sse2_clflush; // "__builtin_ia32_clflush"
case 'o': // 1 string to match.
if (BuiltinName.substr(17, 5) != "mineq")
break;
return Intrinsic::x86_sse_comineq_ss; // "__builtin_ia32_comineq"
case 'r': // 4 strings to match.
if (BuiltinName.substr(17, 3) != "c32")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_sse42_crc32_64_64; // "__builtin_ia32_crc32di"
case 'h': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_sse42_crc32_32_16; // "__builtin_ia32_crc32hi"
case 'q': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_sse42_crc32_32_8; // "__builtin_ia32_crc32qi"
case 's': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_sse42_crc32_32_32; // "__builtin_ia32_crc32si"
}
break;
}
break;
case 'd': // 1 string to match.
if (BuiltinName.substr(16, 6) != "pps256")
break;
return Intrinsic::x86_avx_dp_ps_256; // "__builtin_ia32_dpps256"
case 'm': // 1 string to match.
if (BuiltinName.substr(16, 6) != "onitor")
break;
return Intrinsic::x86_sse3_monitor; // "__builtin_ia32_monitor"
case 'p': // 27 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 4 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(18, 3) != "dus")
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_paddus_b; // "__builtin_ia32_paddusb"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_paddus_w; // "__builtin_ia32_paddusw"
}
break;
case 'l': // 1 string to match.
if (BuiltinName.substr(18, 4) != "ignr")
break;
return Intrinsic::x86_mmx_palignr_b; // "__builtin_ia32_palignr"
case 'v': // 1 string to match.
if (BuiltinName.substr(18, 4) != "gusb")
break;
return Intrinsic::x86_3dnow_pavgusb; // "__builtin_ia32_pavgusb"
}
break;
case 'c': // 6 strings to match.
if (BuiltinName.substr(17, 2) != "mp")
break;
switch (BuiltinName[19]) {
default: break;
case 'e': // 3 strings to match.
if (BuiltinName[20] != 'q')
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_pcmpeq_b; // "__builtin_ia32_pcmpeqb"
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_pcmpeq_d; // "__builtin_ia32_pcmpeqd"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_pcmpeq_w; // "__builtin_ia32_pcmpeqw"
}
break;
case 'g': // 3 strings to match.
if (BuiltinName[20] != 't')
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_pcmpgt_b; // "__builtin_ia32_pcmpgtb"
case 'd': // 1 string to match.
return Intrinsic::x86_mmx_pcmpgt_d; // "__builtin_ia32_pcmpgtd"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_pcmpgt_w; // "__builtin_ia32_pcmpgtw"
}
break;
}
break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "ep_")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_bmi_pdep_64; // "__builtin_ia32_pdep_di"
case 's': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_bmi_pdep_32; // "__builtin_ia32_pdep_si"
}
break;
case 'e': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "xt_")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_bmi_pext_64; // "__builtin_ia32_pext_di"
case 's': // 1 string to match.
if (BuiltinName[21] != 'i')
break;
return Intrinsic::x86_bmi_pext_32; // "__builtin_ia32_pext_si"
}
break;
case 'f': // 5 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'c': // 3 strings to match.
if (BuiltinName.substr(18, 2) != "mp")
break;
switch (BuiltinName[20]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[21] != 'q')
break;
return Intrinsic::x86_3dnow_pfcmpeq; // "__builtin_ia32_pfcmpeq"
case 'g': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_3dnow_pfcmpge; // "__builtin_ia32_pfcmpge"
case 't': // 1 string to match.
return Intrinsic::x86_3dnow_pfcmpgt; // "__builtin_ia32_pfcmpgt"
}
break;
}
break;
case 'p': // 1 string to match.
if (BuiltinName.substr(18, 4) != "nacc")
break;
return Intrinsic::x86_3dnowa_pfpnacc; // "__builtin_ia32_pfpnacc"
case 'r': // 1 string to match.
if (BuiltinName.substr(18, 4) != "sqrt")
break;
return Intrinsic::x86_3dnow_pfrsqrt; // "__builtin_ia32_pfrsqrt"
}
break;
case 'h': // 2 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(18, 4) != "ddsw")
break;
return Intrinsic::x86_ssse3_phadd_sw; // "__builtin_ia32_phaddsw"
case 's': // 1 string to match.
if (BuiltinName.substr(18, 4) != "ubsw")
break;
return Intrinsic::x86_ssse3_phsub_sw; // "__builtin_ia32_phsubsw"
}
break;
case 'm': // 4 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(18, 4) != "ddwd")
break;
return Intrinsic::x86_mmx_pmadd_wd; // "__builtin_ia32_pmaddwd"
case 'u': // 3 strings to match.
if (BuiltinName[18] != 'l')
break;
switch (BuiltinName[19]) {
default: break;
case 'h': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'r': // 1 string to match.
if (BuiltinName[21] != 'w')
break;
return Intrinsic::x86_3dnow_pmulhrw; // "__builtin_ia32_pmulhrw"
case 'u': // 1 string to match.
if (BuiltinName[21] != 'w')
break;
return Intrinsic::x86_mmx_pmulhu_w; // "__builtin_ia32_pmulhuw"
}
break;
case 'u': // 1 string to match.
if (BuiltinName.substr(20, 2) != "dq")
break;
return Intrinsic::x86_mmx_pmulu_dq; // "__builtin_ia32_pmuludq"
}
break;
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(17, 4) != "ubus")
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 1 string to match.
return Intrinsic::x86_mmx_psubus_b; // "__builtin_ia32_psubusb"
case 'w': // 1 string to match.
return Intrinsic::x86_mmx_psubus_w; // "__builtin_ia32_psubusw"
}
break;
}
break;
case 'r': // 6 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'o': // 4 strings to match.
if (BuiltinName.substr(17, 3) != "und")
break;
switch (BuiltinName[20]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_round_pd; // "__builtin_ia32_roundpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_round_ps; // "__builtin_ia32_roundps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_round_sd; // "__builtin_ia32_roundsd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_round_ss; // "__builtin_ia32_roundss"
}
break;
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "qrt")
break;
switch (BuiltinName[20]) {
default: break;
case 'p': // 1 string to match.
if (BuiltinName[21] != 's')
break;
return Intrinsic::x86_sse_rsqrt_ps; // "__builtin_ia32_rsqrtps"
case 's': // 1 string to match.
if (BuiltinName[21] != 's')
break;
return Intrinsic::x86_sse_rsqrt_ss; // "__builtin_ia32_rsqrtss"
}
break;
}
break;
case 'u': // 5 strings to match.
if (BuiltinName.substr(16, 4) != "comi")
break;
switch (BuiltinName[20]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[21] != 'q')
break;
return Intrinsic::x86_sse_ucomieq_ss; // "__builtin_ia32_ucomieq"
case 'g': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_sse_ucomige_ss; // "__builtin_ia32_ucomige"
case 't': // 1 string to match.
return Intrinsic::x86_sse_ucomigt_ss; // "__builtin_ia32_ucomigt"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_sse_ucomile_ss; // "__builtin_ia32_ucomile"
case 't': // 1 string to match.
return Intrinsic::x86_sse_ucomilt_ss; // "__builtin_ia32_ucomilt"
}
break;
}
break;
}
break;
case 23: // 98 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(16, 6) != "ddsubp")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse3_addsub_pd; // "__builtin_ia32_addsubpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse3_addsub_ps; // "__builtin_ia32_addsubps"
}
break;
case 'b': // 2 strings to match.
if (BuiltinName.substr(16, 6) != "lendvp")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse41_blendvpd; // "__builtin_ia32_blendvpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse41_blendvps; // "__builtin_ia32_blendvps"
}
break;
case 'c': // 23 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'm': // 2 strings to match.
if (BuiltinName.substr(17, 2) != "pp")
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(20, 3) != "256")
break;
return Intrinsic::x86_avx_cmp_pd_256; // "__builtin_ia32_cmppd256"
case 's': // 1 string to match.
if (BuiltinName.substr(20, 3) != "256")
break;
return Intrinsic::x86_avx_cmp_ps_256; // "__builtin_ia32_cmpps256"
}
break;
case 'o': // 5 strings to match.
if (BuiltinName.substr(17, 4) != "misd")
break;
switch (BuiltinName[21]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[22] != 'q')
break;
return Intrinsic::x86_sse2_comieq_sd; // "__builtin_ia32_comisdeq"
case 'g': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_sse2_comige_sd; // "__builtin_ia32_comisdge"
case 't': // 1 string to match.
return Intrinsic::x86_sse2_comigt_sd; // "__builtin_ia32_comisdgt"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_sse2_comile_sd; // "__builtin_ia32_comisdle"
case 't': // 1 string to match.
return Intrinsic::x86_sse2_comilt_sd; // "__builtin_ia32_comisdlt"
}
break;
}
break;
case 'v': // 16 strings to match.
if (BuiltinName[17] != 't')
break;
switch (BuiltinName[18]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(19, 3) != "q2p")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_cvtdq2pd; // "__builtin_ia32_cvtdq2pd"
case 's': // 1 string to match.
return Intrinsic::x86_sse2_cvtdq2ps; // "__builtin_ia32_cvtdq2ps"
}
break;
case 'p': // 8 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 3 strings to match.
if (BuiltinName[20] != '2')
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[22] != 'q')
break;
return Intrinsic::x86_sse2_cvtpd2dq; // "__builtin_ia32_cvtpd2dq"
case 'p': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::x86_sse_cvtpd2pi; // "__builtin_ia32_cvtpd2pi"
case 's': // 1 string to match.
return Intrinsic::x86_sse2_cvtpd2ps; // "__builtin_ia32_cvtpd2ps"
}
break;
}
break;
case 'i': // 2 strings to match.
if (BuiltinName.substr(20, 2) != "2p")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse_cvtpi2pd; // "__builtin_ia32_cvtpi2pd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_cvtpi2ps; // "__builtin_ia32_cvtpi2ps"
}
break;
case 's': // 3 strings to match.
if (BuiltinName[20] != '2')
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[22] != 'q')
break;
return Intrinsic::x86_sse2_cvtps2dq; // "__builtin_ia32_cvtps2dq"
case 'p': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_cvtps2pd; // "__builtin_ia32_cvtps2pd"
case 'i': // 1 string to match.
return Intrinsic::x86_sse_cvtps2pi; // "__builtin_ia32_cvtps2pi"
}
break;
}
break;
}
break;
case 's': // 6 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(20, 2) != "2s")
break;
switch (BuiltinName[22]) {
default: break;
case 'i': // 1 string to match.
return Intrinsic::x86_sse2_cvtsd2si; // "__builtin_ia32_cvtsd2si"
case 's': // 1 string to match.
return Intrinsic::x86_sse2_cvtsd2ss; // "__builtin_ia32_cvtsd2ss"
}
break;
case 'i': // 2 strings to match.
if (BuiltinName.substr(20, 2) != "2s")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_cvtsi2sd; // "__builtin_ia32_cvtsi2sd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_cvtsi2ss; // "__builtin_ia32_cvtsi2ss"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(20, 2) != "2s")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_cvtss2sd; // "__builtin_ia32_cvtss2sd"
case 'i': // 1 string to match.
return Intrinsic::x86_sse_cvtss2si; // "__builtin_ia32_cvtss2si"
}
break;
}
break;
}
break;
}
break;
case 'l': // 1 string to match.
if (BuiltinName.substr(16, 7) != "ddqu256")
break;
return Intrinsic::x86_avx_ldu_dq_256; // "__builtin_ia32_lddqu256"
case 'm': // 8 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 3 strings to match.
switch (BuiltinName[17]) {
default: break;
case 's': // 1 string to match.
if (BuiltinName.substr(18, 5) != "kmovq")
break;
return Intrinsic::x86_mmx_maskmovq; // "__builtin_ia32_maskmovq"
case 'x': // 2 strings to match.
if (BuiltinName[18] != 'p')
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(20, 3) != "256")
break;
return Intrinsic::x86_avx_max_pd_256; // "__builtin_ia32_maxpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(20, 3) != "256")
break;
return Intrinsic::x86_avx_max_ps_256; // "__builtin_ia32_maxps256"
}
break;
}
break;
case 'i': // 2 strings to match.
if (BuiltinName.substr(17, 2) != "np")
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(20, 3) != "256")
break;
return Intrinsic::x86_avx_min_pd_256; // "__builtin_ia32_minpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(20, 3) != "256")
break;
return Intrinsic::x86_avx_min_ps_256; // "__builtin_ia32_minps256"
}
break;
case 'o': // 3 strings to match.
if (BuiltinName[17] != 'v')
break;
switch (BuiltinName[18]) {
default: break;
case 'm': // 2 strings to match.
if (BuiltinName.substr(19, 3) != "skp")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_movmsk_pd; // "__builtin_ia32_movmskpd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_movmsk_ps; // "__builtin_ia32_movmskps"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(19, 4) != "tdqa")
break;
return Intrinsic::x86_sse41_movntdqa; // "__builtin_ia32_movntdqa"
}
break;
}
break;
case 'p': // 44 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 13 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'b': // 6 strings to match.
if (BuiltinName[18] != 's')
break;
switch (BuiltinName[19]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_ssse3_pabs_b_128; // "__builtin_ia32_pabsb128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_pabs_b; // "__builtin_ia32_pabsb256"
}
break;
case 'd': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_ssse3_pabs_d_128; // "__builtin_ia32_pabsd128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_pabs_d; // "__builtin_ia32_pabsd256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_ssse3_pabs_w_128; // "__builtin_ia32_pabsw128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_pabs_w; // "__builtin_ia32_pabsw256"
}
break;
}
break;
case 'c': // 3 strings to match.
if (BuiltinName[18] != 'k')
break;
switch (BuiltinName[19]) {
default: break;
case 's': // 2 strings to match.
if (BuiltinName[20] != 's')
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[22] != 'w')
break;
return Intrinsic::x86_mmx_packssdw; // "__builtin_ia32_packssdw"
case 'w': // 1 string to match.
if (BuiltinName[22] != 'b')
break;
return Intrinsic::x86_mmx_packsswb; // "__builtin_ia32_packsswb"
}
break;
case 'u': // 1 string to match.
if (BuiltinName.substr(20, 3) != "swb")
break;
return Intrinsic::x86_mmx_packuswb; // "__builtin_ia32_packuswb"
}
break;
case 'v': // 4 strings to match.
if (BuiltinName[18] != 'g')
break;
switch (BuiltinName[19]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_pavg_b; // "__builtin_ia32_pavgb128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_pavg_b; // "__builtin_ia32_pavgb256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_pavg_w; // "__builtin_ia32_pavgw128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_pavg_w; // "__builtin_ia32_pavgw256"
}
break;
}
break;
}
break;
case 'f': // 3 strings to match.
if (BuiltinName[17] != 'r')
break;
switch (BuiltinName[18]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName.substr(19, 3) != "pit")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
return Intrinsic::x86_3dnow_pfrcpit1; // "__builtin_ia32_pfrcpit1"
case '2': // 1 string to match.
return Intrinsic::x86_3dnow_pfrcpit2; // "__builtin_ia32_pfrcpit2"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(19, 4) != "qit1")
break;
return Intrinsic::x86_3dnow_pfrsqit1; // "__builtin_ia32_pfrsqit1"
}
break;
case 'm': // 2 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'o': // 1 string to match.
if (BuiltinName.substr(18, 5) != "vmskb")
break;
return Intrinsic::x86_mmx_pmovmskb; // "__builtin_ia32_pmovmskb"
case 'u': // 1 string to match.
if (BuiltinName.substr(18, 5) != "lhrsw")
break;
return Intrinsic::x86_ssse3_pmul_hr_sw; // "__builtin_ia32_pmulhrsw"
}
break;
case 's': // 26 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'l': // 10 strings to match.
if (BuiltinName[18] != 'l')
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_psll_d; // "__builtin_ia32_pslld128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_psll_d; // "__builtin_ia32_pslld256"
}
break;
case 'q': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_psll_q; // "__builtin_ia32_psllq128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_psll_q; // "__builtin_ia32_psllq256"
}
break;
case 'v': // 4 strings to match.
switch (BuiltinName[20]) {
default: break;
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "di")
break;
return Intrinsic::x86_avx2_psllv_q; // "__builtin_ia32_psllv2di"
case '4': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[22] != 'i')
break;
return Intrinsic::x86_avx2_psllv_q_256; // "__builtin_ia32_psllv4di"
case 's': // 1 string to match.
if (BuiltinName[22] != 'i')
break;
return Intrinsic::x86_avx2_psllv_d; // "__builtin_ia32_psllv4si"
}
break;
case '8': // 1 string to match.
if (BuiltinName.substr(21, 2) != "si")
break;
return Intrinsic::x86_avx2_psllv_d_256; // "__builtin_ia32_psllv8si"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_psll_w; // "__builtin_ia32_psllw128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_psll_w; // "__builtin_ia32_psllw256"
}
break;
}
break;
case 'r': // 16 strings to match.
switch (BuiltinName[18]) {
default: break;
case 'a': // 6 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_psra_d; // "__builtin_ia32_psrad128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_psra_d; // "__builtin_ia32_psrad256"
}
break;
case 'v': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '4': // 1 string to match.
if (BuiltinName.substr(21, 2) != "si")
break;
return Intrinsic::x86_avx2_psrav_d; // "__builtin_ia32_psrav4si"
case '8': // 1 string to match.
if (BuiltinName.substr(21, 2) != "si")
break;
return Intrinsic::x86_avx2_psrav_d_256; // "__builtin_ia32_psrav8si"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_psra_w; // "__builtin_ia32_psraw128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_psra_w; // "__builtin_ia32_psraw256"
}
break;
}
break;
case 'l': // 10 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_psrl_d; // "__builtin_ia32_psrld128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_psrl_d; // "__builtin_ia32_psrld256"
}
break;
case 'q': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_psrl_q; // "__builtin_ia32_psrlq128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_psrl_q; // "__builtin_ia32_psrlq256"
}
break;
case 'v': // 4 strings to match.
switch (BuiltinName[20]) {
default: break;
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "di")
break;
return Intrinsic::x86_avx2_psrlv_q; // "__builtin_ia32_psrlv2di"
case '4': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[22] != 'i')
break;
return Intrinsic::x86_avx2_psrlv_q_256; // "__builtin_ia32_psrlv4di"
case 's': // 1 string to match.
if (BuiltinName[22] != 'i')
break;
return Intrinsic::x86_avx2_psrlv_d; // "__builtin_ia32_psrlv4si"
}
break;
case '8': // 1 string to match.
if (BuiltinName.substr(21, 2) != "si")
break;
return Intrinsic::x86_avx2_psrlv_d_256; // "__builtin_ia32_psrlv8si"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(21, 2) != "28")
break;
return Intrinsic::x86_sse2_psrl_w; // "__builtin_ia32_psrlw128"
case '2': // 1 string to match.
if (BuiltinName.substr(21, 2) != "56")
break;
return Intrinsic::x86_avx2_psrl_w; // "__builtin_ia32_psrlw256"
}
break;
}
break;
}
break;
}
break;
}
break;
case 'r': // 1 string to match.
if (BuiltinName.substr(16, 7) != "cpps256")
break;
return Intrinsic::x86_avx_rcp_ps_256; // "__builtin_ia32_rcpps256"
case 's': // 3 strings to match.
if (BuiltinName.substr(16, 4) != "tore")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(21, 2) != "qu")
break;
return Intrinsic::x86_sse2_storeu_dq; // "__builtin_ia32_storedqu"
case 'u': // 2 strings to match.
if (BuiltinName[21] != 'p')
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_storeu_pd; // "__builtin_ia32_storeupd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_storeu_ps; // "__builtin_ia32_storeups"
}
break;
}
break;
case 'u': // 1 string to match.
if (BuiltinName.substr(16, 7) != "comineq")
break;
return Intrinsic::x86_sse_ucomineq_ss; // "__builtin_ia32_ucomineq"
case 'v': // 13 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'f': // 8 strings to match.
if (BuiltinName[17] != 'm')
break;
switch (BuiltinName[18]) {
default: break;
case 'a': // 4 strings to match.
if (BuiltinName.substr(19, 2) != "dd")
break;
switch (BuiltinName[21]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmadd_pd; // "__builtin_ia32_vfmaddpd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmadd_ps; // "__builtin_ia32_vfmaddps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmadd_sd; // "__builtin_ia32_vfmaddsd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmadd_ss; // "__builtin_ia32_vfmaddss"
}
break;
}
break;
case 's': // 4 strings to match.
if (BuiltinName.substr(19, 2) != "ub")
break;
switch (BuiltinName[21]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmsub_pd; // "__builtin_ia32_vfmsubpd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmsub_ps; // "__builtin_ia32_vfmsubps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmsub_sd; // "__builtin_ia32_vfmsubsd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmsub_ss; // "__builtin_ia32_vfmsubss"
}
break;
}
break;
}
break;
case 't': // 4 strings to match.
if (BuiltinName.substr(17, 3) != "est")
break;
switch (BuiltinName[20]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName[21] != 'p')
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_vtestc_pd; // "__builtin_ia32_vtestcpd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_vtestc_ps; // "__builtin_ia32_vtestcps"
}
break;
case 'z': // 2 strings to match.
if (BuiltinName[21] != 'p')
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_vtestz_pd; // "__builtin_ia32_vtestzpd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_vtestz_ps; // "__builtin_ia32_vtestzps"
}
break;
}
break;
case 'z': // 1 string to match.
if (BuiltinName.substr(17, 6) != "eroall")
break;
return Intrinsic::x86_avx_vzeroall; // "__builtin_ia32_vzeroall"
}
break;
}
break;
case 24: // 117 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'a': // 3 strings to match.
if (BuiltinName.substr(16, 2) != "es")
break;
switch (BuiltinName[18]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(19, 5) != "ec128")
break;
return Intrinsic::x86_aesni_aesdec; // "__builtin_ia32_aesdec128"
case 'e': // 1 string to match.
if (BuiltinName.substr(19, 5) != "nc128")
break;
return Intrinsic::x86_aesni_aesenc; // "__builtin_ia32_aesenc128"
case 'i': // 1 string to match.
if (BuiltinName.substr(19, 5) != "mc128")
break;
return Intrinsic::x86_aesni_aesimc; // "__builtin_ia32_aesimc128"
}
break;
case 'b': // 2 strings to match.
if (BuiltinName.substr(16, 6) != "extr_u")
break;
switch (BuiltinName[22]) {
default: break;
case '3': // 1 string to match.
if (BuiltinName[23] != '2')
break;
return Intrinsic::x86_bmi_bextr_32; // "__builtin_ia32_bextr_u32"
case '6': // 1 string to match.
if (BuiltinName[23] != '4')
break;
return Intrinsic::x86_bmi_bextr_64; // "__builtin_ia32_bextr_u64"
}
break;
case 'c': // 7 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'o': // 1 string to match.
if (BuiltinName.substr(17, 7) != "misdneq")
break;
return Intrinsic::x86_sse2_comineq_sd; // "__builtin_ia32_comisdneq"
case 'v': // 6 strings to match.
if (BuiltinName.substr(17, 2) != "tt")
break;
switch (BuiltinName[19]) {
default: break;
case 'p': // 4 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[21] != '2')
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[23] != 'q')
break;
return Intrinsic::x86_sse2_cvttpd2dq; // "__builtin_ia32_cvttpd2dq"
case 'p': // 1 string to match.
if (BuiltinName[23] != 'i')
break;
return Intrinsic::x86_sse_cvttpd2pi; // "__builtin_ia32_cvttpd2pi"
}
break;
case 's': // 2 strings to match.
if (BuiltinName[21] != '2')
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName[23] != 'q')
break;
return Intrinsic::x86_sse2_cvttps2dq; // "__builtin_ia32_cvttps2dq"
case 'p': // 1 string to match.
if (BuiltinName[23] != 'i')
break;
return Intrinsic::x86_sse_cvttps2pi; // "__builtin_ia32_cvttps2pi"
}
break;
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(21, 3) != "2si")
break;
return Intrinsic::x86_sse2_cvttsd2si; // "__builtin_ia32_cvttsd2si"
case 's': // 1 string to match.
if (BuiltinName.substr(21, 3) != "2si")
break;
return Intrinsic::x86_sse_cvttss2si; // "__builtin_ia32_cvttss2si"
}
break;
}
break;
}
break;
case 'h': // 4 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "ddp")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(21, 3) != "256")
break;
return Intrinsic::x86_avx_hadd_pd_256; // "__builtin_ia32_haddpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(21, 3) != "256")
break;
return Intrinsic::x86_avx_hadd_ps_256; // "__builtin_ia32_haddps256"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "ubp")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(21, 3) != "256")
break;
return Intrinsic::x86_avx_hsub_pd_256; // "__builtin_ia32_hsubpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(21, 3) != "256")
break;
return Intrinsic::x86_avx_hsub_ps_256; // "__builtin_ia32_hsubps256"
}
break;
}
break;
case 'm': // 2 strings to match.
if (BuiltinName.substr(16, 7) != "askload")
break;
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_maskload_d; // "__builtin_ia32_maskloadd"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_maskload_q; // "__builtin_ia32_maskloadq"
}
break;
case 'p': // 82 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 4 strings to match.
if (BuiltinName.substr(17, 3) != "dds")
break;
switch (BuiltinName[20]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_padds_b; // "__builtin_ia32_paddsb128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_padds_b; // "__builtin_ia32_paddsb256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_padds_w; // "__builtin_ia32_paddsw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_padds_w; // "__builtin_ia32_paddsw256"
}
break;
}
break;
case 'e': // 1 string to match.
if (BuiltinName.substr(17, 7) != "rmti256")
break;
return Intrinsic::x86_avx2_vperm2i128; // "__builtin_ia32_permti256"
case 'h': // 8 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 4 strings to match.
if (BuiltinName.substr(18, 2) != "dd")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_ssse3_phadd_d_128; // "__builtin_ia32_phaddd128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_phadd_d; // "__builtin_ia32_phaddd256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_ssse3_phadd_w_128; // "__builtin_ia32_phaddw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_phadd_w; // "__builtin_ia32_phaddw256"
}
break;
}
break;
case 's': // 4 strings to match.
if (BuiltinName.substr(18, 2) != "ub")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_ssse3_phsub_d_128; // "__builtin_ia32_phsubd128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_phsub_d; // "__builtin_ia32_phsubd256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_ssse3_phsub_w_128; // "__builtin_ia32_phsubw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_phsub_w; // "__builtin_ia32_phsubw256"
}
break;
}
break;
}
break;
case 'm': // 29 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 13 strings to match.
switch (BuiltinName[18]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(19, 5) != "dubsw")
break;
return Intrinsic::x86_ssse3_pmadd_ub_sw; // "__builtin_ia32_pmaddubsw"
case 'x': // 12 strings to match.
switch (BuiltinName[19]) {
default: break;
case 's': // 6 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_pmaxsb; // "__builtin_ia32_pmaxsb128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmaxs_b; // "__builtin_ia32_pmaxsb256"
}
break;
case 'd': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_pmaxsd; // "__builtin_ia32_pmaxsd128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmaxs_d; // "__builtin_ia32_pmaxsd256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_pmaxs_w; // "__builtin_ia32_pmaxsw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmaxs_w; // "__builtin_ia32_pmaxsw256"
}
break;
}
break;
case 'u': // 6 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_pmaxu_b; // "__builtin_ia32_pmaxub128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmaxu_b; // "__builtin_ia32_pmaxub256"
}
break;
case 'd': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_pmaxud; // "__builtin_ia32_pmaxud128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmaxu_d; // "__builtin_ia32_pmaxud256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_pmaxuw; // "__builtin_ia32_pmaxuw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmaxu_w; // "__builtin_ia32_pmaxuw256"
}
break;
}
break;
}
break;
}
break;
case 'i': // 12 strings to match.
if (BuiltinName[18] != 'n')
break;
switch (BuiltinName[19]) {
default: break;
case 's': // 6 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_pminsb; // "__builtin_ia32_pminsb128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmins_b; // "__builtin_ia32_pminsb256"
}
break;
case 'd': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_pminsd; // "__builtin_ia32_pminsd128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmins_d; // "__builtin_ia32_pminsd256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_pmins_w; // "__builtin_ia32_pminsw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmins_w; // "__builtin_ia32_pminsw256"
}
break;
}
break;
case 'u': // 6 strings to match.
switch (BuiltinName[20]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_pminu_b; // "__builtin_ia32_pminub128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pminu_b; // "__builtin_ia32_pminub256"
}
break;
case 'd': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_pminud; // "__builtin_ia32_pminud128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pminu_d; // "__builtin_ia32_pminud256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_pminuw; // "__builtin_ia32_pminuw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pminu_w; // "__builtin_ia32_pminuw256"
}
break;
}
break;
}
break;
case 'u': // 4 strings to match.
if (BuiltinName[18] != 'l')
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[20] != 'q')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_pmuldq; // "__builtin_ia32_pmuldq128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmul_dq; // "__builtin_ia32_pmuldq256"
}
break;
case 'h': // 2 strings to match.
if (BuiltinName[20] != 'w')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_pmulh_w; // "__builtin_ia32_pmulhw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pmulh_w; // "__builtin_ia32_pmulhw256"
}
break;
}
break;
}
break;
case 's': // 30 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(18, 3) != "dbw")
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_psad_bw; // "__builtin_ia32_psadbw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psad_bw; // "__builtin_ia32_psadbw256"
}
break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(18, 3) != "ufb")
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_ssse3_pshuf_b_128; // "__builtin_ia32_pshufb128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pshuf_b; // "__builtin_ia32_pshufb256"
}
break;
case 'i': // 6 strings to match.
if (BuiltinName.substr(18, 2) != "gn")
break;
switch (BuiltinName[20]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_ssse3_psign_b_128; // "__builtin_ia32_psignb128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psign_b; // "__builtin_ia32_psignb256"
}
break;
case 'd': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_ssse3_psign_d_128; // "__builtin_ia32_psignd128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psign_d; // "__builtin_ia32_psignd256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_ssse3_psign_w_128; // "__builtin_ia32_psignw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psign_w; // "__builtin_ia32_psignw256"
}
break;
}
break;
case 'l': // 6 strings to match.
if (BuiltinName[18] != 'l')
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[20] != 'i')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_pslli_d; // "__builtin_ia32_pslldi128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pslli_d; // "__builtin_ia32_pslldi256"
}
break;
case 'q': // 2 strings to match.
if (BuiltinName[20] != 'i')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_pslli_q; // "__builtin_ia32_psllqi128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pslli_q; // "__builtin_ia32_psllqi256"
}
break;
case 'w': // 2 strings to match.
if (BuiltinName[20] != 'i')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_pslli_w; // "__builtin_ia32_psllwi128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_pslli_w; // "__builtin_ia32_psllwi256"
}
break;
}
break;
case 'r': // 10 strings to match.
switch (BuiltinName[18]) {
default: break;
case 'a': // 4 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[20] != 'i')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_psrai_d; // "__builtin_ia32_psradi128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psrai_d; // "__builtin_ia32_psradi256"
}
break;
case 'w': // 2 strings to match.
if (BuiltinName[20] != 'i')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_psrai_w; // "__builtin_ia32_psrawi128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psrai_w; // "__builtin_ia32_psrawi256"
}
break;
}
break;
case 'l': // 6 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[20] != 'i')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_psrli_d; // "__builtin_ia32_psrldi128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psrli_d; // "__builtin_ia32_psrldi256"
}
break;
case 'q': // 2 strings to match.
if (BuiltinName[20] != 'i')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_psrli_q; // "__builtin_ia32_psrlqi128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psrli_q; // "__builtin_ia32_psrlqi256"
}
break;
case 'w': // 2 strings to match.
if (BuiltinName[20] != 'i')
break;
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_psrli_w; // "__builtin_ia32_psrlwi128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psrli_w; // "__builtin_ia32_psrlwi256"
}
break;
}
break;
}
break;
case 'u': // 4 strings to match.
if (BuiltinName.substr(18, 2) != "bs")
break;
switch (BuiltinName[20]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_psubs_b; // "__builtin_ia32_psubsb128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psubs_b; // "__builtin_ia32_psubsb256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse2_psubs_w; // "__builtin_ia32_psubsw128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx2_psubs_w; // "__builtin_ia32_psubsw256"
}
break;
}
break;
}
break;
case 't': // 4 strings to match.
if (BuiltinName.substr(17, 3) != "est")
break;
switch (BuiltinName[20]) {
default: break;
case 'c': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_ptestc; // "__builtin_ia32_ptestc128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx_ptestc_256; // "__builtin_ia32_ptestc256"
}
break;
case 'z': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(22, 2) != "28")
break;
return Intrinsic::x86_sse41_ptestz; // "__builtin_ia32_ptestz128"
case '2': // 1 string to match.
if (BuiltinName.substr(22, 2) != "56")
break;
return Intrinsic::x86_avx_ptestz_256; // "__builtin_ia32_ptestz256"
}
break;
}
break;
case 'u': // 6 strings to match.
if (BuiltinName.substr(17, 4) != "npck")
break;
switch (BuiltinName[21]) {
default: break;
case 'h': // 3 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[23] != 'w')
break;
return Intrinsic::x86_mmx_punpckhbw; // "__builtin_ia32_punpckhbw"
case 'd': // 1 string to match.
if (BuiltinName[23] != 'q')
break;
return Intrinsic::x86_mmx_punpckhdq; // "__builtin_ia32_punpckhdq"
case 'w': // 1 string to match.
if (BuiltinName[23] != 'd')
break;
return Intrinsic::x86_mmx_punpckhwd; // "__builtin_ia32_punpckhwd"
}
break;
case 'l': // 3 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName[23] != 'w')
break;
return Intrinsic::x86_mmx_punpcklbw; // "__builtin_ia32_punpcklbw"
case 'd': // 1 string to match.
if (BuiltinName[23] != 'q')
break;
return Intrinsic::x86_mmx_punpckldq; // "__builtin_ia32_punpckldq"
case 'w': // 1 string to match.
if (BuiltinName[23] != 'd')
break;
return Intrinsic::x86_mmx_punpcklwd; // "__builtin_ia32_punpcklwd"
}
break;
}
break;
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(16, 4) != "qrtp")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(21, 3) != "256")
break;
return Intrinsic::x86_avx_sqrt_pd_256; // "__builtin_ia32_sqrtpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(21, 3) != "256")
break;
return Intrinsic::x86_avx_sqrt_ps_256; // "__builtin_ia32_sqrtps256"
}
break;
case 'u': // 5 strings to match.
if (BuiltinName.substr(16, 6) != "comisd")
break;
switch (BuiltinName[22]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName[23] != 'q')
break;
return Intrinsic::x86_sse2_ucomieq_sd; // "__builtin_ia32_ucomisdeq"
case 'g': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_sse2_ucomige_sd; // "__builtin_ia32_ucomisdge"
case 't': // 1 string to match.
return Intrinsic::x86_sse2_ucomigt_sd; // "__builtin_ia32_ucomisdgt"
}
break;
case 'l': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'e': // 1 string to match.
return Intrinsic::x86_sse2_ucomile_sd; // "__builtin_ia32_ucomisdle"
case 't': // 1 string to match.
return Intrinsic::x86_sse2_ucomilt_sd; // "__builtin_ia32_ucomisdlt"
}
break;
}
break;
case 'v': // 10 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "vtp")
break;
switch (BuiltinName[20]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(21, 3) != "2ps")
break;
return Intrinsic::x86_vcvtph2ps_128; // "__builtin_ia32_vcvtph2ps"
case 's': // 1 string to match.
if (BuiltinName.substr(21, 3) != "2ph")
break;
return Intrinsic::x86_vcvtps2ph_128; // "__builtin_ia32_vcvtps2ph"
}
break;
case 'f': // 8 strings to match.
if (BuiltinName.substr(17, 2) != "nm")
break;
switch (BuiltinName[19]) {
default: break;
case 'a': // 4 strings to match.
if (BuiltinName.substr(20, 2) != "dd")
break;
switch (BuiltinName[22]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfnmadd_pd; // "__builtin_ia32_vfnmaddpd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfnmadd_ps; // "__builtin_ia32_vfnmaddps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfnmadd_sd; // "__builtin_ia32_vfnmaddsd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfnmadd_ss; // "__builtin_ia32_vfnmaddss"
}
break;
}
break;
case 's': // 4 strings to match.
if (BuiltinName.substr(20, 2) != "ub")
break;
switch (BuiltinName[22]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfnmsub_pd; // "__builtin_ia32_vfnmsubpd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfnmsub_ps; // "__builtin_ia32_vfnmsubps"
}
break;
case 's': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfnmsub_sd; // "__builtin_ia32_vfnmsubsd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfnmsub_ss; // "__builtin_ia32_vfnmsubss"
}
break;
}
break;
}
break;
}
break;
}
break;
case 25: // 58 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'b': // 2 strings to match.
if (BuiltinName.substr(16, 5) != "lendp")
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(22, 3) != "256")
break;
return Intrinsic::x86_avx_blend_pd_256; // "__builtin_ia32_blendpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(22, 3) != "256")
break;
return Intrinsic::x86_avx_blend_ps_256; // "__builtin_ia32_blendps256"
}
break;
case 'c': // 4 strings to match.
if (BuiltinName.substr(16, 3) != "vts")
break;
switch (BuiltinName[19]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(20, 5) != "2si64")
break;
return Intrinsic::x86_sse2_cvtsd2si64; // "__builtin_ia32_cvtsd2si64"
case 'i': // 2 strings to match.
if (BuiltinName.substr(20, 4) != "642s")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_sse2_cvtsi642sd; // "__builtin_ia32_cvtsi642sd"
case 's': // 1 string to match.
return Intrinsic::x86_sse_cvtsi642ss; // "__builtin_ia32_cvtsi642ss"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(20, 5) != "2si64")
break;
return Intrinsic::x86_sse_cvtss2si64; // "__builtin_ia32_cvtss2si64"
}
break;
case 'm': // 10 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 5 strings to match.
if (BuiltinName.substr(17, 2) != "sk")
break;
switch (BuiltinName[19]) {
default: break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(20, 4) != "oadp")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_maskload_pd; // "__builtin_ia32_maskloadpd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_maskload_ps; // "__builtin_ia32_maskloadps"
}
break;
case 'm': // 1 string to match.
if (BuiltinName.substr(20, 5) != "ovdqu")
break;
return Intrinsic::x86_sse2_maskmov_dqu; // "__builtin_ia32_maskmovdqu"
case 's': // 2 strings to match.
if (BuiltinName.substr(20, 4) != "tore")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx2_maskstore_d; // "__builtin_ia32_maskstored"
case 'q': // 1 string to match.
return Intrinsic::x86_avx2_maskstore_q; // "__builtin_ia32_maskstoreq"
}
break;
}
break;
case 'o': // 3 strings to match.
if (BuiltinName.substr(17, 3) != "vnt")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(21, 4) != "q256")
break;
return Intrinsic::x86_avx_movnt_dq_256; // "__builtin_ia32_movntdq256"
case 'p': // 2 strings to match.
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(22, 3) != "256")
break;
return Intrinsic::x86_avx_movnt_pd_256; // "__builtin_ia32_movntpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(22, 3) != "256")
break;
return Intrinsic::x86_avx_movnt_ps_256; // "__builtin_ia32_movntps256"
}
break;
}
break;
case 'p': // 2 strings to match.
if (BuiltinName.substr(17, 5) != "sadbw")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse41_mpsadbw; // "__builtin_ia32_mpsadbw128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_mpsadbw; // "__builtin_ia32_mpsadbw256"
}
break;
}
break;
case 'p': // 26 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 4 strings to match.
if (BuiltinName.substr(17, 4) != "ddus")
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse2_paddus_b; // "__builtin_ia32_paddusb128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_paddus_b; // "__builtin_ia32_paddusb256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse2_paddus_w; // "__builtin_ia32_paddusw128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_paddus_w; // "__builtin_ia32_paddusw256"
}
break;
}
break;
case 'b': // 4 strings to match.
if (BuiltinName.substr(17, 4) != "lend")
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_avx2_pblendd_128; // "__builtin_ia32_pblendd128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_pblendd_256; // "__builtin_ia32_pblendd256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse41_pblendw; // "__builtin_ia32_pblendw128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_pblendw; // "__builtin_ia32_pblendw256"
}
break;
}
break;
case 'h': // 4 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(18, 4) != "ddsw")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_ssse3_phadd_sw_128; // "__builtin_ia32_phaddsw128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_phadd_sw; // "__builtin_ia32_phaddsw256"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(18, 4) != "ubsw")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_ssse3_phsub_sw_128; // "__builtin_ia32_phsubsw128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_phsub_sw; // "__builtin_ia32_phsubsw256"
}
break;
}
break;
case 'm': // 6 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(18, 4) != "ddwd")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse2_pmadd_wd; // "__builtin_ia32_pmaddwd128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_pmadd_wd; // "__builtin_ia32_pmaddwd256"
}
break;
case 'u': // 4 strings to match.
if (BuiltinName[18] != 'l')
break;
switch (BuiltinName[19]) {
default: break;
case 'h': // 2 strings to match.
if (BuiltinName.substr(20, 2) != "uw")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse2_pmulhu_w; // "__builtin_ia32_pmulhuw128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_pmulhu_w; // "__builtin_ia32_pmulhuw256"
}
break;
case 'u': // 2 strings to match.
if (BuiltinName.substr(20, 2) != "dq")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse2_pmulu_dq; // "__builtin_ia32_pmuludq128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_pmulu_dq; // "__builtin_ia32_pmuludq256"
}
break;
}
break;
}
break;
case 's': // 8 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(18, 4) != "ldqi")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse2_psll_dq; // "__builtin_ia32_pslldqi128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_psll_dq; // "__builtin_ia32_pslldqi256"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName.substr(18, 4) != "ldqi")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse2_psrl_dq; // "__builtin_ia32_psrldqi128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_psrl_dq; // "__builtin_ia32_psrldqi256"
}
break;
case 'u': // 4 strings to match.
if (BuiltinName.substr(18, 3) != "bus")
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse2_psubus_b; // "__builtin_ia32_psubusb128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_psubus_b; // "__builtin_ia32_psubusb256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 2) != "28")
break;
return Intrinsic::x86_sse2_psubus_w; // "__builtin_ia32_psubusw128"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 2) != "56")
break;
return Intrinsic::x86_avx2_psubus_w; // "__builtin_ia32_psubusw256"
}
break;
}
break;
}
break;
}
break;
case 'r': // 7 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'd': // 4 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'f': // 2 strings to match.
if (BuiltinName.substr(18, 5) != "sbase")
break;
switch (BuiltinName[23]) {
default: break;
case '3': // 1 string to match.
if (BuiltinName[24] != '2')
break;
return Intrinsic::x86_rdfsbase_32; // "__builtin_ia32_rdfsbase32"
case '6': // 1 string to match.
if (BuiltinName[24] != '4')
break;
return Intrinsic::x86_rdfsbase_64; // "__builtin_ia32_rdfsbase64"
}
break;
case 'g': // 2 strings to match.
if (BuiltinName.substr(18, 5) != "sbase")
break;
switch (BuiltinName[23]) {
default: break;
case '3': // 1 string to match.
if (BuiltinName[24] != '2')
break;
return Intrinsic::x86_rdgsbase_32; // "__builtin_ia32_rdgsbase32"
case '6': // 1 string to match.
if (BuiltinName[24] != '4')
break;
return Intrinsic::x86_rdgsbase_64; // "__builtin_ia32_rdgsbase64"
}
break;
}
break;
case 'o': // 2 strings to match.
if (BuiltinName.substr(17, 4) != "undp")
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(22, 3) != "256")
break;
return Intrinsic::x86_avx_round_pd_256; // "__builtin_ia32_roundpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(22, 3) != "256")
break;
return Intrinsic::x86_avx_round_ps_256; // "__builtin_ia32_roundps256"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(17, 8) != "qrtps256")
break;
return Intrinsic::x86_avx_rsqrt_ps_256; // "__builtin_ia32_rsqrtps256"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(16, 9) != "torelv4si")
break;
return Intrinsic::x86_sse2_storel_dq; // "__builtin_ia32_storelv4si"
case 'u': // 1 string to match.
if (BuiltinName.substr(16, 9) != "comisdneq")
break;
return Intrinsic::x86_sse2_ucomineq_sd; // "__builtin_ia32_ucomisdneq"
case 'v': // 3 strings to match.
switch (BuiltinName[16]) {
default: break;
case 't': // 2 strings to match.
if (BuiltinName.substr(17, 7) != "estnzcp")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_vtestnzc_pd; // "__builtin_ia32_vtestnzcpd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_vtestnzc_ps; // "__builtin_ia32_vtestnzcps"
}
break;
case 'z': // 1 string to match.
if (BuiltinName.substr(17, 8) != "eroupper")
break;
return Intrinsic::x86_avx_vzeroupper; // "__builtin_ia32_vzeroupper"
}
break;
case 'w': // 4 strings to match.
if (BuiltinName[16] != 'r')
break;
switch (BuiltinName[17]) {
default: break;
case 'f': // 2 strings to match.
if (BuiltinName.substr(18, 5) != "sbase")
break;
switch (BuiltinName[23]) {
default: break;
case '3': // 1 string to match.
if (BuiltinName[24] != '2')
break;
return Intrinsic::x86_wrfsbase_32; // "__builtin_ia32_wrfsbase32"
case '6': // 1 string to match.
if (BuiltinName[24] != '4')
break;
return Intrinsic::x86_wrfsbase_64; // "__builtin_ia32_wrfsbase64"
}
break;
case 'g': // 2 strings to match.
if (BuiltinName.substr(18, 5) != "sbase")
break;
switch (BuiltinName[23]) {
default: break;
case '3': // 1 string to match.
if (BuiltinName[24] != '2')
break;
return Intrinsic::x86_wrgsbase_32; // "__builtin_ia32_wrgsbase32"
case '6': // 1 string to match.
if (BuiltinName[24] != '4')
break;
return Intrinsic::x86_wrgsbase_64; // "__builtin_ia32_wrgsbase64"
}
break;
}
break;
}
break;
case 26: // 73 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(16, 6) != "ddsubp")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_addsub_pd_256; // "__builtin_ia32_addsubpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_addsub_ps_256; // "__builtin_ia32_addsubps256"
}
break;
case 'b': // 2 strings to match.
if (BuiltinName.substr(16, 6) != "lendvp")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_blendv_pd_256; // "__builtin_ia32_blendvpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_blendv_ps_256; // "__builtin_ia32_blendvps256"
}
break;
case 'c': // 8 strings to match.
if (BuiltinName.substr(16, 2) != "vt")
break;
switch (BuiltinName[18]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName.substr(19, 3) != "q2p")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_cvtdq2_pd_256; // "__builtin_ia32_cvtdq2pd256"
case 's': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_cvtdq2_ps_256; // "__builtin_ia32_cvtdq2ps256"
}
break;
case 'p': // 4 strings to match.
switch (BuiltinName[19]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[20] != '2')
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(22, 4) != "q256")
break;
return Intrinsic::x86_avx_cvt_pd2dq_256; // "__builtin_ia32_cvtpd2dq256"
case 'p': // 1 string to match.
if (BuiltinName.substr(22, 4) != "s256")
break;
return Intrinsic::x86_avx_cvt_pd2_ps_256; // "__builtin_ia32_cvtpd2ps256"
}
break;
case 's': // 2 strings to match.
if (BuiltinName[20] != '2')
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(22, 4) != "q256")
break;
return Intrinsic::x86_avx_cvt_ps2dq_256; // "__builtin_ia32_cvtps2dq256"
case 'p': // 1 string to match.
if (BuiltinName.substr(22, 4) != "d256")
break;
return Intrinsic::x86_avx_cvt_ps2_pd_256; // "__builtin_ia32_cvtps2pd256"
}
break;
}
break;
case 't': // 2 strings to match.
if (BuiltinName[19] != 's')
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(21, 5) != "2si64")
break;
return Intrinsic::x86_sse2_cvttsd2si64; // "__builtin_ia32_cvttsd2si64"
case 's': // 1 string to match.
if (BuiltinName.substr(21, 5) != "2si64")
break;
return Intrinsic::x86_sse_cvttss2si64; // "__builtin_ia32_cvttss2si64"
}
break;
}
break;
case 'i': // 1 string to match.
if (BuiltinName.substr(16, 10) != "nsertps128")
break;
return Intrinsic::x86_sse41_insertps; // "__builtin_ia32_insertps128"
case 'm': // 5 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(17, 8) != "skstorep")
break;
switch (BuiltinName[25]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_maskstore_pd; // "__builtin_ia32_maskstorepd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_maskstore_ps; // "__builtin_ia32_maskstoreps"
}
break;
case 'o': // 3 strings to match.
if (BuiltinName[17] != 'v')
break;
switch (BuiltinName[18]) {
default: break;
case 'm': // 2 strings to match.
if (BuiltinName.substr(19, 3) != "skp")
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_movmsk_pd_256; // "__builtin_ia32_movmskpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_movmsk_ps_256; // "__builtin_ia32_movmskps256"
}
break;
case 'n': // 1 string to match.
if (BuiltinName.substr(19, 7) != "tdqa256")
break;
return Intrinsic::x86_avx2_movntdqa; // "__builtin_ia32_movntdqa256"
}
break;
}
break;
case 'p': // 40 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'a': // 8 strings to match.
if (BuiltinName.substr(17, 2) != "ck")
break;
switch (BuiltinName[19]) {
default: break;
case 's': // 4 strings to match.
if (BuiltinName[20] != 's')
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[22] != 'w')
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse2_packssdw_128; // "__builtin_ia32_packssdw128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_packssdw; // "__builtin_ia32_packssdw256"
}
break;
case 'w': // 2 strings to match.
if (BuiltinName[22] != 'b')
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse2_packsswb_128; // "__builtin_ia32_packsswb128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_packsswb; // "__builtin_ia32_packsswb256"
}
break;
}
break;
case 'u': // 4 strings to match.
if (BuiltinName[20] != 's')
break;
switch (BuiltinName[21]) {
default: break;
case 'd': // 2 strings to match.
if (BuiltinName[22] != 'w')
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_packusdw; // "__builtin_ia32_packusdw128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_packusdw; // "__builtin_ia32_packusdw256"
}
break;
case 'w': // 2 strings to match.
if (BuiltinName[22] != 'b')
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse2_packuswb_128; // "__builtin_ia32_packuswb128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_packuswb; // "__builtin_ia32_packuswb256"
}
break;
}
break;
}
break;
case 'b': // 2 strings to match.
if (BuiltinName.substr(17, 6) != "lendvb")
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pblendvb; // "__builtin_ia32_pblendvb128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pblendvb; // "__builtin_ia32_pblendvb256"
}
break;
case 'm': // 28 strings to match.
switch (BuiltinName[17]) {
default: break;
case 'o': // 26 strings to match.
if (BuiltinName[18] != 'v')
break;
switch (BuiltinName[19]) {
default: break;
case 'm': // 2 strings to match.
if (BuiltinName.substr(20, 3) != "skb")
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse2_pmovmskb_128; // "__builtin_ia32_pmovmskb128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovmskb; // "__builtin_ia32_pmovmskb256"
}
break;
case 's': // 12 strings to match.
if (BuiltinName[20] != 'x')
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 6 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovsxbd; // "__builtin_ia32_pmovsxbd128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovsxbd; // "__builtin_ia32_pmovsxbd256"
}
break;
case 'q': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovsxbq; // "__builtin_ia32_pmovsxbq128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovsxbq; // "__builtin_ia32_pmovsxbq256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovsxbw; // "__builtin_ia32_pmovsxbw128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovsxbw; // "__builtin_ia32_pmovsxbw256"
}
break;
}
break;
case 'd': // 2 strings to match.
if (BuiltinName[22] != 'q')
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovsxdq; // "__builtin_ia32_pmovsxdq128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovsxdq; // "__builtin_ia32_pmovsxdq256"
}
break;
case 'w': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovsxwd; // "__builtin_ia32_pmovsxwd128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovsxwd; // "__builtin_ia32_pmovsxwd256"
}
break;
case 'q': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovsxwq; // "__builtin_ia32_pmovsxwq128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovsxwq; // "__builtin_ia32_pmovsxwq256"
}
break;
}
break;
}
break;
case 'z': // 12 strings to match.
if (BuiltinName[20] != 'x')
break;
switch (BuiltinName[21]) {
default: break;
case 'b': // 6 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovzxbd; // "__builtin_ia32_pmovzxbd128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovzxbd; // "__builtin_ia32_pmovzxbd256"
}
break;
case 'q': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovzxbq; // "__builtin_ia32_pmovzxbq128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovzxbq; // "__builtin_ia32_pmovzxbq256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovzxbw; // "__builtin_ia32_pmovzxbw128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovzxbw; // "__builtin_ia32_pmovzxbw256"
}
break;
}
break;
case 'd': // 2 strings to match.
if (BuiltinName[22] != 'q')
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovzxdq; // "__builtin_ia32_pmovzxdq128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovzxdq; // "__builtin_ia32_pmovzxdq256"
}
break;
case 'w': // 4 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovzxwd; // "__builtin_ia32_pmovzxwd128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovzxwd; // "__builtin_ia32_pmovzxwd256"
}
break;
case 'q': // 2 strings to match.
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_pmovzxwq; // "__builtin_ia32_pmovzxwq128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmovzxwq; // "__builtin_ia32_pmovzxwq256"
}
break;
}
break;
}
break;
}
break;
case 'u': // 2 strings to match.
if (BuiltinName.substr(18, 5) != "lhrsw")
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_ssse3_pmul_hr_sw_128; // "__builtin_ia32_pmulhrsw128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx2_pmul_hr_sw; // "__builtin_ia32_pmulhrsw256"
}
break;
}
break;
case 't': // 2 strings to match.
if (BuiltinName.substr(17, 6) != "estnzc")
break;
switch (BuiltinName[23]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(24, 2) != "28")
break;
return Intrinsic::x86_sse41_ptestnzc; // "__builtin_ia32_ptestnzc128"
case '2': // 1 string to match.
if (BuiltinName.substr(24, 2) != "56")
break;
return Intrinsic::x86_avx_ptestnzc_256; // "__builtin_ia32_ptestnzc256"
}
break;
}
break;
case 's': // 3 strings to match.
if (BuiltinName.substr(16, 4) != "tore")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(21, 5) != "qu256")
break;
return Intrinsic::x86_avx_storeu_dq_256; // "__builtin_ia32_storedqu256"
case 'u': // 2 strings to match.
if (BuiltinName[21] != 'p')
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_storeu_pd_256; // "__builtin_ia32_storeupd256"
case 's': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_storeu_ps_256; // "__builtin_ia32_storeups256"
}
break;
}
break;
case 'v': // 12 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'f': // 8 strings to match.
if (BuiltinName[17] != 'm')
break;
switch (BuiltinName[18]) {
default: break;
case 'a': // 4 strings to match.
if (BuiltinName.substr(19, 2) != "dd")
break;
switch (BuiltinName[21]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_fma4_vfmadd_pd_256; // "__builtin_ia32_vfmaddpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_fma4_vfmadd_ps_256; // "__builtin_ia32_vfmaddps256"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(22, 3) != "ubp")
break;
switch (BuiltinName[25]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmaddsub_pd; // "__builtin_ia32_vfmaddsubpd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmaddsub_ps; // "__builtin_ia32_vfmaddsubps"
}
break;
}
break;
case 's': // 4 strings to match.
if (BuiltinName.substr(19, 2) != "ub")
break;
switch (BuiltinName[21]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(22, 3) != "ddp")
break;
switch (BuiltinName[25]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_fma4_vfmsubadd_pd; // "__builtin_ia32_vfmsubaddpd"
case 's': // 1 string to match.
return Intrinsic::x86_fma4_vfmsubadd_ps; // "__builtin_ia32_vfmsubaddps"
}
break;
case 'p': // 2 strings to match.
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_fma4_vfmsub_pd_256; // "__builtin_ia32_vfmsubpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_fma4_vfmsub_ps_256; // "__builtin_ia32_vfmsubps256"
}
break;
}
break;
}
break;
case 't': // 4 strings to match.
if (BuiltinName.substr(17, 3) != "est")
break;
switch (BuiltinName[20]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName[21] != 'p')
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_vtestc_pd_256; // "__builtin_ia32_vtestcpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_vtestc_ps_256; // "__builtin_ia32_vtestcps256"
}
break;
case 'z': // 2 strings to match.
if (BuiltinName[21] != 'p')
break;
switch (BuiltinName[22]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_vtestz_pd_256; // "__builtin_ia32_vtestzpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(23, 3) != "256")
break;
return Intrinsic::x86_avx_vtestz_ps_256; // "__builtin_ia32_vtestzps256"
}
break;
}
break;
}
break;
}
break;
case 27: // 24 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'c': // 2 strings to match.
if (BuiltinName.substr(16, 4) != "vttp")
break;
switch (BuiltinName[20]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(21, 6) != "2dq256")
break;
return Intrinsic::x86_avx_cvtt_pd2dq_256; // "__builtin_ia32_cvttpd2dq256"
case 's': // 1 string to match.
if (BuiltinName.substr(21, 6) != "2dq256")
break;
return Intrinsic::x86_avx_cvtt_ps2dq_256; // "__builtin_ia32_cvttps2dq256"
}
break;
case 'e': // 1 string to match.
if (BuiltinName.substr(16, 11) != "xtractps128")
break;
return Intrinsic::x86_sse41_extractps; // "__builtin_ia32_extractps128"
case 'm': // 2 strings to match.
if (BuiltinName.substr(16, 7) != "askload")
break;
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(24, 3) != "256")
break;
return Intrinsic::x86_avx2_maskload_d_256; // "__builtin_ia32_maskloadd256"
case 'q': // 1 string to match.
if (BuiltinName.substr(24, 3) != "256")
break;
return Intrinsic::x86_avx2_maskload_q_256; // "__builtin_ia32_maskloadq256"
}
break;
case 'p': // 8 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'c': // 4 strings to match.
if (BuiltinName.substr(17, 2) != "mp")
break;
switch (BuiltinName[19]) {
default: break;
case 'e': // 2 strings to match.
if (BuiltinName.substr(20, 3) != "str")
break;
switch (BuiltinName[23]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(24, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestri128; // "__builtin_ia32_pcmpestri128"
case 'm': // 1 string to match.
if (BuiltinName.substr(24, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestrm128; // "__builtin_ia32_pcmpestrm128"
}
break;
case 'i': // 2 strings to match.
if (BuiltinName.substr(20, 3) != "str")
break;
switch (BuiltinName[23]) {
default: break;
case 'i': // 1 string to match.
if (BuiltinName.substr(24, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistri128; // "__builtin_ia32_pcmpistri128"
case 'm': // 1 string to match.
if (BuiltinName.substr(24, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistrm128; // "__builtin_ia32_pcmpistrm128"
}
break;
}
break;
case 'e': // 2 strings to match.
if (BuiltinName.substr(17, 6) != "rmvars")
break;
switch (BuiltinName[23]) {
default: break;
case 'f': // 1 string to match.
if (BuiltinName.substr(24, 3) != "256")
break;
return Intrinsic::x86_avx2_permps; // "__builtin_ia32_permvarsf256"
case 'i': // 1 string to match.
if (BuiltinName.substr(24, 3) != "256")
break;
return Intrinsic::x86_avx2_permd; // "__builtin_ia32_permvarsi256"
}
break;
case 'm': // 2 strings to match.
if (BuiltinName.substr(17, 7) != "addubsw")
break;
switch (BuiltinName[24]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(25, 2) != "28")
break;
return Intrinsic::x86_ssse3_pmadd_ub_sw_128; // "__builtin_ia32_pmaddubsw128"
case '2': // 1 string to match.
if (BuiltinName.substr(25, 2) != "56")
break;
return Intrinsic::x86_avx2_pmadd_ub_sw; // "__builtin_ia32_pmaddubsw256"
}
break;
}
break;
case 'v': // 11 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'b': // 1 string to match.
if (BuiltinName.substr(17, 10) != "roadcastss")
break;
return Intrinsic::x86_avx_vbroadcast_ss; // "__builtin_ia32_vbroadcastss"
case 'c': // 2 strings to match.
if (BuiltinName.substr(17, 3) != "vtp")
break;
switch (BuiltinName[20]) {
default: break;
case 'h': // 1 string to match.
if (BuiltinName.substr(21, 6) != "2ps256")
break;
return Intrinsic::x86_vcvtph2ps_256; // "__builtin_ia32_vcvtph2ps256"
case 's': // 1 string to match.
if (BuiltinName.substr(21, 6) != "2ph256")
break;
return Intrinsic::x86_vcvtps2ph_256; // "__builtin_ia32_vcvtps2ph256"
}
break;
case 'e': // 2 strings to match.
if (BuiltinName.substr(17, 2) != "c_")
break;
switch (BuiltinName[19]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(20, 7) != "xt_v4hi")
break;
return Intrinsic::x86_mmx_pextr_w; // "__builtin_ia32_vec_ext_v4hi"
case 's': // 1 string to match.
if (BuiltinName.substr(20, 7) != "et_v4hi")
break;
return Intrinsic::x86_mmx_pinsr_w; // "__builtin_ia32_vec_set_v4hi"
}
break;
case 'f': // 4 strings to match.
if (BuiltinName.substr(17, 2) != "nm")
break;
switch (BuiltinName[19]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(20, 3) != "ddp")
break;
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(24, 3) != "256")
break;
return Intrinsic::x86_fma4_vfnmadd_pd_256; // "__builtin_ia32_vfnmaddpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(24, 3) != "256")
break;
return Intrinsic::x86_fma4_vfnmadd_ps_256; // "__builtin_ia32_vfnmaddps256"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(20, 3) != "ubp")
break;
switch (BuiltinName[23]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(24, 3) != "256")
break;
return Intrinsic::x86_fma4_vfnmsub_pd_256; // "__builtin_ia32_vfnmsubpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(24, 3) != "256")
break;
return Intrinsic::x86_fma4_vfnmsub_ps_256; // "__builtin_ia32_vfnmsubps256"
}
break;
}
break;
case 'p': // 2 strings to match.
if (BuiltinName.substr(17, 9) != "ermilvarp")
break;
switch (BuiltinName[26]) {
default: break;
case 'd': // 1 string to match.
return Intrinsic::x86_avx_vpermilvar_pd; // "__builtin_ia32_vpermilvarpd"
case 's': // 1 string to match.
return Intrinsic::x86_avx_vpermilvar_ps; // "__builtin_ia32_vpermilvarps"
}
break;
}
break;
}
break;
case 28: // 20 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(16, 2) != "es")
break;
switch (BuiltinName[18]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(19, 9) != "eclast128")
break;
return Intrinsic::x86_aesni_aesdeclast; // "__builtin_ia32_aesdeclast128"
case 'e': // 1 string to match.
if (BuiltinName.substr(19, 9) != "nclast128")
break;
return Intrinsic::x86_aesni_aesenclast; // "__builtin_ia32_aesenclast128"
}
break;
case 'i': // 1 string to match.
if (BuiltinName.substr(16, 12) != "nsert128i256")
break;
return Intrinsic::x86_avx2_vinserti128; // "__builtin_ia32_insert128i256"
case 'm': // 4 strings to match.
if (BuiltinName.substr(16, 3) != "ask")
break;
switch (BuiltinName[19]) {
default: break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(20, 4) != "oadp")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(25, 3) != "256")
break;
return Intrinsic::x86_avx_maskload_pd_256; // "__builtin_ia32_maskloadpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(25, 3) != "256")
break;
return Intrinsic::x86_avx_maskload_ps_256; // "__builtin_ia32_maskloadps256"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(20, 4) != "tore")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(25, 3) != "256")
break;
return Intrinsic::x86_avx2_maskstore_d_256; // "__builtin_ia32_maskstored256"
case 'q': // 1 string to match.
if (BuiltinName.substr(25, 3) != "256")
break;
return Intrinsic::x86_avx2_maskstore_q_256; // "__builtin_ia32_maskstoreq256"
}
break;
}
break;
case 'p': // 11 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'c': // 10 strings to match.
if (BuiltinName.substr(17, 2) != "mp")
break;
switch (BuiltinName[19]) {
default: break;
case 'e': // 5 strings to match.
if (BuiltinName.substr(20, 4) != "stri")
break;
switch (BuiltinName[24]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestria128; // "__builtin_ia32_pcmpestria128"
case 'c': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestric128; // "__builtin_ia32_pcmpestric128"
case 'o': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestrio128; // "__builtin_ia32_pcmpestrio128"
case 's': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestris128; // "__builtin_ia32_pcmpestris128"
case 'z': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpestriz128; // "__builtin_ia32_pcmpestriz128"
}
break;
case 'i': // 5 strings to match.
if (BuiltinName.substr(20, 4) != "stri")
break;
switch (BuiltinName[24]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistria128; // "__builtin_ia32_pcmpistria128"
case 'c': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistric128; // "__builtin_ia32_pcmpistric128"
case 'o': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistrio128; // "__builtin_ia32_pcmpistrio128"
case 's': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistris128; // "__builtin_ia32_pcmpistris128"
case 'z': // 1 string to match.
if (BuiltinName.substr(25, 3) != "128")
break;
return Intrinsic::x86_sse42_pcmpistriz128; // "__builtin_ia32_pcmpistriz128"
}
break;
}
break;
case 'h': // 1 string to match.
if (BuiltinName.substr(17, 11) != "minposuw128")
break;
return Intrinsic::x86_sse41_phminposuw; // "__builtin_ia32_phminposuw128"
}
break;
case 'v': // 2 strings to match.
if (BuiltinName.substr(16, 8) != "testnzcp")
break;
switch (BuiltinName[24]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(25, 3) != "256")
break;
return Intrinsic::x86_avx_vtestnzc_pd_256; // "__builtin_ia32_vtestnzcpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(25, 3) != "256")
break;
return Intrinsic::x86_avx_vtestnzc_ps_256; // "__builtin_ia32_vtestnzcps256"
}
break;
}
break;
case 29: // 15 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'e': // 1 string to match.
if (BuiltinName.substr(16, 13) != "xtract128i256")
break;
return Intrinsic::x86_avx2_vextracti128; // "__builtin_ia32_extract128i256"
case 'm': // 2 strings to match.
if (BuiltinName.substr(16, 9) != "askstorep")
break;
switch (BuiltinName[25]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(26, 3) != "256")
break;
return Intrinsic::x86_avx_maskstore_pd_256; // "__builtin_ia32_maskstorepd256"
case 's': // 1 string to match.
if (BuiltinName.substr(26, 3) != "256")
break;
return Intrinsic::x86_avx_maskstore_ps_256; // "__builtin_ia32_maskstoreps256"
}
break;
case 'p': // 8 strings to match.
if (BuiltinName.substr(16, 9) != "broadcast")
break;
switch (BuiltinName[25]) {
default: break;
case 'b': // 2 strings to match.
switch (BuiltinName[26]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(27, 2) != "28")
break;
return Intrinsic::x86_avx2_pbroadcastb_128; // "__builtin_ia32_pbroadcastb128"
case '2': // 1 string to match.
if (BuiltinName.substr(27, 2) != "56")
break;
return Intrinsic::x86_avx2_pbroadcastb_256; // "__builtin_ia32_pbroadcastb256"
}
break;
case 'd': // 2 strings to match.
switch (BuiltinName[26]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(27, 2) != "28")
break;
return Intrinsic::x86_avx2_pbroadcastd_128; // "__builtin_ia32_pbroadcastd128"
case '2': // 1 string to match.
if (BuiltinName.substr(27, 2) != "56")
break;
return Intrinsic::x86_avx2_pbroadcastd_256; // "__builtin_ia32_pbroadcastd256"
}
break;
case 'q': // 2 strings to match.
switch (BuiltinName[26]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(27, 2) != "28")
break;
return Intrinsic::x86_avx2_pbroadcastq_128; // "__builtin_ia32_pbroadcastq128"
case '2': // 1 string to match.
if (BuiltinName.substr(27, 2) != "56")
break;
return Intrinsic::x86_avx2_pbroadcastq_256; // "__builtin_ia32_pbroadcastq256"
}
break;
case 'w': // 2 strings to match.
switch (BuiltinName[26]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(27, 2) != "28")
break;
return Intrinsic::x86_avx2_pbroadcastw_128; // "__builtin_ia32_pbroadcastw128"
case '2': // 1 string to match.
if (BuiltinName.substr(27, 2) != "56")
break;
return Intrinsic::x86_avx2_pbroadcastw_256; // "__builtin_ia32_pbroadcastw256"
}
break;
}
break;
case 'v': // 4 strings to match.
if (BuiltinName.substr(16, 2) != "fm")
break;
switch (BuiltinName[18]) {
default: break;
case 'a': // 2 strings to match.
if (BuiltinName.substr(19, 6) != "ddsubp")
break;
switch (BuiltinName[25]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(26, 3) != "256")
break;
return Intrinsic::x86_fma4_vfmaddsub_pd_256; // "__builtin_ia32_vfmaddsubpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(26, 3) != "256")
break;
return Intrinsic::x86_fma4_vfmaddsub_ps_256; // "__builtin_ia32_vfmaddsubps256"
}
break;
case 's': // 2 strings to match.
if (BuiltinName.substr(19, 6) != "ubaddp")
break;
switch (BuiltinName[25]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(26, 3) != "256")
break;
return Intrinsic::x86_fma4_vfmsubadd_pd_256; // "__builtin_ia32_vfmsubaddpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(26, 3) != "256")
break;
return Intrinsic::x86_fma4_vfmsubadd_ps_256; // "__builtin_ia32_vfmsubaddps256"
}
break;
}
break;
}
break;
case 30: // 6 strings to match.
if (BuiltinName.substr(0, 16) != "__builtin_ia32_v")
break;
switch (BuiltinName[16]) {
default: break;
case 'b': // 4 strings to match.
if (BuiltinName.substr(17, 9) != "roadcasts")
break;
switch (BuiltinName[26]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(27, 3) != "256")
break;
return Intrinsic::x86_avx_vbroadcast_sd_256; // "__builtin_ia32_vbroadcastsd256"
case 'i': // 1 string to match.
if (BuiltinName.substr(27, 3) != "256")
break;
return Intrinsic::x86_avx2_vbroadcasti128; // "__builtin_ia32_vbroadcastsi256"
case 's': // 2 strings to match.
switch (BuiltinName[27]) {
default: break;
case '2': // 1 string to match.
if (BuiltinName.substr(28, 2) != "56")
break;
return Intrinsic::x86_avx_vbroadcast_ss_256; // "__builtin_ia32_vbroadcastss256"
case '_': // 1 string to match.
if (BuiltinName.substr(28, 2) != "ps")
break;
return Intrinsic::x86_avx2_vbroadcast_ss_ps; // "__builtin_ia32_vbroadcastss_ps"
}
break;
}
break;
case 'p': // 2 strings to match.
if (BuiltinName.substr(17, 9) != "ermilvarp")
break;
switch (BuiltinName[26]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(27, 3) != "256")
break;
return Intrinsic::x86_avx_vpermilvar_pd_256; // "__builtin_ia32_vpermilvarpd256"
case 's': // 1 string to match.
if (BuiltinName.substr(27, 3) != "256")
break;
return Intrinsic::x86_avx_vpermilvar_ps_256; // "__builtin_ia32_vpermilvarps256"
}
break;
}
break;
case 31: // 3 strings to match.
if (BuiltinName.substr(0, 26) != "__builtin_ia32_vperm2f128_")
break;
switch (BuiltinName[26]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[27]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(28, 3) != "256")
break;
return Intrinsic::x86_avx_vperm2f128_pd_256; // "__builtin_ia32_vperm2f128_pd256"
case 's': // 1 string to match.
if (BuiltinName.substr(28, 3) != "256")
break;
return Intrinsic::x86_avx_vperm2f128_ps_256; // "__builtin_ia32_vperm2f128_ps256"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(27, 4) != "i256")
break;
return Intrinsic::x86_avx_vperm2f128_si_256; // "__builtin_ia32_vperm2f128_si256"
}
break;
case 32: // 3 strings to match.
if (BuiltinName.substr(0, 27) != "__builtin_ia32_vinsertf128_")
break;
switch (BuiltinName[27]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[28]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(29, 3) != "256")
break;
return Intrinsic::x86_avx_vinsertf128_pd_256; // "__builtin_ia32_vinsertf128_pd256"
case 's': // 1 string to match.
if (BuiltinName.substr(29, 3) != "256")
break;
return Intrinsic::x86_avx_vinsertf128_ps_256; // "__builtin_ia32_vinsertf128_ps256"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(28, 4) != "i256")
break;
return Intrinsic::x86_avx_vinsertf128_si_256; // "__builtin_ia32_vinsertf128_si256"
}
break;
case 33: // 6 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'a': // 1 string to match.
if (BuiltinName.substr(16, 17) != "eskeygenassist128")
break;
return Intrinsic::x86_aesni_aeskeygenassist; // "__builtin_ia32_aeskeygenassist128"
case 'v': // 5 strings to match.
switch (BuiltinName[16]) {
default: break;
case 'b': // 2 strings to match.
if (BuiltinName.substr(17, 9) != "roadcasts")
break;
switch (BuiltinName[26]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(27, 6) != "_pd256")
break;
return Intrinsic::x86_avx2_vbroadcast_sd_pd_256; // "__builtin_ia32_vbroadcastsd_pd256"
case 's': // 1 string to match.
if (BuiltinName.substr(27, 6) != "_ps256")
break;
return Intrinsic::x86_avx2_vbroadcast_ss_ps_256; // "__builtin_ia32_vbroadcastss_ps256"
}
break;
case 'e': // 3 strings to match.
if (BuiltinName.substr(17, 11) != "xtractf128_")
break;
switch (BuiltinName[28]) {
default: break;
case 'p': // 2 strings to match.
switch (BuiltinName[29]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(30, 3) != "256")
break;
return Intrinsic::x86_avx_vextractf128_pd_256; // "__builtin_ia32_vextractf128_pd256"
case 's': // 1 string to match.
if (BuiltinName.substr(30, 3) != "256")
break;
return Intrinsic::x86_avx_vextractf128_ps_256; // "__builtin_ia32_vextractf128_ps256"
}
break;
case 's': // 1 string to match.
if (BuiltinName.substr(29, 4) != "i256")
break;
return Intrinsic::x86_avx_vextractf128_si_256; // "__builtin_ia32_vextractf128_si256"
}
break;
}
break;
}
break;
case 35: // 6 strings to match.
if (BuiltinName.substr(0, 15) != "__builtin_ia32_")
break;
switch (BuiltinName[15]) {
default: break;
case 'p': // 4 strings to match.
if (BuiltinName[16] != 's')
break;
switch (BuiltinName[17]) {
default: break;
case 'l': // 2 strings to match.
if (BuiltinName.substr(18, 4) != "ldqi")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 12) != "28_byteshift")
break;
return Intrinsic::x86_sse2_psll_dq_bs; // "__builtin_ia32_pslldqi128_byteshift"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 12) != "56_byteshift")
break;
return Intrinsic::x86_avx2_psll_dq_bs; // "__builtin_ia32_pslldqi256_byteshift"
}
break;
case 'r': // 2 strings to match.
if (BuiltinName.substr(18, 4) != "ldqi")
break;
switch (BuiltinName[22]) {
default: break;
case '1': // 1 string to match.
if (BuiltinName.substr(23, 12) != "28_byteshift")
break;
return Intrinsic::x86_sse2_psrl_dq_bs; // "__builtin_ia32_psrldqi128_byteshift"
case '2': // 1 string to match.
if (BuiltinName.substr(23, 12) != "56_byteshift")
break;
return Intrinsic::x86_avx2_psrl_dq_bs; // "__builtin_ia32_psrldqi256_byteshift"
}
break;
}
break;
case 'v': // 2 strings to match.
if (BuiltinName.substr(16, 15) != "broadcastf128_p")
break;
switch (BuiltinName[31]) {
default: break;
case 'd': // 1 string to match.
if (BuiltinName.substr(32, 3) != "256")
break;
return Intrinsic::x86_avx_vbroadcastf128_pd_256; // "__builtin_ia32_vbroadcastf128_pd256"
case 's': // 1 string to match.
if (BuiltinName.substr(32, 3) != "256")
break;
return Intrinsic::x86_avx_vbroadcastf128_ps_256; // "__builtin_ia32_vbroadcastf128_ps256"
}
break;
}
break;
}
}
return Intrinsic::not_intrinsic;
}
#endif
#if defined(_MSC_VER) && defined(setjmp_undefined_for_msvc)
// let's return it to _setjmp state
# pragma pop_macro("setjmp")
# undef setjmp_undefined_for_msvc
#endif
