From 4059d374ce981827223ab6b1dae7af4ec5f8e74a Mon Sep 17 00:00:00 2001
From: Artem Belevich <tra@google.com>
Date: Thu, 7 Sep 2017 18:14:32 +0000
Subject: [PATCH] [CUDA] Added rudimentary support for CUDA-9 and sm_70.

For now CUDA-9 is not included in the list of CUDA versions clang
searches for, so the path to CUDA-9 must be explicitly passed
via --cuda-path=.

On LLVM side NVPTX added sm_70 GPU type which bumps required
PTX version to 6.0, but otherwise is equivalent to sm_62 at the moment.

Differential Revision: https://reviews.llvm.org/D37576

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312734 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/NVPTX/NVPTX.td           | 5 +++++
 test/CodeGen/NVPTX/sm-version-70.ll | 5 +++++
 2 files changed, 10 insertions(+)
 create mode 100644 test/CodeGen/NVPTX/sm-version-70.ll

diff --git a/lib/Target/NVPTX/NVPTX.td b/lib/Target/NVPTX/NVPTX.td
index c77ddbc9978..aba37d36359 100644
--- a/lib/Target/NVPTX/NVPTX.td
+++ b/lib/Target/NVPTX/NVPTX.td
@@ -50,6 +50,8 @@ def SM61 : SubtargetFeature<"sm_61", "SmVersion", "61",
                              "Target SM 6.1">;
 def SM62 : SubtargetFeature<"sm_62", "SmVersion", "62",
                              "Target SM 6.2">;
+def SM70 : SubtargetFeature<"sm_70", "SmVersion", "70",
+                             "Target SM 7.0">;
 
 def SATOM : SubtargetFeature<"satom", "HasAtomScope", "true",
                              "Atomic operations with scope">;
@@ -67,6 +69,8 @@ def PTX43 : SubtargetFeature<"ptx43", "PTXVersion", "43",
                              "Use PTX version 4.3">;
 def PTX50 : SubtargetFeature<"ptx50", "PTXVersion", "50",
                              "Use PTX version 5.0">;
+def PTX60 : SubtargetFeature<"ptx60", "PTXVersion", "60",
+                             "Use PTX version 6.0">;
 
 //===----------------------------------------------------------------------===//
 // NVPTX supported processors.
@@ -87,6 +91,7 @@ def : Proc<"sm_53", [SM53, PTX42]>;
 def : Proc<"sm_60", [SM60, PTX50, SATOM]>;
 def : Proc<"sm_61", [SM61, PTX50, SATOM]>;
 def : Proc<"sm_62", [SM62, PTX50, SATOM]>;
+def : Proc<"sm_70", [SM70, PTX60, SATOM]>;
 
 def NVPTXInstrInfo : InstrInfo {
 }
diff --git a/test/CodeGen/NVPTX/sm-version-70.ll b/test/CodeGen/NVPTX/sm-version-70.ll
new file mode 100644
index 00000000000..8b72d50747a
--- /dev/null
+++ b/test/CodeGen/NVPTX/sm-version-70.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_70 | FileCheck %s
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_70 | FileCheck %s
+
+; CHECK: .version 6.0
+; CHECK: .target sm_70