# SPDX-License-Identifier: GPL-2.0
choice
	prompt "SoC Type"
	default META21_FPGA

config META12_FPGA
	bool "Meta 1.2 FPGA"
	select METAG_META12
	help
	  This is a Meta 1.2 FPGA bitstream, just a bare CPU.

config META21_FPGA
	bool "Meta 2.1 FPGA"
	select METAG_META21
	help
	  This is a Meta 2.1 FPGA bitstream, just a bare CPU.

config SOC_TZ1090
	bool "Toumaz Xenif TZ1090 SoC (Comet)"
	select IMGPDC_IRQ
	select METAG_LNKGET_AROUND_CACHE
	select METAG_META21
	select METAG_SMP_WRITE_REORDERING
	select PINCTRL
	select PINCTRL_TZ1090
	select PINCTRL_TZ1090_PDC
	help
	  This is a Toumaz Technology Xenif TZ1090 (A.K.A. Comet) SoC containing
	  a 2-threaded HTP.

endchoice

menu "SoC configuration"

if METAG_META21

# Meta 2.x specific options

config METAG_META21_MMU
	bool "Meta 2.x MMU mode"
	default y
	help
	  Use the Meta 2.x MMU in extended mode.

config METAG_UNALIGNED
	bool "Meta 2.x unaligned access checking"
	default y
	help
	  All memory accesses will be checked for alignment and an exception
	  raised on unaligned accesses. This feature does cost performance
	  but without it there will be no notification of this type of error.

config METAG_USER_TCM
	bool "Meta on-chip memory support for userland"
	select GENERIC_ALLOCATOR
	default y
	help
	  Allow the on-chip memories of Meta SoCs to be used by user
	  applications.

endif

config METAG_HALT_ON_PANIC
	bool "Halt the core on panic"
	help
	  Halt the core when a panic occurs. This is useful when running
	  pre-production silicon or in an FPGA environment.

endmenu