https://github.com/torvalds/linux
- HEAD
- refs/heads/arm64-uaccess
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/certifi-2024.7.4
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/idna-3.7
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/requests-2.32.2
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/setuptools-70.0.0
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/urllib3-2.2.2
- refs/heads/master
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- v2.6.19-rc6
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Tip revision: 40e020c129cfc991e8ab4736d2665351ffd1468d authored by Linus Torvalds on 09 December 2018, 23:31:00 UTC
Linux 4.20-rc6
Linux 4.20-rc6
Tip revision: 40e020c
Kconfig
# SPDX-License-Identifier: GPL-2.0
comment "Processor Type"
# Select CPU types depending on the architecture selected. This selects
# which CPUs we support in the kernel image, and the compiler instruction
# optimiser behaviour.
config CPU_UCV2
def_bool y
comment "Processor Features"
config CPU_ICACHE_DISABLE
bool "Disable I-Cache (I-bit)"
help
Say Y here to disable the processor instruction cache. Unless
you have a reason not to or are unsure, say N.
config CPU_DCACHE_DISABLE
bool "Disable D-Cache (D-bit)"
help
Say Y here to disable the processor data cache. Unless
you have a reason not to or are unsure, say N.
config CPU_DCACHE_WRITETHROUGH
bool "Force write through D-cache"
help
Say Y here to use the data cache in writethrough mode. Unless you
specifically require this or are unsure, say N.
config CPU_DCACHE_LINE_DISABLE
bool "Disable D-cache line ops"
default y
help
Say Y here to disable the data cache line operations.
config CPU_TLB_SINGLE_ENTRY_DISABLE
bool "Disable TLB single entry ops"
default y
help
Say Y here to disable the TLB single entry operations.