https://github.com/torvalds/linux
- HEAD
- refs/heads/arm64-uaccess
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/certifi-2024.7.4
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/idna-3.7
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/requests-2.32.2
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/setuptools-70.0.0
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/urllib3-2.2.2
- refs/heads/master
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Tip revision: f56df2f4db6e4af87fb8e941cff69f4501a111df authored by Linus Torvalds on 31 January 2007, 03:42:57 UTC
Linux 2.6.20-rc7
Linux 2.6.20-rc7
Tip revision: f56df2f
cachectl.h
/*
* cachectl.h -- defines for M32R cache control system calls
*
* Copyright (C) 2003 by Kazuhiro Inaoka
*/
#ifndef __ASM_M32R_CACHECTL
#define __ASM_M32R_CACHECTL
/*
* Options for cacheflush system call
*
* cacheflush() is currently fluch_cache_all().
*/
#define ICACHE (1<<0) /* flush instruction cache */
#define DCACHE (1<<1) /* writeback and flush data cache */
#define BCACHE (ICACHE|DCACHE) /* flush both caches */
/*
* Caching modes for the cachectl(2) call
*
* cachectl(2) is currently not supported and returns ENOSYS.
*/
#define CACHEABLE 0 /* make pages cacheable */
#define UNCACHEABLE 1 /* make pages uncacheable */
#endif /* __ASM_M32R_CACHECTL */