https://github.com/torvalds/linux
- HEAD
- refs/heads/arm64-uaccess
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/certifi-2024.7.4
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/idna-3.7
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/requests-2.32.2
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/setuptools-70.0.0
- refs/heads/dependabot/pip/drivers/gpu/drm/ci/xfails/urllib3-2.2.2
- refs/heads/master
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Tip revision: 5f9e832c137075045d15cd6899ab0505cfb2ca4b authored by Linus Torvalds on 21 July 2019, 21:05:38 UTC
Linus 5.3-rc1
Linus 5.3-rc1
Tip revision: 5f9e832
timer-davinci.h
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* TI DaVinci clocksource driver
*
* Copyright (C) 2019 Texas Instruments
* Author: Bartosz Golaszewski <bgolaszewski@baylibre.com>
*/
#ifndef __TIMER_DAVINCI_H__
#define __TIMER_DAVINCI_H__
#include <linux/clk.h>
#include <linux/ioport.h>
enum {
DAVINCI_TIMER_CLOCKEVENT_IRQ,
DAVINCI_TIMER_CLOCKSOURCE_IRQ,
DAVINCI_TIMER_NUM_IRQS,
};
/**
* struct davinci_timer_cfg - davinci clocksource driver configuration struct
* @reg: register range resource
* @irq: clockevent and clocksource interrupt resources
* @cmp_off: if set - it specifies the compare register used for clockevent
*
* Note: if the compare register is specified, the driver will use the bottom
* clock half for both clocksource and clockevent and the compare register
* to generate event irqs. The user must supply the correct compare register
* interrupt number.
*
* This is only used by da830 the DSP of which uses the top half. The timer
* driver still configures the top half to run in free-run mode.
*/
struct davinci_timer_cfg {
struct resource reg;
struct resource irq[DAVINCI_TIMER_NUM_IRQS];
unsigned int cmp_off;
};
int __init davinci_timer_register(struct clk *clk,
const struct davinci_timer_cfg *data);
#endif /* __TIMER_DAVINCI_H__ */