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04 August 2024, 22:51:34 UTC
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2c83112 Stefan Hajnoczi 15 November 2022, 23:56:38 UTC Update VERSION for v7.2.0-rc1 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 15 November 2022, 23:56:38 UTC
dd64bce Stefan Hajnoczi 15 November 2022, 14:32:17 UTC Merge tag 'pull-x86-20221115' of https://gitlab.com/rth7680/qemu into staging Fix cmpxchgl writeback to rax. Fix lahf/sahf for 64-bit # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmNy0OYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/2XwgAr2yCrG8irdVBmD1B # rNW8xJJWIwEXqJ3KSPBSMEQ5lCVW7urwIYasnTYPV9TMwXvwwbFzCzovp+pJ402b # GPCkkjS/DdLHKbFqzEIcVld6IASaYNbcCZjEDeN3U14RZW9X7Aujy1Yg6qWxWnIc # ony2awzocGq5iafvPCMATmIkPJErnFv6mLttRq52CmBATgVtsSrxEF735NVuZAaq # t9bfN+gQpXARo+AcGzqTpNtcR4DTzE2hyJrXAMivTJtAeEl8XweOq8eV7PkAf4qw # ED/AT6G7I38Buzj1o8SN3G54d/v/jwV/L9fWCLs92QZJC/gIi9B7qZf8DglI1ipV # YCFKQw== # =xP4E # -----END PGP SIGNATURE----- # gpg: Signature made Mon 14 Nov 2022 18:36:06 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-x86-20221115' of https://gitlab.com/rth7680/qemu: target/i386: hardcode R_EAX as destination register for LAHF/SAHF target/i386: fix cmpxchg with 32-bit register destination Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 15 November 2022, 14:32:17 UTC
35d95e4 Paolo Bonzini 15 September 2022, 00:14:31 UTC target/i386: hardcode R_EAX as destination register for LAHF/SAHF When translating code that is using LAHF and SAHF in combination with the REX prefix, the instructions should not use any other register than AH; however, QEMU selects SPL (SP being register 4, just like AH) if the REX prefix is present. To fix this, use deposit directly without going through gen_op_mov_v_reg and gen_op_mov_reg_v. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/130 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 14 November 2022, 23:34:42 UTC
d1bb978 Paolo Bonzini 11 September 2022, 12:04:36 UTC target/i386: fix cmpxchg with 32-bit register destination Unlike the memory case, where "the destination operand receives a write cycle without regard to the result of the comparison", rm must not be touched altogether if the write fails, including not zero-extending it on 64-bit processors. This is not how the movcond currently works, because it is always followed by a gen_op_mov_reg_v to rm. To fix it, introduce a new function that is similar to gen_op_mov_reg_v but writes to a TCG temporary. Considering that gen_extu(ot, oldv) is not needed in the memory case either, the two cases for register and memory destinations are different enough that one might as well fuse the two "if (mod == 3)" into one. So do that too. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/508 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [rth: Add a test case ] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 14 November 2022, 23:34:42 UTC
bb00d0a Stefan Hajnoczi 14 November 2022, 21:59:10 UTC Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging Block layer patches - Fix deadlock in graph modification with iothreads - mirror: Fix non-converging cases for active mirror - qapi: Fix BlockdevOptionsNvmeIoUring @path description - blkio: Set BlockDriver::has_variable_length to false # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmNyIF8RHGt3b2xmQHJl # ZGhhdC5jb20ACgkQfwmycsiPL9ZcHRAAwcQ9cLu6Oh96iWvCCOIxqOsEzVYeCwxI # yJrrOYSKvMabWms+gg3m5zYt/sU4CRvjzFMd/WDl4LXN4B1SNBdOjPXkswoLA6cU # QvzbVNRPgZxodVXewjWw5fNFYkBvA+Jgx9ffEK0dYAWKFN3bT6I3NzjcKr2eJ2d2 # Y8RzltBspwwadyTH0lQxY8HfXE7UHukBCAVkcbqQQYuzKa2dR9ERKfRM10uDZwNI # eNGWu1W0xvE3+nXqnGfXUXVO7R7Q5L0HfShr4Dhw0zyWbg6DBJRi7iY8cVV1VmCp # M0C8ybODRdsMcRJh+k+Q+T33oRBnXytXDiNzNRHx2gOabuc6k/sc6aSfcIvgCMQf # PLQsHI0a1o/N238N1Znhfn+M5S0+elTy/xwmzXN2rL3whNMJ9IRoqoxh7nH90CB2 # F7lMjp7FMmJVYtmy0FcBDUVfShgzqM1TsORAXUfdU5QXf4wA+FyZ16SN/WYYfg4B # ZCsdu2vDimA4rNOiWpPEBNLnHv3S/cswTqobQUQ2QN0zzGPZxoKEWAuG4pqlmSGN # nMgEiLGFL7Ztgpjw6ZQCisL5rh0P9g53JgY8+b68KfeDXG+R2bEHPtZotIVz7mT7 # JP5ydTyxozNGvMCKg/0Fp1HaHU1ADm9swnWm5cYm/ax9hq5rMNsaq6YTLap1o1PP # e1Oe0rnq/Ys= # =zRlt # -----END PGP SIGNATURE----- # gpg: Signature made Mon 14 Nov 2022 06:02:55 EST # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * tag 'for-upstream' of https://repo.or.cz/qemu/kevin: tests/stream-under-throttle: New test block: Start/end drain on correct AioContext block-backend: Update ctx immediately after root block: Make bdrv_child_get_parent_aio_context I/O block/blkio: Set BlockDriver::has_variable_length to false qapi/block-core: Fix BlockdevOptionsNvmeIoUring @path description iotests/151: Test active requests on mirror start iotests/151: Test that active mirror progresses block/mirror: Fix NULL s->job in active writes block/mirror: Drop mirror_wait_for_any_operation() block/mirror: Do not wait for active writes Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 14 November 2022, 21:59:10 UTC
98f10f0 Stefan Hajnoczi 14 November 2022, 18:31:17 UTC Merge tag 'pull-target-arm-20221114' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/intc/arm_gicv3: fix prio masking on pmr write * MAINTAINERS: Update maintainer's email for Xilinx CAN # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmNyY7cZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mrBD/4mG6AMW4CGROWq3u3F8STK # 22uxpilhyBmPawBykUC8dYId8A0GjGqeJ5HRhYE/0ZKqlk9GtFBI4YHM8ccocozK # VdgKP7VvXNiBwjV2kQ3mdZnfXRnNWLTnGQd9Q/9EjU+FOBz4hsOoRh8rv+9t2inn # dtXV8wbLYQYHCgVPAwTP39DXzF0YQ5sAjVxbjC1lFE6k3pAcDvoGKKcWt9GOI5m1 # 5ImPgnVdunscqA9otvl56a03M5TbdH8KiAEARo3juFYYEHkl4qD2E2CK6On8wTIA # 7zeSoxvTDDYD6mcV/RwFuEcOr+YIFpxeGxes9PKpnYh8Dpx9YPeIYRsK5qTI7QUz # Ldbz9PnZE6DPaPsT67kzFnfx4se6q10d5wXaK8VsFBOZ4V9yYONaXlHiZbgpWn/K # jlbiJFtehCA0iS4D6YcoDTqL88M/RM5cbj/5tht8sxrl9HJ3r/hxdJ7W+zqpTg2j # 3TV+j9okLqyq/4RIFZbf5yVPFPMtF/FOIl95ZAHmvJYjC/L9yXRT6Y5EdKfZPwMe # 5FBjdly4gsUqNxFUfPByRVtaoelxjXi/+0wHXWZNw8Naco3yd7VMoqIRLDE4qhY5 # GfjF2Aai7PHiwb2VE+mIIfz+ldEk5XHFYlXBtUOwt8q2UUnmYsVqh8zFpTYLaDdY # RezkZM4yMYx38GPWCvAvlg== # =clh5 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 14 Nov 2022 10:50:15 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20221114' of https://git.linaro.org/people/pmaydell/qemu-arm: hw/intc/arm_gicv3: fix prio masking on pmr write MAINTAINERS: Update maintainer's email for Xilinx CAN Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 14 November 2022, 18:31:17 UTC
d9721f1 Jens Wiklander 14 November 2022, 15:10:58 UTC hw/intc/arm_gicv3: fix prio masking on pmr write With commit 39f29e599355 ("hw/intc/arm_gicv3: Use correct number of priority bits for the CPU") the number of priority bits was changed from the maximum value 8 to typically 5. As a consequence a few of the lowest bits in ICC_PMR_EL1 becomes RAZ/WI. However prior to this patch one of these bits was still used since the supplied priority value is masked before it's eventually right shifted with one bit. So the bit is not lost as one might expect when the register is read again. The Linux kernel depends on lowest valid bit to be reset to zero, see commit 33625282adaa ("irqchip/gic-v3: Probe for SCR_EL3 being clear before resetting AP0Rn") for details. So fix this by masking the priority value after it may have been right shifted by one bit. Cc: qemu-stable@nongnu.org Fixes: 39f29e599355 ("hw/intc/arm_gicv3: Use correct number of priority bits for the CPU") Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> 14 November 2022, 15:10:58 UTC
32bd99d Vikram Garhwal 14 November 2022, 15:10:57 UTC MAINTAINERS: Update maintainer's email for Xilinx CAN Signed-off-by: Vikram Garhwal <vikram.garhwal@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> 14 November 2022, 15:10:57 UTC
46530d3 Hanna Reitz 10 November 2022, 16:09:21 UTC tests/stream-under-throttle: New test Test streaming a base image into the top image underneath two throttle nodes. This was reported to make qemu 7.1 hang (https://gitlab.com/qemu-project/qemu/-/issues/1215), so this serves as a regression test. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20221110160921.33158-1-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 14 November 2022, 10:31:52 UTC
305f6f6 Stefan Hajnoczi 12 November 2022, 14:17:06 UTC Merge tag 'pull-la-20221112' of https://gitlab.com/rth7680/qemu into staging Fix loongarch make check-tcg failure. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmNu8aUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV90jAgAsaB0nU7YGzJRYRmK # +QXtrQa5AmXf014X7OeOZyxdYCPCwri2rnCxc1eOKAIOeSbdFY54xjXXEV8qpej+ # ZiLbdvXFG519vJpZquEJm1wgk68NnKYy2wfeRuwBMcQD4E7yeE9y11IKtuN6vbcq # sh/Zxh43KwzyZ1wrVQl8DUxesTcE4RwVDJ+t2q+uYKcgmUVRQJJd9aXLkOKpOb1f # QU+6lJAGv293IbW5LUD8fIPNKVWqlVwDIsFVWhYYJFxvWfbL211NsJbX70RnKahr # vJ6olGORlShNJEiV++9QTrgGr1v76KkVECaKNtohkYL/BkfNxoy4yWxcC7I9zds+ # 6oH9vQ== # =7NI1 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 11 Nov 2022 20:06:45 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-la-20221112' of https://gitlab.com/rth7680/qemu: hw/loongarch: Fix loongarch fdt addr confict Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 12 November 2022, 14:17:06 UTC
57bc6e4 Philippe Mathieu-Daudé 11 November 2022, 12:45:50 UTC libvduse: Avoid warning about dangerous use of strncpy() GCC 8 added a -Wstringop-truncation warning: The -Wstringop-truncation warning added in GCC 8.0 via r254630 for bug 81117 is specifically intended to highlight likely unintended uses of the strncpy function that truncate the terminating NUL character from the source string. Here the next line indeed unconditionally zeroes the last byte, but 1/ the buffer has been calloc'd, so we don't need to add an extra byte, and 2/ we called vduse_name_is_invalid() which checked the string length, so we can simply call strcpy(). This fixes when using gcc (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0: [42/666] Compiling C object subprojects/libvduse/libvduse.a.p/libvduse.c.o FAILED: subprojects/libvduse/libvduse.a.p/libvduse.c.o cc -m64 -mcx16 -Isubprojects/libvduse/libvduse.a.p -Isubprojects/libvduse -I../../subprojects/libvduse [...] -o subprojects/libvduse/libvduse.a.p/libvduse.c.o -c ../../subprojects/libvduse/libvduse.c In file included from /usr/include/string.h:495, from ../../subprojects/libvduse/libvduse.c:24: In function ‘strncpy’, inlined from ‘vduse_dev_create’ at ../../subprojects/libvduse/libvduse.c:1312:5: /usr/include/x86_64-linux-gnu/bits/string_fortified.h:106:10: error: ‘__builtin_strncpy’ specified bound 256 equals destination size [-Werror=stringop-truncation] 106 | return __builtin___strncpy_chk (__dest, __src, __len, __bos (__dest)); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors ninja: build stopped: cannot make progress due to previous errors. Fixes: d9cf16c0be ("libvduse: Replace strcpy() with strncpy()") Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Xie Yongji <xieyongji@bytedance.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Tested-by: Bin Meng <bmeng@tinylab.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20221111124550.35753-1-philmd@linaro.org> 12 November 2022, 14:15:59 UTC
46b21de Song Gao 09 November 2022, 02:04:49 UTC hw/loongarch: Fix loongarch fdt addr confict Fix LoongArch check-tcg error: TEST hello on loongarch64 qemu-system-loongarch64: Some ROM regions are overlapping These ROM regions might have been loaded by direct user request or by default. They could be BIOS/firmware images, a guest kernel, initrd or some other file loaded into guest memory. Check whether you intended to load all this guest code, and whether it has been built to load to the correct addresses. The following two regions overlap (in the memory address space): hello ELF program header segment 0 (addresses 0x0000000000200000 - 0x0000000000242000) fdt (addresses 0x0000000000200000 - 0x0000000000300000) make[1]: *** [Makefile:177: run-hello] Error 1 Fixes: 021836936ef ("hw/loongarch: Load FDT table into dram memory space") Reported-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221109020449.978064-1-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 12 November 2022, 01:05:52 UTC
6a4cff8 Stefan Hajnoczi 11 November 2022, 16:44:48 UTC Merge tag 'pull-request-2022-11-11' of https://gitlab.com/thuth/qemu into staging * Fix "unused variable" warnings from Clang 15 * Allow building of guest-agent without emulators or tools * White space clean-ups * Fixes for typos in the documentation # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmNuI5YRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbXfjRAAsUf7C77pVZj5VWpAVYSgHdYJ5WCfVQg3 # Nd4Yixyx8b6yhgY1Vv9OL/uuY04AAWifQn0AUnNBJKrOKcuvU3mHlE/s1imw9CUf # tsX2gE1GAczQqp5dLL2/+FCMZOC/acFkjmA9LAdOfG7eKzodRdsq/ZaIXd2+MmfM # nG972Zw0/ZJqQs+DtjwNYvgtywEmRqunKIaCaSwtGHWvot081yw1iW3PvgrKulEr # v9SQhAurD+ZxcJSeTn3c8L//KYVyCUGQ0K/1cbBcyhPi7xMQar8j7xuCk7xZiOMW # fvhCOSnjbntsf+xnE2VDlakKQvoY6r30Tl0dzSoH79uzGe+ZTPC+L6ly3tzJ0Vo6 # aslppY+8oYxLbJRX1Im8X0rxK6OqcVjjEXu3fVn8/C1WftIltuy3va2LZNZfQ8Bf # +Yte3swzvFzgQE19c0HkgMd4uvfqGIkyprs1n2RjzZaI7cnQ4Ati/wQsOKCUrqrY # VYsy3J1IypM7DO/cZ/JpdDV3PPTWv8JI8H2Agn2VhvY86N9ETn71RAj6UYqufW3W # H3lMv7L6rU8c1tfcjbr0Xf811EwHekkIjyGt0aJ8MacJNkSc1A4pe+UUGVxNefue # W0kT2htHQL1Q9JWjbKQuqT/rYrKUfqRDnd809YAzEVO7jpabS8g/hN3wBiaeZDgK # LqLnITUBhRU= # =H8p7 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 11 Nov 2022 05:27:34 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-11-11' of https://gitlab.com/thuth/qemu: Fix several typos in documentation (found by codespell) net: Replace TAB indentations with spaces qga: Allow building of the guest agent without system emulators or tools libdecnumber/dpd/decimal64: Fix compiler warning from Clang 15 host-libusb: Remove unused variable qemu-img: remove unused variable tulip: Remove unused variable rtl8139: Remove unused variable Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 11 November 2022, 16:44:48 UTC
b587170 Stefan Hajnoczi 11 November 2022, 16:44:28 UTC Merge tag 'pull-ppc-20221111' of https://gitlab.com/danielhb/qemu into staging ppc patch queue for 2022-11-11: Short queue with just a single pnv-phb fix from Thomas Huth. # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCY24dtwAKCRA82cqW3gMx # ZNlDAQC+yqONSkYvoANSPNDuMtcK0Lk7KNXFTx5cg8ASNym0twEAkA/YuNv4t0m2 # 9IRfh/xJ+AhKf6VYKbUwftAsZGPTpAc= # =U0me # -----END PGP SIGNATURE----- # gpg: Signature made Fri 11 Nov 2022 05:02:31 EST # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20221111' of https://gitlab.com/danielhb/qemu: hw/pci-host/pnv_phb: Avoid quitting QEMU if hotplug of pnv-phb-root-port fails Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 11 November 2022, 16:44:28 UTC
67c6597 Stefan Hajnoczi 11 November 2022, 16:44:07 UTC Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging pc,virtio: regression fixes fixes issues from the last pull request: unresolved symbols for taargets without acpi typo in a comment in checkpatch virtio buffer overflow Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmNtZ0gPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpc/oIAIYNoZZGbAd9kvePlwO9mDiw8mMILNo2ylnh # RXNUggqmNy/A4Tiu9WFFUwHlT7CWUQAz6gYTyC3eyr7rz87GhjF16EQ+hMOi9wVr # MlgbYyvp+/MBQDdJGbJJVXxL1/wmC4LAQws8S3AVY++dvEegxod7uC2vF8abHUP+ # vvihz+SHqhDFL5TSLITNOWQfIp4KIaNIx2ZugHI7mYKUHS7YwW38QC3dScTQlsV/ # /qr1YhJ9mGFWBq+dFytBwcQjA+NSKN2wQJtEQadGO7cTzcrBenLewoN1VOKcv2+s # jTNAt7Q973HVAQMYWuQB5272S3Xar1ArpUPxm6IwEbYB5Q9OJCg= # =me5Q # -----END PGP SIGNATURE----- # gpg: Signature made Thu 10 Nov 2022 16:04:08 EST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: virtio-net: fix for heap-buffer-overflow display: include dependencies explicitly checkpatch: typo fix Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 11 November 2022, 16:44:07 UTC
2cb40d4 Stefan Weil 10 November 2022, 19:08:25 UTC Fix several typos in documentation (found by codespell) Those typos are in files which are used to generate the QEMU manual. Signed-off-by: Stefan Weil <sw@weilnetz.de> Message-Id: <20221110190825.879620-1-sw@weilnetz.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> [thuth: update sentence in can.rst as suggested by Peter] Signed-off-by: Thomas Huth <thuth@redhat.com> 11 November 2022, 08:39:25 UTC
f469150 Ahmed Abouzied 14 June 2021, 18:38:49 UTC net: Replace TAB indentations with spaces Replaces TABs with spaces, making sure to have a consistent coding style of 4 space indentations in the net subsystem. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/377 Signed-off-by: Ahmed Abouzied <email@aabouzied.com> Message-Id: <20210614183849.20622-1-email@aabouzied.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> [thuth: Fixed mis-aligned indentation in some of the files] Signed-off-by: Thomas Huth <thuth@redhat.com> 11 November 2022, 08:39:03 UTC
e009113 Thomas Huth 10 November 2022, 08:36:26 UTC qga: Allow building of the guest agent without system emulators or tools If configuring with "--disable-system --disable-user --enable-guest-agent" the linking currently fails with: qga/qemu-ga.p/commands.c.o: In function `qmp_command_info': build/../../home/thuth/devel/qemu/qga/commands.c:70: undefined reference to `qmp_command_name' build/../../home/thuth/devel/qemu/qga/commands.c:71: undefined reference to `qmp_command_is_enabled' build/../../home/thuth/devel/qemu/qga/commands.c:72: undefined reference to `qmp_has_success_response' qga/qemu-ga.p/commands.c.o: In function `qmp_guest_info': build/../../home/thuth/devel/qemu/qga/commands.c:82: undefined reference to `qmp_for_each_command' qga/qemu-ga.p/commands.c.o: In function `qmp_guest_exec': build/../../home/thuth/devel/qemu/qga/commands.c:410: undefined reference to `qbase64_decode' qga/qemu-ga.p/channel-posix.c.o: In function `ga_channel_open': build/../../home/thuth/devel/qemu/qga/channel-posix.c:214: undefined reference to `unix_listen' build/../../home/thuth/devel/qemu/qga/channel-posix.c:228: undefined reference to `socket_parse' build/../../home/thuth/devel/qemu/qga/channel-posix.c:234: undefined reference to `socket_listen' qga/qemu-ga.p/commands-posix.c.o: In function `qmp_guest_file_write': build/../../home/thuth/devel/qemu/qga/commands-posix.c:527: undefined reference to `qbase64_decode' Let's make sure that we also compile and link the required files if the system emulators have not been enabled. Message-Id: <20221110083626.31899-1-thuth@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> 11 November 2022, 08:17:45 UTC
b2a3cbb Thomas Huth 10 November 2022, 13:11:12 UTC libdecnumber/dpd/decimal64: Fix compiler warning from Clang 15 Clang 15 from Fedora 37 complains: ../libdecnumber/dpd/decimal64.c:620:8: error: variable 'n' set but not used [-Werror,-Wunused-but-set-variable] Int n; /* output bunch counter */ ^ 1 error generated. Remove the unused variable to silence the compiler warning. Message-Id: <20221110131112.104283-1-thuth@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Thomas Huth <thuth@redhat.com> 11 November 2022, 08:13:52 UTC
5ab8ba9 Miroslav Rezanina 09 November 2022, 15:57:14 UTC host-libusb: Remove unused variable Variable unconnected used in usb_host_auto_check function is only incremented but never read as line where it is read was disabled since introducing the code. This causes 'Unused but set variable' warning on Clang 15.0.1 compiler. Removing the variable and disabled code to prevent the warning. Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <00df0db69ff9167d38bac81f6d03281955bd861a.1668009030.git.mrezanin@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> 11 November 2022, 08:12:10 UTC
0f48c47 Miroslav Rezanina 09 November 2022, 15:57:13 UTC qemu-img: remove unused variable Variable block_count used in img_dd function is only incremented but never read. This causes 'Unused but set variable' warning on Clang 15.0.1 compiler. Removing the variable to prevent the warning. Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <e86d5b57f9d13bde995c616a533b876f1fb8a527.1668009030.git.mrezanin@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> 11 November 2022, 08:12:10 UTC
6083dca Miroslav Rezanina 09 November 2022, 15:57:12 UTC tulip: Remove unused variable Variable n used in tulip_idblock_crc function is only incremented but never read. This causes 'Unused but set variable' warning on Clang 15.0.1 compiler. Removing the variable to prevent the warning. Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <02e1560d115c208df32236df8916fed98429fda1.1668009030.git.mrezanin@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> 11 November 2022, 08:12:10 UTC
7d7238c Miroslav Rezanina 09 November 2022, 15:57:11 UTC rtl8139: Remove unused variable Variable send_count used in rtl8139_cplus_transmit_one function is only incremented but never read. This causes 'Unused but set variable' warning on Clang 15.0.1 compiler. Removing the variable to prevent the warning. Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <15a32dd06c492216cbf27cd3ddcbe1e9afb8d8f5.1668009030.git.mrezanin@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> 11 November 2022, 08:12:10 UTC
ec56513 Thomas Huth 09 November 2022, 12:22:10 UTC hw/pci-host/pnv_phb: Avoid quitting QEMU if hotplug of pnv-phb-root-port fails Currently QEMU terminates if you try to hotplug pnv-phb-root-port in an environment where it is not supported, e.g. if doing this: echo "device_add pnv-phb-root-port" | \ ./qemu-system-ppc64 -monitor stdio -M powernv9 To avoid this problem, the pnv_phb_root_port_realize() function should not use error_fatal when trying to set the properties which might not be available. Fixes: c2f3f78af5 ("ppc/pnv: set root port chassis and slot using Bus properties") Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221109122210.115667-1-thuth@redhat.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> 10 November 2022, 21:22:10 UTC
f47af0a Xuan Zhuo 10 November 2022, 09:57:39 UTC virtio-net: fix for heap-buffer-overflow Run shell script: cat << EOF | valgrind qemu-system-i386 -display none -machine accel=qtest, -m \ 512M -M q35 -nodefaults -device virtio-net,netdev=net0 -netdev \ user,id=net0 -qtest stdio outl 0xcf8 0x80000810 outl 0xcfc 0xc000 outl 0xcf8 0x80000804 outl 0xcfc 0x01 outl 0xc00d 0x0200 outl 0xcf8 0x80000890 outb 0xcfc 0x4 outl 0xcf8 0x80000889 outl 0xcfc 0x1c000000 outl 0xcf8 0x80000893 outw 0xcfc 0x100 EOF Got: ==68666== Invalid read of size 8 ==68666== at 0x688536: virtio_net_queue_enable (virtio-net.c:575) ==68666== by 0x6E31AE: memory_region_write_accessor (memory.c:492) ==68666== by 0x6E098D: access_with_adjusted_size (memory.c:554) ==68666== by 0x6E4DB3: memory_region_dispatch_write (memory.c:1521) ==68666== by 0x6E31AE: memory_region_write_accessor (memory.c:492) ==68666== by 0x6E098D: access_with_adjusted_size (memory.c:554) ==68666== by 0x6E4DB3: memory_region_dispatch_write (memory.c:1521) ==68666== by 0x6EBCD3: flatview_write_continue (physmem.c:2820) ==68666== by 0x6EBFBF: flatview_write (physmem.c:2862) ==68666== by 0x6EF5E7: address_space_write (physmem.c:2958) ==68666== by 0x6DFDEC: cpu_outw (ioport.c:70) ==68666== by 0x6F6DF0: qtest_process_command (qtest.c:480) ==68666== Address 0x29087fe8 is 24 bytes after a block of size 416 in arena "client" That is reported by Alexander Bulekov. https://gitlab.com/qemu-project/qemu/-/issues/1309 Here, the queue_index is the index of the cvq, but in some cases cvq does not have the corresponding NetClientState, so overflow appears. I add a check here, ignore illegal queue_index and cvq queue_index. Note the queue_index is below the VIRTIO_QUEUE_MAX but greater or equal than cvq index could hit this. Other devices are similar. Fixes: 7f863302 ("virtio-net: support queue_enable") Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1309 Reported-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Xuan Zhuo <xuanzhuo@linux.alibaba.com> Message-Id: <20221110095739.130393-1-xuanzhuo@linux.alibaba.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 10 November 2022, 15:18:55 UTC
28cf396 Michael S. Tsirkin 09 November 2022, 22:21:23 UTC display: include dependencies explicitly acpi-vga-stub.c pulls in vga_int.h However that currently pulls in ui/console.h which breaks e.g. on systems without pixman. It's better to remove ui/console.h from vga_int.h and directly include it where it's used. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20221109222112.74519-1-mst@redhat.com> Tested-by: Laurent Vivier <lvivier@redhat.com> Reported-by: Miroslav Rezanina <mrezanin@redhat.com> Reported-by: Frederic Bezies <fredbezies@gmail.com> Reported-by: Laurent Vivier <lvivier@redhat.com> Fixes: cfead31326 ("AcpiDevAmlIf interface to build VGA device descs") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> 10 November 2022, 15:17:18 UTC
53a3b83 Michael S. Tsirkin 08 November 2022, 13:52:06 UTC checkpatch: typo fix remove inline #inline - it's an obvious typo. Should just be remove inline. Fixes: 1ef47f40dc ("checkpatch: better pattern for inline comments") Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20221108135155.1121566-1-mst@redhat.com> 10 November 2022, 15:17:07 UTC
ace5a16 Hanna Reitz 07 November 2022, 15:13:21 UTC block: Start/end drain on correct AioContext bdrv_parent_drained_{begin,end}_single() are supposed to operate on the parent, not on the child, so they should not attempt to get the context to poll from the child but the parent instead. BDRV_POLL_WHILE(c->bs) does get the context from the child, so we should replace it with AIO_WAIT_WHILE() on the parent's context instead. This problem becomes apparent when bdrv_replace_child_noperm() invokes bdrv_parent_drained_end_single() after removing a child from a subgraph that is in an I/O thread. By the time bdrv_parent_drained_end_single() is called, child->bs is NULL, and so BDRV_POLL_WHILE(c->bs, ...) will poll the main loop instead of the I/O thread; but anything that bdrv_parent_drained_end_single_no_poll() may have scheduled is going to want to run in the I/O thread, but because we poll the main loop, the I/O thread is never unpaused, and nothing is run, resulting in a deadlock. Closes: https://gitlab.com/qemu-project/qemu/-/issues/1215 Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20221107151321.211175-4-hreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 13:58:43 UTC
af5b6eb Hanna Reitz 07 November 2022, 15:13:20 UTC block-backend: Update ctx immediately after root blk_get_aio_context() asserts that blk->ctx is always equal to the root BDS's context (if there is a root BDS). Therefore, blk_do_set_aio_context() must update blk->ctx immediately after the root BDS's context has changed. Without this patch, the next patch would break iotest 238, because bdrv_drained_begin() (called by blk_do_set_aio_context()) may then invoke bdrv_child_get_parent_aio_context() on the root child, i.e. blk_get_aio_context(). However, by this point, blk->ctx would not have been updated and thus differ from the root node's context. This patch fixes that. Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20221107151321.211175-3-hreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 13:58:38 UTC
d5f8d79 Hanna Reitz 07 November 2022, 15:13:19 UTC block: Make bdrv_child_get_parent_aio_context I/O We want to use bdrv_child_get_parent_aio_context() from bdrv_parent_drained_{begin,end}_single(), both of which are "I/O or GS" functions. Prior to 3ed4f708fe1, all the implementations were I/O code anyway. 3ed4f708fe1 has put block jobs' AioContext field under the job mutex, so to make child_job_get_parent_aio_context() work in an I/O context, we need to take that lock there. Furthermore, blk_root_get_parent_aio_context() is not marked as anything, but is safe to run in an I/O context, so mark it that way now. (blk_get_aio_context() is an I/O code function.) With that done, all implementations explicitly are I/O code, so we can mark bdrv_child_get_parent_aio_context() as I/O code, too, so callers know it is safe to run from both GS and I/O contexts. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20221107151321.211175-2-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 13:58:34 UTC
e56b0c6 Alberto Faria 08 November 2022, 14:44:33 UTC block/blkio: Set BlockDriver::has_variable_length to false Setting it to true can cause the device size to be queried from libblkio in otherwise fast paths, degrading performance. Set it to false and require users to refresh the device size explicitly instead. Fixes: 4c8f4fda0504 ("block/blkio: Tolerate device size changes") Suggested-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Alberto Faria <afaria@redhat.com> Message-Id: <20221108144433.1334074-1-afaria@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 13:52:36 UTC
c785326 Alberto Faria 08 November 2022, 14:23:47 UTC qapi/block-core: Fix BlockdevOptionsNvmeIoUring @path description The nvme-io_uring BlockDriver's path option must point at the character device of an NVMe namespace, not at an image file. Fixes: fd66dbd424f5 ("blkio: add libblkio block driver") Suggested-by: Stefano Garzarella <sgarzare@redhat.com> Signed-off-by: Alberto Faria <afaria@redhat.com> Message-Id: <20221108142347.1322674-1-afaria@redhat.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 13:46:27 UTC
7b5929c Hanna Reitz 09 November 2022, 16:54:52 UTC iotests/151: Test active requests on mirror start Have write requests happen to the source node right when we start a mirror job. The mirror filter node may encounter MirrorBDSOpaque.job being NULL, but this should not cause a segfault. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20221109165452.67927-6-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 12:33:57 UTC
3859129 Hanna Reitz 09 November 2022, 16:54:51 UTC iotests/151: Test that active mirror progresses Before this series, a mirror job in write-blocking mode would pause issuing background requests while active requests are in flight. Thus, if the source is constantly in use by active requests, no actual progress can be made. This series should have fixed that, making the mirror job issue background requests even while active requests are in flight. Have a new test case in 151 verify this. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20221109165452.67927-5-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 12:33:56 UTC
da93d5c Hanna Reitz 09 November 2022, 16:54:50 UTC block/mirror: Fix NULL s->job in active writes There is a small gap in mirror_start_job() before putting the mirror filter node into the block graph (bdrv_append() call) and the actual job being created. Before the job is created, MirrorBDSOpaque.job is NULL. It is possible that requests come in when bdrv_drained_end() is called, and those requests would see MirrorBDSOpaque.job == NULL. Have our filter node handle that case gracefully. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20221109165452.67927-4-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 12:33:55 UTC
eb99491 Hanna Reitz 09 November 2022, 16:54:49 UTC block/mirror: Drop mirror_wait_for_any_operation() mirror_wait_for_free_in_flight_slot() is the only remaining user of mirror_wait_for_any_operation(), so inline the latter into the former. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20221109165452.67927-3-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 12:33:47 UTC
d69a879 Hanna Reitz 09 November 2022, 16:54:48 UTC block/mirror: Do not wait for active writes Waiting for all active writes to settle before daring to create a background copying operation means that we will never do background operations while the guest does anything (in write-blocking mode), and therefore cannot converge. Yes, we also will not diverge, but actually converging would be even nicer. It is unclear why we did decide to wait for all active writes to settle before creating a background operation, but it just does not seem necessary. Active writes will put themselves into the in_flight bitmap and thus properly block actually conflicting background requests. It is important for active requests to wait on overlapping background requests, which we do in active_write_prepare(). However, so far it was not documented why it is important. Add such documentation now, and also to the other call of mirror_wait_on_conflicts(), so that it becomes more clear why and when requests need to actively wait for other requests to settle. Another thing to note is that of course we need to ensure that there are no active requests when the job completes, but that is done by virtue of the BDS being drained anyway, so there cannot be any active requests at that point. With this change, we will need to explicitly keep track of how many bytes are in flight in active requests so that job_progress_set_remaining() in mirror_run() can set the correct number of remaining bytes. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=2123297 Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20221109165452.67927-2-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> 10 November 2022, 12:33:41 UTC
2ccad61 Stefan Hajnoczi 09 November 2022, 18:26:45 UTC Merge tag 'pull-tcg-20221109' of https://gitlab.com/rth7680/qemu into staging Fix -Werror=clobbered issue with tb_gen_code # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmNrBscdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9Fpwf/Rfj6jdVXlHX4mlWe # snuTeLYDMxZkcCEobPlM6MTG3bVetmulQD09bf6rppOSfiG4LjcLwQtIYafXNG98 # EJiIZJNOsQen6MXtFlv9ZeqWi8PBe+4YQbIT3fOn5BC9p0BxS0aiIrTM36PpvKE9 # PV7I+KpwoNUeMSaJHf/jH+Q272Tk1jlW3GYzygbX/XHxsoLz9byRO9A0AMwClAOF # XuNx+0+3w8xGfapsMU/oBkSMVFj03jsm07PMgvipMfT9s8qcTgzCyK8VeJPp9WHz # 9gn4mvVnEBQU1W3K2SCx1o3pyFaqmyMwnE0BixWKVEM9zAaJEBN5iYCn4QX0TH3y # Hmzc8g== # =YF54 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 08 Nov 2022 20:47:51 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20221109' of https://gitlab.com/rth7680/qemu: accel/tcg: Split out setjmp_gen_code tcg: Move TCG_TARGET_HAS_direct_jump init to tb_gen_code Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 09 November 2022, 18:26:45 UTC
344b63b Richard Henderson 06 November 2022, 00:12:33 UTC accel/tcg: Split out setjmp_gen_code Isolate the code protected by setjmp. Fixes: translate-all.c: In function ‘tb_gen_code’: translate-all.c:748:51: error: argument ‘cflags’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 09 November 2022, 01:29:03 UTC
35abb00 Richard Henderson 05 November 2022, 23:55:37 UTC tcg: Move TCG_TARGET_HAS_direct_jump init to tb_gen_code Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 09 November 2022, 01:29:03 UTC
60ab369 Stefan Hajnoczi 08 November 2022, 18:41:40 UTC Update VERSION for v7.2.0-rc0 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 08 November 2022, 20:53:41 UTC
ef7716c Daniel Henrique Barboza 08 November 2022, 14:00:32 UTC Revert "hw/block/pflash_cfi: Error out if dev length isn't power of 2" Commit 334c388f25 ("pflash_cfi: Error out if device length isn't a power of two") aimed to finish the effort started by commit 06f1521795 ("pflash: Require backend size to match device, improve errors"), but unfortunately we are not quite there since various machines are still ready to accept incomplete / oversized pflash backend images, and now fail, i.e. on Debian bullseye: $ qemu-system-x86_64 \ -drive \ if=pflash,format=raw,unit=0,readonly=on,file=/usr/share/OVMF/OVMF_CODE.fd qemu-system-x86_64: Device size must be a power of two. where OVMF_CODE.fd comes from the ovmf package, which doesn't pad the firmware images to the flash size: $ ls -lh /usr/share/OVMF/ -rw-r--r-- 1 root root 3.5M Aug 19 2021 OVMF_CODE_4M.fd -rw-r--r-- 1 root root 1.9M Aug 19 2021 OVMF_CODE.fd -rw-r--r-- 1 root root 128K Aug 19 2021 OVMF_VARS.fd Since we entered the freeze period to prepare the v7.2.0 release, the safest is to revert commit 334c388f25707a234c4a0dea05b9df08d. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1294 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221108175755.95141-1-philmd@linaro.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221108172633.860700-1-danielhb413@gmail.com> 08 November 2022, 20:53:40 UTC
f9c307c Zhenzhong Duan 22 June 2022, 09:59:12 UTC memory: Fix wrong end address dump The end address of memory region section isn't correctly calculated which leads to overflowed mtree dump: Dispatch Physical sections ...... #70 @0000000000002000..0000000000011fff io [ROOT] #71 @0000000000005000..0000000000005fff (noname) #72 @0000000000005000..0000000000014fff io [ROOT] #73 @0000000000005658..0000000000005658 vmport #74 @0000000000005659..0000000000015658 io [ROOT] #75 @0000000000006000..0000000000015fff io [ROOT] After fix: #70 @0000000000002000..0000000000004fff io [ROOT] #71 @0000000000005000..0000000000005fff (noname) #72 @0000000000005000..0000000000005657 io [ROOT] #73 @0000000000005658..0000000000005658 vmport #74 @0000000000005659..0000000000005fff io [ROOT] #75 @0000000000006000..000000000000ffff io [ROOT] Fixes: 5e8fd947e2670 ("memory: Rework "info mtree" to print flat views and dispatch trees") Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20220622095912.3430583-1-zhenzhong.duan@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> 08 November 2022, 20:53:40 UTC
bc5add1 Si-Wei Liu 08 November 2022, 04:19:28 UTC vhost-vdpa: fix assert !virtio_net_get_subqueue(nc)->async_tx.elem in virtio_net_reset The citing commit has incorrect code in vhost_vdpa_receive() that returns zero instead of full packet size to the caller. This renders pending packets unable to be freed so then get clogged in the tx queue forever. When device is being reset later on, below assertion failure ensues: 0 0x00007f86d53bb387 in raise () from /lib64/libc.so.6 1 0x00007f86d53bca78 in abort () from /lib64/libc.so.6 2 0x00007f86d53b41a6 in __assert_fail_base () from /lib64/libc.so.6 3 0x00007f86d53b4252 in __assert_fail () from /lib64/libc.so.6 4 0x000055b8f6ff6fcc in virtio_net_reset (vdev=<optimized out>) at /usr/src/debug/qemu/hw/net/virtio-net.c:563 5 0x000055b8f7012fcf in virtio_reset (opaque=0x55b8faf881f0) at /usr/src/debug/qemu/hw/virtio/virtio.c:1993 6 0x000055b8f71f0086 in virtio_bus_reset (bus=bus@entry=0x55b8faf88178) at /usr/src/debug/qemu/hw/virtio/virtio-bus.c:102 7 0x000055b8f71f1620 in virtio_pci_reset (qdev=<optimized out>) at /usr/src/debug/qemu/hw/virtio/virtio-pci.c:1845 8 0x000055b8f6fafc6c in memory_region_write_accessor (mr=<optimized out>, addr=<optimized out>, value=<optimized out>, size=<optimized out>, shift=<optimized out>, mask=<optimized out>, attrs=...) at /usr/src/debug/qemu/memory.c:483 9 0x000055b8f6fadce9 in access_with_adjusted_size (addr=addr@entry=20, value=value@entry=0x7f867e7fb7e8, size=size@entry=1, access_size_min=<optimized out>, access_size_max=<optimized out>, access_fn=0x55b8f6fafc20 <memory_region_write_accessor>, mr=0x55b8faf80a50, attrs=...) at /usr/src/debug/qemu/memory.c:544 10 0x000055b8f6fb1d0b in memory_region_dispatch_write (mr=mr@entry=0x55b8faf80a50, addr=addr@entry=20, data=0, op=<optimized out>, attrs=attrs@entry=...) at /usr/src/debug/qemu/memory.c:1470 11 0x000055b8f6f62ada in flatview_write_continue (fv=fv@entry=0x7f86ac04cd20, addr=addr@entry=549755813908, attrs=..., attrs@entry=..., buf=buf@entry=0x7f86d0223028 <Address 0x7f86d0223028 out of bounds>, len=len@entry=1, addr1=20, l=1, mr=0x55b8faf80a50) at /usr/src/debug/qemu/exec.c:3266 12 0x000055b8f6f62c8f in flatview_write (fv=0x7f86ac04cd20, addr=549755813908, attrs=..., buf=0x7f86d0223028 <Address 0x7f86d0223028 out of bounds>, len=1) at /usr/src/debug/qemu/exec.c:3306 13 0x000055b8f6f674cb in address_space_write (as=<optimized out>, addr=<optimized out>, attrs=..., buf=<optimized out>, len=<optimized out>) at /usr/src/debug/qemu/exec.c:3396 14 0x000055b8f6f67575 in address_space_rw (as=<optimized out>, addr=<optimized out>, attrs=..., attrs@entry=..., buf=buf@entry=0x7f86d0223028 <Address 0x7f86d0223028 out of bounds>, len=<optimized out>, is_write=<optimized out>) at /usr/src/debug/qemu/exec.c:3406 15 0x000055b8f6fc1cc8 in kvm_cpu_exec (cpu=cpu@entry=0x55b8f9aa0e10) at /usr/src/debug/qemu/accel/kvm/kvm-all.c:2410 16 0x000055b8f6fa5f5e in qemu_kvm_cpu_thread_fn (arg=0x55b8f9aa0e10) at /usr/src/debug/qemu/cpus.c:1318 17 0x000055b8f7336e16 in qemu_thread_start (args=0x55b8f9ac8480) at /usr/src/debug/qemu/util/qemu-thread-posix.c:519 18 0x00007f86d575aea5 in start_thread () from /lib64/libpthread.so.0 19 0x00007f86d5483b2d in clone () from /lib64/libc.so.6 Make vhost_vdpa_receive() return the size passed in as is, so that the caller qemu_deliver_packet_iov() would eventually propagate it back to virtio_net_flush_tx() to release pending packets from the async_tx queue. Which corresponds to the drop path where qemu_sendv_packet_async() returns non-zero in virtio_net_flush_tx(). Fixes: 846a1e85da64 ("vdpa: Add dummy receive callback") Cc: Eugenio Perez Martin <eperezma@redhat.com> Signed-off-by: Si-Wei Liu <si-wei.liu@oracle.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20221108041929.18417-2-jasowang@redhat.com> 08 November 2022, 18:38:02 UTC
ade760a Stefan Hajnoczi 08 November 2022, 16:34:06 UTC Merge tag 'pull-request-2022-11-08' of https://gitlab.com/thuth/qemu into staging * Last minute s390x fixes before the hard freeze * Whiste space clean-up in ui/, display/ and hw/usb/ # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmNqPZ0RHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbVbwxAArAxJewpow+QBj7dMd6qLrpC7mjxgiiQD # F8XNYh6bPpPo3+4exmMKMS+DGSLC5TJnp61F4IHyH+yOx8DVWmrjo97q+nWYYD4y # jOdC5a2kzkMzVjrxy26uvPhoUGkiM5w8H5bF9hcWukuEwqpoJPU7u5RXd1yn48Ju # O1RrASw+rHZSnCGFFXldG2HoS+bUOaZRHQs5kV9EwpqEn42eQtq38CQ7YEMloOkD # FpPl75KEQ9/doqSbGLdFP1HzaG/emtFnioIXlGM3Y7RzDxCgvKTdAvPCOBO7LxHA # oOY/nFcRYIEUslvyZLUXahKE2qBv2nenmWAQ9lwGd/iU78nWzR19BZdpItSP3Sjj # HFLOKztqI8qLbx966uOU8O5FaYqfGPV6QZVOSzAl7u8GZbqpN5lp+uArEoGtawMo # 9fRDAgSoser9AAIWr1TOoFGRff3VT4hlZeale3VOmfxAOBc2r70pzvk3ou5mo8NU # VXb6Uz5nNIm8RV9fr6/jgllfQDMiCHSwaAnC1hABqAwatcU/SJ4dKfXbdwjsPN8V # jgC5GqAHaC9mwQu0rfZSzuGZkosh0MZVik/xcWO3hspT/CyIafpi42POyQEjOMYf # 5SgJ8ydV32xEGQw66cl9yLAuhN4F8eTavLwQBV7pmCeySm8HCFGuZrmQkeOTBTD2 # HEbJJjz9zgI= # =P8Mt # -----END PGP SIGNATURE----- # gpg: Signature made Tue 08 Nov 2022 06:29:33 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-11-08' of https://gitlab.com/thuth/qemu: hw/usb: fix tab indentation hw/display: fix tab indentation ui: fix tab indentation s390x/s390-virtio-ccw: Switch off zPCI enhancements on older machines Revert "s390x/s390-virtio-ccw: add zpcii-disable machine property" Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 08 November 2022, 16:34:06 UTC
3ba5fe4 Stefan Hajnoczi 08 November 2022, 13:43:37 UTC Merge tag 'mips-20221108' of https://github.com/philmd/qemu into staging MIPS patches queue - Remove -Wclobbered in nanoMIPS disassembler (Richard Henderson) - Fix invalid string formats in nanoMIPS disassembler (myself) - Allow Loongson-2F to access XKPHYS in kernel mode (Jiaxun Yang) - Octeon opcode fixes (Jiaxun Yang, Pavel Dovgalyuk) - MAINTAINERS nanoMIPS update # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmNpnTYACgkQ4+MsLN6t # wN4t2A//XLIH7uL+u6kqGm45fVyy58R1NDoj2afNv5rRqIcXSrP9zRH00woLmGzs # pYLbu3yOynY2/OSU3iooAaXjQz8ub3YIpceAQdD26OgnpTrwVzKO9jvQz2UlDrzs # gETnHfqwZDBzxbqkUXxT7Pe3NRQzRmMgrMYNJm+e7UokCVy3c2PZ6vBdC5zvwS6K # LwnuEBvG74fV70D42dYay0wTB37z7m5Cf7uMp7TrEA+2HLgIZl+J9AuCmZxZZxdU # sh0AvNiVaKbHT55lazWAMvmVuUEl5zLTEUa1B0sOv081ZaY3ACBuh6Q8VpNgkgSx # qxKQbye+LtnDDYckeIRa3jI5Fs5AagC6lPPJJpiiFnMqpQaPYhNDFFjR5LNdwfQ6 # cN1lU4toi2B5LuUmiCEJrAsMgocLaNVnhwas391vtIFZh+onN/wZ1sE1Ur1kZkL7 # and2QDr2C8Y7qnpP3q8QRSz1yz+pyvTRcRIwjrnRGIgOfQUOiYeLB1RO01VOFn8u # 0Oa5gKrtClnQxMfZqoRIGucrnbZdrP/oHwsVOKUdDDNpAceVEJ0dvBiUv6WhQQ/4 # G6Ih2GJ/gJU3Ld8UliA9MCzISbvNoQ6EHYk0YqrH8B/MCzvOLbbmaZban3+xFTma # c2YGQ16ZIQsZMm00sB1Du8l9H9ms/N0VJcSx9txD2YbQWOA/bMs= # =gQ7f # -----END PGP SIGNATURE----- # gpg: Signature made Mon 07 Nov 2022 19:05:10 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'mips-20221108' of https://github.com/philmd/qemu: MAINTAINERS: Inherit from nanoMIPS disas/nanomips: Tidy read for 48-bit opcodes disas/nanomips: Split out read_u16 disas/nanomips: Merge insn{1,2,3} into words[3] disas/nanomips: Move setjmp into nanomips_dis disas/nanomips: Remove headers already included by "qemu/osdep.h" disas/nanomips: Use G_GNUC_PRINTF to avoid invalid string formats disas/nanomips: Fix invalid PRIx64 format calling img_format() disas/nanomips: Fix invalid PRId64 format calling img_format() target/mips: Don't check COP1X for 64 bit FP mode target/mips: Disable DSP ASE for Octeon68XX target/mips: Enable LBX/LWX/* instructions for Octeon target/mips: Cast offset field of Octeon BBIT to int16_t target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 08 November 2022, 16:33:27 UTC
6c10e08 Amarjargal Gundjalam 25 October 2022, 14:28:11 UTC hw/usb: fix tab indentation The TABs should be replaced with spaces, to make sure that we have a consistent coding style with an indentation of 4 spaces everywhere. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/370 Signed-off-by: Amarjargal Gundjalam <amarjargal16@gmail.com> Message-Id: <6c993f57800f8fef7a910074620f6e80e077a3d1.1666707782.git.amarjargal16@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com> 08 November 2022, 10:13:48 UTC
a076a3d Amarjargal Gundjalam 25 October 2022, 14:28:10 UTC hw/display: fix tab indentation The TABs should be replaced with spaces, to make sure that we have a consistent coding style with an indentation of 4 spaces everywhere. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/370 Signed-off-by: Amarjargal Gundjalam <amarjargal16@gmail.com> Message-Id: <5cefd05b4d3721d416e48e6df19df18cb6338933.1666707782.git.amarjargal16@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> 08 November 2022, 09:23:32 UTC
ef99aa2 Amarjargal Gundjalam 25 October 2022, 14:28:08 UTC ui: fix tab indentation The TABs should be replaced with spaces, to make sure that we have a consistent coding style with an indentation of 4 spaces everywhere. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/370 Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Amarjargal Gundjalam <amarjargal16@gmail.com> Message-Id: <9a0d0718aafaa52029fad76a149f3200b6bba0dd.1666707782.git.amarjargal16@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> 08 November 2022, 09:23:06 UTC
d3d1a40 Cédric Le Goater 07 November 2022, 16:13:49 UTC s390x/s390-virtio-ccw: Switch off zPCI enhancements on older machines zPCI enhancement features (interpretation and forward assist) were recently introduced to improve performance on PCI passthrough devices. To maintain the same behaviour on older Z machines, deactivate the features with the associated properties. Signed-off-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20221107161349.1032730-3-clg@kaod.org> Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com> 08 November 2022, 09:11:02 UTC
5770289 Cédric Le Goater 07 November 2022, 16:13:48 UTC Revert "s390x/s390-virtio-ccw: add zpcii-disable machine property" This reverts commit 59d1ce44396e3ad2330dc3261ff3da7ad3a16184. The "zpcii-disable" machine property is redundant with the "interpret" zPCI device property. Remove it for clarification. Signed-off-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20221107161349.1032730-2-clg@kaod.org> Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com> 08 November 2022, 09:10:57 UTC
30dd5ff Philippe Mathieu-Daudé 30 October 2022, 22:38:49 UTC MAINTAINERS: Inherit from nanoMIPS 6 months ago Stefan Pejic stepped in as nanoMIPS maintainer (see commit a 8e0e23445a "target/mips: Undeprecate nanoMIPS ISA support in QEMU"), however today his email is bouncing: ** Message blocked ** Your message to stefan.pejic@syrmia.com has been blocked. See technical details below for more information. The response from the remote server was: 550 5.4.1 Recipient address rejected: Access denied. AS(201806281) [DBAEUR03FT030.eop-EUR03.prod.protection.outlook.com] To avoid unmaintained code, I feel forced to merge this code back with the generic MIPS section. Historical references: - https://lore.kernel.org/qemu-devel/TY0PR03MB679726901BD6C6BE40114A2FE2A79@TY0PR03MB6797.apcprd03.prod.outlook.com/ - https://lore.kernel.org/qemu-devel/b858a20e97b74e7b90a94948314d0008@MTKMBS62N2.mediatek.inc/ Cc: Vince Del Vecchio <Vince.DelVecchio@mediatek.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <49f41916-687f-b9e5-2de7-9c658fe0d4c7@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221101114458.25756-6-philmd@linaro.org> 08 November 2022, 00:04:29 UTC
bb3daca Richard Henderson 06 November 2022, 02:37:33 UTC disas/nanomips: Tidy read for 48-bit opcodes There is no point in looking for a 48-bit opcode if we've not read the second word for a 32-bit opcode. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221106023735.5277-5-richard.henderson@linaro.org> 08 November 2022, 00:04:25 UTC
1414e3f Richard Henderson 06 November 2022, 02:37:32 UTC disas/nanomips: Split out read_u16 Split out a helper function for reading a uint16_t with the correct endianness. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221106023735.5277-4-richard.henderson@linaro.org> 08 November 2022, 00:04:25 UTC
ad12061 Richard Henderson 06 November 2022, 21:28:48 UTC disas/nanomips: Merge insn{1,2,3} into words[3] Since Disassemble wants the data in this format, collect it that way. This allows using a loop to print the bytes. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221106212852.152384-3-richard.henderson@linaro.org> 08 November 2022, 00:04:25 UTC
24449fc Richard Henderson 06 November 2022, 21:28:47 UTC disas/nanomips: Move setjmp into nanomips_dis Reduce the number of local variables within the scope of the setjmp by moving it to the existing helper. The actual length returned from Disassemble is not used, because we have already determined the length while reading bytes. Fixes: nanomips.c: In function ‘print_insn_nanomips’: nanomips.c:21925:14: error: variable ‘insn1’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] nanomips.c:21925:25: error: variable ‘insn2’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] nanomips.c:21925:36: error: variable ‘insn3’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] nanomips.c:21926:22: error: variable ‘buf’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221106212852.152384-2-richard.henderson@linaro.org> 08 November 2022, 00:04:25 UTC
e9ebb66 Philippe Mathieu-Daudé 01 November 2022, 11:44:57 UTC disas/nanomips: Remove headers already included by "qemu/osdep.h" Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221101114458.25756-5-philmd@linaro.org> 08 November 2022, 00:04:25 UTC
d03a008 Philippe Mathieu-Daudé 01 November 2022, 11:44:56 UTC disas/nanomips: Use G_GNUC_PRINTF to avoid invalid string formats Suggested-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221101114458.25756-4-philmd@linaro.org> 08 November 2022, 00:04:25 UTC
50fc094 Philippe Mathieu-Daudé 01 November 2022, 11:44:55 UTC disas/nanomips: Fix invalid PRIx64 format calling img_format() Fix: disas/nanomips.c:12231:62: warning: format specifies type 'char *' but the argument has type 'uint64' (aka 'unsigned long long') [-Wformat] return img_format("RESTOREF 0x%" PRIx64 ", %s", u_value, count_value); ~~ ^~~~~~~~~~~ %llu Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions") Reported-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221101114458.25756-3-philmd@linaro.org> 08 November 2022, 00:04:25 UTC
04849c9 Philippe Mathieu-Daudé 01 November 2022, 11:44:54 UTC disas/nanomips: Fix invalid PRId64 format calling img_format() Fix warnings such: disas/nanomips.c:3251:64: warning: format specifies type 'char *' but the argument has type 'int64' (aka 'long long') [-Wformat] return img_format("CACHE 0x%" PRIx64 ", %s(%s)", op_value, s_value, rs); ~~ ^~~~~~~ %lld To avoid crashes such (kernel from commit f375ad6a0d): $ qemu-system-mipsel -cpu I7200 -d in_asm -kernel generic_nano32r6el_page4k ... ---------------- IN: __bzero 0x805c6084: 20c4 6950 ADDU r13, a0, a2 0x805c6088: 9089 ADDIU a0, 1 Process 70261 stopped * thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0) frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4 libsystem_platform.dylib`: -> 0x1bfe38864 <+4>: ldr q0, [x1] 0x1bfe38868 <+8>: adr x3, #-0xc8 ; ___lldb_unnamed_symbol314 0x1bfe3886c <+12>: ldr q2, [x3], #0x10 0x1bfe38870 <+16>: and x2, x0, #0xf Target 0: (qemu-system-mipsel) stopped. (lldb) bt * thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0) * frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4 frame #1: 0x00000001bfce76a0 libsystem_c.dylib`__vfprintf + 4544 frame #2: 0x00000001bfd158b4 libsystem_c.dylib`_vasprintf + 280 frame #3: 0x0000000101c22fb0 libglib-2.0.0.dylib`g_vasprintf + 28 frame #4: 0x0000000101bfb7d8 libglib-2.0.0.dylib`g_strdup_vprintf + 32 frame #5: 0x000000010000fb70 qemu-system-mipsel`img_format(format=<unavailable>) at nanomips.c:103:14 [opt] frame #6: 0x0000000100018868 qemu-system-mipsel`SB_S9_(instruction=<unavailable>, info=<unavailable>) at nanomips.c:12616:12 [opt] frame #7: 0x000000010000f90c qemu-system-mipsel`print_insn_nanomips at nanomips.c:589:28 [opt] Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions") Reported-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221101114458.25756-2-philmd@linaro.org> 08 November 2022, 00:04:25 UTC
2a2105a Jiaxun Yang 02 November 2022, 16:57:18 UTC target/mips: Don't check COP1X for 64 bit FP mode Some implementations (i.e. Loongson-2F) may decide to implement a 64 bit FPU without implementing COP1X instructions. As the eligibility of 64 bit FP instructions is already determined by CP0St_FR, there is no need to check for COP1X again. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com> [PMD: Add missing trailing parenthesis (buildfix)] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> 08 November 2022, 00:04:25 UTC
4bfc895 Jiaxun Yang 31 October 2022, 13:25:31 UTC target/mips: Disable DSP ASE for Octeon68XX I don't have access to Octeon68XX hardware but according to my investigation Octeon never had DSP ASE support. As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference Manual" CP0C3_DSPP is reserved bit and read as 0. Also I do have access to a Ubiquiti Edgerouter 4 which has Octeon CN7130 processor and I can confirm CP0C3_DSPP is read as 0 on that processor. Further more, in linux kernel: arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h cpu_has_dsp is overridden as 0. So I believe we shouldn't emulate DSP in QEMU as well. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru> Message-Id: <20221031132531.18122-4-jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> 08 November 2022, 00:04:25 UTC
4525ea7 Pavel Dovgalyuk 01 November 2022, 05:29:44 UTC target/mips: Enable LBX/LWX/* instructions for Octeon This patch changes condition and function name for enabling indexed load instructions for Octeon vCPUs. Octeons do not have DSP extension, but implement LBX-and-others. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <166728058455.229236.13834649461181619195.stgit@pasha-ThinkPad-X280> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> 08 November 2022, 00:04:25 UTC
0e8b301 Jiaxun Yang 31 October 2022, 13:25:30 UTC target/mips: Cast offset field of Octeon BBIT to int16_t As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference Manual" offset field is signed 16 bit value. However arg_BBIT.offset is unsigned. We need to cast it as signed to do address calculation. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221031132531.18122-3-jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> 08 November 2022, 00:04:25 UTC
8063db0 Jiaxun Yang 31 October 2022, 13:25:29 UTC target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F As per an unpublished document, in later reversion of chips CP0St_{KX, SX, UX} is not writeable and hardcoded to 1. Without those bits set, kernel is unable to access XKPHYS address segment. So just set them up on CPU reset. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221031132531.18122-2-jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> 08 November 2022, 00:04:25 UTC
f21f1cf Stefan Hajnoczi 07 November 2022, 23:43:56 UTC Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging pci,pc,virtio: features, tests, fixes, cleanups lots of acpi rework first version of biosbits infrastructure ASID support in vhost-vdpa core_count2 support in smbios PCIe DOE emulation virtio vq reset HMAT support part of infrastructure for viommu support in vhost-vdpa VTD PASID support fixes, tests all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmNpXDkPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpD0AH/2G8ZPrgrxJC9y3uD5/5J6QRzO+TsDYbg5ut # uBf4rKSHHzcu6zdyAfsrhbAKKzyD4HrEGNXZrBjnKM1xCiB/SGBcDIWntwrca2+s # 5Dpbi4xvd4tg6tVD4b47XNDCcn2uUbeI0e2M5QIbtCmzdi/xKbFAfl5G8DQp431X # Kmz79G4CdKWyjVlM0HoYmdCw/4FxkdjD02tE/Uc5YMrePNaEg5Bw4hjCHbx1b6ur # 6gjeXAtncm9s4sO0l+sIdyiqlxiTry9FSr35WaQ0qPU+Og5zaf1EiWfdl8TRo4qU # EAATw5A4hyw11GfOGp7oOVkTGvcNB/H7aIxD7emdWZV8+BMRPKo= # =zTCn # -----END PGP SIGNATURE----- # gpg: Signature made Mon 07 Nov 2022 14:27:53 EST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (83 commits) checkpatch: better pattern for inline comments hw/virtio: introduce virtio_device_should_start tests/acpi: update tables for new core count test bios-tables-test: add test for number of cores > 255 tests/acpi: allow changes for core_count2 test bios-tables-test: teach test to use smbios 3.0 tables hw/smbios: add core_count2 to smbios table type 4 vhost-user: Support vhost_dev_start vhost: Change the sequence of device start intel-iommu: PASID support intel-iommu: convert VTD_PE_GET_FPD_ERR() to be a function intel-iommu: drop VTDBus intel-iommu: don't warn guest errors when getting rid2pasid entry vfio: move implement of vfio_get_xlat_addr() to memory.c tests: virt: Update expected *.acpihmatvirt tables tests: acpi: aarch64/virt: add a test for hmat nodes with no initiators hw/arm/virt: Enable HMAT on arm virt machine tests: Add HMAT AArch64/virt empty table files tests: acpi: q35: update expected blobs *.hmat-noinitiators expected HMAT: tests: acpi: q35: add test for hmat nodes without initiators ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 07 November 2022, 23:43:56 UTC
524fc73 Greg Kurz 04 November 2022, 12:00:59 UTC util/log: Ignore per-thread flag if global file already there If QEMU is started with `-D qemu.log.%d` without any `-d` option, doing `log all` in the monitor fails with: Filename template with '%d' required for 'tid' It is confusing since '%d' was actually passed. This happens because QEMU caches the log file name with %d converted to getpid() since `tid` wasn't required. This name isn't suitable for a subsequent enablement of per-thread logs. There's little cause to change the behavior as `-d tid` is mostly used at user-only startup. Drop the per-thread from the requested flags in this case : `log all` will thus enable everything except `tid` instead of failing. This is preferable over forcing the user to enable each log item individually. With this patch, `tid` is now truely immutable : it can only be set or unset from the command line and never changed afterwards. Fixes: 4e51069d6793 ("util/log: Support per-thread log files") Cc: richard.henderson@linaro.org Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20221104120059.678470-3-groug@kaod.org Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 07 November 2022, 21:00:02 UTC
479b350 Greg Kurz 04 November 2022, 12:00:58 UTC util/log: Make the per-thread flag immutable Per-thread logging was implemented under the assumption that once enabled, it is not possible to switch back to single file logging. This isn't enforced though and it is possible to go through the global file opening sequence in per-thread mode. The code isn't ready for this and produces unexpected results as detailed below. Start QEMU in system emulation mode with `-D ./qemu.log.%d -d tid` and then change the log level from the monitor to something that doesn't have tid, e.g. `log cpu_reset`. The value of log_flags is zero and per_thread is set to false : the rest of the code then assumes it is running in the global log case and opens a file named `qemu.log.%d`, which is obviously not an expected behavior. Enforce the immutability of the flag early in qemu_set_log_internal() so that its value is correct for all subsequent users. Fixes: 4e51069d6793 ("util/log: Support per-thread log files") Cc: richard.henderson@linaro.org Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20221104120059.678470-2-groug@kaod.org Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 07 November 2022, 21:00:02 UTC
622a84e Stefan Hajnoczi 07 November 2022, 20:21:45 UTC Merge tag 'pull-loongarch-20221107' of https://gitlab.com/gaosong/qemu into staging pull-loongarch-20221107 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCY2hz5gAKCRBAov/yOSY+ # 31ESA/9ppQVu70y8AnA/aYCzC6koQxxAsaD/lvwc7M1xzeZnjwOsVnsFLpZITTJj # 2+2O/BlEO3uRvAtV6E7Vtu9D/+Cc+HQ7yOFnwbY0jZmePThp3YYtTg6o+2T7/9ya # RMicgny1SYjsOjG8/Uam9+dRbH5QheNFwid0BWFhMts9MDB3Mg== # =zZ8m # -----END PGP SIGNATURE----- # gpg: Signature made Sun 06 Nov 2022 21:56:38 EST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20221107' of https://gitlab.com/gaosong/qemu: target/loongarch: Fix return value of CHECK_FPE target/loongarch: Separate the hardware flags into MMU index and PLV Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> 07 November 2022, 20:21:45 UTC
1ef47f4 Michael S. Tsirkin 07 November 2022, 14:52:16 UTC checkpatch: better pattern for inline comments checkpatch is unhappy about this line: WARNING: Block comments use a leading /* on a separate line #50: FILE: hw/acpi/nvdimm.c:1074: + aml_equal(aml_sizeof(pckg), aml_int(1)) /* 1 element? */)); but there's nothing wrong with it - the check is just too simplistic. It will also miss lines which mix inline and block comments. Instead, let's strip all inline comments from a line and then check for block comments. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:25:51 UTC
259d69c Alex Bennée 07 November 2022, 12:14:07 UTC hw/virtio: introduce virtio_device_should_start The previous fix to virtio_device_started revealed a problem in its use by both the core and the device code. The core code should be able to handle the device "starting" while the VM isn't running to handle the restoration of migration state. To solve this duel use introduce a new helper for use by the vhost-user backends who all use it to feed a should_start variable. We can also pick up a change vhost_user_blk_set_status while we are at it which follows the same pattern. Fixes: 9f6bcfd99f (hw/virtio: move vm_running check to virtio_device_started) Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: "Michael S. Tsirkin" <mst@redhat.com> Message-Id: <20221107121407.1010913-1-alex.bennee@linaro.org> 07 November 2022, 19:08:18 UTC
b22fbc5 Julia Suvorova 11 October 2022, 11:17:31 UTC tests/acpi: update tables for new core count test Changes in the tables (for 275 cores): FACP: + Use APIC Cluster Model (V4) : 1 APIC: +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 ... + +[81Ch 2076 1] Subtable Type : 00 [Processor Local APIC] +[81Dh 2077 1] Length : 08 +[81Eh 2078 1] Processor ID : FE +[81Fh 2079 1] Local Apic ID : FE +[820h 2080 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[824h 2084 1] Subtable Type : 09 [Processor Local x2APIC] +[825h 2085 1] Length : 10 +[826h 2086 2] Reserved : 0000 +[828h 2088 4] Processor x2Apic ID : 000000FF +[82Ch 2092 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 +[830h 2096 4] Processor UID : 000000FF ... DSDT: + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + } ... + Processor (C0FE, 0xFE, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0xFE)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0xFE, 0xFE, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0xFE) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0xFE, Arg0, Arg1, Arg2) + } + } + + Device (C0FF) + { + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, 0xFF) // _UID: Unique ID + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0xFF)) + } + + Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry + { + /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0xFF) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0xFF, Arg0, Arg1, Arg2) + } + } + ... Signed-off-by: Julia Suvorova <jusual@redhat.com> Message-Id: <20220731162141.178443-6-jusual@redhat.com> Message-Id: <20221011111731.101412-6-jusual@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:18 UTC
2d80b33 Julia Suvorova 11 October 2022, 11:17:30 UTC bios-tables-test: add test for number of cores > 255 The new test is run with a large number of cpus and checks if the core_count field in smbios_cpu_test (structure type 4) is correct. Choose q35 as it allows to run with -smp > 255. Signed-off-by: Julia Suvorova <jusual@redhat.com> Message-Id: <20220731162141.178443-5-jusual@redhat.com> Message-Id: <20221011111731.101412-5-jusual@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> 07 November 2022, 19:08:18 UTC
159a0da Julia Suvorova 11 October 2022, 11:17:29 UTC tests/acpi: allow changes for core_count2 test Signed-off-by: Julia Suvorova <jusual@redhat.com> Message-Id: <20220731162141.178443-4-jusual@redhat.com> Message-Id: <20221011111731.101412-4-jusual@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> 07 November 2022, 19:08:18 UTC
33bff4a Julia Suvorova 11 October 2022, 11:17:28 UTC bios-tables-test: teach test to use smbios 3.0 tables Introduce the 64-bit entry point. Since we no longer have a total number of structures, stop checking for the new ones at the EOF structure (type 127). Signed-off-by: Julia Suvorova <jusual@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220731162141.178443-3-jusual@redhat.com> Message-Id: <20221011111731.101412-3-jusual@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:18 UTC
05e27d7 Julia Suvorova 11 October 2022, 11:17:27 UTC hw/smbios: add core_count2 to smbios table type 4 In order to use the increased number of cpus, we need to bring smbios tables in line with the SMBIOS 3.0 specification. This allows us to introduce core_count2 which acts as a duplicate of core_count if we have fewer cores than 256, and contains the actual core number per socket if we have more. core_enabled2 and thread_count2 fields work the same way. Signed-off-by: Julia Suvorova <jusual@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220731162141.178443-2-jusual@redhat.com> Message-Id: <20221011111731.101412-2-jusual@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
923b892 Yajun Wu 17 October 2022, 06:44:52 UTC vhost-user: Support vhost_dev_start The motivation of adding vhost-user vhost_dev_start support is to improve backend configuration speed and reduce live migration VM downtime. Today VQ configuration is issued one by one. For virtio net with multi-queue support, backend needs to update RSS (Receive side scaling) on every rx queue enable. Updating RSS is time-consuming (typical time like 7ms). Implement already defined vhost status and message in the vhost specification [1]. (a) VHOST_USER_PROTOCOL_F_STATUS (b) VHOST_USER_SET_STATUS (c) VHOST_USER_GET_STATUS Send message VHOST_USER_SET_STATUS with VIRTIO_CONFIG_S_DRIVER_OK for device start and reset(0) for device stop. On reception of the DRIVER_OK message, backend can apply the needed setting only once (instead of incremental) and also utilize parallelism on enabling queues. This improves QEMU's live migration downtime with vhost user backend implementation by great margin, specially for the large number of VQs of 64 from 800 msec to 250 msec. [1] https://qemu-project.gitlab.io/qemu/interop/vhost-user.html Signed-off-by: Yajun Wu <yajunw@nvidia.com> Acked-by: Parav Pandit <parav@nvidia.com> Message-Id: <20221017064452.1226514-3-yajunw@nvidia.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
8b67fe0 Yajun Wu 17 October 2022, 06:44:51 UTC vhost: Change the sequence of device start This patch is part of adding vhost-user vhost_dev_start support. The motivation is to improve backend configuration speed and reduce live migration VM downtime. Moving the device start routines after finishing all the necessary device and VQ configuration, further aligning to the virtio specification for "device initialization sequence". Following patch will add vhost-user vhost_dev_start support. Signed-off-by: Yajun Wu <yajunw@nvidia.com> Acked-by: Parav Pandit <parav@nvidia.com> Message-Id: <20221017064452.1226514-2-yajunw@nvidia.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
1b2b123 Jason Wang 28 October 2022, 06:14:36 UTC intel-iommu: PASID support This patch introduce ECAP_PASID via "x-pasid-mode". Based on the existing support for scalable mode, we need to implement the following missing parts: 1) tag VTDAddressSpace with PASID and support IOMMU/DMA translation with PASID 2) tag IOTLB with PASID 3) PASID cache and its flush 4) PASID based IOTLB invalidation For simplicity PASID cache is not implemented so we can simply implement the PASID cache flush as a no and leave it to be implemented in the future. For PASID based IOTLB invalidation, since we haven't had L1 stage support, the PASID based IOTLB invalidation is not implemented yet. For PASID based device IOTLB invalidation, it requires the support for vhost so we forbid enabling device IOTLB when PASID is enabled now. Those work could be done in the future. Note that though PASID based IOMMU translation is ready but no device can issue PASID DMA right now. In this case, PCI_NO_PASID is used as PASID to identify the address without PASID. vtd_find_add_as() has been extended to provision address space with PASID which could be utilized by the future extension of PCI core to allow device model to use PASID based DMA translation. This feature would be useful for: 1) prototyping PASID support for devices like virtio 2) future vPASID work 3) future PRS and vSVA work Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20221028061436.30093-5-jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
940e552 Jason Wang 28 October 2022, 06:14:35 UTC intel-iommu: convert VTD_PE_GET_FPD_ERR() to be a function We used to have a macro for VTD_PE_GET_FPD_ERR() but it has an internal goto which prevents it from being reused. This patch convert that macro to a dedicated function and let the caller to decide what to do (e.g using goto or not). This makes sure it can be re-used for other function that requires fault reporting. Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20221028061436.30093-4-jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> 07 November 2022, 19:08:17 UTC
da8d439 Jason Wang 28 October 2022, 06:14:34 UTC intel-iommu: drop VTDBus We introduce VTDBus structure as an intermediate step for searching the address space. This works well with SID based matching/lookup. But when we want to support SID plus PASID based address space lookup, this intermediate steps turns out to be a burden. So the patch simply drops the VTDBus structure and use the PCIBus and devfn as the key for the g_hash_table(). This simplifies the codes and the future PASID extension. To prevent being slower for past vtd_find_as_from_bus_num() callers, a vtd_as cache indexed by the bus number is introduced to store the last recent search result of a vtd_as belongs to a specific bus. Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20221028061436.30093-3-jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> 07 November 2022, 19:08:17 UTC
fb1d084 Jason Wang 28 October 2022, 06:14:33 UTC intel-iommu: don't warn guest errors when getting rid2pasid entry We use to warn on wrong rid2pasid entry. But this error could be triggered by the guest and could happens during initialization. So let's don't warn in this case. Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20221028061436.30093-2-jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> 07 November 2022, 19:08:17 UTC
baa44bc Cindy Lu 31 October 2022, 03:10:19 UTC vfio: move implement of vfio_get_xlat_addr() to memory.c - Move the implement vfio_get_xlat_addr to softmmu/memory.c, and change the name to memory_get_xlat_addr(). So we can use this function on other devices, such as vDPA device. - Add a new function vfio_get_xlat_addr in vfio/common.c, and it will check whether the memory is backed by a discard manager. then device can have its own warning. Signed-off-by: Cindy Lu <lulu@redhat.com> Message-Id: <20221031031020.1405111-2-lulu@redhat.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
be3afe8 Hesham Almatary 27 October 2022, 10:00:37 UTC tests: virt: Update expected *.acpihmatvirt tables * Expected ACPI Data Table [HMAT] [000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table] [004h 0004 4] Table Length : 00000120 [008h 0008 1] Revision : 02 [009h 0009 1] Checksum : 4F [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 4] Reserved : 00000000 [028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [02Ah 0042 2] Reserved : 0000 [02Ch 0044 4] Length : 00000028 [030h 0048 2] Flags (decoded below) : 0001 Processor Proximity Domain Valid : 1 [032h 0050 2] Reserved1 : 0000 [034h 0052 4] Processor Proximity Domain : 00000000 [038h 0056 4] Memory Proximity Domain : 00000000 [03Ch 0060 4] Reserved2 : 00000000 [040h 0064 8] Reserved3 : 0000000000000000 [048h 0072 8] Reserved4 : 0000000000000000 [050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [052h 0082 2] Reserved : 0000 [054h 0084 4] Length : 00000028 [058h 0088 2] Flags (decoded below) : 0001 Processor Proximity Domain Valid : 1 [05Ah 0090 2] Reserved1 : 0000 [05Ch 0092 4] Processor Proximity Domain : 00000001 [060h 0096 4] Memory Proximity Domain : 00000001 [064h 0100 4] Reserved2 : 00000000 [068h 0104 8] Reserved3 : 0000000000000000 [070h 0112 8] Reserved4 : 0000000000000000 [078h 0120 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [07Ah 0122 2] Reserved : 0000 [07Ch 0124 4] Length : 00000028 [080h 0128 2] Flags (decoded below) : 0000 Processor Proximity Domain Valid : 0 [082h 0130 2] Reserved1 : 0000 [084h 0132 4] Processor Proximity Domain : 00000080 [088h 0136 4] Memory Proximity Domain : 00000002 [08Ch 0140 4] Reserved2 : 00000000 [040h 0064 8] Reserved3 : 0000000000000000 [048h 0072 8] Reserved4 : 0000000000000000 [050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [052h 0082 2] Reserved : 0000 [054h 0084 4] Length : 00000028 [058h 0088 2] Flags (decoded below) : 0001 Processor Proximity Domain Valid : 1 [05Ah 0090 2] Reserved1 : 0000 [05Ch 0092 4] Processor Proximity Domain : 00000001 [060h 0096 4] Memory Proximity Domain : 00000001 [064h 0100 4] Reserved2 : 00000000 [068h 0104 8] Reserved3 : 0000000000000000 [070h 0112 8] Reserved4 : 0000000000000000 [078h 0120 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [07Ah 0122 2] Reserved : 0000 [07Ch 0124 4] Length : 00000028 [080h 0128 2] Flags (decoded below) : 0000 Processor Proximity Domain Valid : 0 [082h 0130 2] Reserved1 : 0000 [084h 0132 4] Processor Proximity Domain : 00000080 [088h 0136 4] Memory Proximity Domain : 00000002 [08Ch 0140 4] Reserved2 : 00000000 [090h 0144 8] Reserved3 : 0000000000000000 [098h 0152 8] Reserved4 : 0000000000000000 [0A0h 0160 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0A2h 0162 2] Reserved : 0000 [0A4h 0164 4] Length : 00000040 [0A8h 0168 1] Flags (decoded below) : 00 Memory Hierarchy : 0 [0A9h 0169 1] Data Type : 00 [0AAh 0170 2] Reserved1 : 0000 [0ACh 0172 4] Initiator Proximity Domains # : 00000002 [0B0h 0176 4] Target Proximity Domains # : 00000003 [0B4h 0180 4] Reserved2 : 00000000 [0B8h 0184 8] Entry Base Unit : 0000000000002710 [0C0h 0192 4] Initiator Proximity Domain List : 00000000 [0C4h 0196 4] Initiator Proximity Domain List : 00000001 [0C8h 0200 4] Target Proximity Domain List : 00000000 [0CCh 0204 4] Target Proximity Domain List : 00000001 [0D0h 0208 4] Target Proximity Domain List : 00000002 [0D4h 0212 2] Entry : 0001 [0D6h 0214 2] Entry : 0002 [0D8h 0216 2] Entry : 0003 [0DAh 0218 2] Entry : 0002 [0DCh 0220 2] Entry : 0001 [0DEh 0222 2] Entry : 0003 [0E0h 0224 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0E2h 0226 2] Reserved : 0000 [0E4h 0228 4] Length : 00000040 [0E8h 0232 1] Flags (decoded below) : 00 Memory Hierarchy : 0 [0E9h 0233 1] Data Type : 03 [0EAh 0234 2] Reserved1 : 0000 [0ECh 0236 4] Initiator Proximity Domains # : 00000002 [0F0h 0240 4] Target Proximity Domains # : 00000003 [0F4h 0244 4] Reserved2 : 00000000 [0F8h 0248 8] Entry Base Unit : 0000000000000001 [100h 0256 4] Initiator Proximity Domain List : 00000000 [104h 0260 4] Initiator Proximity Domain List : 00000001 [108h 0264 4] Target Proximity Domain List : 00000000 [10Ch 0268 4] Target Proximity Domain List : 00000001 [110h 0272 4] Target Proximity Domain List : 00000002 [114h 0276 2] Entry : 000A [116h 0278 2] Entry : 0005 [118h 0280 2] Entry : 0001 [11Ah 0282 2] Entry : 0005 [11Ch 0284 2] Entry : 000A [11Eh 0286 2] Entry : 0001 Raw Table Data: Length 288 (0x120) 0000: 48 4D 41 54 20 01 00 00 02 4F 42 4F 43 48 53 20 // HMAT ....OBOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... 0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0050: 00 00 00 00 28 00 00 00 01 00 00 00 01 00 00 00 // ....(........... 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0070: 00 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... 0080: 00 00 00 00 80 00 00 00 02 00 00 00 00 00 00 00 // ................ 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00A0: 01 00 00 00 40 00 00 00 00 00 00 00 02 00 00 00 // ....@........... 00B0: 03 00 00 00 00 00 00 00 10 27 00 00 00 00 00 00 // .........'...... 00C0: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 // ................ 00D0: 02 00 00 00 01 00 02 00 03 00 02 00 01 00 03 00 // ................ 00E0: 01 00 00 00 40 00 00 00 00 03 00 00 02 00 00 00 // ....@........... 00F0: 03 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 // ................ 0100: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 // ................ 0110: 02 00 00 00 0A 00 05 00 01 00 05 00 0A 00 01 00 // ................ Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Message-Id: <20221027100037.251-9-hesham.almatary@huawei.com> Tested-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
b077b07 Hesham Almatary 27 October 2022, 10:00:36 UTC tests: acpi: aarch64/virt: add a test for hmat nodes with no initiators This patch imitates the "tests: acpi: q35: add test for hmat nodes without initiators" commit to test numa nodes with different HMAT attributes, but on AArch64/virt. Tested with: qemu-system-aarch64 -accel tcg \ -machine virt,hmat=on,gic-version=3 -cpu cortex-a57 \ -bios qemu-efi-aarch64/QEMU_EFI.fd \ -kernel Image -append "root=/dev/vda2 console=ttyAMA0" \ -drive if=virtio,file=aarch64.qcow2,format=qcow2,id=hd \ -device virtio-rng-pci \ -net user,hostfwd=tcp::10022-:22 -net nic \ -device intel-hda -device hda-duplex -nographic \ -smp 4 \ -m 3G \ -object memory-backend-ram,size=1G,id=ram0 \ -object memory-backend-ram,size=1G,id=ram1 \ -object memory-backend-ram,size=1G,id=ram2 \ -numa node,nodeid=0,memdev=ram0,cpus=0-1 \ -numa node,nodeid=1,memdev=ram1,cpus=2-3 \ -numa node,nodeid=2,memdev=ram2 \ -numa hmat-lb,initiator=0,target=0,hierarchy=memory,data-type=access-latency,latency=10 \ -numa hmat-lb,initiator=0,target=0,hierarchy=memory,data-type=access-bandwidth,bandwidth=10485760 \ -numa hmat-lb,initiator=0,target=1,hierarchy=memory,data-type=access-latency,latency=20 \ -numa hmat-lb,initiator=0,target=1,hierarchy=memory,data-type=access-bandwidth,bandwidth=5242880 \ -numa hmat-lb,initiator=0,target=2,hierarchy=memory,data-type=access-latency,latency=30 \ -numa hmat-lb,initiator=0,target=2,hierarchy=memory,data-type=access-bandwidth,bandwidth=1048576 \ -numa hmat-lb,initiator=1,target=0,hierarchy=memory,data-type=access-latency,latency=20 \ -numa hmat-lb,initiator=1,target=0,hierarchy=memory,data-type=access-bandwidth,bandwidth=5242880 \ -numa hmat-lb,initiator=1,target=1,hierarchy=memory,data-type=access-latency,latency=10 \ -numa hmat-lb,initiator=1,target=1,hierarchy=memory,data-type=access-bandwidth,bandwidth=10485760 \ -numa hmat-lb,initiator=1,target=2,hierarchy=memory,data-type=access-latency,latency=30 \ -numa hmat-lb,initiator=1,target=2,hierarchy=memory,data-type=access-bandwidth,bandwidth=1048576 Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Message-Id: <20221027100037.251-8-hesham.almatary@huawei.com> Tested-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
7cbd3fd Xiang Chen 27 October 2022, 10:00:35 UTC hw/arm/virt: Enable HMAT on arm virt machine Since the patchset ("Build ACPI Heterogeneous Memory Attribute Table (HMAT)"), HMAT is supported, but only x86 is enabled. Enable HMAT on arm virt machine. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20221027100037.251-7-hesham.almatary@huawei.com> Tested-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
cfb4c05 Hesham Almatary 27 October 2022, 10:00:34 UTC tests: Add HMAT AArch64/virt empty table files Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Message-Id: <20221027100037.251-6-hesham.almatary@huawei.com> Tested-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
84c35b5 Brice Goglin 27 October 2022, 10:00:33 UTC tests: acpi: q35: update expected blobs *.hmat-noinitiators expected HMAT: [000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table] [004h 0004 4] Table Length : 00000120 [008h 0008 1] Revision : 02 [009h 0009 1] Checksum : 4F [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 4] Reserved : 00000000 [028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [02Ah 0042 2] Reserved : 0000 [02Ch 0044 4] Length : 00000028 [030h 0048 2] Flags (decoded below) : 0001 Processor Proximity Domain Valid : 1 [032h 0050 2] Reserved1 : 0000 [034h 0052 4] Attached Initiator Proximity Domain : 00000000 [038h 0056 4] Memory Proximity Domain : 00000000 [03Ch 0060 4] Reserved2 : 00000000 [040h 0064 8] Reserved3 : 0000000000000000 [048h 0072 8] Reserved4 : 0000000000000000 [050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [052h 0082 2] Reserved : 0000 [054h 0084 4] Length : 00000028 [058h 0088 2] Flags (decoded below) : 0001 Processor Proximity Domain Valid : 1 [05Ah 0090 2] Reserved1 : 0000 [05Ch 0092 4] Attached Initiator Proximity Domain : 00000001 [060h 0096 4] Memory Proximity Domain : 00000001 [064h 0100 4] Reserved2 : 00000000 [068h 0104 8] Reserved3 : 0000000000000000 [070h 0112 8] Reserved4 : 0000000000000000 [078h 0120 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [07Ah 0122 2] Reserved : 0000 [07Ch 0124 4] Length : 00000028 [080h 0128 2] Flags (decoded below) : 0000 Processor Proximity Domain Valid : 0 [082h 0130 2] Reserved1 : 0000 [084h 0132 4] Attached Initiator Proximity Domain : 00000080 [088h 0136 4] Memory Proximity Domain : 00000002 [08Ch 0140 4] Reserved2 : 00000000 [090h 0144 8] Reserved3 : 0000000000000000 [098h 0152 8] Reserved4 : 0000000000000000 [0A0h 0160 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0A2h 0162 2] Reserved : 0000 [0A4h 0164 4] Length : 00000040 [0A8h 0168 1] Flags (decoded below) : 00 Memory Hierarchy : 0 [0A9h 0169 1] Data Type : 00 [0AAh 0170 2] Reserved1 : 0000 [0ACh 0172 4] Initiator Proximity Domains # : 00000002 [0B0h 0176 4] Target Proximity Domains # : 00000003 [0B4h 0180 4] Reserved2 : 00000000 [0B8h 0184 8] Entry Base Unit : 0000000000002710 [0C0h 0192 4] Initiator Proximity Domain List : 00000000 [0C4h 0196 4] Initiator Proximity Domain List : 00000001 [0C8h 0200 4] Target Proximity Domain List : 00000000 [0CCh 0204 4] Target Proximity Domain List : 00000001 [0D0h 0208 4] Target Proximity Domain List : 00000002 [0D4h 0212 2] Entry : 0001 [0D6h 0214 2] Entry : 0002 [0D8h 0216 2] Entry : 0003 [0DAh 0218 2] Entry : 0002 [0DCh 0220 2] Entry : 0001 [0DEh 0222 2] Entry : 0003 [0E0h 0224 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0E2h 0226 2] Reserved : 0000 [0E4h 0228 4] Length : 00000040 [0E8h 0232 1] Flags (decoded below) : 00 Memory Hierarchy : 0 [0E9h 0233 1] Data Type : 03 [0EAh 0234 2] Reserved1 : 0000 [0ECh 0236 4] Initiator Proximity Domains # : 00000002 [0F0h 0240 4] Target Proximity Domains # : 00000003 [0F4h 0244 4] Reserved2 : 00000000 [0F8h 0248 8] Entry Base Unit : 0000000000000001 [100h 0256 4] Initiator Proximity Domain List : 00000000 [104h 0260 4] Initiator Proximity Domain List : 00000001 [108h 0264 4] Target Proximity Domain List : 00000000 [10Ch 0268 4] Target Proximity Domain List : 00000001 [110h 0272 4] Target Proximity Domain List : 00000002 [114h 0276 2] Entry : 000A [116h 0278 2] Entry : 0005 [118h 0280 2] Entry : 0001 [11Ah 0282 2] Entry : 0005 [11Ch 0284 2] Entry : 000A [11Eh 0286 2] Entry : 0001 Raw Table Data: Length 288 (0x120) 0000: 48 4D 41 54 20 01 00 00 02 4F 42 4F 43 48 53 20 // HMAT ....OBOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... 0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0050: 00 00 00 00 28 00 00 00 01 00 00 00 01 00 00 00 // ....(........... 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0070: 00 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... 0080: 00 00 00 00 80 00 00 00 02 00 00 00 00 00 00 00 // ................ 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00A0: 01 00 00 00 40 00 00 00 00 00 00 00 02 00 00 00 // ....@........... 00B0: 03 00 00 00 00 00 00 00 10 27 00 00 00 00 00 00 // .........'...... 00C0: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 // ................ 00D0: 02 00 00 00 01 00 02 00 03 00 02 00 01 00 03 00 // ................ 00E0: 01 00 00 00 40 00 00 00 00 03 00 00 02 00 00 00 // ....@........... 00F0: 03 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 // ................ 0100: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 // ................ 0110: 02 00 00 00 0A 00 05 00 01 00 05 00 0A 00 01 00 // ................ Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr> Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Message-Id: <20221027100037.251-5-hesham.almatary@huawei.com> Tested-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
a046f1d Brice Goglin 27 October 2022, 10:00:32 UTC tests: acpi: q35: add test for hmat nodes without initiators expected HMAT: [000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table] [004h 0004 4] Table Length : 00000120 [008h 0008 1] Revision : 02 [009h 0009 1] Checksum : 4F [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 4] Reserved : 00000000 [028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [02Ah 0042 2] Reserved : 0000 [02Ch 0044 4] Length : 00000028 [030h 0048 2] Flags (decoded below) : 0001 Processor Proximity Domain Valid : 1 [032h 0050 2] Reserved1 : 0000 [034h 0052 4] Attached Initiator Proximity Domain : 00000000 [038h 0056 4] Memory Proximity Domain : 00000000 [03Ch 0060 4] Reserved2 : 00000000 [040h 0064 8] Reserved3 : 0000000000000000 [048h 0072 8] Reserved4 : 0000000000000000 [050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [052h 0082 2] Reserved : 0000 [054h 0084 4] Length : 00000028 [058h 0088 2] Flags (decoded below) : 0001 Processor Proximity Domain Valid : 1 [05Ah 0090 2] Reserved1 : 0000 [05Ch 0092 4] Attached Initiator Proximity Domain : 00000001 [060h 0096 4] Memory Proximity Domain : 00000001 [064h 0100 4] Reserved2 : 00000000 [068h 0104 8] Reserved3 : 0000000000000000 [070h 0112 8] Reserved4 : 0000000000000000 [078h 0120 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [07Ah 0122 2] Reserved : 0000 [07Ch 0124 4] Length : 00000028 [080h 0128 2] Flags (decoded below) : 0000 Processor Proximity Domain Valid : 0 [082h 0130 2] Reserved1 : 0000 [084h 0132 4] Attached Initiator Proximity Domain : 00000080 [088h 0136 4] Memory Proximity Domain : 00000002 [08Ch 0140 4] Reserved2 : 00000000 [090h 0144 8] Reserved3 : 0000000000000000 [098h 0152 8] Reserved4 : 0000000000000000 [0A0h 0160 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0A2h 0162 2] Reserved : 0000 [0A4h 0164 4] Length : 00000040 [0A8h 0168 1] Flags (decoded below) : 00 Memory Hierarchy : 0 [0A9h 0169 1] Data Type : 00 [0AAh 0170 2] Reserved1 : 0000 [0ACh 0172 4] Initiator Proximity Domains # : 00000002 [0B0h 0176 4] Target Proximity Domains # : 00000003 [0B4h 0180 4] Reserved2 : 00000000 [0B8h 0184 8] Entry Base Unit : 0000000000002710 [0C0h 0192 4] Initiator Proximity Domain List : 00000000 [0C4h 0196 4] Initiator Proximity Domain List : 00000001 [0C8h 0200 4] Target Proximity Domain List : 00000000 [0CCh 0204 4] Target Proximity Domain List : 00000001 [0D0h 0208 4] Target Proximity Domain List : 00000002 [0D4h 0212 2] Entry : 0001 [0D6h 0214 2] Entry : 0002 [0D8h 0216 2] Entry : 0003 [0DAh 0218 2] Entry : 0002 [0DCh 0220 2] Entry : 0001 [0DEh 0222 2] Entry : 0003 [0E0h 0224 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0E2h 0226 2] Reserved : 0000 [0E4h 0228 4] Length : 00000040 [0E8h 0232 1] Flags (decoded below) : 00 Memory Hierarchy : 0 [0E9h 0233 1] Data Type : 03 [0EAh 0234 2] Reserved1 : 0000 [0ECh 0236 4] Initiator Proximity Domains # : 00000002 [0F0h 0240 4] Target Proximity Domains # : 00000003 [0F4h 0244 4] Reserved2 : 00000000 [0F8h 0248 8] Entry Base Unit : 0000000000000001 [100h 0256 4] Initiator Proximity Domain List : 00000000 [104h 0260 4] Initiator Proximity Domain List : 00000001 [108h 0264 4] Target Proximity Domain List : 00000000 [10Ch 0268 4] Target Proximity Domain List : 00000001 [110h 0272 4] Target Proximity Domain List : 00000002 [114h 0276 2] Entry : 000A [116h 0278 2] Entry : 0005 [118h 0280 2] Entry : 0001 [11Ah 0282 2] Entry : 0005 [11Ch 0284 2] Entry : 000A [11Eh 0286 2] Entry : 0001 Raw Table Data: Length 288 (0x120) 0000: 48 4D 41 54 20 01 00 00 02 4F 42 4F 43 48 53 20 // HMAT ....OBOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... 0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0050: 00 00 00 00 28 00 00 00 01 00 00 00 01 00 00 00 // ....(........... 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0070: 00 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... 0080: 00 00 00 00 80 00 00 00 02 00 00 00 00 00 00 00 // ................ 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00A0: 01 00 00 00 40 00 00 00 00 00 00 00 02 00 00 00 // ....@........... 00B0: 03 00 00 00 00 00 00 00 10 27 00 00 00 00 00 00 // .........'...... 00C0: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 // ................ 00D0: 02 00 00 00 01 00 02 00 03 00 02 00 01 00 03 00 // ................ 00E0: 01 00 00 00 40 00 00 00 00 03 00 00 02 00 00 00 // ....@........... 00F0: 03 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 // ................ 0100: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00 // ................ 0110: 02 00 00 00 0A 00 05 00 01 00 05 00 0A 00 01 00 // ................ Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr> Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Message-Id: <20221027100037.251-4-hesham.almatary@huawei.com> Tested-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
e7cb1ce Brice Goglin 27 October 2022, 10:00:31 UTC tests: acpi: add and whitelist *.hmat-noinitiator expected blobs .. which will be used by follow up hmat-noinitiator test-case. Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr> Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Message-Id: <20221027100037.251-3-hesham.almatary@huawei.com> Tested-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
83bcae9 Brice Goglin 27 October 2022, 10:00:30 UTC hmat acpi: Don't require initiator value in -numa The "Memory Proximity Domain Attributes" structure of the ACPI HMAT has a "Processor Proximity Domain Valid" flag that is currently always set because Qemu -numa requires an initiator=X value when hmat=on. Unsetting this flag allows to create more complex memory topologies by having multiple best initiators for a single memory target. This patch allows -numa without initiator=X when hmat=on by keeping the default value MAX_NODES in numa_state->nodes[i].initiator. All places reading numa_state->nodes[i].initiator already check whether it's different from MAX_NODES before using it. Tested with qemu-system-x86_64 -accel kvm \ -machine pc,hmat=on \ -drive if=pflash,format=raw,file=./OVMF.fd \ -drive media=disk,format=qcow2,file=efi.qcow2 \ -smp 4 \ -m 3G \ -object memory-backend-ram,size=1G,id=ram0 \ -object memory-backend-ram,size=1G,id=ram1 \ -object memory-backend-ram,size=1G,id=ram2 \ -numa node,nodeid=0,memdev=ram0,cpus=0-1 \ -numa node,nodeid=1,memdev=ram1,cpus=2-3 \ -numa node,nodeid=2,memdev=ram2 \ -numa hmat-lb,initiator=0,target=0,hierarchy=memory,data-type=access-latency,latency=10 \ -numa hmat-lb,initiator=0,target=0,hierarchy=memory,data-type=access-bandwidth,bandwidth=10485760 \ -numa hmat-lb,initiator=0,target=1,hierarchy=memory,data-type=access-latency,latency=20 \ -numa hmat-lb,initiator=0,target=1,hierarchy=memory,data-type=access-bandwidth,bandwidth=5242880 \ -numa hmat-lb,initiator=0,target=2,hierarchy=memory,data-type=access-latency,latency=30 \ -numa hmat-lb,initiator=0,target=2,hierarchy=memory,data-type=access-bandwidth,bandwidth=1048576 \ -numa hmat-lb,initiator=1,target=0,hierarchy=memory,data-type=access-latency,latency=20 \ -numa hmat-lb,initiator=1,target=0,hierarchy=memory,data-type=access-bandwidth,bandwidth=5242880 \ -numa hmat-lb,initiator=1,target=1,hierarchy=memory,data-type=access-latency,latency=10 \ -numa hmat-lb,initiator=1,target=1,hierarchy=memory,data-type=access-bandwidth,bandwidth=10485760 \ -numa hmat-lb,initiator=1,target=2,hierarchy=memory,data-type=access-latency,latency=30 \ -numa hmat-lb,initiator=1,target=2,hierarchy=memory,data-type=access-bandwidth,bandwidth=1048576 which reports NUMA node2 at same distance from both node0 and node1 as seen in lstopo: Machine (2966MB total) + Package P#0 NUMANode P#2 (979MB) Group0 NUMANode P#0 (980MB) Core P#0 + PU P#0 Core P#1 + PU P#1 Group0 NUMANode P#1 (1007MB) Core P#2 + PU P#2 Core P#3 + PU P#3 Before this patch, we had to add ",initiator=X" to "-numa node,nodeid=2,memdev=ram2". The lstopo output difference between initiator=1 and no initiator is: @@ -1,10 +1,10 @@ Machine (2966MB total) + Package P#0 + NUMANode P#2 (979MB) Group0 NUMANode P#0 (980MB) Core P#0 + PU P#0 Core P#1 + PU P#1 Group0 NUMANode P#1 (1007MB) - NUMANode P#2 (979MB) Core P#2 + PU P#2 Core P#3 + PU P#3 Corresponding changes in the HMAT MPDA structure: @@ -49,10 +49,10 @@ [078h 0120 2] Structure Type : 0000 [Memory Proximity Domain Attributes] [07Ah 0122 2] Reserved : 0000 [07Ch 0124 4] Length : 00000028 -[080h 0128 2] Flags (decoded below) : 0001 - Processor Proximity Domain Valid : 1 +[080h 0128 2] Flags (decoded below) : 0000 + Processor Proximity Domain Valid : 0 [082h 0130 2] Reserved1 : 0000 -[084h 0132 4] Attached Initiator Proximity Domain : 00000001 +[084h 0132 4] Attached Initiator Proximity Domain : 00000080 [088h 0136 4] Memory Proximity Domain : 00000002 [08Ch 0140 4] Reserved2 : 00000000 [090h 0144 8] Reserved3 : 0000000000000000 Final HMAT SLLB structures: [0A0h 0160 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0A2h 0162 2] Reserved : 0000 [0A4h 0164 4] Length : 00000040 [0A8h 0168 1] Flags (decoded below) : 00 Memory Hierarchy : 0 [0A9h 0169 1] Data Type : 00 [0AAh 0170 2] Reserved1 : 0000 [0ACh 0172 4] Initiator Proximity Domains # : 00000002 [0B0h 0176 4] Target Proximity Domains # : 00000003 [0B4h 0180 4] Reserved2 : 00000000 [0B8h 0184 8] Entry Base Unit : 0000000000002710 [0C0h 0192 4] Initiator Proximity Domain List : 00000000 [0C4h 0196 4] Initiator Proximity Domain List : 00000001 [0C8h 0200 4] Target Proximity Domain List : 00000000 [0CCh 0204 4] Target Proximity Domain List : 00000001 [0D0h 0208 4] Target Proximity Domain List : 00000002 [0D4h 0212 2] Entry : 0001 [0D6h 0214 2] Entry : 0002 [0D8h 0216 2] Entry : 0003 [0DAh 0218 2] Entry : 0002 [0DCh 0220 2] Entry : 0001 [0DEh 0222 2] Entry : 0003 [0E0h 0224 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0E2h 0226 2] Reserved : 0000 [0E4h 0228 4] Length : 00000040 [0E8h 0232 1] Flags (decoded below) : 00 Memory Hierarchy : 0 [0E9h 0233 1] Data Type : 03 [0EAh 0234 2] Reserved1 : 0000 [0ECh 0236 4] Initiator Proximity Domains # : 00000002 [0F0h 0240 4] Target Proximity Domains # : 00000003 [0F4h 0244 4] Reserved2 : 00000000 [0F8h 0248 8] Entry Base Unit : 0000000000000001 [100h 0256 4] Initiator Proximity Domain List : 00000000 [104h 0260 4] Initiator Proximity Domain List : 00000001 [108h 0264 4] Target Proximity Domain List : 00000000 [10Ch 0268 4] Target Proximity Domain List : 00000001 [110h 0272 4] Target Proximity Domain List : 00000002 [114h 0276 2] Entry : 000A [116h 0278 2] Entry : 0005 [118h 0280 2] Entry : 0001 [11Ah 0282 2] Entry : 0005 [11Ch 0284 2] Entry : 000A [11Eh 0286 2] Entry : 0001 Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr> Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Reviewed-by: Jingqi Liu <jingqi.liu@intel.com> Message-Id: <20221027100037.251-2-hesham.almatary@huawei.com> Tested-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
b496a17 Bernhard Beschow 28 October 2022, 10:34:19 UTC hw/i386/acpi-build: Resolve north rather than south bridges The code currently assumes Q35 iff ICH9 and i440fx iff PIIX. Now that more AML generation has been moved into the south bridges and since the machines define themselves primarily through their north bridges, let's switch to resolving the north bridges for AML generation instead. This also allows for easier experimentation with different south bridges in the "pc" machine, e.g. with PIIX4 and VT82xx. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20221028103419.93398-4-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
bbaa5c4 Bernhard Beschow 28 October 2022, 10:34:18 UTC hw/i386/acpi-build: Resolve redundant attribute The is_piix4 attribute is set once in one location and read once in another. Doing both in one location allows for removing the attribute altogether. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221026133110.91828-3-shentey@gmail.com> Message-Id: <20221028103419.93398-3-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
6f56d6d Bernhard Beschow 28 October 2022, 10:34:17 UTC hw/i386/acpi-build: Remove unused struct Ammends commit b23046abe78f48498a423b802d6d86ba0172d57f 'pc: acpi-build: simplify PCI bus tree generation'. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221026133110.91828-2-shentey@gmail.com> Message-Id: <20221028103419.93398-2-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
2486dd0 Gregory Price 26 October 2022, 20:59:13 UTC hw/i386/pc.c: CXL Fixed Memory Window should not reserve e820 in bios Early-boot e820 records will be inserted by the bios/efi/early boot software and be reported to the kernel via insert_resource. Later, when CXL drivers iterate through the regions again, they will insert another resource and make the RESERVED memory area a child. This RESERVED memory area causes the memory region to become unusable, and as a result attempting to create memory regions with `cxl create-region ...` Will fail due to the RESERVED area intersecting with the CXL window. During boot the following traceback is observed: 0xffffffff81101650 in insert_resource_expand_to_fit () 0xffffffff83d964c5 in e820__reserve_resources_late () 0xffffffff83e03210 in pcibios_resource_survey () 0xffffffff83e04f4a in pcibios_init () Which produces a call to reserve the CFMWS area: (gdb) p *new $54 = {start = 0x290000000, end = 0x2cfffffff, name = "Reserved", flags = 0x200, desc = 0x7, parent = 0x0, sibling = 0x0, child = 0x0} Later the Kernel parses ACPI tables and reserves the exact same area as the CXL Fixed Memory Window: 0xffffffff811016a4 in insert_resource_conflict () insert_resource () 0xffffffff81a81389 in cxl_parse_cfmws () 0xffffffff818c4a81 in call_handler () acpi_parse_entries_array () (gdb) p/x *new $59 = {start = 0x290000000, end = 0x2cfffffff, name = "CXL Window 0", flags = 0x200, desc = 0x0, parent = 0x0, sibling = 0x0, child = 0x0} This produces the following output in /proc/iomem: 590000000-68fffffff : CXL Window 0 590000000-68fffffff : Reserved This reserved area causes `get_free_mem_region()` to fail due to a check against `__region_intersects()`. Due to this reserved area, the intersect check will only ever return REGION_INTERSECTS, which causes `cxl create-region` to always fail. Signed-off-by: Gregory Price <gregory.price@memverge.com> Message-Id: <20221026205912.8579-1-gregory.price@memverge.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> 07 November 2022, 19:08:17 UTC
15377f6 Akihiko Odaki 29 August 2022, 08:35:24 UTC msix: Assert that specified vector is in range There were several different ways to deal with the situation where the vector specified for a msix function is out of bound: - early return a function and keep progresssing - propagate the error to the caller - mark msix unusable - assert it is in bound - just ignore An out-of-bound vector should not be specified if the device implementation is correct so let msix functions always assert that the specified vector is in range. An exceptional case is virtio-pci, which allows the guest to configure vectors. For virtio-pci, it is more appropriate to introduce its own checks because it is sometimes too late to check the vector range in msix functions. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20220829083524.143640-1-akihiko.odaki@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Yuval Shaia <yuval.shaia.ml@gmail.com> Signed-off-by: Akihiko Odaki &lt;<a href="mailto:akihiko.odaki@daynix.com" target="_blank">akihiko.odaki@daynix.com</a>&gt;<br> 07 November 2022, 19:08:17 UTC
3b31125 Markus Armbruster 20 October 2022, 12:04:58 UTC MAINTAINERS: Add qapi/virtio.json to section "virtio" Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20221020120458.80709-1-armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> 07 November 2022, 19:08:17 UTC
defb709 Christian A. Ehrhardt 24 October 2022, 15:42:33 UTC hw/acpi/erst.c: Fix memory handling issues - Fix memset argument order: The second argument is the value, the length goes last. - Fix an integer overflow reported by Alexander Bulekov. Both issues allow the guest to overrun the host buffer allocated for the ERST memory device. Cc: Eric DeVolder <eric.devolder@oracle.com Cc: Alexander Bulekov <alxndr@bu.edu> Cc: qemu-stable@nongnu.org Fixes: f7e26ffa590 ("ACPI ERST: support for ACPI ERST feature") Tested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Christian A. Ehrhardt <lk@c--e.de> Message-Id: <20221024154233.1043347-1-lk@c--e.de> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1268 Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Eric DeVolder <eric.devolder@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
0193d69 Igor Mammedov 17 October 2022, 10:21:46 UTC tests: acpi: update expected blobs Expected changes are: 1) Moving _GPE scope declaration achec of all _E0x methods + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + Scope (_SB) { Device (\_SB.PCI0.PRES) ============ \_SB.CPUS.CSCN () } - Scope (_GPE) - { - Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID - } 2) Moving _E01 handler after PCI0 scope is defined - Scope (_GPE) - { - Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID - Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE - { - Acquire (\_SB.PCI0.BLCK, 0xFFFF) - \_SB.PCI0.PCNT () - Release (\_SB.PCI0.BLCK) - } - } - Scope (\_SB.PCI0) { Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings ============= } } } + + Scope (_GPE) + { + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } } Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20221017102146.2254096-12-imammedo@redhat.com> 07 November 2022, 19:08:17 UTC
d12dbd4 Igor Mammedov 17 October 2022, 10:21:45 UTC acpi: pc/35: sanitize _GPE declaration order Move _GPE block declaration before it gets referenced by other hotplug handlers. While at it move PCI hotplug (_E01) handler after PCI tree description to avoid forward reference to to not yet declared methods/devices. PS: Forward 'usage' usualy is fine as long as it's hidden within method, however 'iasl' may print warnings. So be nice to iasl/guest OS and do things in proper order. PS2: Also follow up patches will move some of hotplug code from PCI tree to _E01 and that also requires PCI Device nodes build first, before Scope can reuse that from global context. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20221017102146.2254096-11-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> 07 November 2022, 19:08:17 UTC
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