| 4e93098 | Michael Gill | 10 January 2017, 23:08:07 UTC | staging: apf: Increase buffer cap for SDSoC Currently there is a hard limit on the number of buffers available. This patch increases that limit, with the expectation that the limit will be removed entirely in the 2017.1 timeframe. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 23 January 2017, 09:19:09 UTC |
| 14ff4d8 | Michael Gill | 05 January 2017, 18:24:42 UTC | staging: apf: Changing method for polling SG-DMA status This is a simple fix to improve performance of try-wait on SG-DMA transfers. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 23 January 2017, 09:16:14 UTC |
| 061577c | Moritz Fischer | 22 December 2016, 17:19:25 UTC | ARM64: zynqmp: Fix i2c node's compatible string The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core which fixes some silicon bugs that needed software workarounds in Version 1.0 that was used on Zynq systems. Signed-off-by: Moritz Fischer <mdf@kernel.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Cc: Rob Herring <robh+dt@kernel.org> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 02 January 2017, 12:31:54 UTC |
| 6226051 | Yasir-Khan | 30 December 2016, 17:35:57 UTC | serial: xuartps: Enable uart loopback mode This patch adds xilinx uart loopback support by modifying the cdns_uart_set_mctrl function to handle the switch to loopback mode. After this patch, the loopback mode can be enabled/disabled by setting/clearing the TIOCM_LOOP modem bit via TIOCMBIS/TIOCMBIC ioctls respectively. Signed-off-by: Yasir-Khan <yasir_khan@mentor.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 02 January 2017, 09:48:15 UTC |
| b49271f | Harini Katakam | 15 December 2016, 07:15:58 UTC | Documentation: DT: Add bindings documentation for Xilinx PCS/PMA PHY Add devicetree bindings documentation for Xilinx PCS/PMA PHY. Signed-off-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:09 UTC |
| 255cc55 | Mirela Simonovic | 06 December 2016, 13:57:23 UTC | ARM64: zynqmp: Remove rollback in pm domain power off in case of error Removed reversing the power off operation in the case of an error. An error could appear only if something is wrong with the communication to the PFW and in that case, reversing the operation makes no sense because it relies on the same communication channel. Added print for an error case. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:09 UTC |
| 66c15e5 | Mirela Simonovic | 06 December 2016, 13:57:22 UTC | ARM64: zynqmp: Block on set requirement when powering on a domain If the zynqmp_pm_set_requirement call is non-blocking, the return value represents only the status of sending IPI message to PMU (status 0 means that the message arguments and the IPI are sent to the PMU). Consequently, when the zynqmp_pm_set_requirement call returns the PMU may not have completed the processing of the call. In that case, if the device driver attempts to access a domain which is still off it would crash. Moreover, the result of actual processing of the call is not returned, so a power on failure cannot be captured. Make the call blocking, so the returned value represents the status of processing the zynqmp_pm_set_requirement call. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:08 UTC |
| afeaf15 | Yasir-Khan | 01 December 2016, 23:19:52 UTC | arm64: zynqmp: macb: release spinlock before calling ptp_clock_unregister macb_ptp_close calls ptp_clock_unregister with spinlock locked which further calls device_destroy which might block on mutex required for deleting the device node and sleep. This sleeping while holding the spinlock triggers the below kernel panic. [ 130.911589] BUG: scheduling while atomic: connmand/424/0x00000002 [ 130.917596] Modules linked in: mali(O) nfsd [ 130.921766] CPU: 1 PID: 424 Comm: connmand Tainted: G O [ 130.929486] Hardware name: ZynqMP ZCU102 RevB (DT) [ 130.934275] Call trace: [ 130.936702] [<ffffffc0000889e8>] dump_backtrace+0x0/0x158 [ 130.942085] [<ffffffc000088b64>] show_stack+0x24/0x30 [ 130.947110] [<ffffffc00031af3c>] dump_stack+0x94/0xd0 [ 130.952329] [<ffffffc0000bee2c>] __schedule_bug+0x5c/0x70 [ 130.968469] [<ffffffc000673cb4>] schedule+0x4c/0xc0 [ 130.975675] [<ffffffc000676d04>] schedule_timeout+0x1cc/0x260 [ 130.981408] [<ffffffc000674950>] wait_for_common+0xa8/0x150 [ 130.987124] [<ffffffc000674a20>] wait_for_completion+0x28/0x38 [ 130.993213] [<ffffffc0003f6d38>] devtmpfs_delete_node+0xa8/0xe8 [ 130.999104] [<ffffffc0003ea278>] device_del+0x198/0x210 [ 131.007822] [<ffffffc0003ea3cc>] device_destroy+0x54/0x68 [ 131.013178] [<ffffffc0004fbb74>] ptp_clock_unregister+0x5c/0x78 [ 131.019242] [<ffffffc00048b780>] macb_close+0xf8/0x100 [ 131.024645] [<ffffffc000565c04>] __dev_close_many+0x8c/0xd8 [ 131.030190] [<ffffffc000565d80>] __dev_close+0x30/0x48 [ 131.035299] [<ffffffc00056eb48>] __dev_change_flags+0xa0/0x150 [ 131.041132] [<ffffffc00056ec2c>] dev_change_flags+0x34/0x70 [ 131.046671] [<ffffffc0005d3cbc>] devinet_ioctl+0x67c/0x718 [ 131.052151] [<ffffffc0005d56e4>] inet_ioctl+0xec/0x128 [ 131.057259] [<ffffffc00054ceec>] sock_ioctl+0x174/0x308 [ 131.062480] [<ffffffc0001c33ac>] do_vfs_ioctl+0x354/0x5f8 [ 131.067847] [<ffffffc0001c36a0>] SyS_ioctl+0x50/0x88 [ 131.072808] [<ffffffc0000851f0>] el0_svc_naked+0x24/0x28 [ 131.079364] ------------[ cut here ]------------ Therefore release the spinlock before performing ptp device cleanup. Signed-off-by: Yasir-Khan <yasir_khan@mentor.com> Acked-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:08 UTC |
| 5e8a356 | Kedareswara rao Appana | 02 December 2016, 06:11:54 UTC | net: ethernet: xilinx: Add support for 2.5G MAC This patch adds support for 2.5G MAC in the driver. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:07 UTC |
| b545e4f | Kedareswara rao Appana | 29 November 2016, 15:17:38 UTC | Documentation: DT: Update binding doc for 2.5G MAC This patch updates the device-tree binding doc for adding support for 2.5G MAC. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:07 UTC |
| 983a8f9 | Kedareswara rao Appana | 29 November 2016, 15:17:37 UTC | net: ethernet: Fix race condition in the driver for 10G/25G MAC When XILINX_AXI_EMAC_HWTSTAMP config is enabled in the driver the rx_hwtsamp API is valid only for 10G/25G MAC. This patch adds a check for the same in the driver. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:07 UTC |
| 819712b | Kedareswara rao Appana | 22 November 2016, 17:15:10 UTC | net: ethernet: xilinx: Add 1588 support for 10G/25G MAC This patch adds 1588 support for 10G/25G MAC. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:06 UTC |
| 2c09023 | Kedareswara rao Appana | 22 November 2016, 17:15:09 UTC | Documentation: DT: Update binding doc for 10G/25G MAC 1588 This patch updates the device-tree binding doc for adding support for 10G/25G MAC 1588. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:06 UTC |
| 26d9ca4 | Kedareswara rao Appana | 22 November 2016, 17:15:08 UTC | net: ethernet: xilinx: Add support for 10G/25G MAC This patch adds support for 10G/25G MAC. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:05 UTC |
| 5b62f65 | Kedareswara rao Appana | 22 November 2016, 17:15:07 UTC | net: ethernet: xilinx: Add quirk checks in the driver This patch adds quirk checks in the driver wherever it is relevant And removes the is_10Gmac variable from the driver private Structure. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:05 UTC |
| 2c06d77 | Kedareswara rao Appana | 22 November 2016, 17:15:06 UTC | net: ethernet: xilinx: Add config structure to differentiate axienet macs This patch adds config structure in the driver to differentiate different macs. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:04 UTC |
| 0082c92 | Michal Simek | 24 November 2016, 07:08:58 UTC | ARM64: zynqmp: Sync defconfig with savedefconfig Align possition of Kconfig entries. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:04 UTC |
| 9321e1a | Soren Brinkmann | 22 November 2016, 00:12:05 UTC | ARM64: zynqmp: PM: Add IRQ PM callbacks are delivered to the NS OS. Let the PM driver handle the IRQ and retrieve callback data from the secure HW. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:03 UTC |
| 5e9dd96 | Soren Brinkmann | 22 November 2016, 00:12:04 UTC | ARM64: zynqmp: Add bindings for PM firmware Document the DT bindings for the Zynq UltraScale+ PM Firmware. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:03 UTC |
| 7eecb2b | Soren Brinkmann | 22 November 2016, 00:12:03 UTC | ARM64: zynqmp: Remove zynq_mpsoc bindings The bindings document is stale and only applies to PM firmware. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:03 UTC |
| 57119a8 | Michael Gill | 19 December 2016, 21:06:13 UTC | staging: apf: Changing dma-buf attachment The method used for attaching to buffers through the dma-buf API resulted in loss of buffers when buffers originated from paged v4l2 devices. This patch resolves that. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:02 UTC |
| 3442152 | Soren Brinkmann | 19 December 2016, 21:06:12 UTC | vivid: Enable 4k resolution for webcam capture device Add 3840x2160 as valid resolution for the webcam capture input and adjust the webcam intervals accordingly. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 December 2016, 06:58:02 UTC |
| 2762bc9 | Nathalie Chan King Choy | 24 November 2016, 02:55:20 UTC | ARM64: zynqmp: usb1 on zcu100 is not peripheral For the ZCU100 board, usb1 is host and that's specified in dwc3_1. Signed-off-by: Nathalie Chan King Choy <nathalie@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 November 2016, 07:17:38 UTC |
| 83d293e | Vineeth Chowdary Karumanchi | 22 November 2016, 11:16:04 UTC | microblaze: mmu_defconfig: Enabling CONFIGS related to MTD. Add support for Intel and AMD flash devices by default. Signed-off-by: Vineeth Chowdary Karumanchi <vineethchowz.chowdary@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 23 November 2016, 06:53:00 UTC |
| a75ea54 | Michal Simek | 21 November 2016, 09:29:10 UTC | ARM64: zynqmp: Fix license in zcu100 Linux kernel doesn't support SPDX header tag. Use standard GPL version. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 21 November 2016, 09:29:10 UTC |
| a58c219 | Hyun Kwon | 09 November 2016, 18:37:16 UTC | drm: xilinx: dp_sub: Document variables in struct xilinx_drm_dp_sub Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:09 UTC |
| af9f19d | Hyun Kwon | 09 November 2016, 18:37:15 UTC | drm: xilinx: dp: Document 'phy' in struct xilinx_drm_dp Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:08 UTC |
| 22af857 | Hyun Kwon | 09 November 2016, 18:37:14 UTC | dt: bindings: drm: xilinx: dp_sub: Add & correct supported pixel formats With dynamic format switching, the DT property to specify the layer format is optional. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:08 UTC |
| 84d2be2 | Hyun Kwon | 09 November 2016, 18:37:13 UTC | dt: bindings: drm: xilinx: Add and correct pixel formats Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:07 UTC |
| bb44c44 | Hyun Kwon | 09 November 2016, 18:37:12 UTC | drm: xilinx: drv: Add and fix formats Add more formats and correct DRM format fourcc. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:07 UTC |
| f3e9d2b | Hyun Kwon | 09 November 2016, 18:37:11 UTC | drm: xilinx: plane: Change the DP format accordingly When the framebuffer format changes, change the DP format accordingly. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:06 UTC |
| b15a9b9 | Hyun Kwon | 09 November 2016, 18:37:10 UTC | drm: xilinx: plane: Get correct BPP for formats missing in DRM core drm_format_plane_cpp() returns 0 for some formats. Use xilinx_drm_format_bpp() for formats missing in drm_format_plane_cpp(). Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:05 UTC |
| 64a3ac4 | Hyun Kwon | 09 November 2016, 18:37:09 UTC | drm: xilinx: plane: Get drm formats and use those if available Get DRM formats from DP subsystem, and pass those formats when initializing the plane. This allows to support format switch at runtime. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:05 UTC |
| 1310a80 | Hyun Kwon | 09 November 2016, 18:37:08 UTC | drm: xilinx: dp_sub: Add xilinx_drm_dp_sub_layer_get_fmts() The function returns all supported formats of the layer. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:04 UTC |
| 8e0dd86 | Hyun Kwon | 09 November 2016, 18:37:07 UTC | drm: xilinx: dp_sub: Store drm formats Store all supported formats for each layer. Stored formats are returned to support dynamic format switching. With this, it's not required to specify the layer format in DT. Thus, the layer pixel format is optional, and it falls back to the format format. Still user can specify the layer to be specific format, for example for fbdev emulation. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:04 UTC |
| c486259 | Hyun Kwon | 09 November 2016, 18:37:06 UTC | drm: xilinx: dp_sub: Correct DRM formats Correct the DRM format fourcc and format strings. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:03 UTC |
| 3bd554e | Hyun Kwon | 09 November 2016, 18:37:05 UTC | drm: xilinx: dp_sub: Swap U & V components through coefficients For YUV formats, swap U and V components when swap flag is on. In this way, more YUV formats, for example YVU with YUV, can be supported. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:03 UTC |
| a6deaae | Hyun Kwon | 09 November 2016, 18:37:04 UTC | drm: xilinx: plane: Don't check format The format match is checked by DRM core already. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:02 UTC |
| 54d994c | Hyun Kwon | 09 November 2016, 18:37:03 UTC | drm: xilinx: fb: Don't check the fb format The format checking is done by core already. No need to do in the driver. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:02 UTC |
| b3e3ed2 | Michal Simek | 09 November 2016, 10:13:13 UTC | ARM64: zynqmp: Fix clock device tree binding Fix example to be aligned. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 14:45:01 UTC |
| 47c0694 | Umang Parekh | 10 November 2016, 22:28:10 UTC | drm: ZynQ OpenCL driver Adding the GEM based memory manager mainly for running OpenCL on Zynq and MPSOC products. Today, this driver is responsible mainly for the following: 1. memory manager backed by CMA 2. support for buffer import as well as export to other subsystems 3. memory map accelerator control port Signed-off-by: Umang Parekh <umang.parekh@xilinx.com> Signed-off-by: Sonal Santan <sonal.santan@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 14 November 2016, 13:09:28 UTC |
| ef9961e | Michal Simek | 03 November 2016, 12:40:49 UTC | ARM64: zynqmp: Remove pcie node from zcu106 PCIe is not enabled on this board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 03 November 2016, 12:41:28 UTC |
| 986c7a1 | Michal Simek | 19 October 2016, 14:12:14 UTC | ARM64: zynqmp: Add preliminary support for zcu106 It is very similar to zcu102 with missing GT muxes and different form factor. From SW point of view the most of stuff is the same. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 02 November 2016, 09:46:57 UTC |
| 0b70136 | Michal Simek | 02 November 2016, 08:22:14 UTC | ARM64: zynqmp: Fix type in usb mode setup s/dr_node/dr_mode/g. This bug was introduced by: "ARM64: zynqmp: usb1 on zcu100 is used as peripheral" (sha1: 1ca8496aad9425a8bd7f74e037def6c931b20d0e) Reported-by: Alexey Firago <Alexey_Firago@mentor.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 02 November 2016, 08:24:54 UTC |
| 5e124d4 | Stefan Krsmanovic | 21 October 2016, 10:44:56 UTC | ARM64: zynqmp: Add idle state for ZynqMP Added the idle-states node to describe zynqmp idle states. Only cpu-sleep-0 idle state is added in this patch. References to the idle-states node are added in all CPU nodes. Time values: entry/exit latencies and min-residency, needs to be tuned. arm,psci-suspend-param is selected to comply with PSCIv1.0 and Extended StateID format. Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Acked-by: Will Wong <willw@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 27 October 2016, 13:06:03 UTC |
| 7862283 | Michal Simek | 25 October 2016, 06:40:18 UTC | ARM64: zynqmp: Fix tap_delay conditional build tap_delays.c depends on CONFIG_SOC_XILINX_ZYNQMP not on ARCH_ZYNQMP directly. There is compilation error when CONFIG_SOC_XILINX_ZYNQMP is disabled and ARCH_ZYNQMP is enabled. Error log: drivers/soc/xilinx/zynqmp/tap_delays.c:244:6: error: redefinition of 'arasan_zynqmp_set_tap_delay' void arasan_zynqmp_set_tap_delay(u8 deviceid, u8 timing, u8 bank) ^ In file included from drivers/soc/xilinx/zynqmp/tap_delays.c:22:0: include/linux/soc/xilinx/zynqmp/tap_delays.h:29:13: note: previous definition of 'arasan_zynqmp_set_tap_delay' was here inline void arasan_zynqmp_set_tap_delay(u8 deviceid, u8 timing, u8 bank) {} ^ drivers/soc/xilinx/zynqmp/tap_delays.c:284:6: error: redefinition of 'zynqmp_dll_reset' void zynqmp_dll_reset(u8 deviceid) ^ In file included from drivers/soc/xilinx/zynqmp/tap_delays.c:22:0: include/linux/soc/xilinx/zynqmp/tap_delays.h:30:13: note: previous definition of 'zynqmp_dll_reset' was here inline void zynqmp_dll_reset(u8 deviceid) {} ^ Reported-by: Cyril Chemparathy <cyrilc@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 25 October 2016, 06:45:00 UTC |
| 1ca8496 | Michal Simek | 18 October 2016, 14:18:28 UTC | ARM64: zynqmp: usb1 on zcu100 is used as peripheral It should be used as peripheral all the time. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 October 2016, 06:52:54 UTC |
| f142111 | Michal Simek | 19 October 2016, 14:07:58 UTC | ARM64: zynqmp: Remove note about level shifter on zcu102 i2c device is just level shifter. Remove reference from dts. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 October 2016, 06:52:54 UTC |
| 67e029a | Michal Simek | 14 September 2016, 11:33:13 UTC | ARM64: zynqmp: Add and enable dcc for zcu100 and zcu102 Add debug console to dtsi and enable it for zcu100 and zcu102. Keep in your mind that every core has separate dcc port in case you want to run SMP kernel. DCC is very helpful communication channel for debugging. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 October 2016, 06:52:53 UTC |
| 06e17f5 | Shubhrajyoti Datta | 21 October 2016, 10:42:19 UTC | ARM64: zynqmp: clk: Add the clock for watchdog The watchdog clock node is missing. Add the same. This solves the below error. cdns-wdt fd4d0000.watchdog: input clock not found cdns-wdt: probe of fd4d0000.watchdog failed with error -2 Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 October 2016, 06:52:20 UTC |
| a4f7327 | Tobias Klauser | 13 October 2016, 11:28:33 UTC | net: axienet: Remove unused parameter from __axienet_device_reset The dev parameter passed to __axienet_device_reset() is not used inside the function, so remove it. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 October 2016, 14:18:51 UTC |
| b0e1a5f | Hyun Kwon | 15 October 2016, 00:53:16 UTC | drm: xilinx: drv: Set all clients as master With this change, any client with root privilege will be master. This means that all applications that run on the Xilinx DRM driver as root get full control of the driver. It is hacky, but easy way to enable multiple clients, for example including X11 and other KMS applications to control of the pipeline. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 October 2016, 14:18:51 UTC |
| 9b96afe | Hyun Kwon | 13 October 2016, 00:32:47 UTC | dt: bindings: drm: xilinx: List more formats supported by driver Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:27:41 UTC |
| 43db60e | Hyun Kwon | 13 October 2016, 00:32:46 UTC | dt: bindings: drm: xilinx: dp_sub: List more formats that are added List more formats are supported by the driver. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:27:41 UTC |
| 677d4a0 | Hyun Kwon | 13 October 2016, 00:32:45 UTC | drm: xilinx: drv: Add more formats that are supported List all formats supported. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:27:40 UTC |
| fd227e7 | Hyun Kwon | 13 October 2016, 00:32:44 UTC | drm: xilinx: dp_sub: Fix color coefficient for yuv to 8bit UV components are 8 bit, so use coefficients for 8 bit components. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:27:40 UTC |
| 40fa83c | Hyun Kwon | 13 October 2016, 00:32:43 UTC | drm: xilinx: dp_sub: Add more yuv formats List all supported YUV formats. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:27:39 UTC |
| 776658c | Hyun Kwon | 13 October 2016, 00:32:42 UTC | drm: xilinx: dp_sub: Use XILINX_DP_SUB_AV_BUF_FMT s/XILINX_DP_SUB_AV_BUF_FORMAT/XILINX_DP_SUB_AV_BUF_FMT/g as the prefix is too long. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:27:39 UTC |
| 46bf378 | Hyun Kwon | 13 October 2016, 00:32:41 UTC | drm: xilinx: dp_sub: Support color component swap Using the color space conversion coefficients, the driver can support more formats by swapping color components. For example, with this change, the driver supports ARGB format with the hadrware ABGR format by swapping R and B in the coefficient matrix. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:27:38 UTC |
| 59e3534 | Harini Katakam | 07 October 2016, 09:04:23 UTC | net: macb: Add support for fixed link This patch adds support for fixed link to use in setups where there is not phy negotiation required. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:07 UTC |
| 3b06650 | Soren Brinkmann | 06 October 2016, 16:41:11 UTC | ARM64: zynqmp: Add get_chipid FW call The firmware provides a function to obtain silicon version information. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:06 UTC |
| 80f7331 | Soren Brinkmann | 06 October 2016, 17:23:14 UTC | ARM64: zynqmp: PM: Convert pr_* to dev_* Use dev_* macros instead of pr_* for printing messages from the driver. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:06 UTC |
| b80c247 | Colin Ian King | 04 October 2016, 11:11:41 UTC | net: axienet: Add missing \n to end of dev_err messages Trival fix, dev_err messages are missing a \n, so add it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:05 UTC |
| 98414e6 | Kedareswara rao Appana | 27 September 2016, 06:13:34 UTC | Documentation: DT: Update binding doc for 10G/25G MAC This patch updates the device-tree binding doc for adding support for 10G/25G MAC. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:05 UTC |
| ad53092 | Nava kishore Manne | 30 September 2016, 07:10:05 UTC | fpga: Remove -warning from zynqmp-fpga.c compilation This patch Remove compilation warnings from zynqmp-fpga.c Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:05 UTC |
| 1fa5466 | Kedareswara rao Appana | 30 September 2016, 05:04:59 UTC | dma: zynqmp: Add clocks for LPDDMA Zynqmp DMA driver expects two clocks (main clock and apb clock) For LPDDMA channels the two clocks are missing in the Dma node resulting probe failure. xilinx-zynqmp-dma ffa80000.dma: main clock not found. xilinx-zynqmp-dma ffa80000.dma: Probing channel failed xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2 This patch fixes this issue. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:04 UTC |
| fc8a1f1 | Hyun Kwon | 29 September 2016, 17:31:03 UTC | sound: soc: xilinx: Add 256 bytes for period bytes constraint The DPDMA has the constraint that each buffer size should be aligned with 256 bytes. Enforce this limitation by adding a step size constraint for period bytes. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Tested-by: Damoder Mogilipaka <damoderm@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:04 UTC |
| 0792aac | Soren Brinkmann | 29 September 2016, 17:32:07 UTC | ARM64: zynqmp: PM: Migrate to new shutdown interface Adjust to the revised firmware interface. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:03 UTC |
| a7bae7f | Michael Gill | 28 September 2016, 23:53:46 UTC | staging: apf: Eliminate unnecessary flushing on SG-DMA transfers There was a bug introduced when introducing threading that may cause transfers that do not require cache flushing to trigger flushing unnecessarily. This does not impact correctness, but will improve performance. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:03 UTC |
| fe081e6 | Hyun Kwon | 26 September 2016, 17:05:47 UTC | Revert "drm: xilinx: dp: Set maximum swing / preemphsis level to 2 for ZynqMP" This reverts commit 7b8840fd1150 ("drm: xilinx: dp: Set maximum swing / preemphsis level to 2 for ZynqMP") The voltage swing level 3 is optional per DP 1.2 spec (Section 3.1.5.2 & page 220). But some monitor fails with sepcific link configuration, so revert this change and set maximum voltage swing back to level 3. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:02 UTC |
| fef2cc4 | Naga Sureshkumar Relli | 23 September 2016, 10:29:38 UTC | mtd: spi-nor: Fix jffs2 write issue When validating data integrity using jffs2 file system, if we do write and erase in multiple iterations, we are getting SPI timed out error. this patch fixes that. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:02 UTC |
| ffc9e7f | Soren Brinkmann | 21 September 2016, 14:00:31 UTC | ARM: zynq: Fix suspend code for Thumb kernels When the kernel is compiled in Thumb mode (CONFIG_THUMB2_KERNEL) copying and jumping/returning to/from the suspend code in OCM failed due to misinterpreting or ignoring bit 0 of function addresses - which indicates the execution state at the jump destination - , resulting with the kernel crashing on an undefined instruction. In detail, the suspend code was copied with an erroneous, additional offset of 1 due to the LSB in the address of zynq_sys_suspend being set. And jumping to the code failed as 1. the additional offset wasn't taken into account when jumping 2. the jump switched to ARM state even though the destination contains Thumb code Fixed by using the 'fncpy' macro to do the copying and obtaining the function pointer to call. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:01 UTC |
| afe7309 | Anurag Kumar Vulisha | 21 September 2016, 13:37:25 UTC | devicetree: dwc3: Add LPM support for DC1 board This patch adds USBB 3.0 LPM transfers support to DC1 board by adding usb3_lpm_capable parameter. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:01 UTC |
| 4e9400a | Anurag Kumar Vulisha | 21 September 2016, 13:37:24 UTC | devicetree: dwc3: Add LPM transfers support on zcu102 board This patch adds USB 3.0 LPM transfers suuport to zcu102 board by adding snps,usb3_lpm_capable property. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:00 UTC |
| d7361d4 | Mathias Nyman | 01 June 2016, 15:09:10 UTC | xhci: fix platform quirks overwrite regression in 4.7-rc1 commit b1c127ae990b ("usb: host: xhci: plat: make use of new methods in xhci_plat_priv") sets xhci->quirks before calling xhci_gen_setup(), which will overwrite them. Don't overwite the quirks, just add the new ones Fixes: b1c127ae990b ("usb: host: xhci: plat: make use of new methods in xhci_plat_priv") Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Cc: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 13 October 2016, 12:09:00 UTC |
| 9c0b46e | Michael Gill | 20 September 2016, 17:34:57 UTC | staging: apf: Make xlnk driver thread-safe This patch enables the first stage of enabling threading in SDSoC. Accelerators cannot be shared among threads, but concurrent use of disjoint accelerators is now supported. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:09:00 UTC |
| 5347486 | Nava kishore Manne | 20 September 2016, 06:22:33 UTC | gpio: Added zynq specific check for special pins on bank zero This patch adds zynq specific check for bank 0 pins 7 and 8 are special and cannot be used as inputs Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:59 UTC |
| 50d2141 | Adrian Remonda | 30 August 2016, 22:52:32 UTC | char: devcfg: Add bitstream version check This patch adds extra checking that prevents an user space application to flash an fpga that was created for another chip. Signed-off-by: Adrian Remonda <adrianremonda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:59 UTC |
| 6e6e6a2 | Michal Simek | 19 September 2016, 12:13:54 UTC | microblaze: Sync defconfig with the latest code Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:58 UTC |
| 4996e76 | Kedareswara rao Appana | 09 September 2016, 07:06:01 UTC | dma: zynqmp: Add description for LPDDMA channel usage LPDDMA default allows only secured access. inorder to enable these dma channels, one should ensure that it allows non secure access. This patch updates the same. Reported-by: Sai Pavan Boddu <saipava@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:58 UTC |
| e842c84 | Kedareswara rao Appana | 09 September 2016, 07:06:00 UTC | dma: zynqmp: Add clocks for LPDDMA Zynqmp DMA driver expects two clocks (main clock and apb clock) LPDDMA clock cofiguration is missing for the same in the zynqmp-clk.dtsi file. This patch updates for the same. Reported-by: Sai Pavan Boddu <saipava@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:57 UTC |
| d79f4d8 | Wendy Liang | 14 September 2016, 16:19:31 UTC | rpmsg: Only dump rpmsg if DEBUG is defined RPMSG always dump received messages to kernel log buffer. It impacts rpmsg performance, and if there are rpmsg keeps running, it quickly fills up the log buffer, you will only see rpmsg when you run dmesg. This patch is to only dump messages if you define DEBUG. Signed-off-by: Wendy Liang <jliang@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:57 UTC |
| e457b7a | Mike Looijmans | 19 August 2016, 10:40:33 UTC | zynq_remoteproc: Fix error handling path in probe Mixed used of bracket nesting and goto, use the same pattern everywhere. Probe returned strage codes on failures when CPI1 did not start. Do not logical "or" the result of the "cpu_up" call with other errors. Returned 0 if rproc_alloc() failed. Fix by returning -ENOMEM in that case. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:56 UTC |
| 7cfcc8d | Mike Looijmans | 29 August 2016, 06:20:33 UTC | xilinx_zynqmp_defconfig: Enable zynqmp FPGA manager support Enable the FPGA manager support for ZynqMP, to allow the FPGA to be programmed. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:56 UTC |
| 4d85a2c | Soren Brinkmann | 14 September 2016, 14:19:59 UTC | clk: zynqmp: Fix GEM mux shift values Fixes: 7a50d890959d ("clk: zynqmp: Add initial ccf clkc support") Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:55 UTC |
| 0e4e407 | Sai Krishna Potthuri | 13 October 2016, 10:01:06 UTC | mmc: arasan: Add ADMA broken quirk based on DT parameter This patch adds 'SDHCI_QUIRK_BROKEN_ADMA' quirk to the sdhci arasan controller based on the DT property. With 4.6 kernel, ADMA2 is broken. So added this quirk as a workaround and can be reverted once kernel is upgraded or actual solution is found. Issue with ADMA2 can be seen with the following three steps done in regression. 1. mount SD card. 2. Read and write some random data ~1MB. 3. reboot the board. Issue is visible after running 15 to 20mins with 4.6 kernel and there might be a chance that issue might occur very frequently depending on the application. So, using the above workaround to force the controller to use SDMA. The performance difference between SDMA and ADMA2 is around 10-15%. ADMA2 can be used by removing the 'broken-adma2' property from devicetree. Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:55 UTC |
| 11af480 | Sai Krishna Potthuri | 13 October 2016, 10:01:05 UTC | ARM: dts: Add broken-adma2 property to SD node This patch adds 'broken-adma2' property to SD node. By adding this property controller will use SDMA by default. This property can be removed to use ADMA2. Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:55 UTC |
| 3582577 | Sai Krishna Potthuri | 13 October 2016, 10:01:04 UTC | Documentation: mmc: Add broken-adma2 property This patch adds 'broken-adma2' property which indicates ADMA2 functionality is broken and force the controller to use SDMA. Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 October 2016, 12:08:54 UTC |
| 7d819bd | Appana Durga Kedareswara Rao | 10 August 2016, 05:50:06 UTC | net: Add mask for Control register 10Mbps speed This patch adds mask for the Control register 10Mbps speed. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net> | 13 October 2016, 07:22:39 UTC |
| 76b4c7c | Ulrich Hecht | 23 September 2016, 12:32:28 UTC | media: adv7604: automatic "default-input" selection Documentation states that the "default-input" property should reside directly in the node of the device. This adjusts the parsing to make the implementation consistent with the documentation. Based on patch by William Towle <william.towle@codethink.co.uk>. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Tested-by: Radhey Shyam Pandey <radheys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 23 September 2016, 13:05:24 UTC |
| 4e12140 | Ulrich Hecht | 23 September 2016, 12:32:05 UTC | media: adv7604: fix bindings inconsistency for default-input The text states that default-input is an endpoint property, but in the example it is a device property. The default input is a property of the chip, not of a particular port, so the example makes more sense. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 23 September 2016, 13:03:39 UTC |
| c1c13c8 | Anurag Kumar Vulisha | 16 September 2016, 11:30:00 UTC | phy: zynqmp: Change serdes calibraton logic to ICM_CFG1 Because of functional issues in Silicon 1.0 (XCZU9EG) which doesn't do PMOS calibration properly, software needs to implement work around. As a software sequence of work around, need to programe any lane to a valid protocol. Currently serdes driver configures lane 0 (ICM_CFG0) to PCIe for fixing the above said calibration logic issue. Currently PCIe doesn't use serdes driver, instead it depends on fsbl for GT lane initialization. Since serdes driver is reintializing ICM_CFG0, PCIe is facing link down issues once linux boots. This patch fixes the above said issue by using ICM_CFG1 instead of ICM_CFG0 for fixing the PMOS calibration issue Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 19 September 2016, 12:16:35 UTC |
| 001e6f2 | Vineeth Chowdary Karumanchi | 19 September 2016, 09:32:44 UTC | defconfig: zynq: microblaze: Enabling CONFIG_BRIDGE This patch enables CONFIG_BRIDGE=m. Petalinux has bridge utils enabled by default, this flag is required to enable in kernel for it to work. Signed-off-by: Vineeth Chowdary Karumanchi <vineethchowz.chowdary@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 19 September 2016, 12:16:34 UTC |
| 5561311 | Anurag Kumar Vulisha | 14 September 2016, 13:57:12 UTC | usb: dwc3: of-simple: Fix kernel hang during unbind In dwc3_of_simple_remove() we call of_platform_depopulate() after disabling the clocks. Since of_platform_depopulate() calls xhci_stop() which internally stop the controller by programming the USB registers. Since we already disabled the USB clock, kernel hangs when try to unbind. This patch corrects the above said issue by calling of_platform_depopulate before clock disabling. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 September 2016, 16:22:48 UTC |
| f69e4ea | Anurag Kumar Vulisha | 14 September 2016, 13:57:11 UTC | usb: dwc3: of-simple: Fix warning during unbind In dwc3_of_simple_remove() we are using clk_unprepare() before doing any clk_disable(). Because of this we see kernel warning during unbind if we enable Common CLK framework(CCF). This patch fixes this kernel warning by using clk_disable_unprepare instead of clk_unprepare(). Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 September 2016, 16:22:48 UTC |
| 08193fe | Kedareswara rao Appana | 08 September 2016, 04:17:39 UTC | net: phy: Add gmiitorgmii converter support This patch adds support for gmiitorgmii converter. The GMII to RGMII IP core provides the Reduced Gigabit Media Independent Interface (RGMII) between Ethernet physical media Devices and the Gigabit Ethernet controller. This core can Switch dynamically between the three different speed modes of Operation by configuring the converter register through mdio write. MDIO interface is used to set operating speed of Ethernet MAC. This converter sits between the MAC and the external phy MAC <==> GMII2RGMII <==> RGMII_PHY Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> | 13 September 2016, 18:22:13 UTC |
| f9c43e8 | Kedareswara rao Appana | 19 August 2016, 13:01:13 UTC | net: macb: add support for mdio phy nodes This patch adds support for mdio phy nodes. With this patch the macb driver first tries to find the mdio node. If it is available will create the phy/mdio devices for the phy/mdio nodes available in the mdio. If the mdio node is not available it will try to probe the phy nodes available in the mac nodes as the driver does earlier. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> | 13 September 2016, 18:22:13 UTC |
| ea9f81c | Kedareswara rao Appana | 09 September 2016, 06:57:35 UTC | net: ethernet: xilinx: Fix kernel crash on 64-bit platform In the driver ptp_tx_skb variable stores the skb address This variable is of type u32. On 64-bit platform it is causing a kernel crash when trying to access this variable. Crash log: [ 58.675430] Unable to handle kernel paging request at virtual address 6e882cc8 [ 58.682583] pgd = ffffffc0018d7000 [ 58.685956] [6e882cc8] *pgd=0000000000000000, *pud=0000000000000000 [ 58.692206] Internal error: Oops: 96000005 [#1] SMP [ 58.697067] Modules linked in: [ 58.700106] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.4.0 #195 [ 58.706095] Hardware name: ZynqMP ZCU102 (DT) [ 58.710435] task: ffffffc00180a8c0 ti: ffffffc0017fc000 task.ti: ffffffc0017fc000 [ 58.717912] PC is at axienet_tx_irq+0x1f4/0x3fc [ 58.722416] LR is at handle_irq_event_percpu+0x94/0x13c [ 58.727622] pc : [<ffffffc00051d54c>] lr : [<ffffffc0000d1194>] pstate: 000001c5 [ 58.735005] sp : ffffffc0017ffc30 [ 58.738296] x29: ffffffc0017ffc30 x28: ffffff8000279a00 [ 58.743589] x27: ffffffc071bed700 x26: ffffffc000913b70 [ 58.748884] x25: ffffffc0007e7130 x24: ffffffc071afbe00 [ 58.754179] x23: ffffffc071bed000 x22: 0000000000000000 [ 58.759473] x21: 0000000000000000 x20: ffffffc071bed000 [ 58.764768] x19: 0000000080000056 x18: 0000007fef55a510 [ 58.770063] x17: 0000007f8f15d0c0 x16: ffffffc00017d4ec [ 58.775358] x15: ffffffffffffffff x14: ffffffffffffff00 [ 58.780653] x13: ffffffffffffffff x12: 0000000000000008 [ 58.785948] x11: 0101010101010101 x10: 00000000000006e0 [ 58.791242] x9 : ffffffc0017ffe70 x8 : ffffffc071400768 [ 58.796537] x7 : ffffffc0714006c8 x6 : 0000000000000000 [ 58.801832] x5 : 00000000fffffffa x4 : 00000000767af000 [ 58.807126] x3 : 0000000000000000 x2 : ffffff80001c0000 [ 58.812421] x1 : ffffffc071bed000 x0 : 000000006e882c00 [ 58.817715] [ 58.819194] Process swapper/0 (pid: 0, stack limit = 0xffffffc0017fc020) [ 58.825880] Stack: (0xffffffc0017ffc30 to 0xffffffc001800000) [ 58.831609] fc20: ffffffc0017ffca0 ffffffc0000d1194 [ 58.839428] fc40: ffffffc06e881280 ffffffc001835580 0000000000000000 0000000000000000 [ 58.847240] fc60: 00000000000000cf ffffffc071afbe00 ffffffc00187c3cb ffffffc000913b70 [ 58.855052] fc80: ffffffc000913b98 0000000000000000 ffffffc00187c3cb ffffffc0009799f0 [ 58.862864] fca0: ffffffc0017ffd00 ffffffc0000d1280 ffffffc071afbe00 ffffffc001835580 [ 58.870676] fcc0: ffffffc071afbe9c ffffffc001805040 ffffff8000014010 ffffff8000015000 [ 58.878488] fce0: ffffffc000766cd0 ffffffc00187c000 0000000000000000 ffffffc0000eeb4c [ 58.886300] fd00: ffffffc0017ffd30 ffffffc0000d461c ffffffc071afbe00 ffffffc001835580 [ 58.894112] fd20: 0000000000000000 ffffffc00009b18c ffffffc0017ffd50 ffffffc0000d07a0 [ 58.901924] fd40: ffffffc0017e5000 0000000000000000 ffffffc0017ffd60 ffffffc0000d0ab8 [ 58.909736] fd60: ffffffc0017ffda0 ffffffc000080cec ffffff800001400c ffffffc001835000 [ 58.917548] fd80: ffffffc0017ffde0 ffffffc07132c1e0 ffffffc071808000 0000007900757990 [ 58.925360] fda0: ffffffc0017fff00 ffffffc000083da8 ffffffc0017fc000 ffffffc001802000 [ 58.933172] fdc0: ffffffc0017fff00 ffffffc000084e70 0000000060000145 ffffffc0017e6c78 [ 58.940983] fde0: 0000000000000000 0000000000000000 0000000000000001 0000000000000000 [ 58.948796] fe00: 0000000000000000 00000000767af000 ffffffc001802ad0 00000000ffff1452 [ 58.956608] fe20: ffffffc00180b000 ffffffc0017ffe70 00000000000006e0 0101010101010101 [ 58.964420] fe40: 0000000000000008 ffffffffffffffff ffffffffffffff00 ffffffffffffffff [ 58.972232] fe60: ffffffc00017d4ec 0000007f8f15d0c0 0000007fef55a510 ffffffc0017fc000 [ 58.980044] fe80: ffffffc001802000 ffffffc001802ad0 ffffffc0017e39c0 ffffffc0017fff20 [ 58.987856] fea0: ffffffc0017e6c78 ffffffc000766cd0 ffffffc00187c000 0000000000000000 [ 58.995668] fec0: 0000000000000000 ffffffc0017fff00 ffffffc000084e6c ffffffc0017fff00 [ 59.003480] fee0: ffffffc000084e70 0000000060000145 ffffffc000766cd0 ffffffc000757ca8 [ 59.011292] ff00: ffffffc0017fff10 ffffffc0000c99f8 ffffffc0017fff20 ffffffc0000c9b30 [ 59.019104] ff20: ffffffc0017fff90 ffffffc000754f08 ffffffc00187f000 ffffffc00187f000 [ 59.026916] ff40: ffffffc00187f000 ffffffc001802000 ffffffc077fd0000 ffffffc000a462c8 [ 59.034728] ff60: 00000000018d4000 00000000018d7000 ffffffc0000801d8 000000007df4ae40 [ 59.042540] ff80: ffffffc0017fff90 ffffffc000754f00 ffffffc0017fffa0 ffffffc000a1594c [ 59.050352] ffa0: 0000000000000000 000000000075c000 0000000000000400 0000000000000e12 [ 59.058163] ffc0: 0000000007ff5000 0000000000000003 000000007df47c88 0000000000000000 [ 59.065975] ffe0: 0000000000000000 ffffffc000a462c8 0000000000000000 0000000000000000 [ 59.073785] Call trace: [ 59.076211] [<ffffffc00051d54c>] axienet_tx_irq+0x1f4/0x3fc [ 59.081767] [<ffffffc0000d1194>] handle_irq_event_percpu+0x94/0x13c [ 59.088017] [<ffffffc0000d1280>] handle_irq_event+0x44/0x74 [ 59.093573] [<ffffffc0000d461c>] handle_fasteoi_irq+0xac/0x19c [ 59.099387] [<ffffffc0000d07a0>] generic_handle_irq+0x24/0x38 [ 59.105116] [<ffffffc0000d0ab8>] __handle_domain_irq+0x60/0xac [ 59.110932] [<ffffffc000080cec>] gic_handle_irq+0x60/0xb4 [ 59.116312] Exception stack(0xffffffc0017ffdb0 to 0xffffffc0017ffed0) [ 59.122736] fda0: ffffffc0017fc000 ffffffc001802000 [ 59.130555] fdc0: ffffffc0017fff00 ffffffc000084e70 0000000060000145 ffffffc0017e6c78 [ 59.138366] fde0: 0000000000000000 0000000000000000 0000000000000001 0000000000000000 [ 59.146179] fe00: 0000000000000000 00000000767af000 ffffffc001802ad0 00000000ffff1452 [ 59.153991] fe20: ffffffc00180b000 ffffffc0017ffe70 00000000000006e0 0101010101010101 [ 59.161803] fe40: 0000000000000008 ffffffffffffffff ffffffffffffff00 ffffffffffffffff [ 59.169615] fe60: ffffffc00017d4ec 0000007f8f15d0c0 0000007fef55a510 ffffffc0017fc000 [ 59.177427] fe80: ffffffc001802000 ffffffc001802ad0 ffffffc0017e39c0 ffffffc0017fff20 [ 59.185239] fea0: ffffffc0017e6c78 ffffffc000766cd0 ffffffc00187c000 0000000000000000 [ 59.193050] fec0: 0000000000000000 ffffffc0017fff00 [ 59.197905] [<ffffffc000083da8>] el1_irq+0x68/0xc0 [ 59.202680] [<ffffffc0000c99f8>] default_idle_call+0x1c/0x30 [ 59.208322] [<ffffffc0000c9b30>] cpu_startup_entry+0x124/0x1dc [ 59.214138] [<ffffffc000754f08>] rest_init+0x74/0x7c [ 59.219086] [<ffffffc000a1594c>] start_kernel+0x394/0x3a8 [ 59.224465] [<000000000075c000>] 0x75c000 [ 59.228459] Code: b9404380 34fffb60 2a0003e0 f944a2e2 (b940c818) This patch fixes this issue. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> | 13 September 2016, 18:22:13 UTC |
| 76a0cc1 | Kedareswara rao Appana | 10 August 2016, 05:40:23 UTC | Documentation: DT: net: Add Xilinx gmiitorgmii converter device tree binding documentation Device-tree binding documentation for xilinx gmiitorgmii converter. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> | 13 September 2016, 18:22:12 UTC |
| 8408c14 | Radhey Shyam Pandey | 13 September 2016, 05:55:14 UTC | dma: xilinx: Check for channel idle state before submitting dma descriptor Add channel idle state to ensure that dma descriptor is not submitted when VDMA engine is in progress. Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> | 13 September 2016, 18:22:12 UTC |
