68e6869 | Anurag Kumar Vulisha | 18 April 2017, 15:51:15 UTC | dwc3: Add support for setting USB control registers as phy platform data This patch adds support for setting USB vendor specific control registers as phy platform data. These registers are used by the phy to configure USB PIPE signals. Note: This patch is a temporary workaround which is done to set pipe signals without effecting usb cci and this will be redesigned. this change will get it into v2017.1 and expected to change once the proper solution is available. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 19 April 2017, 09:31:13 UTC |
c297380 | Anurag Kumar Vulisha | 18 April 2017, 15:51:14 UTC | dwc3: dwc3-of-simple: Move ioremap calls into probe Currently ioremap_resource & ioremap_release of USB vendor specific control regions are being done in dwc3_enable_hw_coherency() when CCI is enabled. These USB vendor specific regions has the PIPE3 control registers, which needs to be configured everytime to get proper connect/disconnect events. Because of this reason moving the ioremap_resource into probe. Note: This patch is a temporary workaround which is done to set pipe signals without effecting usb cci and this will be redesigned. this change will get it into v2017.1 and expected to change once the proper solution is available. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 19 April 2017, 09:31:12 UTC |
88c5565 | Anurag Kumar Vulisha | 18 April 2017, 15:51:13 UTC | phy: zynqmp: Add support for configuring PIPE3 signals for USB Set PIPE signals to configure internal mux which makes connect/disconnect depend on ULPI instead of SERDES. These PIPE_POWER and PIPE_CLK signals need to be configured after releasing USB APB reset and before releasing USB CORE and HIB reset. These PIPE signals helps in proper detection of disconnect/connect events on the phy. Note: This patch is a temporary workaround which is done to set pipe signals without effecting USB CCI and this will be redesigned. This change will get it into v2017.1 and expected to change once the proper solution is available. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 19 April 2017, 09:31:12 UTC |
d52dbb5 | Anurag Kumar Vulisha | 18 April 2017, 15:51:12 UTC | phy: zynqmp: Move assert/de-assert to a separate functions Currently assert/de-assert are controlled through reset-controller framework. Since these functions are non-blocking calls, changed the code to wait until the assert/de-assert is done by the reset framework. Waiting is done by reading the status from the reset-controller framework. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 19 April 2017, 09:31:11 UTC |
20216e6 | Hyun Kwon | 31 March 2017, 00:39:14 UTC | drm: i2c: adv7511: Change to CONFIG_DRM_I2C_ADV7511_LEGACY To avoid the conflicts with drm bridge adv7511 driver, add _LEGACY at the end of the identifier string. This config depends on !DRM_I2C_ADV7511 so that only one of them can be enbled at a time. While at it, keep 'depends on OF'. This is a temporary solution to enable adv7511 based on the encoder slave. The DRM driver needs to support the atomic modesetting as well as the drm bridge. When those changes are in, this can be removed. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 19 April 2017, 05:59:19 UTC |
a752af6 | Hyun Kwon | 31 March 2017, 00:39:13 UTC | Revert "drm/i2c: adv7511: Convert to drm_bridge" This reverts commit e12c2f645557708932e15afdf77f5965549cf156 ("drm/i2c: adv7511: Convert to drm_bridge"). This is a temporary solution to enable adv7511 based on the encoder slave. The DRM driver needs to support the atomic modesetting as well as the drm bridge. When those changes are in, this can be removed. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 19 April 2017, 05:59:18 UTC |
d573353 | Hyun Kwon | 31 March 2017, 00:39:12 UTC | Revert "drm/i2c: adv7511: Move to bridge folder" The latest kernel moved the adv7511 to drm bridge, and the adv7511 driver has been updated to align with latest DRM core such as atomic modesetting. As it requires the major change in the DRM driver, this reverts commit c582778900425d0cf2a5687a84b0125fee797d32 ("drm/i2c: adv7511: Move to bridge folder") partially, in order to revive the adv7511 encoder slave. This is a temporary solution to enable the design. The DRM driver needs to support the atomic modesetting as well as the drm bridge. When those changes are in, this can be removed. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 19 April 2017, 05:59:18 UTC |
d80f615 | Naga Sureshkumar Relli | 18 April 2017, 12:28:42 UTC | mtd: spi-nor: Disable 4-Byte addressing for axi_quad_spi axi_quad_spi doesn't support 4-Byte addressing, so don't enter 4-byte mode. i.e it supports 4-byte addressing in XIP mode only but driver supports only legacy mode. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 14:48:43 UTC |
b209ad9 | Naga Sureshkumar Relli | 18 April 2017, 12:28:41 UTC | mtd: spi-nor: fix merge issues This patch fixes the following changes that happened during linux merge 1. Correct the id of n25q256a (since same id assigned to n25q256a13) 2. Correct the bit bit value of SST_GLOBAL_PROT_UNLK (since bit 8 is already assigned to SPI_NOR_HAS_LOCK). Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 14:48:43 UTC |
0f44bb0 | Nava kishore Manne | 05 April 2017, 11:34:40 UTC | tty: serial: Added a CONFIG_SERIAL_XILINX_NR_UARTS option. This patch Adds CONFIG_SERIAL_XILINX_NR_UARTS option to allow the user to provide the Max number of uart ports information. If multiple cards (or) PL UARTS are present, the default limit of 2 ports should be increased. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 11:22:31 UTC |
0cd0559 | Nava kishore Manne | 06 April 2017, 07:59:28 UTC | serial: xuartps: Fix the error handling logic in probe(). This patch reorder the error handling checks in probe() to handle the failure conditions properly. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 11:22:31 UTC |
9b8bc4c | Shubhrajyoti Datta | 12 April 2017, 09:25:54 UTC | clk: zynqmp: Fix the watchdog clock source Change the watchdog default clocksource to abp. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:57:57 UTC |
d415d56 | Shubhrajyoti Datta | 14 April 2017, 12:01:26 UTC | net: macb: Update the phy write sequence The TRM recommends the below operation Example: PHY Read/Write Operation 1. Check to see that no MDIO operation is in progress. Read until gem.net_status[man_done] = 1. 2. Write data to the PHY maintenance register (gem.phy_management). This initiates the shift operation over MDIO. 3. Wait for completion of operation. Read until gem.net_status[man_done] = 1. 4. Read data bits for a read operation. The PHY register data is available in gem.phy_management [phy_write_read_data]. Step 1 is missing fix the same. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Acked-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:35:23 UTC |
53ac032 | Shubhrajyoti Datta | 14 April 2017, 12:01:25 UTC | net: macb: Move to runtime_put to cut clocks Move to the runtime_put to cut the clocks. The ethernet interface upo and down doesnot happen fast enough to justify autosuspend. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Acked-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:35:17 UTC |
25f7255 | Shubhrajyoti Datta | 14 April 2017, 12:01:24 UTC | net: macb: Convert the infinite wait loop to a timeout The wait for the mdio phy is infinite. This hangs the whole system when it fails. Convert it to timeout of 1 sec. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Acked-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:35:11 UTC |
911b158 | Shubhrajyoti Datta | 14 April 2017, 12:01:23 UTC | net: macb: Enable clocks for the mdio accesses The mdio calls can called even when the interface is down. Enable the clocks for it. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Acked-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:35:05 UTC |
2f2bb37 | Shubhrajyoti Datta | 14 April 2017, 12:01:22 UTC | net: macb: Fix unused warning Fix the below warning drivers/net/ethernet/cadence/macb.c:3700:15: warning: unused variable \u2018bp\u2019 [-Wunused-variable] struct macb *bp = netdev_priv(netdev); ^~ drivers/net/ethernet/cadence/macb.c: In function \u2018macb_resume\u2019: drivers/net/ethernet/cadence/macb.c:3712:15: warning: unused variable \u2018bp\u2019 [-Wunused-variable] struct macb *bp = netdev_priv(netdev); ^~ Acked-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:34:55 UTC |
d954687 | Wendy Liang | 13 April 2017, 16:17:20 UTC | remoteproc: zynqmp_r5: Fix unsigned <0 warning Fix sparse warning of "comparison of unsigned expression < 0 is always false". Signed-off-by: Wendy Liang <jliang@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:24:43 UTC |
8738512 | Wendy Liang | 13 April 2017, 16:17:19 UTC | remoteproc: zynqmp_r5: Allow multiple pd_ids for single mem pool When remoteproc in lockstep mode, the TCM memories are viewed as contiguous. And thus, there should be just a single memory pool for the 4 TCMs. However, each TCM has its own power domain ID. Here is the representation of RPU lockstep TCM in device tree: r5_tcm: tcm@ffe00000 { compatible = "mmio-sram"; reg = <0 0xFFE00000 0x0 0x40000>; pd-handle = <&pd_tcm_0_a &pd_tcm_0_b &pd_tcm_1_a &pd_tcm_1_b>; }; This patch is to allow a single firmware memory to have multiple power domain ids. Signed-off-by: Wendy Liang <jliang@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:24:09 UTC |
fcb6a67 | Michael Gill | 10 April 2017, 18:14:39 UTC | staging: apf: Adding fix to get correct dma_ops Arm64 in 17.1 defaults to dummy-ops unless a node is created off of a device tree note. We instances DMA nodes dynamically, which requires us to make the necessary calls to get the correct dma_ops manually. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:19:01 UTC |
67a0a95 | Michael Gill | 31 March 2017, 18:50:34 UTC | staging: apf: Additional formatting fixes This patch consists only of a set of formatting fixes to adhere to coding standards. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:19:00 UTC |
78d543e | Michael Gill | 22 March 2017, 17:44:47 UTC | staging: apf: Adhere to formatting requirements This patch resolves some style problems reported by checkpatch. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 18 April 2017, 07:19:00 UTC |
30b6bc6 | Shubhrajyoti Datta | 06 April 2017, 10:42:00 UTC | gpio: xilinx: Fix the NULL pointer access Prevent the NULL pointer access in the suspend resume. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 April 2017, 06:02:00 UTC |
ec34cbb | Will Wong | 31 March 2017, 16:58:58 UTC | xilinx_zynqmp_defconfig: Enable CPU Freq Enable CPU Freq by default. Signed-off-by: Will Wong <willw@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 08 April 2017, 07:00:07 UTC |
0b0d6b8 | Sreeja Vadakattu | 04 April 2017, 09:28:57 UTC | xilinx_zynqmp_defconfig: Remove enabling of CONFIG_DMI by default DMI is disabled by default.This is being done to avoid the below error: [ 1.322063] dmi: Firmware registration failed. Signed-off-by: Sreeja Vadakattu <svadakat@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 06 April 2017, 06:59:17 UTC |
f954dbf | Michael Gill | 31 March 2017, 18:53:36 UTC | staging: apf: Fix buffer ID overflow This moves the hard upper bound on buffers in the apf driver from 256 to 64K Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 06 April 2017, 06:58:28 UTC |
6199cfd | Hyun Kwon | 04 April 2017, 22:12:41 UTC | drm: xilinx: drv: Enable the output polling at the end of resume The output polling needs to be enabled at the end of resume to ensure all devices are in correct state. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:57 UTC |
3cfa95d | Hyun Kwon | 04 April 2017, 22:12:40 UTC | drm: xilinx: dp: Initialize the phy when resuming The phy needs to be initialized / released accordingly when DP goes into suspend / resume. Add functions for phy initializeiont / release, and those functions can be shared with probe / remove sequence. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:56 UTC |
a05bc7c | Hyun Kwon | 04 April 2017, 22:12:39 UTC | drm: xilinx: dp: Initialize the DP aux in a separate function The same initialization needs to be called for suspend / resume. Factor the function for the aux initialization, then the function can be used for suspend / resume. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:56 UTC |
6b6f654 | Hyun Kwon | 04 April 2017, 22:12:38 UTC | drm: xilinx: crtc: Enable / disable the clock in DPMS callback There's no reason to enable clock before the DPMS gets on. Thus instead of enabling the clock in mode_set, enable it in the DPMS callback. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:55 UTC |
d29f875 | Hyun Kwon | 04 April 2017, 22:12:37 UTC | drm: xilinx: dp: Add runtime PM calls in dpms function Call the pm_runtime_get/put() based on the requested DPMS. These calls are translated into PMU FW APIs at the end. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:55 UTC |
ccbef8b | Hyun Kwon | 04 April 2017, 22:12:36 UTC | drm: xilinx: drv: Add shutdown callback Shut down the device explicitly when the system shuts down. The callback will unbind the device. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:55 UTC |
8d1bbf1 | Davorin Mista | 04 April 2017, 01:33:39 UTC | arm64: zynqmp: Reduce min-residency for cpu idle In order to allow CPUs to idle using the default menu governor, the min-residency value has been lowered to 100ms. Signed-off-by: Davorin Mista <davorin.mista@aggios.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:54 UTC |
e11f0c4 | Will Wong | 31 March 2017, 16:58:57 UTC | xilinx_zynqmp_defconfig: Enable CPU Idle Enable CPU Idle by default. Signed-off-by: Will Wong <willw@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:54 UTC |
fe20a4b | Manjukumar Matha | 27 March 2017, 07:16:16 UTC | xilinx_zynqmp_defconfig: Enable PM debugfs API Enable PM debugfs API by default in defconfig. This helps testing PS-only and System reset while using isolation HDF Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:53 UTC |
223b01f | Filip Drazic | 15 March 2017, 10:43:10 UTC | arm64: zynqmp: pm: Notify PM firmware that initialization is completed PM firmware requires notification when power management is enabled and when the initialization is completed in order to finalize system initialization (e.g. power down slaves that will not be used). Implement PM_INIT_FINALIZE PM API, which is used to inform the PM firmware that the initialization is completed. This call is made only if CONFIG_PM is enabled in late_initcall_sync phase of the boot procedure. Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:49:49 UTC |
9e55d5b | Filip Drazic | 16 March 2017, 15:50:59 UTC | arm64: zynqmp: pm: Rename PM_INIT to PM_INIT_FINALIZE Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:48:50 UTC |
17d0859 | Will Wong | 06 February 2017, 17:33:55 UTC | arm64: zynqmp: Enable suspend by default Enabling support for kernel suspend by default. Signed-off-by: Will Wong <willw@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 April 2017, 10:47:52 UTC |
9fb8e58 | Nava kishore Manne | 31 March 2017, 12:20:20 UTC | serial: xuartps: Enable uart loopback mode This patch adds xilinx uart loopback support by modifying the cdns_uart_set_mctrl function to handle the switch to loopback mode. After this patch, the loopback mode can be enabled/disabled by setting/clearing the TIOCM_LOOP modem bit via TIOCMBIS/TIOCMBIC ioctls respectively. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 31 March 2017, 12:26:35 UTC |
c5958f8 | Shubhrajyoti Datta | 28 March 2017, 17:35:00 UTC | spi: xilinx: Fix the runtime check the runtime_get_sync returns the device count so it is valid to have positve values. Correct the check. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 30 March 2017, 10:41:28 UTC |
de743f5 | Hyun Kwon | 29 March 2017, 20:32:18 UTC | drm: xilinx: dp: Add a module param for aux timeout From testing with multiple monitors, the timeout value varies. The spec describes the 25 msec, but some monitor requires a few seconds wait time. So, the default timeout is set to 50 msec, but make it configurable so that the value can be tuned. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 30 March 2017, 10:41:27 UTC |
7e2a1b5 | Hyun Kwon | 29 March 2017, 20:32:17 UTC | drm: xilinx: dp: Retry the aux transaction when it fails Retry the aux transaction up to 128 times. Per spec, it needs to try at least 3 times, but there's some monitor (Viewsonic VX2880ml) which requires 64 retries. Try up to 128 times to be safe. Other monitors are more likely to succeed for the first try, so this patch doesn't hurt other monitors. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 30 March 2017, 10:41:27 UTC |
f75b23c | Hyun Kwon | 29 March 2017, 17:29:41 UTC | drm: xilinx: drv: Don't suspend if console_suspend_enabled is false When console_suspend_enabled is false, user expects to see the logs through the display even the system goes into suspend. Thus, check the console_suspend_enabled flag before going into suspend. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 30 March 2017, 10:41:26 UTC |
5fca50a | Hyun Kwon | 30 March 2017, 01:14:52 UTC | drm: xilinx: drv: Use drm_helper_resume_force_mode() This helper function ensures to restore the previous mode configuration. Use this function for resume, instead of simply turning on the device. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 30 March 2017, 10:41:26 UTC |
f840025 | Rajnikant Bhojani | 28 March 2017, 14:45:43 UTC | iio: adc: xilinx-ams: enable clock before device initialization ams clock needs to be enabled before accessing any registers not doing so will result into device freeze Signed-off-by: Rajnikant Bhojani <rajnikant.bhojani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 28 March 2017, 15:11:38 UTC |
07149fc | Rajnikant Bhojani | 28 March 2017, 14:45:42 UTC | iio: adc: xilinx-ams: fix module unload crash set platform device as private data for iio device Signed-off-by: Rajnikant Bhojani <rajnikant.bhojani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 28 March 2017, 15:11:38 UTC |
3384f40 | Manish Narani | 28 March 2017, 10:31:52 UTC | usb: dwc3: core: Enable CCI support in dwc3 core driver This patch adds CCI support in DWC3 driver when CCI is enabled in the design. There are couple of registers which need to be modified for making CCI enabled transfers in USB. This patch add the support for the same. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 28 March 2017, 11:33:59 UTC |
554c94c | Manish Narani | 28 March 2017, 10:31:51 UTC | usb: dwc3: of-simple: Enable CCI support in dwc3 driver This patch adds CCI support in DWC3 driver when CCI is enabled in the design. There are couple of registers which need to be modified for making CCI enabled transfers in USB. This patch add the support for the same. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 28 March 2017, 11:33:58 UTC |
4c3cb2d | Manish Narani | 27 March 2017, 12:17:00 UTC | zynqmp: devicetree: Enabled CCI support for USB This patch adds CCI support for USB when CCI is enabled in design. This patch also adds 'reg' property for Xilinx USB 3.0 IP. The 'reg' property is added in order to modify a register in that to enable coherency in Hardware. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 28 March 2017, 11:33:58 UTC |
e5e89ca | Manish Narani | 27 March 2017, 12:17:01 UTC | Documentation: DT: dwc3: update for CCI support for USB This patch adds documentation in DWC3 device-tree bindings for enabling the DMA coherency in USB. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 28 March 2017, 11:33:58 UTC |
9630b7c | Krzysztof Opasiak | 31 January 2017, 17:12:31 UTC | usb: gadget: f_hid: fix: Don't access hidg->req without spinlock held hidg->req should be accessed only with write_spinlock held as it is set to NULL when we get disabled by host. Signed-off-by: Krzysztof Opasiak <k.opasiak@samsung.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> | 28 March 2017, 10:26:02 UTC |
39f6f65 | Krzysztof Opasiak | 24 January 2017, 02:27:24 UTC | usb: gadget: f_hid: fix: Move IN request allocation to set_alt() Since commit: ba1582f22231 ("usb: gadget: f_hid: use alloc_ep_req()") we cannot allocate any requests in bind() as we check if we should align request buffer based on endpoint descriptor which is assigned in set_alt(). Allocating request in bind() function causes a NULL pointer dereference. This commit moves allocation of IN request from bind() to set_alt() to prevent this issue. Fixes: ba1582f22231 ("usb: gadget: f_hid: use alloc_ep_req()") Cc: stable@vger.kernel.org Tested-by: David Lechner <david@lechnology.com> Signed-off-by: Krzysztof Opasiak <k.opasiak@samsung.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> | 28 March 2017, 10:26:02 UTC |
2889a14 | Krzysztof Opasiak | 19 January 2017, 17:55:29 UTC | usb: gadget: f_hid: Use spinlock instead of mutex As IN request has to be allocated in set_alt() and released in disable() we cannot use mutex to protect it as we cannot sleep in those funcitons. Let's replace this mutex with a spinlock. Cc: stable@vger.kernel.org Tested-by: David Lechner <david@lechnology.com> Signed-off-by: Krzysztof Opasiak <k.opasiak@samsung.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> | 28 March 2017, 10:26:01 UTC |
92b49ee | Krzysztof Opasiak | 19 January 2017, 17:55:28 UTC | usb: gadget: f_hid: fix: Prevent accessing released memory When we unlock our spinlock to copy data to user we may get disabled by USB host and free the whole list of completed out requests including the one from which we are copying the data to user memory. To prevent from this let's remove our working element from the list and place it back only if there is sth left when we finish with it. Fixes: 99c515005857 ("usb: gadget: hidg: register OUT INT endpoint for SET_REPORT") Cc: stable@vger.kernel.org Tested-by: David Lechner <david@lechnology.com> Signed-off-by: Krzysztof Opasiak <k.opasiak@samsung.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> | 28 March 2017, 10:26:01 UTC |
8dae244 | Krzysztof Opasiak | 19 January 2017, 17:55:27 UTC | usb: gadget: f_hid: fix: Free out requests Requests for out endpoint are allocated in bind() function but never released. This commit ensures that all pending requests are released when we disable out endpoint. Fixes: 99c515005857 ("usb: gadget: hidg: register OUT INT endpoint for SET_REPORT") Cc: stable@vger.kernel.org Tested-by: David Lechner <david@lechnology.com> Signed-off-by: Krzysztof Opasiak <k.opasiak@samsung.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> | 28 March 2017, 10:26:00 UTC |
b2a1eb9 | David Lechner | 02 January 2017, 23:28:39 UTC | usb: gadget: Fix copy/pasted error message This fixes an error message that was probably copied and pasted. The same message is used for both the in and out endpoints, so it makes it impossible to know which one actually failed because both cases say "IN". Make the out endpoint error message say "OUT". Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> | 28 March 2017, 10:26:00 UTC |
06e9bfe | Matthew Wilcox | 14 December 2016, 23:09:13 UTC | idr: add ida_is_empty Two of the USB Gadgets were poking around in the internals of struct ida in order to determine if it is empty. Add the appropriate abstraction. Link: http://lkml.kernel.org/r/1480369871-5271-63-git-send-email-mawilcox@linuxonhyperv.com Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Acked-by: Konstantin Khlebnikov <koct9i@gmail.com> Tested-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Ross Zwisler <ross.zwisler@linux.intel.com> Cc: Felipe Balbi <balbi@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Michal Nazarewicz <mina86@mina86.com> Cc: Matthew Wilcox <mawilcox@microsoft.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> | 28 March 2017, 10:25:59 UTC |
53b6e5d | Janusz Dziedzic | 03 November 2016, 09:27:15 UTC | usb: gadget: f_hid add super speed support Add super speed descriptors to f_hid. Signed-off-by: Janusz Dziedzic <januszx.dziedzic@linux.intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> | 28 March 2017, 10:25:59 UTC |
d00f0c8 | Shubhrajyoti Datta | 28 March 2017, 05:57:33 UTC | clk: Reset the child count Reset the clild count before traversing the family tree. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 27 March 2017, 07:08:31 UTC |
e6a2da2 | Shubhrajyoti Datta | 25 March 2017, 11:27:20 UTC | clk: zynqmp: Warn on vpll multiuser conditionally Warn on multiuser only when changing rates. This helps remove the warn in cases where the dp driver is not there and vpll is used for other stuff. Expectation is that DP is using VPLL. Checking generic case where DP uses different PLL requires additional fix. But as of now recomendation is to use VPLL for DP. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 March 2017, 12:33:21 UTC |
756de54 | Shubhrajyoti Datta | 24 March 2017, 10:00:25 UTC | net: macb: Cleanup the clock code The clock enable and disable is taken care in pm runtime calls. Remove the same from the suspend/resume handlers. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 March 2017, 08:07:51 UTC |
6a8c796 | Borsodi Petr | 21 March 2017, 13:01:47 UTC | gpio: zynq: Wakeup gpio controller when it is used as IRQ controller There is a problem with GPIO driver when used as IRQ controller. It is not working because the module is sleeping (clock is disabled). The patch enables clocks when IP is used as IRQ controller. Signed-off-by: Borsodi Petr <Petr.Borsodi@i.cz> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 March 2017, 08:07:51 UTC |
59a4529 | Bharat Kumar Gogada | 23 March 2017, 10:54:37 UTC | PCI: Xilinx NWL: Remove old internal driver Removing unused old internal driver. Upstreamed driver is already present as pcie-xilinx-nwl.c Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 March 2017, 08:02:00 UTC |
e88e772 | Manish Narani | 23 March 2017, 10:26:13 UTC | usb: xhci: Set XHCI Light Reset for DWC3_OTG mode This Patch corrects the XHCI reset for OTG mode. The host cannot have Hard Reset while in OTG mode because that will affect the OTG peripheral mode event buffers and it will not function. The macro for OTG is USB_DWC3_OTG not USB_DWC3_DUAL_ROLE. This patch corrects the same. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 March 2017, 08:02:00 UTC |
b554d9c | Hyun Kwon | 23 March 2017, 01:07:34 UTC | drm: xilinx: drv: Unset set_busid callback The DRM framework sets the busid by itself when the set_busid callback is not set by the driver. Applications can use the busid to differentiate when there are multiple instances, thus don't register the set_busid callback. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 March 2017, 08:01:59 UTC |
9bea634 | Manish Narani | 20 March 2017, 09:09:53 UTC | usb: gadget: Correct usb EP argument for BOT status request This patch corrects the argument in f_tcm as it is mistakenly set to ep_out. It should be ep_in for status request. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 24 March 2017, 08:01:39 UTC |
7bf059f | Shubhrajyoti Datta | 23 March 2017, 11:42:06 UTC | serial: xuartps: Enable clocks in the pm disable case also When Power management is disabled then the clocks are not getting enabled. This patch enables it for the !PM case also. While at it also pm_runtime_set_active is called before calling pm_runtime_enable. fixes: 870d6d6 "serial: xilinx_uartps: Add pm runtime support" Reported-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 22 March 2017, 12:05:39 UTC |
322b2e7 | Chirag Parekh | 22 March 2017, 06:33:58 UTC | pinctrl: zynqmp: Fix code and documentation warnings This patch fixes following warnings: checkpatch.pl WARNING: Prefer 'unsigned int' to bare use of 'unsigned'. kernel-doc warning: No description found for parameter 'ngroups'. warning: No description found for parameter 'iouaddr'. warning: Excess struct/union/enum/typedef member 'ngroupos' description in 'zynqmp_pinctrl'. Signed-off-by: Chirag Parekh <chirag.parekh@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 22 March 2017, 10:09:24 UTC |
c472eeb | Tanvi Desai | 20 March 2017, 05:40:41 UTC | iio: adc: xilinx-ams: Disable interrupts at boot up This was causing tons of interrupts without anyone asking for them Signed-off-by: Tanvi Desai <tanvi.desai@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 March 2017, 10:59:17 UTC |
5bfa744 | Anurag Kumar Vulisha | 17 March 2017, 11:30:40 UTC | usb: host: xhci: Correct the log for enabling stream support in XHCI HCCPARAMS1 register store the Maximum Primary Stream Array(MAXPSASIZE) variable which is set to non-zero value if BULK streams are supported by our USB controller. This variable is checked by xhci-plat.c file for enabling bulk stream support. Since the logic for checking stream is wrongly placed, software doesn't enable bulk streaming support even after hardware has support for BULK streams. This patch corrects the check for enabling Bulk stream support. This patch is based on 'commit 5de4e1ea9a73 ("usb: host: xhci: plat: check hcc_params after add hcd")' from torvalds/linux github repository Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 March 2017, 11:47:55 UTC |
5fb3c0f | Naga Sureshkumar Relli | 17 March 2017, 07:30:14 UTC | edac: zynqmp: don't hardcode edac device index During edac device allocation edac_device_alloc_ctl_info() needs edac device index to register. but here we are passing 0 as device index. and if some other edac device controller is already using that 0 index, then device allocation will fail. So instead of hardcoding device index use edac_device_alloc_index(). this will return next available device index. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 March 2017, 11:47:54 UTC |
f26b7ab | Shubhrajyoti Datta | 15 March 2017, 15:34:11 UTC | serial: xuartps: Cleanup the clock enable The core handles the clocking now. Remove the clock disable in suspend. In resume we enable the clocks and disable after register write. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 16 March 2017, 12:16:15 UTC |
69dcb78 | Anurag Kumar Vulisha | 15 March 2017, 13:35:45 UTC | drivers: ata: Correct the AXI bus configuration for SATA ports Previously PAXIC register was programmed before configuring PCFG register. PCFG should be programmed with the address of the port for which PAXIC should be configured for. This was not happening before, so only one port PAXIC was written correctly and the other port was having wrong value. This patch moves the PXAIC register write after configuring PCFG, doing so will correct the axi bus settings for sata port0 & port1. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 14:00:05 UTC |
1815f18 | Anurag Kumar Vulisha | 15 March 2017, 13:35:44 UTC | drivers: ata: Add CCI support for SATA if CCI is enabled This patch adds support for CCI in SATA controller if CCI is enabled in design. This patch will add CCI settings for SATA if "dma-coherent" dts property is added. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 13:58:34 UTC |
215f14c | Siva Durga Prasad Paladugu | 04 March 2017, 06:46:47 UTC | arm64: zynqmp: Define and enable qspi node for DC4 board DC4 board has qspi on it hence define and enable qspi node for it. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 09:15:02 UTC |
8a583ff | Michal Simek | 08 March 2017, 08:26:02 UTC | arm64: zynqmp: Add missing maximum-speed property to usb nodes Add missing properties to dt node. Error log: ERROR: usb maximum-speed not found Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 09:13:57 UTC |
20e36be | Harini Katakam | 15 March 2017, 07:23:01 UTC | arm64: zynqmp: Remove netfilter connection tracking in defconfig Revert netfilter connection tracking and NAT settings to module because when included statically they are causing drop in macb TCP performance. Signed-off-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 08:28:17 UTC |
824623b | Wendy Liang | 15 March 2017, 04:02:09 UTC | arm: zynq: Enable Zynq remoteproc Enable Zynq remoteproc as module in the Zynq defconfig Signed-off-by: Wendy Liang <jliang@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 08:27:13 UTC |
d6c5904 | Wendy Liang | 15 March 2017, 04:02:08 UTC | arm64: zynqmp: Enable ZynqMP r5 remoteproc Enable ZynqMP r5 remoteproc driver as module in ZynqMP defconfig Signed-off-by: Wendy Liang <jliang@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 08:26:24 UTC |
622dd6b | Wendy Liang | 15 March 2017, 04:02:07 UTC | remoteproc: Select SRAM for Zynq remoteproc The Zynq remoteproc driver uses SRAM for firmware memory, select the SRAM if the remoteproc driver is selected. Signed-off-by: Wendy Liang <jliang@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 08:25:04 UTC |
62b16ee | Wendy Liang | 15 March 2017, 04:02:06 UTC | remoteproc: Select SRAM for ZynqMP r5 remoteproc As ZynqMP r5 remoteproc requires SRAM for firmware memory, select SRAM when the remoteproc driver is selected. Signed-off-by: Wendy Liang <jliang@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 08:24:27 UTC |
b9a2910 | Shubhrajyoti Datta | 14 March 2017, 12:05:25 UTC | net: macb: Fix the double disable of clocks If the pm is not suspended then we are disabling the clocks twice in the remove path fix the same. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Acked-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 08:03:17 UTC |
2e5cc8e | Nava kishore Manne | 11 March 2017, 06:46:24 UTC | serial: xuartps: Fix the early_console junk character issue In the early_console_setup is trying to access the unregister clock value, so we are receiving some garbage clk value bacause of this wrong clk value the early_console_setup is fail to set the required console baud rate. This path fix this issue. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 08:02:17 UTC |
b9a1435 | Dhaval Shah | 13 March 2017, 16:10:41 UTC | arm64: zynqmp: Enable the VCU Init driver Enable the VCU Init driver as module by default. Signed-off-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 15 March 2017, 07:59:53 UTC |
870d6d6 | Shubhrajyoti Datta | 13 March 2017, 10:31:25 UTC | serial: xilinx_uartps: Add pm runtime support Adds pm runtime support to xilinx uart ps. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 March 2017, 14:14:35 UTC |
e665b59 | Kedareswara rao Appana | 11 March 2017, 13:00:38 UTC | dma: zynqmp_dma: Fix warning variable 'val' set but not used This patch fixes the below warning drivers/dma/xilinx/zynqmp_dma.c: In function 'zynqmp_dma_handle_ovfl_int': drivers/dma/xilinx/zynqmp_dma.c:522:6: warning: variable 'val' set but not used [-Wunused-but-set-variable] Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 March 2017, 14:13:22 UTC |
b68590b | Hyun Kwon | 11 March 2017, 01:32:07 UTC | drm: xilinx: dp_sub: Clear the audio soft reset register The register needs to be programmed as it's an non-reset flop. Clear the whole register to avoid any nonderterministic behavior. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 March 2017, 14:00:41 UTC |
08ab74f | Madhurkiran Harikrishnan | 10 March 2017, 18:05:08 UTC | zynqmp-zcu106.dts: Remove si570 from Xilinx_drm node This patch will remove the si570 clock for xilinx drm for zcu106 as CCF already takes care of it. Signed-off-by: Madhurkiran Harikrishnan <madhurki@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 13 March 2017, 14:00:35 UTC |
227f35c | Anurag Kumar Vulisha | 10 March 2017, 13:48:17 UTC | devicetree: dwc3: Uncomment snps,quirk-frame-length-adjustment flag This patch uncomments snps,quirk-frame-length-adjustment which has the value to adjust the SOF/ITP generated from the controller. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 14:12:14 UTC |
a22ddbc | Anurag Kumar Vulisha | 10 March 2017, 13:48:16 UTC | drivers: dwc3: Correct the logic for GFLADJ adjustment This patch corrects the logic used for adjusting GFLADJ register Currently during phy initialization, USB core reset is happening. Because of reset USB GFLADJ register is getting restored to default values. This patch updates the GFADJ[21:8] & GFLADJ[5:0] bits if they are not equal to the requested value from dts. This patch also removes the WARN_ONCE messages that occur if the previous register value matches to the current value requested. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 14:11:59 UTC |
75334bd | Dhaval Shah | 10 March 2017, 12:09:57 UTC | misc: vcu: updated error handling. pll_ref clocksource can be a fixed or si570_1 type. If there is a fixed clock in the pll_ref, we cann't set the clock in that pll_ref clock source. In this case, we should bypass the error with the warning only. this will work for any kind of pll_ref clocksource. Signed-off-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 12:15:36 UTC |
6e3067f | Tanmay Upadhyay | 05 March 2017, 14:09:52 UTC | usb: dwc3: retain resource index for unforced stops all active transfers are stopped with force rm bit false while hibernating and restarted using resource index on wakeup Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 11:57:18 UTC |
7f94800 | Tanmay Upadhyay | 05 March 2017, 14:09:51 UTC | usb: dwc3: correct ignoring hibernation event - ignore hibernation event if event info doesn't match current USB speed - dwc->speed holds register value, which isn't the same as USB speed enum Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 11:57:04 UTC |
d79c139 | Tanmay Upadhyay | 05 March 2017, 14:09:50 UTC | usb: dwc3: hibernation: zero out scratchpad buffer DWC3 core fails to save in scratchpad buffer area if it's not initialized with zero Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 11:56:49 UTC |
7280966 | Tanmay Upadhyay | 05 March 2017, 14:09:49 UTC | usb: dwc3: hibernation: fix scratch buffer allocation We would know how many scratch buffers to allocate in core_init. So, move scratch buffer allocation in core_init. Keep a check to avoid re-allocation when core_init is called after probe. Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 11:56:27 UTC |
5541dd0 | Tanmay Upadhyay | 05 March 2017, 14:09:48 UTC | usb: dwc3: hibernation: warn if scratch buffer is NULL Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 11:55:59 UTC |
c64bf43 | Michal Simek | 10 March 2017, 09:56:36 UTC | dma: zynqmp_dma: Fix kernel-doc format Fix drivers/dma/xilinx/zynqmp_dma.c:556: info: Scanning doc for zynqmp_dma_device_config drivers/dma/xilinx/zynqmp_dma.c:562: warning: No description found for return value of 'zynqmp_dma_device_config' drivers/dma/xilinx/zynqmp_dma.c:653: info: Scanning doc for zynqmp_dma_free_descriptors drivers/dma/xilinx/zynqmp_dma.c:657: warning: No description found for parameter 'chan' drivers/dma/xilinx/zynqmp_dma.c:657: warning: Excess function parameter 'dchan' description in 'zynqmp_dma_free_descriptors' Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 11:54:32 UTC |
7a9b92e | Michal Simek | 10 March 2017, 09:25:45 UTC | drm: xilinx: dp_sub: Remove unused variable Warning log: drivers/gpu/drm/xilinx/xilinx_drm_dp_sub.c: In function 'xilinx_drm_dp_sub_layer_set_fmt': drivers/gpu/drm/xilinx/xilinx_drm_dp_sub.c:1202:7: warning: variable 'vid' set but not used [-Wunused-but-set-variable] bool vid; Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 11:54:31 UTC |
2c3fd0a | Michal Simek | 09 March 2017, 16:18:20 UTC | i2c: cadence: Fix wording in i2c-cadence driver Fix wording based on checkpatch.pl Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 11:54:31 UTC |
13344ac | Will Wong | 09 March 2017, 18:07:46 UTC | arm64: zynqmp: Add access to global general storage registers This provides the proper interface for user applications to access the PMU Global General Storage registers 0 to 3, and the PMU Persistent Global General Storage registers 0 to 3. These registers are commonly used to track the number of normal and unexpected reboots, system up times, etc. Until now, these registers can only be accessed through the debugfs. It is desirable to provide a more proper interface for them. For example: To read from persistent global general storage register 0: cat /sys/devices/platform/firmware/pggs0 To write 1 byte to persistent global general storage register 0: echo 0x000000FF 0x000000AB > /sys/devices/platform/firmware/pggs0 Signed-off-by: Will Wong <willw@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 10 March 2017, 11:54:30 UTC |