Revision 008b69e4d52f2cbee3ed0d0502edd78155000b1a authored by Thomas Gleixner on 21 December 2016, 19:19:57 UTC, committed by Thomas Gleixner on 25 December 2016, 09:47:44 UTC
The mpic is either the main interrupt controller or is cascaded behind a GIC. The mpic is single instance and the modes are mutually exclusive, so there is no reason to have seperate cpu hotplug states. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Sebastian Siewior <bigeasy@linutronix.de> Cc: Marc Zyngier <marc.zyngier@arm.com> Link: http://lkml.kernel.org/r/20161221192112.333161745@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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| File | Mode | Size |
|---|---|---|
| 00-INDEX | -rw-r--r-- | 458 bytes |
| README.cycladesZ | -rw-r--r-- | 293 bytes |
| driver | -rw-r--r-- | 14.7 KB |
| moxa-smartio | -rw-r--r-- | 20.1 KB |
| n_gsm.txt | -rw-r--r-- | 3.1 KB |
| rocket.txt | -rw-r--r-- | 7.6 KB |
| serial-rs485.txt | -rw-r--r-- | 3.4 KB |
| tty.txt | -rw-r--r-- | 11.3 KB |
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