Revision 01ce6d4d2c8157b076425e3dd8319948652583c5 authored by Huacai Chen on 24 August 2020, 07:44:03 UTC, committed by Thomas Bogendoerfer on 22 September 2020, 11:07:22 UTC
If MSA is enabled, FPU_REG_WIDTH is 128 rather than 64, then get_fpr64()
/set_fpr64() in the original unaligned instruction emulation code access
the wrong fp registers. This is because the current code doesn't specify
the correct index field, so fix it.
Fixes: f83e4f9896eff614d0f2547a ("MIPS: Loongson-3: Add some unaligned instructions emulation")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
1 parent b959b97
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