Revision 09e71a6f13445974fe9b70b6d4b68ac362cd68b6 authored by Dave Jiang on 13 December 2016, 16:03:13 UTC, committed by Jon Mason on 23 December 2016, 21:10:54 UTC
The offsets for the SZ registers are wrong. Updated.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reported-by: Sandeep Mann <sandeep@purestorage.com>
Tested-by: Zachary Ross <zacharyx.ross@intel.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
1 parent 5c43c52
History
File Mode Size
Kconfig -rw-r--r-- 2.8 KB
Makefile -rw-r--r-- 545 bytes
core-card.c -rw-r--r-- 19.5 KB
core-cdev.c -rw-r--r-- 46.2 KB
core-device.c -rw-r--r-- 34.1 KB
core-iso.c -rw-r--r-- 10.3 KB
core-topology.c -rw-r--r-- 14.9 KB
core-transaction.c -rw-r--r-- 35.4 KB
core.h -rw-r--r-- 7.3 KB
init_ohci1394_dma.c -rw-r--r-- 9.6 KB
net.c -rw-r--r-- 41.9 KB
nosy-user.h -rw-r--r-- 590 bytes
nosy.c -rw-r--r-- 17.6 KB
nosy.h -rw-r--r-- 9.7 KB
ohci.c -rw-r--r-- 105.6 KB
ohci.h -rw-r--r-- 7.0 KB
sbp2.c -rw-r--r-- 46.7 KB

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