Revision 0d01532451710110a93891ae152d1dd1ee006ccf authored by Daniel Yeisley on 30 May 2006, 20:47:57 UTC, committed by Linus Torvalds on 31 May 2006, 03:31:06 UTC
From: Daniel Yeisley <dan.yeisley@unisys.com> It is possible to boot a Unisys ES7000 with CPUs from multiple cells, and not also include the memory from those cells. This can create a scenario where node 0 has cpus, but no associated memory. The system will boot fine in a configuration where node 0 has memory, but nodes 2 and 3 do not. [AK: I rechecked the code and generic code seems to indeed handle that already. Dan's original patch had a change for mm/slab.c that seems to be already in now.] Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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File | Mode | Size |
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Makefile | -rw-r--r-- | 284 bytes |
clntlock.c | -rw-r--r-- | 5.5 KB |
clntproc.c | -rw-r--r-- | 19.0 KB |
host.c | -rw-r--r-- | 8.6 KB |
mon.c | -rw-r--r-- | 5.3 KB |
svc.c | -rw-r--r-- | 12.4 KB |
svc4proc.c | -rw-r--r-- | 14.4 KB |
svclock.c | -rw-r--r-- | 19.2 KB |
svcproc.c | -rw-r--r-- | 14.9 KB |
svcshare.c | -rw-r--r-- | 2.5 KB |
svcsubs.c | -rw-r--r-- | 7.4 KB |
xdr.c | -rw-r--r-- | 14.1 KB |
xdr4.c | -rw-r--r-- | 13.6 KB |
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