https://github.com/torvalds/linux
Revision 108f518cc4f81eb8e3b46a0bd5cb902ef90a51a8 authored by Henry Nestler on 22 February 2011, 11:29:42 UTC, committed by David S. Miller on 23 February 2011, 22:29:50 UTC
DM9000 revision B needs 1 ms delay after PHY power-on.
PHY must be powered on by writing 0 into register DM9000_GPR before
all other settings will change (see Davicom spec and example code).

Remember, that register DM9000_GPR was not changed by reset sequence.

Without this fix the FIFO is out of sync and sends wrong data after
sequence of "ifconfig ethX down ; ifconfig ethX up".

Signed-off-by: David S. Miller <davem@davemloft.net>
1 parent 8dde924
History
Tip revision: 108f518cc4f81eb8e3b46a0bd5cb902ef90a51a8 authored by Henry Nestler on 22 February 2011, 11:29:42 UTC
DM9000B: Fix PHY power for network down/up
Tip revision: 108f518
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