Revision 132c803f7b70b17322579f6f4f3f65cf68e55135 authored by Laxman Dewangan on 15 March 2013, 05:34:08 UTC, committed by Wolfram Sang on 22 March 2013, 09:28:55 UTC
NVIDIA's Tegra SoC allows read/write of controller register only if controller clock is enabled. System hangs if read/write happens to registers without enabling clock. clk_prepare_enable() can be fail due to unknown reason and hence adding check for return value of this function. If this function success then only access register otherwise return to caller with error. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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fdt_sw.c
#include <linux/libfdt_env.h>
#include "../scripts/dtc/libfdt/fdt_sw.c"
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