Revision 1519e57fe81c14bb8fa4855579f19264d1ef63b4 authored by Francois Romieu on 03 February 2011, 11:02:36 UTC, committed by Francois Romieu on 04 February 2011, 09:38:10 UTC
Some experiment-based action to prevent my 8168 chipsets locking-up hard
in the irq handler under load (pktgen ~1Mpps). Apparently a reset is not
always mandatory (is it at all ?).

- RTL_GIGA_MAC_VER_12
- RTL_GIGA_MAC_VER_25
  Missed ~55% packets. Note:
  - this is an old SiS 965L motherboard
  - the 8168 chipset emits (lots of) control frames towards the sender

- RTL_GIGA_MAC_VER_26
  The chipset does not go into a frenzy of mac control pause when it
  crashes yet but it can still be crashed. It needs more work.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Ivan Vecera <ivecera@redhat.com>
Cc: Hayes <hayeswang@realtek.com>
1 parent b5ba6d1
History
File Mode Size
Kconfig -rw-r--r-- 1003 bytes
Makefile -rw-r--r-- 324 bytes
cache.c -rw-r--r-- 3.0 KB
cnode.c -rw-r--r-- 4.8 KB
coda_cache.h -rw-r--r-- 673 bytes
coda_fs_i.h -rw-r--r-- 1.9 KB
coda_int.h -rw-r--r-- 411 bytes
coda_linux.c -rw-r--r-- 5.0 KB
coda_linux.h -rw-r--r-- 3.0 KB
dir.c -rw-r--r-- 16.3 KB
file.c -rw-r--r-- 6.0 KB
inode.c -rw-r--r-- 7.2 KB
pioctl.c -rw-r--r-- 2.2 KB
psdev.c -rw-r--r-- 10.2 KB
symlink.c -rw-r--r-- 1.1 KB
sysctl.c -rw-r--r-- 1.3 KB
upcall.c -rw-r--r-- 22.8 KB

back to top