Revision 1519e57fe81c14bb8fa4855579f19264d1ef63b4 authored by Francois Romieu on 03 February 2011, 11:02:36 UTC, committed by Francois Romieu on 04 February 2011, 09:38:10 UTC
Some experiment-based action to prevent my 8168 chipsets locking-up hard in the irq handler under load (pktgen ~1Mpps). Apparently a reset is not always mandatory (is it at all ?). - RTL_GIGA_MAC_VER_12 - RTL_GIGA_MAC_VER_25 Missed ~55% packets. Note: - this is an old SiS 965L motherboard - the 8168 chipset emits (lots of) control frames towards the sender - RTL_GIGA_MAC_VER_26 The chipset does not go into a frenzy of mac control pause when it crashes yet but it can still be crashed. It needs more work. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Ivan Vecera <ivecera@redhat.com> Cc: Hayes <hayeswang@realtek.com>
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| File | Mode | Size |
|---|---|---|
| Kconfig | -rw-r--r-- | 1.8 KB |
| Makefile | -rw-r--r-- | 198 bytes |
| internal.h | -rw-r--r-- | 1.3 KB |
| mmap-nommu.c | -rw-r--r-- | 2.1 KB |
| storage.c | -rw-r--r-- | 6.4 KB |
| super.c | -rw-r--r-- | 15.1 KB |
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