Revision 16e604a437c89751dc626c9e90cf88ba93c5be64 authored by Alexandru Elisei on 07 August 2019, 09:53:20 UTC, committed by Marc Zyngier on 09 August 2019, 07:07:26 UTC
A HW mapped level sensitive interrupt asserted by a device will not be put into the ap_list if it is disabled at the VGIC level. When it is enabled again, it will be inserted into the ap_list and written to a list register on guest entry regardless of the state of the device. We could argue that this can also happen on real hardware, when the command to enable the interrupt reached the GIC before the device had the chance to de-assert the interrupt signal; however, we emulate the distributor and redistributors in software and we can do better than that. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
1 parent c69509c
cast5.h
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _CRYPTO_CAST5_H
#define _CRYPTO_CAST5_H
#include <linux/types.h>
#include <linux/crypto.h>
#include <crypto/cast_common.h>
#define CAST5_BLOCK_SIZE 8
#define CAST5_MIN_KEY_SIZE 5
#define CAST5_MAX_KEY_SIZE 16
struct cast5_ctx {
u32 Km[16];
u8 Kr[16];
int rr; /* rr ? rounds = 12 : rounds = 16; (rfc 2144) */
};
int cast5_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen);
void __cast5_encrypt(struct cast5_ctx *ctx, u8 *dst, const u8 *src);
void __cast5_decrypt(struct cast5_ctx *ctx, u8 *dst, const u8 *src);
#endif
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