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17 May 2024, 11:00:25 UTC
Revision 1a73d9310e093fc3adffba4d0a67b9fab2ee3f63 authored by Paul Burton on 02 June 2017, 18:35:01 UTC, committed by Ralf Baechle on 15 June 2017, 09:47:42 UTC 
MIPS: Fix bnezc/jialc return address calculation
 
The code handling the pop76 opcode (ie. bnezc & jialc instructions) in
__compute_return_epc_for_insn() needs to set the value of $31 in the
jialc case, which is encoded with rs = 0. However its check to
differentiate bnezc (rs != 0) from jialc (rs = 0) was unfortunately
backwards, meaning that if we emulate a bnezc instruction we clobber $31
& if we emulate a jialc instruction it actually behaves like a jic
instruction.

Fix this by inverting the check of rs to match the way the instructions
are actually encoded.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 28d6f93d201d ("MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions")
Cc: stable <stable@vger.kernel.org> # v4.0+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16178/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
1 parent 698b851
History
Tip revision: 1a73d9310e093fc3adffba4d0a67b9fab2ee3f63 authored by Paul Burton on 02 June 2017, 18:35:01 UTC
MIPS: Fix bnezc/jialc return address calculation
Tip revision: 1a73d93
File Mode Size
00-INDEX -rw-r--r-- 1.2 KB
bootwrapper.txt -rw-r--r-- 7.6 KB
cpu_families.txt -rw-r--r-- 6.0 KB
cpu_features.txt -rw-r--r-- 2.6 KB
cxl.txt -rw-r--r-- 15.6 KB
cxlflash.txt -rw-r--r-- 18.0 KB
dscr.txt -rw-r--r-- 3.4 KB
eeh-pci-error-recovery.txt -rw-r--r-- 15.0 KB
firmware-assisted-dump.txt -rw-r--r-- 12.2 KB
hvcs.txt -rw-r--r-- 23.2 KB
mpc52xx.txt -rw-r--r-- 1.2 KB
pci_iov_resource_on_powernv.txt -rw-r--r-- 14.2 KB
pmu-ebb.txt -rw-r--r-- 5.3 KB
ptrace.txt -rw-r--r-- 5.9 KB
qe_firmware.txt -rw-r--r-- 12.8 KB
syscall64-abi.txt -rw-r--r-- 3.8 KB
transactional_memory.txt -rw-r--r-- 8.1 KB
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