Revision 1a931707ad4a46e79d4ecfee56d8f6e8cc8d4f28 authored by Arnaldo Carvalho de Melo on 16 December 2022, 12:53:53 UTC, committed by Arnaldo Carvalho de Melo on 16 December 2022, 12:53:53 UTC
To resolve a trivial merge conflict with c302378bc157f6a7 ("libbpf: Hashmap interface update to allow both long and void* keys/values"), where a function present upstream was removed in the perf tools development tree. Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Kconfig-nommu
# SPDX-License-Identifier: GPL-2.0
#
# Kconfig for uClinux(non-paged MM) depend configurations
# Hyok S. Choi <hyok.choi@samsung.com>
#
config SET_MEM_PARAM
bool "Set flash/sdram size and base addr"
help
Say Y to manually set the base addresses and sizes.
otherwise, the default values are assigned.
config DRAM_BASE
hex '(S)DRAM Base Address' if SET_MEM_PARAM
default 0x00800000
config DRAM_SIZE
hex '(S)DRAM SIZE' if SET_MEM_PARAM
default 0x00800000
config FLASH_MEM_BASE
hex 'FLASH Base Address' if SET_MEM_PARAM
depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
default 0x00400000
config FLASH_SIZE
hex 'FLASH Size' if SET_MEM_PARAM
depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
default 0x00400000
config PROCESSOR_ID
hex 'Hard wire the processor ID'
default 0x00007700
depends on !(CPU_CP15 || CPU_V7M)
help
If processor has no CP15 register, this processor ID is
used instead of the auto-probing which utilizes the register.
config REMAP_VECTORS_TO_RAM
bool 'Install vectors to the beginning of RAM'
help
The kernel needs to change the hardware exception vectors.
In nommu mode, the hardware exception vectors are normally
placed at address 0x00000000. However, this region may be
occupied by read-only memory depending on H/W design.
If the region contains read-write memory, say 'n' here.
If your CPU provides a remap facility which allows the exception
vectors to be mapped to writable memory, say 'n' here.
Otherwise, say 'y' here. In this case, the kernel will require
external support to redirect the hardware exception vectors to
the writable versions located at DRAM_BASE.
config ARM_MPU
bool 'Use the ARM v7 PMSA Compliant MPU'
depends on CPU_V7 || CPU_V7M
default y if CPU_V7
help
Some ARM systems without an MMU have instead a Memory Protection
Unit (MPU) that defines the type and permissions for regions of
memory.
If your CPU has an MPU then you should choose 'y' here unless you
know that you do not want to use the MPU.
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