https://github.com/torvalds/linux
Revision 2022c1f136067f673964dcaffa1cae1008ddcd74 authored by Russ Anderson on 03 January 2008, 16:23:49 UTC, committed by Tony Luck on 03 January 2008, 21:22:54 UTC
Montecito and Montvale behaves slightly differently than previous
Itanium processors, resulting in the MCA due to a failed PIO read
to sometimes surfacing outside the nofault code.  This code is
based on discussions with Intel CPU architects and verified at
customer sites.

Signed-off-by: Russ Anderson <rja@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
1 parent 4ca8ad7
History
Tip revision: 2022c1f136067f673964dcaffa1cae1008ddcd74 authored by Russ Anderson on 03 January 2008, 16:23:49 UTC
[IA64] Update Altix nofault code
Tip revision: 2022c1f
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.gitignore -rw-r--r-- 628 bytes
.mailmap -rw-r--r-- 3.6 KB
COPYING -rw-r--r-- 18.3 KB
CREDITS -rw-r--r-- 90.1 KB
Kbuild -rw-r--r-- 1.6 KB
MAINTAINERS -rw-r--r-- 91.6 KB
Makefile -rw-r--r-- 51.9 KB
README -rw-r--r-- 16.5 KB
REPORTING-BUGS -rw-r--r-- 3.0 KB

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