https://github.com/torvalds/linux
Revision 25642705b2359a705784bbbf1655c25a8f8efde2 authored by Benjamin Herrenschmidt on 14 June 2017, 00:19:25 UTC, committed by Michael Ellerman on 15 June 2017, 13:29:39 UTC
Architecturally we should apply a 0x400 offset for these. Not doing
it will break future HW implementations.

The offset of 0 is supposed to remain for "triggers" though not all
sources support both trigger and store EOI, and in P9 specifically,
some sources will treat 0 as a store EOI. But future chips will not.
So this makes us use the properly architected offset which should work
always.

Fixes: 243e25112d06 ("powerpc/xive: Native exploitation of the XIVE interrupt controller")
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
1 parent 377aa6b
History
Tip revision: 25642705b2359a705784bbbf1655c25a8f8efde2 authored by Benjamin Herrenschmidt on 14 June 2017, 00:19:25 UTC
powerpc/xive: Fix offset for store EOI MMIOs
Tip revision: 2564270
File Mode Size
Documentation
arch
block
certs
crypto
drivers
firmware
fs
include
init
ipc
kernel
lib
mm
net
samples
scripts
security
sound
tools
usr
virt
.cocciconfig -rw-r--r-- 59 bytes
.get_maintainer.ignore -rw-r--r-- 31 bytes
.gitattributes -rw-r--r-- 30 bytes
.gitignore -rw-r--r-- 1.3 KB
.mailmap -rw-r--r-- 8.1 KB
COPYING -rw-r--r-- 18.3 KB
CREDITS -rw-r--r-- 96.2 KB
Kbuild -rw-r--r-- 2.2 KB
Kconfig -rw-r--r-- 252 bytes
MAINTAINERS -rw-r--r-- 397.6 KB
Makefile -rw-r--r-- 58.6 KB
README -rw-r--r-- 722 bytes

README

back to top