https://github.com/torvalds/linux
Revision 275e88b06a277ccf89d9c471a777e9b4f8c552b0 authored by Rob Herring on 18 December 2020, 14:39:05 UTC, committed by Bjorn Helgaas on 26 December 2020, 03:58:36 UTC
Commit b9ac0f9dc8ea ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common
code") broke enumeration of downstream devices on Tegra:

In non-working case (next-20201211):

  0001:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad2 (rev a1)
  0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13)
  0005:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad0 (rev a1)

In working case (v5.10-rc7):

  0001:00:00.0 PCI bridge: Molex Incorporated Device 1ad2 (rev a1)
  0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13)
  0005:00:00.0 PCI bridge: Molex Incorporated Device 1ad0 (rev a1)
  0005:01:00.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab)
  0005:02:02.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab)
  0005:03:00.0 USB controller: PLX Technology, Inc. Device 3380 (rev ab)

The problem seems to be dw_pcie_setup_rc() is now called twice before and
after the link up handling. The fix is to move Tegra's link up handling to
.start_link() function like other DWC drivers. Tegra is a bit more
complicated than others as it re-inits the whole DWC controller to retry
the link. With this, the initialization ordering is restored to match the
prior sequence.

Fixes: b9ac0f9dc8ea ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common code")
Link: https://lore.kernel.org/r/20201218143905.1614098-1-robh@kernel.org
Reported-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Tested-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Vidya Sagar <vidyas@nvidia.com>
1 parent 255b2d5
History
Tip revision: 275e88b06a277ccf89d9c471a777e9b4f8c552b0 authored by Rob Herring on 18 December 2020, 14:39:05 UTC
PCI: tegra: Fix host link initialization
Tip revision: 275e88b
File Mode Size
broadcom
intel
qcom
samsung
st
tegra
ti-soc-thermal
Kconfig -rw-r--r-- 16.1 KB
Makefile -rw-r--r-- 2.5 KB
amlogic_thermal.c -rw-r--r-- 8.4 KB
armada_thermal.c -rw-r--r-- 25.7 KB
cpufreq_cooling.c -rw-r--r-- 19.5 KB
cpuidle_cooling.c -rw-r--r-- 7.4 KB
da9062-thermal.c -rw-r--r-- 7.7 KB
db8500_thermal.c -rw-r--r-- 6.4 KB
devfreq_cooling.c -rw-r--r-- 14.8 KB
dove_thermal.c -rw-r--r-- 4.7 KB
gov_bang_bang.c -rw-r--r-- 3.3 KB
gov_fair_share.c -rw-r--r-- 3.3 KB
gov_power_allocator.c -rw-r--r-- 18.3 KB
gov_step_wise.c -rw-r--r-- 5.9 KB
gov_user_space.c -rw-r--r-- 1.3 KB
hisi_thermal.c -rw-r--r-- 17.1 KB
imx8mm_thermal.c -rw-r--r-- 5.2 KB
imx_sc_thermal.c -rw-r--r-- 3.4 KB
imx_thermal.c -rw-r--r-- 24.3 KB
k3_bandgap.c -rw-r--r-- 8.1 KB
khadas_mcu_fan.c -rw-r--r-- 3.6 KB
kirkwood_thermal.c -rw-r--r-- 3.0 KB
max77620_thermal.c -rw-r--r-- 4.6 KB
mtk_thermal.c -rw-r--r-- 29.8 KB
qoriq_thermal.c -rw-r--r-- 9.5 KB
rcar_gen3_thermal.c -rw-r--r-- 13.0 KB
rcar_thermal.c -rw-r--r-- 15.0 KB
rockchip_thermal.c -rw-r--r-- 38.0 KB
spear_thermal.c -rw-r--r-- 4.8 KB
sprd_thermal.c -rw-r--r-- 13.8 KB
sun8i_thermal.c -rw-r--r-- 16.0 KB
tango_thermal.c -rw-r--r-- 3.2 KB
thermal-generic-adc.c -rw-r--r-- 4.1 KB
thermal_core.c -rw-r--r-- 43.7 KB
thermal_core.h -rw-r--r-- 6.0 KB
thermal_helpers.c -rw-r--r-- 6.2 KB
thermal_hwmon.c -rw-r--r-- 7.0 KB
thermal_hwmon.h -rw-r--r-- 1.0 KB
thermal_mmio.c -rw-r--r-- 2.8 KB
thermal_netlink.c -rw-r--r-- 15.9 KB
thermal_netlink.h -rw-r--r-- 2.3 KB
thermal_of.c -rw-r--r-- 27.5 KB
thermal_sysfs.c -rw-r--r-- 24.0 KB
uniphier_thermal.c -rw-r--r-- 9.3 KB
zx2967_thermal.c -rw-r--r-- 6.2 KB

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