https://github.com/torvalds/linux
Revision 275e88b06a277ccf89d9c471a777e9b4f8c552b0 authored by Rob Herring on 18 December 2020, 14:39:05 UTC, committed by Bjorn Helgaas on 26 December 2020, 03:58:36 UTC
Commit b9ac0f9dc8ea ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common
code") broke enumeration of downstream devices on Tegra:

In non-working case (next-20201211):

  0001:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad2 (rev a1)
  0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13)
  0005:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad0 (rev a1)

In working case (v5.10-rc7):

  0001:00:00.0 PCI bridge: Molex Incorporated Device 1ad2 (rev a1)
  0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13)
  0005:00:00.0 PCI bridge: Molex Incorporated Device 1ad0 (rev a1)
  0005:01:00.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab)
  0005:02:02.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab)
  0005:03:00.0 USB controller: PLX Technology, Inc. Device 3380 (rev ab)

The problem seems to be dw_pcie_setup_rc() is now called twice before and
after the link up handling. The fix is to move Tegra's link up handling to
.start_link() function like other DWC drivers. Tegra is a bit more
complicated than others as it re-inits the whole DWC controller to retry
the link. With this, the initialization ordering is restored to match the
prior sequence.

Fixes: b9ac0f9dc8ea ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common code")
Link: https://lore.kernel.org/r/20201218143905.1614098-1-robh@kernel.org
Reported-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Tested-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Vidya Sagar <vidyas@nvidia.com>
1 parent 255b2d5
History
Tip revision: 275e88b06a277ccf89d9c471a777e9b4f8c552b0 authored by Rob Herring on 18 December 2020, 14:39:05 UTC
PCI: tegra: Fix host link initialization
Tip revision: 275e88b
File Mode Size
hvc
ipwireless
serdev
serial
vt
Kconfig -rw-r--r-- 17.6 KB
Makefile -rw-r--r-- 1.3 KB
amiserial.c -rw-r--r-- 41.8 KB
cyclades.c -rw-r--r-- 108.9 KB
ehv_bytechan.c -rw-r--r-- 21.7 KB
goldfish.c -rw-r--r-- 11.9 KB
isicom.c -rw-r--r-- 40.4 KB
mips_ejtag_fdc.c -rw-r--r-- 35.2 KB
moxa.c -rw-r--r-- 52.1 KB
moxa.h -rw-r--r-- 8.5 KB
mxser.c -rw-r--r-- 70.1 KB
mxser.h -rw-r--r-- 4.5 KB
n_gsm.c -rw-r--r-- 79.0 KB
n_hdlc.c -rw-r--r-- 21.9 KB
n_null.c -rw-r--r-- 1.3 KB
n_r3964.c -rw-r--r-- 31.2 KB
n_tracerouter.c -rw-r--r-- 6.6 KB
n_tracesink.c -rw-r--r-- 6.6 KB
n_tracesink.h -rw-r--r-- 853 bytes
n_tty.c -rw-r--r-- 61.7 KB
nozomi.c -rw-r--r-- 46.5 KB
pty.c -rw-r--r-- 24.5 KB
rocket.c -rw-r--r-- 92.2 KB
rocket.h -rw-r--r-- 3.8 KB
rocket_int.h -rw-r--r-- 41.6 KB
synclink.c -rw-r--r-- 222.9 KB
synclink_gt.c -rw-r--r-- 131.2 KB
synclinkmp.c -rw-r--r-- 146.3 KB
sysrq.c -rw-r--r-- 27.6 KB
tty_audit.c -rw-r--r-- 5.6 KB
tty_baudrate.c -rw-r--r-- 6.5 KB
tty_buffer.c -rw-r--r-- 16.2 KB
tty_io.c -rw-r--r-- 84.9 KB
tty_ioctl.c -rw-r--r-- 23.7 KB
tty_jobctrl.c -rw-r--r-- 14.0 KB
tty_ldisc.c -rw-r--r-- 20.9 KB
tty_ldsem.c -rw-r--r-- 10.5 KB
tty_mutex.c -rw-r--r-- 1.1 KB
tty_port.c -rw-r--r-- 18.2 KB
ttynull.c -rw-r--r-- 2.3 KB
vcc.c -rw-r--r-- 23.3 KB

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