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05 April 2024, 19:05:47 UTC
Revision 2c8c34167c987e463d62a55384fcec7fa8d03a54 authored by Jarkko Nikula on 29 September 2016, 09:59:39 UTC, committed by Lee Jones on 16 November 2016, 09:50:18 UTC 
mfd: lpss: Fix Intel Kaby Lake PCH-H properties
 
There are a few issues on Intel Kaby Lake PCH-H properties added by
commit a6a576b78e09 ("mfd: lpss: Add Intel Kaby Lake PCH-H PCI IDs"):

- Input clock of I2C controller on Intel Kaby Lake PCH-H is 120 MHz not
  133 MHz. This was probably copy-paste error from Intel Broxton I2C
  properties.
- There is no default I2C SDA hold time specified which is used when
  ACPI doesn't provide it. I got information from Windows driver team
  that Kaby Lake PCH-H can use the same configuration than Intel
  Sunrisepoint PCH.
- Common HS-UART properties are not used.

Fix these by reusing the Sunrisepoint properties on Kaby Lake PCH-H.

Fixes: a6a576b78e09 ("mfd: lpss: Add Intel Kaby Lake PCH-H PCI IDs")
Reported-by: Xiang A Wang <xiang.a.wang@intel.com>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
1 parent 1001354
History
Tip revision: 2c8c34167c987e463d62a55384fcec7fa8d03a54 authored by Jarkko Nikula on 29 September 2016, 09:59:39 UTC
mfd: lpss: Fix Intel Kaby Lake PCH-H properties
Tip revision: 2c8c341
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.cocciconfig -rw-r--r-- 59 bytes
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.gitattributes -rw-r--r-- 30 bytes
.gitignore -rw-r--r-- 1.3 KB
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MAINTAINERS -rw-r--r-- 372.4 KB
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