Revision 2ca56f4c21094fd1da022efac9e3a0694d6b482b authored by Brian Viele on 17 December 2019, 07:07:55 UTC, committed by Karl Palsson on 04 March 2020, 23:17:02 UTC
PLL configuration on the H7 is pretty involved, and takes a number of configurations to make it work. In order to make peripheral drivers a bit easier to implement, working with a soft clock tree in the rcc module which stores the clock settings for each clock as they are setup such that users can request the clock value from the RCC module for configuration. Added getter for the clock which allows the user to pass the base address of the peripheral, and get the peripheral clock value for convenience. Clock configuration is still missing values for setting up all of the kernel clocks for the peripherals, but this is in work, and there is a framework to do so. Have tested to 400MHz without issue. Peripherals that are explicitly supported are working and the clock tree values appear to follow correctly. Added LDO settings to allow setting the scaling to support high frequencies.
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| ld | ||
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| .gitignore | -rw-r--r-- | 1.2 KB |
| .travis.yml | -rw-r--r-- | 272 bytes |
| COPYING.GPL3 | -rw-r--r-- | 34.2 KB |
| COPYING.LGPL3 | -rw-r--r-- | 7.5 KB |
| HACKING | -rw-r--r-- | 3.4 KB |
| HACKING_COMMON_DOC | -rw-r--r-- | 3.0 KB |
| Makefile | -rw-r--r-- | 3.6 KB |
| README.md | -rw-r--r-- | 6.8 KB |
| locm3.sublime-project | -rw-r--r-- | 486 bytes |
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