Revision 391e5975c0208ce3739587b33eba08be3e473d79 authored by Nobuhiro Iwamatsu on 23 December 2021, 07:36:33 UTC, committed by Jakub Kicinski on 23 December 2021, 17:58:13 UTC
ETHER_CLK_SEL_FREQ_SEL_2P5M is not 0 bit of the register. This is a
value, which is 0. Fix from BIT(0) to 0.
Reported-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Fixes: b38dd98ff8d0 ("net: stmmac: Add Toshiba Visconti SoCs glue driver")
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20211223073633.101306-1-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
1 parent 65fd0c3
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| init | ||
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| net | ||
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| .clang-format | -rw-r--r-- | 16.6 KB |
| .cocciconfig | -rw-r--r-- | 59 bytes |
| .get_maintainer.ignore | -rw-r--r-- | 71 bytes |
| .gitattributes | -rw-r--r-- | 62 bytes |
| .gitignore | -rw-r--r-- | 1.9 KB |
| .mailmap | -rw-r--r-- | 20.5 KB |
| COPYING | -rw-r--r-- | 496 bytes |
| CREDITS | -rw-r--r-- | 98.6 KB |
| Kbuild | -rw-r--r-- | 1.3 KB |
| Kconfig | -rw-r--r-- | 555 bytes |
| MAINTAINERS | -rw-r--r-- | 616.4 KB |
| Makefile | -rw-r--r-- | 64.0 KB |
| README | -rw-r--r-- | 727 bytes |
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