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Revision 3a85f91ed8bfe3322cda4ccec63eae2717f67f00 authored by Aron Szabo on 26 February 2025, 09:29:15 UTC, committed by Aron Szabo on 26 February 2025, 09:29:15 UTC
stm32l0: rcc: fix incorrect bit shift in rcc_set_lpuart1_sel()
The function `rcc_set_lpuart1_sel()` was incorrectly using `RCC_CCIPR_LPTIM1SEL_SHIFT`
instead of `RCC_CCIPR_LPUART1SEL_SHIFT`, causing incorrect LPUART1 clock source selection.

This patch corrects the bit shift to ensure the LPUART1SEL field is properly updated.

To verify check RM0377 Reference manual section 7.3.19.
1 parent f205126
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