https://github.com/torvalds/linux
Revision 3fe3331bb285700ab2253dbb07f8e478fcea2f1b authored by Kim Phillips on 21 March 2019, 21:15:22 UTC, committed by Ingo Molnar on 18 April 2019, 12:31:54 UTC
Family 17h differs from prior families by: - Does not support an L2 cache miss event - It has re-enumerated PMC counters for: - L2 cache references - front & back end stalled cycles So we add a new amd_f17h_perfmon_event_map[] so that the generic perf event names will resolve to the correct h/w events on family 17h and above processors. Reference sections 2.1.13.3.3 (stalls) and 2.1.13.3.6 (L2): https://www.amd.com/system/files/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf Signed-off-by: Kim Phillips <kim.phillips@amd.com> Cc: <stable@vger.kernel.org> # v4.9+ Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Martin Liška <mliska@suse.cz> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Pu Wen <puwen@hygon.cn> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Fixes: e40ed1542dd7 ("perf/x86: Add perf support for AMD family-17h processors") [ Improved the formatting a bit. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Tip revision: 3fe3331bb285700ab2253dbb07f8e478fcea2f1b authored by Kim Phillips on 21 March 2019, 21:15:22 UTC
perf/x86/amd: Add event map for AMD Family 17h
perf/x86/amd: Add event map for AMD Family 17h
Tip revision: 3fe3331
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COPYING | -rw-r--r-- | 423 bytes |
CREDITS | -rw-r--r-- | 96.9 KB |
Kbuild | -rw-r--r-- | 1.5 KB |
Kconfig | -rw-r--r-- | 563 bytes |
MAINTAINERS | -rw-r--r-- | 491.4 KB |
Makefile | -rw-r--r-- | 58.3 KB |
README | -rw-r--r-- | 727 bytes |
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