Revision 4272f98a1ae81709fc5c804c33c044064e419cd9 authored by Javi Merino on 16 November 2011, 11:36:39 UTC, committed by Russell King on 15 February 2012, 21:10:49 UTC
dst_cache_ctrl affects bits 3, 1 and 0 of AWCACHE but it is a 3-bit
field in the Channel Control Register (see Table 3-21 of the DMA-330
Technical Reference Manual) and should be programmed as such.

Reference: <1320244259-10496-3-git-send-email-javi.merino@arm.com>

Signed-off-by: Javi Merino <javi.merino@arm.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1 parent 8e43a90
History
File Mode Size
Kconfig -rw-r--r-- 503 bytes
Makefile -rw-r--r-- 227 bytes
addr.c -rw-r--r-- 33.1 KB
caps.c -rw-r--r-- 84.3 KB
ceph_frag.c -rw-r--r-- 365 bytes
debugfs.c -rw-r--r-- 6.4 KB
dir.c -rw-r--r-- 36.9 KB
export.c -rw-r--r-- 6.2 KB
file.c -rw-r--r-- 23.6 KB
inode.c -rw-r--r-- 48.8 KB
ioctl.c -rw-r--r-- 7.8 KB
ioctl.h -rw-r--r-- 3.5 KB
locks.c -rw-r--r-- 7.7 KB
mds_client.c -rw-r--r-- 87.6 KB
mds_client.h -rw-r--r-- 11.8 KB
mdsmap.c -rw-r--r-- 4.3 KB
snap.c -rw-r--r-- 25.8 KB
strings.c -rw-r--r-- 3.7 KB
super.c -rw-r--r-- 22.9 KB
super.h -rw-r--r-- 26.2 KB
xattr.c -rw-r--r-- 21.3 KB

back to top