Revision 4272f98a1ae81709fc5c804c33c044064e419cd9 authored by Javi Merino on 16 November 2011, 11:36:39 UTC, committed by Russell King on 15 February 2012, 21:10:49 UTC
dst_cache_ctrl affects bits 3, 1 and 0 of AWCACHE but it is a 3-bit field in the Channel Control Register (see Table 3-21 of the DMA-330 Technical Reference Manual) and should be programmed as such. Reference: <1320244259-10496-3-git-send-email-javi.merino@arm.com> Signed-off-by: Javi Merino <javi.merino@arm.com> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| File | Mode | Size |
|---|---|---|
| .gitignore | -rw-r--r-- | 34 bytes |
| Makefile | -rw-r--r-- | 467 bytes |
| empty.c | -rw-r--r-- | 54 bytes |
| file2alias.c | -rw-r--r-- | 31.8 KB |
| mk_elfconfig.c | -rw-r--r-- | 1.2 KB |
| modpost.c | -rw-r--r-- | 56.2 KB |
| modpost.h | -rw-r--r-- | 4.7 KB |
| sumversion.c | -rw-r--r-- | 11.9 KB |
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