https://github.com/torvalds/linux
Revision 48fd5b5ee714714f4cf9f9e1cba3b49b1fd40ed6 authored by Tony Luck on 16 April 2020, 20:57:53 UTC, committed by Thomas Gleixner on 18 April 2020, 10:48:44 UTC
The Intel Software Developers' Manual erroneously listed bit 5 of the
IA32_CORE_CAPABILITIES register as an architectural feature. It is not.
Features enumerated by IA32_CORE_CAPABILITIES are model specific and
implementation details may vary in different cpu models. Thus it is only
safe to trust features after checking the CPU model.
Icelake client and server models are known to implement the split lock
detect feature even though they don't enumerate IA32_CORE_CAPABILITIES
[ tglx: Use switch() for readability and massage comments ]
Fixes: 6650cdd9a8cc ("x86/split_lock: Enable split lock detection by kernel")
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200416205754.21177-3-tony.luck@intel.com
1 parent 9fe0450
Tip revision: 48fd5b5ee714714f4cf9f9e1cba3b49b1fd40ed6 authored by Tony Luck on 16 April 2020, 20:57:53 UTC
x86/split_lock: Bits in IA32_CORE_CAPABILITIES are not architectural
x86/split_lock: Bits in IA32_CORE_CAPABILITIES are not architectural
Tip revision: 48fd5b5
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| Makefile | -rw-r--r-- | 59.9 KB |
| README | -rw-r--r-- | 727 bytes |
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