Revision 490d332ea42780577f679f5d13598b195bff360c authored by Marc Zyngier on 09 February 2020, 22:48:50 UTC, committed by Linus Torvalds on 09 February 2020, 23:47:37 UTC
In order to allow the GICv4 code to link properly on 32bit ARM,
make sure we don't use 64bit divisions when it isn't strictly
necessary.
Fixes: 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
1 parent d1ea35f
| File | Mode | Size |
|---|---|---|
| hid-alps.rst | -rw-r--r-- | 5.2 KB |
| hid-sensor.rst | -rw-r--r-- | 9.6 KB |
| hid-transport.rst | -rw-r--r-- | 15.6 KB |
| hiddev.rst | -rw-r--r-- | 9.1 KB |
| hidraw.rst | -rw-r--r-- | 5.3 KB |
| index.rst | -rw-r--r-- | 248 bytes |
| intel-ish-hid.rst | -rw-r--r-- | 23.6 KB |
| uhid.rst | -rw-r--r-- | 9.4 KB |
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