Revision 490d332ea42780577f679f5d13598b195bff360c authored by Marc Zyngier on 09 February 2020, 22:48:50 UTC, committed by Linus Torvalds on 09 February 2020, 23:47:37 UTC
In order to allow the GICv4 code to link properly on 32bit ARM,
make sure we don't use 64bit divisions when it isn't strictly
necessary.
Fixes: 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
1 parent d1ea35f
| File | Mode | Size |
|---|---|---|
| aliasing.rst | -rw-r--r-- | 9.2 KB |
| efirtc.rst | -rw-r--r-- | 4.4 KB |
| err_inject.rst | -rw-r--r-- | 25.5 KB |
| fsys.rst | -rw-r--r-- | 12.4 KB |
| ia64.rst | -rw-r--r-- | 1.4 KB |
| index.rst | -rw-r--r-- | 214 bytes |
| irq-redir.rst | -rw-r--r-- | 2.6 KB |
| mca.rst | -rw-r--r-- | 8.9 KB |
| serial.rst | -rw-r--r-- | 6.6 KB |
| xen.rst | -rw-r--r-- | 5.5 KB |
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