Revision 4aaf96ac8b45d8e2e019b6b53cce65a73c4ace2c authored by Maor Gottlieb on 06 June 2021, 08:23:41 UTC, committed by Saeed Mahameed on 10 June 2021, 00:20:04 UTC
SW steering uses RC QP to write/read to/from ICM, hence it's not supported when RoCE is not supported as well. Fixes: 70605ea545e8 ("net/mlx5: DR, Expose APIs for direct rule managing") Signed-off-by: Maor Gottlieb <maorg@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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File | Mode | Size |
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Kconfig | -rw-r--r-- | 1.1 KB |
Makefile | -rw-r--r-- | 197 bytes |
adfs.h | -rw-r--r-- | 6.5 KB |
dir.c | -rw-r--r-- | 9.5 KB |
dir_f.c | -rw-r--r-- | 7.2 KB |
dir_f.h | -rw-r--r-- | 1.1 KB |
dir_fplus.c | -rw-r--r-- | 7.1 KB |
dir_fplus.h | -rw-r--r-- | 976 bytes |
file.c | -rw-r--r-- | 846 bytes |
inode.c | -rw-r--r-- | 9.5 KB |
map.c | -rw-r--r-- | 10.1 KB |
super.c | -rw-r--r-- | 11.4 KB |
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