Revision 4aaf96ac8b45d8e2e019b6b53cce65a73c4ace2c authored by Maor Gottlieb on 06 June 2021, 08:23:41 UTC, committed by Saeed Mahameed on 10 June 2021, 00:20:04 UTC
SW steering uses RC QP to write/read to/from ICM, hence it's not
supported when RoCE is not supported as well.

Fixes: 70605ea545e8 ("net/mlx5: DR, Expose APIs for direct rule managing")
Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
1 parent c189716
History
File Mode Size
Kconfig -rw-r--r-- 741 bytes
Makefile -rw-r--r-- 227 bytes
balloc.c -rw-r--r-- 9.7 KB
cache.c -rw-r--r-- 7.4 KB
dir.c -rw-r--r-- 28.2 KB
exfat_fs.h -rw-r--r-- 17.3 KB
exfat_raw.h -rw-r--r-- 4.3 KB
fatent.c -rw-r--r-- 10.6 KB
file.c -rw-r--r-- 10.7 KB
inode.c -rw-r--r-- 17.1 KB
misc.c -rw-r--r-- 5.3 KB
namei.c -rw-r--r-- 35.7 KB
nls.c -rw-r--r-- 33.3 KB
super.c -rw-r--r-- 20.7 KB

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