Revision 4aaf96ac8b45d8e2e019b6b53cce65a73c4ace2c authored by Maor Gottlieb on 06 June 2021, 08:23:41 UTC, committed by Saeed Mahameed on 10 June 2021, 00:20:04 UTC
SW steering uses RC QP to write/read to/from ICM, hence it's not
supported when RoCE is not supported as well.

Fixes: 70605ea545e8 ("net/mlx5: DR, Expose APIs for direct rule managing")
Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
1 parent c189716
History
File Mode Size
Kconfig -rw-r--r-- 2.3 KB
Makefile -rw-r--r-- 422 bytes
cache.c -rw-r--r-- 10.6 KB
cookie.c -rw-r--r-- 25.2 KB
fsdef.c -rw-r--r-- 2.9 KB
histogram.c -rw-r--r-- 2.2 KB
internal.h -rw-r--r-- 13.7 KB
io.c -rw-r--r-- 3.2 KB
main.c -rw-r--r-- 4.6 KB
netfs.c -rw-r--r-- 1.9 KB
object-list.c -rw-r--r-- 11.3 KB
object.c -rw-r--r-- 32.9 KB
operation.c -rw-r--r-- 17.0 KB
page.c -rw-r--r-- 33.0 KB
proc.c -rw-r--r-- 1.7 KB
stats.c -rw-r--r-- 9.9 KB

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