Revision 4f47c99a9be7e9b90a7f3c2c4599ea6b7c2ec49d authored by Ville Syrjälä on 02 June 2015, 12:37:35 UTC, committed by Jani Nikula on 04 June 2015, 11:15:45 UTC
commit 65ca7514e21adbee25b8175fc909759c735d00ff
Author: Damien Lespiau <damien.lespiau@intel.com>
Date: Mon Feb 9 19:33:22 2015 +0000
drm/i915/skl: Implement WaBarrierPerformanceFixDisable
got misapplied and the code landed in chv_init_workarounds() instead of
the intended skl_init_workarounds(). Move it over to the right place.
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
1 parent 77b6455
gr2d.h
/*
* Copyright (C) 2013 NVIDIA Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef TEGRA_GR2D_H
#define TEGRA_GR2D_H
#define GR2D_UA_BASE_ADDR 0x1a
#define GR2D_VA_BASE_ADDR 0x1b
#define GR2D_PAT_BASE_ADDR 0x26
#define GR2D_DSTA_BASE_ADDR 0x2b
#define GR2D_DSTB_BASE_ADDR 0x2c
#define GR2D_DSTC_BASE_ADDR 0x2d
#define GR2D_SRCA_BASE_ADDR 0x31
#define GR2D_SRCB_BASE_ADDR 0x32
#define GR2D_SRC_BASE_ADDR_SB 0x48
#define GR2D_DSTA_BASE_ADDR_SB 0x49
#define GR2D_DSTB_BASE_ADDR_SB 0x4a
#define GR2D_UA_BASE_ADDR_SB 0x4b
#define GR2D_VA_BASE_ADDR_SB 0x4c
#define GR2D_NUM_REGS 0x4d
#endif
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