| 4fd09e2 | Kieran Bingham | 14 November 2017, 12:52:23 UTC | uvcvideo: Prevent new URBs being processed at stream stop With asynchronous handling of the URBs from the USB Complete handler, we get a continual stream of packets being received while we are attempting to shutdown the stream. Packets that have already been received and processed are on a work-queue, but during stream shutdown the URBs that those packets belong to are killed and free'd. To prevent this race from causing invalid memory accesses, prevent new URBs from being processed when uvc_stop_streaming() is called by introducing a new flag "UVC_QUEUE_STOPPING" into the queue, and checking this when processing the URB to be queued. With this, we can flush the work queue, and commence a normal pipe shutdown. Work tasks that are already queued are processed, but the URBs are prevented from being re-submitted to the USB stack. Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com> | 18 January 2018, 01:47:57 UTC |
| 78c8897 | Hyun Kwon | 06 January 2018, 01:50:58 UTC | drm: xilinx: sdi: Get an SDI instance using phandle Calling of_find_node_by_name() searches entire dt nodes, and can get the device node that is completely unrelated to the Xilinx DRM. In additiona, use of endpoint in xilinx_drm_sdi_of_get() may return -EPROBE_DEFER incorrectly if the subdriver other than SDI driver is connected to the Xilinx DRM node as the endpoint. Thus, switch to phandle to get the SDI instance. Reported-by: Rohit Consul <rohitco@xilinx.com> Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> | 18 January 2018, 01:47:57 UTC |
| 674ca16 | Jeffrey Mouroux | 06 December 2017, 00:51:27 UTC | staging: xilinx: mixer: Bug fix buffer x/y offset calculation The buffer src_x/src_y offset calculation only worked for 8-bit pixel formats. This fix addresses 8-bit and 10-bit formats. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:43 UTC |
| 002c8a4 | Rohit Consul | 30 November 2017, 23:36:02 UTC | staging: xilinx: hdmitx: Fix alignment bug in aes256 decrypt aes256 decrypt works on 16byte boundary. Alignment on cipher buffer was missing causing the decrypt API to mis-read the last hdcp1x key Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:43 UTC |
| c1766b5 | Rohit Consul | 30 November 2017, 23:31:24 UTC | staging: xilinx: hdmirx: Fix alignment bug in aes256 decrypt aes256 decrypt works on 16byte boundary. Alignment on cipher buffer was missing causing the decrypt API to mis-read the last hdcp1x key Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:42 UTC |
| d9a60d6 | Jeffrey Mouroux | 09 November 2017, 23:47:24 UTC | staging: xilinx: xvmixer: Add component framework support Some encoder drivers, like SDI, rely on the component framework for initialization. This updates the Xilinx Video Mixer driver to interface with these encoder drivers. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:42 UTC |
| 6d44827 | Satish Kumar Nagireddy | 16 November 2017, 13:53:14 UTC | v4l: xilinx: dma: Fix Luma and Chroma overlap issue dst_icg is the distance between last Luma addr and first chroma addr. Fixed the issue by programming dst_icg correctly Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com> | 05 January 2018, 23:06:42 UTC |
| 856381f | Devarsh Thakkar | 07 November 2017, 03:44:31 UTC | xilinx-dma: Fix v4l2 enumeration callback for multiplanar formats This fixes issues with v4l2 enumeration callback with multiplanar formats due to which supported multiplanar formats were not getting enumerated when using VIDEO_ENUM_FMT ioctl. The intention of existing implementation for multiplanar formats was to save in array and return the subset of all the v4l2 formats supported by attached dma device and the supported media bus format and also cache the supported media bus format so that for future calls if same media bus format is called then the v4l2 pixel formats can be directly returned from the entries saved in the array. This is acheived now with below changes : - Use V4L2 subdev helper functions to query supported media bus format code. - Cache the media bus format also for the condition when it is empty along with whenever new media bus format is detected. - Fix NULL pointer deference error by dynamically allocating memory for poss_v4l2_fmts. Signed-off-by: Devarsh Thakkar <devarsht@xilinx.com> | 05 January 2018, 23:06:42 UTC |
| 7c7dc1a | Jeffrey Mouroux | 22 November 2017, 01:40:25 UTC | staging: xilinx: mixer: Fix improper stride alignment Stride alignment must be 64 x pixels_per_clock setting. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:42 UTC |
| 3d6d711 | Jeffrey Mouroux | 14 November 2017, 23:53:07 UTC | drm: xilinx: Fix case wherein manager plane dts setting was ignored In the case wherein the DRM driver is used to control only a dma channel, it is possible that the dma channel may support multiple pixel memory formats (i.e. Video Framebuffer). In such cases, when initializing the DRM device, we wish to use the plane manager video format specified in the device tree as the default selection when there is more than one possible pixel format supported by the attached dma channel. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:42 UTC |
| cb05ffa | Rohit Consul | 14 November 2017, 18:40:14 UTC | staging: xilinx: hdmirx: Fix hdcp authentication problem on key load Fix an issue where hdcp1.4 would not authenticate when keys were loaded at run time with hdcp1x source connected. Added a check to determine if cable is connected, if yes, push a cable connect event and toggle the hpd line to force source to re-authenticate Also enabled detailed logging for hdcp1x protocol Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:42 UTC |
| 6f05425 | Rohit Consul | 09 November 2017, 21:46:33 UTC | staging: xilinx: hdmitx: Add lock to protect shared resources Add back mutex lock to protect shared resources between hdmi and hdcp blocks Added timeouts to ddc read/write transactions Remove the ddc peripheral reset added before new transactions Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:41 UTC |
| 7e2ba97 | Rohit Athavale | 08 November 2017, 18:46:07 UTC | v4l: xilinx-tpg: Add YUV 420 media bus format support to TPG driver This is patch updates the TPG IP driver to add support for the newly created YUV 420 bus format. Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:41 UTC |
| 60031d7 | Rohit Athavale | 01 November 2017, 00:32:33 UTC | v4l: xilinx: dma: Add multi-planar support The current v4l driver supports single plane formats. This patch will add support to handle multi-planar formats. Updated driver capabilities to multi-planar, where it can handle both single and multi-planar formats Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com> | 05 January 2018, 23:06:41 UTC |
| 2cf6234 | Rohit Athavale | 01 November 2017, 00:21:16 UTC | v4l: xilinx: dma: Update video format descriptor This patch updates video format descriptor to help information viz., number of planes per color format and chroma sub sampling factors. This commit adds the various 8-bit and 10-bit that are supported to the table queried by drivers. Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com> Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:41 UTC |
| 1fd3239 | Satish Kumar Nagireddy | 22 August 2017, 19:12:03 UTC | drm: xilinx: plane: Get scaling and padding factor to calculate DMA params Get multiplying factor to calculate bpp especially in case of 10 bit formats. Get multiplying factor to calculate padding width Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com> | 05 January 2018, 23:06:41 UTC |
| 0ef9788 | Jeffrey Mouroux | 12 September 2017, 18:25:39 UTC | drm: xilinx: Bug fix to enable multi-format support for primary plane When the DRM KMS driver is only used to control an external DMA device, it may be possible to control the external DMA to enable various possible memory formats. This fix enables this by calling a newly introduced Video Framebuffer Driver API to retrieve a list of possible video memory formats that can then be represented by this driver to DRM clients. Depends on commit f618d3b9e121d ("dma: xilinx: Add private API to permit retrieval of supported mem formats") Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:41 UTC |
| 75796bc | Rohit Athavale | 31 October 2017, 22:55:40 UTC | media: xilinx: Add new dt-bindings/vf_codes for 2017.3 supported formats This commit adds new entries to the exisiting vf_codes that are used to describe the media bus formats in the DT bindings. The newly added 8-bit and 10-bit color depth related formats will need these updates. Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:41 UTC |
| 3540462 | Jeffrey Mouroux | 14 September 2017, 01:22:56 UTC | dma: xilinx: Update Framebuffer Driver with support for new 8-bit/10-bit formats New DRM and V4L2 fourcc codes have been added to the driver table. Some of these codes are novel and not yet fully reviewed nor accepted by the respective communities. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:40 UTC |
| b7b669b | Jeffrey Mouroux | 09 November 2017, 21:52:25 UTC | Documentation: devicetree: bindings: dma: Update for new fourcc code support Support for more pixel memory formats has been added to the Xilinx Video Framebuffer driver. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:40 UTC |
| bc34564 | Jeffrey Mouroux | 11 September 2017, 22:13:51 UTC | staging: xilinx: mixer: Initial commit of Xilinx Video Mixer IP DRM driver Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:40 UTC |
| bc59350 | Jeffrey Mouroux | 09 November 2017, 21:51:10 UTC | Documentation: devicetree: bindings: drm: Xilinx Video Mixer driver bindings Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:40 UTC |
| 478b3c1 | Rohit Athavale | 28 August 2017, 21:44:42 UTC | v4l: xilinx-vpss-csc: Support for any-to-any color space converison With this commit the driver supports RGB, YUV 444, YUV 422 and YUV 420 media bus formats. This commit also updates the VPSS CSC color controls for any-to-any conversion. VPSS CSC requires coefficients to be brought into an RGB style of coefficients before color controls can be applied and thus shadow coefficients are used to track the color controls. This commit extracts the color depth information from the DT and uses it configuring the clip max and contrast. This commit also allows the user to specify 8-bit or 10-bit color depth via the DT. Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:40 UTC |
| e6fa273 | Rohit Athavale | 31 October 2017, 21:08:10 UTC | documentation: media: Update dt-bindings doc for 10-bit color depth Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:40 UTC |
| adf2ddb | Rohit Consul | 31 October 2017, 21:14:04 UTC | staging: xilinx: Add xilinx hdmi drivers to staging area Initial release of Xilinx hdmi drivers is being done via staging area. HDMI solution comprises of hdmi-rx, hdmi-tx, vphy, si5324 clk generator and dp159 retimer. All these drivers will be in experimental state until further notice, pending full validation and protocol compliance Long term these drivers will be cleaned up and made ready for upstream Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:40 UTC |
| 0986f23 | Rohit Consul | 31 October 2017, 21:10:33 UTC | phy: xilinx-vphy: Initial release of xilinx video phy soft IP driver Xilinx Video Phy implements the physical layer for enabling the plug-and-play connectivity with HDMI MAC transmit and receive subsystems. Driver directory is also used as common repository to stage - HDCP1.x sources - HDCP2.2 sources - 3rd party library sources (aes256, sha1, sha2, bigdigits) - common sources between hdmi-rx and hdmi-tx Driver is being released in staging area Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:39 UTC |
| 4bd52da | Rohit Consul | 31 October 2017, 21:03:21 UTC | drm: xilinx-hdmi-tx: Initial release of xilinx hdmi-tx soft IP driver HDMI Tx subsystem is a feature-rich soft IP incorporating all the necessary logic to properly interface with xilinx PHY layers and provide HDMI encoding functionality. The subsystem is a hierarchical IP that bundles a collection of HDMI TX-related IP sub-cores and outputs them as a single IP. The subsystem takes incoming video and audio streams and transfers them to an HDMI stream. The stream is then forwarded to the video PHY layer Supports HDCP1.4 and HDCP2.2 protocols Driver is being released in staging area Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:39 UTC |
| 2c6d8ee | Rohit Consul | 31 October 2017, 20:59:33 UTC | media: xilinx-hdmi-rx: Initial release of xilinx hdmi-rx soft IP driver The HDMI 1.4/2.0 Receiver Subsystem is a feature-rich soft IP incorporating all the necessary logic to properly interface with PHY layers and provide HDMI decoding functionality. The subsystem is a hierarchical IP that bundles a collection of HDMI RX-related IP sub-cores and outputs them as a single IP. The subsystem receives the captured TMDS data from the video PHY layer. It then extracts the video and audio streams from the HDMI stream and converts it to AXI video and audio streams Supports HDCP1.4 and HDCP2.2 protocols Driver is being released in staging area Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:39 UTC |
| 8f09ad3 | Rohit Consul | 31 October 2017, 20:56:28 UTC | clk: si5324: Initial release of silicon labs clock generator driver Added initial version of the driver specifically targeting the xilinx hdmi use- case. i.e. implemented only functionality required for xilinx hdmi soft IP at this time. This driver is added to staging area and is in experimental state. Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:39 UTC |
| b7e50d4 | Rohit Consul | 31 October 2017, 20:48:52 UTC | misc: ti-dp159: Initial release of retimer driver SNxDP159 device is a dual mode display port to TMDS retimer supporting DVI 1.0 and HDMI 1.4b and 2.0 output signals. When working as a retimer, the embedded clock data recovery cleans up the input high frequency and random jitter from video source. It also supports TMDS output amplitude adjust and output slew rate control. This driver is added to staging area and is in experimental state. Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:39 UTC |
| 4a65e24 | Rohit Consul | 31 October 2017, 20:43:39 UTC | documentation: bindings: Add DP159 driver device tree binding Added TI DP159 device tree description Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:39 UTC |
| d76a229 | Rohit Consul | 31 October 2017, 20:42:25 UTC | documentation: bindings: Add silabs 5324 driver device tree binding Added si5324 device tree description Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:38 UTC |
| d72e0ad | Rohit Consul | 31 October 2017, 20:41:24 UTC | documentation: bindings: Add xilinx video phy driver device tree binding Added video phy device tree description Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:38 UTC |
| dc48672 | Rohit Consul | 31 October 2017, 20:40:30 UTC | documentation: bindings: Add xilinx hdmi-tx driver device tree binding Added hdmi-tx device tree description Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:38 UTC |
| 9199ce6 | Rohit Consul | 31 October 2017, 20:38:41 UTC | documentation: bindings: Add xilinx hdmi-rx driver device tree binding Added hdmi-rx device tree description Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> | 05 January 2018, 23:06:38 UTC |
| a9867b4 | Rohit Athavale | 31 October 2017, 20:39:27 UTC | Documenation: media: Update dt-bindings doc for 2017.3 Gamma LUT IP This commit updates the device tree bindings to support the 2017.3 IP. With this commit the driver will support both 8-bit and 10-bit color depths. Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:38 UTC |
| de1b362 | Rohit Athavale | 12 October 2017, 16:47:59 UTC | v4l: xilinx-gamma: Fix compile error in debug mode Variable rb is not declared in DEBUG mode, but is referenced. This fixes the dev_err logging. Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:38 UTC |
| 22b4c81 | Rohit Athavale | 08 September 2017, 21:17:06 UTC | v4l: xilinx-gamma: Add kernel-doc for xgamma_dev struct This commit adds kernel doc for xgamma_dev struct Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:37 UTC |
| 410e112 | Rohit Athavale | 08 September 2017, 21:10:58 UTC | v4l: xilinx-gamma: Add 10-bit IP support for Video Gammma IP. This commit adds 10-bit color depth support to the Xilinx Gamma LUT IP driver. The driver is re-worked to accept color depth from the DT. Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:37 UTC |
| 6cb5096 | Rohit Athavale | 01 September 2017, 00:51:15 UTC | v4l: xilinx-demosaic: Updates to support 2017.3 Sensor Demosaic IP The IP has a redundant register for output video format. The Video Sensor Demosaic IP can only support output video with RGB format. The 2017.3 IP changes remove the register. Updating the driver to reflect the same. Also some typos in logging messages are fixed in this commit. Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:37 UTC |
| 7272e5c | Satish Kumar Nagireddy | 22 August 2017, 19:11:39 UTC | drm: Add scaling and padding factor functions scaling_factor function returns multiplying factor to calculate bytes per component based on color format. For eg. scaling factor of YUV420 8 bit format is 1 so multiplying factor is 1 (8/8) scaling factor of YUV420 10 bit format is 1.25 (10/8) padding_factor function returns multiplying factor to calculate actual width of video according to color format. For eg. padding factor of YUV420 8 bit format: 8 bits per 1 component no padding bits here, so multiplying factor is 1 padding factor of YUV422 10 bit format: 32 bits per 3 components each component is 10 bit and the factor is 32/30 Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com> | 05 January 2018, 23:06:37 UTC |
| 9271e0d | Jeffrey Mouroux | 20 July 2017, 00:33:40 UTC | drm: Update DRM Framework with new fourcc codes New fourcc codes have been added to support new YUV semi-planar and packed formats (including greyscale) needed by new Xilinx Video IP. This patch includes recognition of these new formats in the DRM framework library functions. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:37 UTC |
| 43e0946 | Jeffrey Mouroux | 31 March 2017, 23:16:51 UTC | uapi: drm: New fourcc codes needed by Xilinx Video IP The Xilinx Video Mixer andn Xilinx Video Framebuffer DMA IP support video memory formats that are not represented in the current DRM fourcc library. This patch adds those missing fourcc codes. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:37 UTC |
| fe2c91c | Jeffrey Mouroux | 20 July 2017, 01:22:37 UTC | media: v4l2-core: Update V4L2 framework with new fourcc codes New fourcc codes have been added to support additional video memory layout supported by Xilinx Video IP. These have been added to the V4L2 framework with this patch. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> | 05 January 2018, 23:06:37 UTC |
| 6713102 | Jeffrey Mouroux | 19 July 2017, 23:54:48 UTC | uapi: media: New fourcc codes needed by Xilinx Video IP The Xilinx Video Framebuffer DMA IP supports video memory formats that are not represented in the current V4L2 fourcc library. This patch adds those missing fourcc codes. This includes both new 8-bit and 10-bit pixel formats. Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com> Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:36 UTC |
| 202509c | Rohit Athavale | 19 September 2017, 23:30:06 UTC | v4l: xilinx-vpss-scaler: Add YUV 420 to VPSS Scaler Driver This commit adds the YUV 420 media bus format to the VPSS Scaler Driver. Signed-off-by: Rohit Athavale <rathaval@xilinx.com> | 05 January 2018, 23:06:36 UTC |
| fa6872a | Rohit Athavale | 26 July 2017, 01:14:35 UTC | media-bus: uapi: Add YCrCb 420 media bus format This commit adds a YUV 420 media bus format. Currently, one doesn't exist. This does not describe the way the pixels are sent over the bus, but is an approximation. Signed-off-by: Rohit Athavale <rohit.athavale@xilinx.com> | 05 January 2018, 23:06:36 UTC |
| b450e90 | Sakari Ailus | 02 November 2017, 03:22:30 UTC | imx274: Fix error handling Fix error handling in driver probe and unregister the correct control handler in driver remove. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Reviewed-by: Vishal Sagar <vishal.sagar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 November 2017, 07:10:35 UTC |
| bd8f87c | Vishal Sagar | 07 November 2017, 11:22:45 UTC | v4l: xilinx: sdirxss: Add V4L control for 3G Level B support Adds control to determine if current 3G level is 3G level B or not. Signed-off-by: Vishal Sagar <vsagar@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 07 November 2017, 11:59:19 UTC |
| 521ba5c | Holden Sandlar | 07 November 2017, 05:35:23 UTC | spi: zynqmp-gqspi direct read made word aligned. in gqspi driver direct read is updated with the word aligned read. For reading file which is not page aligned word aligned read is required in IO mode, DMA mode handles this by default. Signed-off-by: Holden Sandlar <holden.sandlar@ultra-fei.com> Signed-off-by: Tejas Prajapati Rameshchandra <tejaspra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 07 November 2017, 11:57:34 UTC |
| 13bb3d3 | Tejas Prajapati Rameshchandra | 07 November 2017, 05:35:22 UTC | Revert "spi: zynqmp-gqspi direct read made word aligned" This reverts commit b1e87c90a26e911b98fa018b7fb46b6cc4f845fe. Patch should contain the signed off of original submitter. Signed-off-by: Tejas Prajapati Rameshchandra <tejaspra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 07 November 2017, 07:16:32 UTC |
| 9040d07 | Tejas Upadhyay | 03 November 2017, 08:40:27 UTC | drm: xilinx: dp_sub: debugfs kernel crash fix In debugfs kern_buff was freed from current position, rather it should be freed from start. Signed-off-by: Tejas Upadhyay <tejasu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 06 November 2017, 07:48:34 UTC |
| a7f6cab | Tejas Upadhyay | 03 November 2017, 08:40:26 UTC | drm: xilinx: dp: debugfs kernel crash fix In debugfs kern_buff was freed from current position, rather it should be freed from start. Signed-off-by: Tejas Upadhyay <tejasu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 06 November 2017, 07:48:33 UTC |
| fe0e221 | Tejas Upadhyay | 03 November 2017, 08:40:25 UTC | dma: xilinx: dpdma: debugfs kernel crash fix In debugfs kern_buff was freed from current position, rather it should be freed from start. Signed-off-by: Tejas Upadhyay <tejasu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 06 November 2017, 07:48:33 UTC |
| 1f7f4c5 | Michael Gill | 31 October 2017, 18:26:52 UTC | staging: apf: Fix warnings in apf drivers This is a small patch to address a number of compiler warnings and style problems in the apf drivers. No features or functional changes are associated with this patch. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 06 November 2017, 07:40:53 UTC |
| 8b10bc1 | Michal Simek | 30 October 2017, 09:34:32 UTC | staging: apf: Remove unused variable There is no reason to use status variable. Return value directly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 06 November 2017, 07:40:52 UTC |
| b1e87c9 | Tejas Prajapati Rameshchandra | 02 November 2017, 10:55:43 UTC | spi: zynqmp-gqspi direct read made word aligned in gqspi driver direct read is updated with the word aligned read. For reading file which is not page aligned word aligned read is required in IO mode, DMA mode handles this by default. Signed-off-by: Tejas Prajapati Rameshchandra <tejaspra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 03 November 2017, 07:36:31 UTC |
| daca797 | Naga Sureshkumar Relli | 31 October 2017, 07:17:19 UTC | mtd: nand: fix for mtd nand_oob test mtd nand oob test gives reset to nand device at the start. This will be problem for the nand devices which are configured for nvddr modes. i.e controller and device both are not is same mode, resulting failure in mtd-oob test. this patch fixes this with out issuing reset. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 03 November 2017, 07:21:25 UTC |
| 97ea5ef | Saurabh Sengar | 03 November 2017, 05:21:32 UTC | drm: xilinx: crtc: disabling SDI for zynq(arm) Disabling SDI functionality for arm systems, as SDI is currently supported only for zynqmp. This fixes the compilation issue for arm Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 03 November 2017, 07:11:07 UTC |
| f9e4f5f | Saurabh Sengar | 30 October 2017, 18:16:42 UTC | drm: xilinx: crtc: Adding sdi vblank support in xlnx crtc Adding drm sdi vblank support in xilinx crtc Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Acked-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 31 October 2017, 15:36:47 UTC |
| 71d339b | Saurabh Sengar | 30 October 2017, 18:16:41 UTC | drm: xilinx: sdi: adding vblank support Adding vblank support APIs in SDI drm driver. In order to export these APIs added the header file so that it can be used by crtc. Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Acked-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 31 October 2017, 15:36:46 UTC |
| 85efdf1 | Saurabh Sengar | 30 October 2017, 18:16:40 UTC | drm: xilinx: vtc: exporting interrupt APIs Exporting interrupt APIs outside of vtc driver. Also adding new vblank specific enable/disable APIs Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Acked-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 31 October 2017, 15:36:46 UTC |
| 824809a | Michal Simek | 30 October 2017, 08:46:52 UTC | arm64: zynqmp: Remove undocumented dma properties Remove overfetch, ratectrl, include-sg and src-issue dma properties. Driver is not using them and they are also not documented in the binding doc. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Kedareswara rao Appana <appanad@xilinx.com> | 31 October 2017, 13:52:28 UTC |
| 8823e00 | Michael Hennerich | 27 October 2017, 09:38:04 UTC | char: xilinx_devcfg: Fix regression Fixed regression introduced by remove volatile in 'a920e66a043 ("char: xilinx_devcfg: Fix warnings in the driver")' removed volatile around dma_done and error_status without further actions. This fix prevents these variables from being optimized away without being read. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 31 October 2017, 13:52:27 UTC |
| 6629200 | Saurabh Sengar | 20 October 2017, 11:55:56 UTC | drm: xilinx: sdi: adding psf mode support Adding Progressive Segmented Frame support in sdi Tx driver. For psf modes, input should be double the output framerate For 30 psf output, input vrefresh should be 60 For 25 psf output, input vrefresh should be 50 For 24 psf output, input vrefresh should be 48 Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> | 30 October 2017, 08:16:27 UTC |
| a5aa440 | Naga Sureshkumar Relli | 18 October 2017, 10:59:26 UTC | edac: synopsys: fix incorrect macro defines device_config[31:30] in MSTR register of ddrc Indicates the configuration of the device used in the system as follows - 00 - x4 device - 01 - x8 device - 10 - x16 device - 11 - x32 device for x16 and x32, instead of 2 and 3 we added 0x10 and 0x11 which is wrong. This patch corrects these macro defines. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 27 October 2017, 12:39:09 UTC |
| 55a18f3 | Michael Gill | 18 October 2017, 19:51:49 UTC | staging: apf: Fix sg-dma memory leak There was a slow memory leak that occurred when repeatedly running the init/shutdown sequence for the sg-dma. This resolves that leak. Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 27 October 2017, 12:38:17 UTC |
| 49629fb | Saurabh Sengar | 16 October 2017, 13:02:33 UTC | drm: xilinx: sdi: omnitek box modes Tested with new sdi compliance Omnitek box. Based on this box modifying SDI DRM_MODE table. Adding the support for below new modes: - 1920x1080i@48 - 2048x1080i@48 - 2048x1080i@50 - 2048x1080i@60 - 1920x1080@48 - 3840x2160@48 Correcting 3 other resolutions value as well observed while testing. - 1920x1080i@50 - 4096x2160@48Hz - 1920x1080i@96Hz Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:57:49 UTC |
| 1e6ae3c | Saurabh Sengar | 13 October 2017, 10:12:57 UTC | drm: xilinx: vtc: removing hard coded values for signal polarity removing hard coded values for following signal polarity parameters, and taking from vm.flags instead. This will help clients driver to program signal polarity as per drivers need. - hsync - vsync - hblank - vblank - field_id Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:57:48 UTC |
| ee949e2 | Saurabh Sengar | 13 October 2017, 10:12:56 UTC | drm: xilinx: sdi: Passing signal polarity values to vtc Passing video signal polarity values to vtc, in order to configure signal polarity exactly as per resolution. Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:57:48 UTC |
| 99fc630 | Saurabh Sengar | 13 October 2017, 10:12:55 UTC | drm: xilinx: crtc: Passing signal polarity values to vtc Passing video signal polarity values to vtc, in order to configure signal polarity exactly as per resolution. Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:57:48 UTC |
| 38df224 | Saurabh Sengar | 13 October 2017, 10:12:54 UTC | drm: xilinx: vtc: adding interlaced support Adding interlaced video support in vtc driver. Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:57:47 UTC |
| 8d27fbf | Saurabh Sengar | 13 October 2017, 10:12:53 UTC | drm: xilinx: sdi: Adding 3G-B support in drm SDI driver Adding sdi mode 3G-B support in driver. 3G-B works in PSF modes hence setting the st352 payload calculation accordingly. Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:57:47 UTC |
| 322bd63 | Kedareswara rao Appana | 17 October 2017, 10:32:15 UTC | dma: xilinx: xilinx_dma: Fix compilation warning This patch fixes the below sparse warning in the driver drivers/dma/xilinx/xilinx_dma.c: In function ‘xilinx_vdma_dma_prep_interleaved’: drivers/dma/xilinx/xilinx_dma.c:1589:43: warning: variable ‘prev’ set but not used [-Wunused-but-set-variable] struct xilinx_vdma_tx_segment *segment, *prev = NULL; Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:57:46 UTC |
| a92614b | Kedareswara rao Appana | 16 October 2017, 08:52:41 UTC | dma: xilinx: axidmatest: Fix race conditions in the test client This patch does the below --> Test client is limiting the test buffer size to 700 remove the check for the same also this patch increases the default value of test buf size from 64 to 16k. --> Terminate the existing transactions before freeing the dma channel. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:54:53 UTC |
| 61a18fd | Kedareswara rao Appana | 16 October 2017, 08:52:40 UTC | dma: xilinx: Differentiate probe based on the IP type Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:54:53 UTC |
| b3fe111 | Kedareswara rao Appana | 16 October 2017, 08:52:39 UTC | dma: xilinx: Fix race conditions in the driver for cdma This patch fixes the below issues --> when hardware is idle we need to toggle the SG bit inorder to update new value to the current descriptor register other wise undefined results will occur. --> Halt bit is not valid for cdma case add checks for the same. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:54:52 UTC |
| 9e8f5fc | Kedareswara rao Appana | 16 October 2017, 08:52:38 UTC | dma: xilinx: Add support for memory sg transactions for cdma This patch adds support for memory sg transactions (prep_sg) support for CDMA. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 10:54:52 UTC |
| d9a3b95 | Vishal Sagar | 16 October 2017, 06:43:01 UTC | v4l: xilinx: sdirxss: Add V4L control for Active streams Add support to get the number of Active streams using a v4l control. Signed-off-by: Vishal Sagar <vsagar@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 09:01:38 UTC |
| 2eb0553 | Mousumi Jana | 12 October 2017, 11:33:11 UTC | can: xilinx: proper acknowledgment of ISR Flags. This patch adds the correct acknowledgment of the ISR Flags. Previously all the bitflags are used to acknowledge all kind of interrupts.But now required flags are acknowledged. Signed-off-by: Mousumi Jana <mousumij@xilinx.com> Reviewed-by: Kedareswara Rao appana<appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 09:01:38 UTC |
| 24b4ab6 | Mousumi Jana | 12 October 2017, 11:32:56 UTC | can: xilinx: tx->head and tx->tail are initialized properly. This patch adds the support for initialization of the counters tx->head and tx->tail properly. Signed-off-by: Mousumi Jana <mousumij@xilinx.com> Reviewed-by: Kedareswara Rao appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 17 October 2017, 09:01:37 UTC |
| c335229 | Hyun Kwon | 11 October 2017, 00:26:39 UTC | drm: xilinx: dp: Skip the aux communication when there's no sink The DRM master may request the aux transaction, for example, power off request, even when the sink is not connected. This would result in the timeout. The connection status is stored in the HPD handler and checked before the aux transaction. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 11 October 2017, 09:25:16 UTC |
| bb0e35c | Tejas Prajapati Rameshchandra | 09 October 2017, 09:43:13 UTC | mtd: spi-nor: fix incorrect len return in nor_write, we need to say back to upper layers about how much data we transferred. there is a bug in this logic while updating the number of bytes written. this patch fixes this issue. the existing logic is not checking for last page and from there onwards we are running into issues while updating the written bytes. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 11 October 2017, 09:22:07 UTC |
| 79d7896 | Vishal Sagar | 09 October 2017, 05:48:47 UTC | v4l: xilinx: sdirxss: Add v4l control for transport stream type Add v4l control to get the transport stream type as interlaced or progressive. In case ST352 payload is not available, fallback to detecting the transport type from the rx_t_scan bit. Signed-off-by: Vishal Sagar <vsagar@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 09 October 2017, 06:26:25 UTC |
| 3c2b606 | Vishal Sagar | 09 October 2017, 05:48:46 UTC | v4l: xilinx: sdirxss: Add support for subdev get frame interval Add support to get the subdev frame interval from ST352 payload. The numerator is either 1000 or 1001 for integral or fractional fps. The denominator is actual fps * 1000. Signed-off-by: Vishal Sagar <vsagar@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 09 October 2017, 06:26:24 UTC |
| 4c3b2e3 | Vishal Sagar | 09 October 2017, 05:48:45 UTC | v4l: xilinx: sdirxss: Add ST352 decode macros Added macros for decoding different fields in ST352 payload. Signed-off-by: Vishal Sagar <vsagar@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 09 October 2017, 06:26:24 UTC |
| 031a2e1 | Vishal Sagar | 09 October 2017, 05:48:44 UTC | v4l: xilinx: sdirxss: Decode ST352 in irq context Decode ST352 payload packet in irq context to get width, height and field type instead of doing it in get_format(). Signed-off-by: Vishal Sagar <vsagar@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 09 October 2017, 06:26:24 UTC |
| e82bfab | Leon Luo | 06 October 2017, 16:23:48 UTC | imx274: V4l2 driver for Sony imx274 CMOS sensor The imx274 is a Sony CMOS image sensor that has 1/2.5 image size. It supports up to 3840x2160 (4K) 60fps, 1080p 120fps. The interface is 4-lane MIPI CSI-2 running at 1.44Gbps each. This driver has been tested on Xilinx ZCU102 platform with a Leopard LI-IMX274MIPI-FMC camera board. Support for the following features: -Resolutions: 3840x2160, 1920x1080, 1280x720 -Frame rate: 3840x2160 : 5 – 60fps 1920x1080 : 5 – 120fps 1280x720 : 5 – 120fps -Exposure time: 16 – (frame interval) micro-seconds -Gain: 1x - 180x -VFLIP: enable/disabledrivers/media/i2c/imx274.c -Test pattern: 12 test patterns Signed-off-by: Leon Luo <leonl@leopardimaging.com> Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> (cherry picked from commit 9216969e80c0b87b164ffd827b17471e769aad99) Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 09 October 2017, 05:46:37 UTC |
| a551f3e | Leon Luo | 06 October 2017, 16:23:47 UTC | imx274: device tree binding file The binding file for imx274 CMOS sensor V4l2 driver Signed-off-by: Leon Luo <leonl@leopardimaging.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> (cherry picked from commit 49b4f20dbe4bd17d9f1b22bf0b481fe4c2d2ca83) Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 09 October 2017, 05:46:36 UTC |
| dc97562 | Soren Brinkmann | 06 October 2017, 16:23:46 UTC | Revert "dt: bindings: media: Add dt binding for imx274" This reverts commit a5b81341e98f3b9852881671c5d784b8fa973158. This early version of the patch is superseded by the version accepted upstream. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 09 October 2017, 05:46:35 UTC |
| 4fba418 | Soren Brinkmann | 06 October 2017, 16:23:45 UTC | Revert "media: imx274 V4l2 driver for Sony imx274 CMOS sensor" This reverts commit aff4debf2f9fb9d9d140730cdbd5569691c3dc87. This early version of the patch is superseded by the version accepted upstream. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 09 October 2017, 05:46:35 UTC |
| 5f18c31 | Saurabh Sengar | 29 September 2017, 05:26:33 UTC | drm: xilinx: sdi: correcting st352 value for 3GB Correcting byte1 of st352 payload value. As per ST352 doc 89h is for 3GA and 8Ah for 3GB Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 05 October 2017, 12:06:53 UTC |
| b0835db | Anurag Kumar Vulisha | 27 September 2017, 14:05:07 UTC | usb: xhci-plat: Add remote wakeup support This patch adds support for enabling remote wakeup capability to the host controller Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 04 October 2017, 11:59:57 UTC |
| 4e93ddc | Anurag Kumar Vulisha | 27 September 2017, 14:05:06 UTC | dwc3: Add code for supporting entering into D3 state during suspend This patch adds support for making the core enter D3 state during suspend. D3 state is only entered for when wakeup capability is enabled. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 04 October 2017, 11:59:57 UTC |
| d62d73f | Shubhrajyoti Datta | 03 October 2017, 11:08:18 UTC | clk: zynqmp: Remove a unused variable Fixes the following warning drivers/clk/zynqmp/clkc.c:155:20: warning: 'usb0_mio_mux_parents' defined but not used [-Wunused-variable] static const char *usb0_mio_mux_parents[] __initconst = {usb0_bus_ref, ^ drivers/clk/zynqmp/clkc.c:157:20: warning: 'usb1_mio_mux_parents' defined but not used [-Wunused-variable] static const char *usb1_mio_mux_parents[] __initconst = {usb1_bus_ref, Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 04 October 2017, 11:59:57 UTC |
| 6bf1e1b | Shubhrajyoti Datta | 20 September 2017, 06:39:28 UTC | misc: atg: Fix the offset for the extended command ram Fix the offset for the extended command ram Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 26 September 2017, 13:00:33 UTC |
| d410fa5 | Saurabh Sengar | 14 September 2017, 10:42:02 UTC | drm: xilinx: Kconfig: Correcting the SDi flag description Correcting the SDI flag description Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 26 September 2017, 13:00:32 UTC |
| ea9d34b | Shubhrajyoti Datta | 07 September 2017, 07:02:13 UTC | tty: xilinx_uartps: move to arch_initcall for earlier console move to arch_initcall to get the console up really early, it is quite helpful for spotting early boot problems. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 26 September 2017, 13:00:32 UTC |
| f1b1e07 | Manish Narani | 26 September 2017, 12:43:24 UTC | zynqmp: devicetree: Add no-1-8-v property to sdhci1 node This patch adds no-1-8-v property to sdhci1 node such that SD operates at 50MHz by default. To operate at UHS mode, this property can be removed from the sdhci1 node. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 26 September 2017, 13:00:04 UTC |
| f193a37 | Rohit Athavale | 28 July 2017, 20:50:23 UTC | misc: xilinx-sdfec: make irq support an optional DT parameter This commit adds support to make Interrupt line information an optional parameter to support designs that do not use interrupts. Signed-off-by: Rohit Athavale <rathaval@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> | 20 September 2017, 13:32:20 UTC |
