https://github.com/torvalds/linux
Revision 51c404b2c514930e98e81e0b9294f19892a4f871 authored by Santosh Shilimkar on 04 February 2011, 09:58:57 UTC, committed by Paul Walmsley on 25 February 2011, 19:45:05 UTC
CPU0 and CPU1 clockdomain is at the offset of 0x18 from the LPRM base.
The header file has set it wrongly to 0x0. Offset 0x0 is for CPUx power
domain control register

Fix the same.

The autogen scripts is fixed thanks to Benoit Cousson

With the old value, the clockdomain code would access the
*_PWRSTCTRL.POWERSTATE field when it thought it was accessing the
*_CLKSTCTRL.CLKTRCTRL field.  In the worst case, this could cause
system power management to behave incorrectly.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: added second paragraph to commit message]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
1 parent ea68c00
History
Tip revision: 51c404b2c514930e98e81e0b9294f19892a4f871 authored by Santosh Shilimkar on 04 February 2011, 09:58:57 UTC
omap4: prcm: Fix the CPUx clockdomain offsets
Tip revision: 51c404b
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