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05 April 2024, 19:05:47 UTC
Revision 544c572e03174438b6656ed24a4516b9a9d5f14a authored by Christoffer Dall on 17 October 2015, 15:55:12 UTC, committed by Christoffer Dall on 20 October 2015, 16:06:34 UTC 
arm/arm64: KVM: Clear map->active on pend/active clear
 
When a guest reboots or offlines/onlines CPUs, it is not uncommon for it
to clear the pending and active states of an interrupt through the
emulated VGIC distributor.  However, since the architected timers are
defined by the architecture to be level triggered and the guest
rightfully expects them to be that, but we emulate them as
edge-triggered, we have to mimic level-triggered behavior for an
edge-triggered virtual implementation.

We currently do not signal the VGIC when the map->active field is true,
because it indicates that the guest has already been signalled of the
interrupt as required.  Normally this field is set to false when the
guest deactivates the virtual interrupt through the sync path.

We also need to catch the case where the guest deactivates the interrupt
through the emulated distributor, again allowing guests to boot even if
the original virtual timer signal hit before the guest's GIC
initialization sequence is run.

Reviewed-by: Eric Auger <eric.auger@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
1 parent cff9211
History
Tip revision: 544c572e03174438b6656ed24a4516b9a9d5f14a authored by Christoffer Dall on 17 October 2015, 15:55:12 UTC
arm/arm64: KVM: Clear map->active on pend/active clear
Tip revision: 544c572
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