https://github.com/torvalds/linux
Revision 5846a73f26a1efa45e2c2edd36aa2ed0a6ad380a authored by Navare, Manasi D on 17 July 2017, 22:05:22 UTC, committed by Daniel Vetter on 27 July 2017, 20:07:22 UTC
The condition for setting the Loadgen Select bit of
PORT_TX_DW4 register during DDI Vswing Sequence should be
Bit rate <=6 GHz whereas the existing code checks only
Bit Rate < 6GHz. This patch fixes this condition.
While at it also remove the redundant paranthesis.
Fixes: cf54ca8bc567 ("drm/i915/cnl: Implement voltage swing sequence.")
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1500329122-32662-1-git-send-email-manasi.d.navare@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit a8e45a1c42d11597e975f3e5f2fe182f90cdaa7f)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Tip revision: 5846a73f26a1efa45e2c2edd36aa2ed0a6ad380a authored by Navare, Manasi D on 17 July 2017, 22:05:22 UTC
drm/i915/cnl: Fix loadgen select programming on ddi vswing sequence
drm/i915/cnl: Fix loadgen select programming on ddi vswing sequence
Tip revision: 5846a73
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| drivers | ||
| firmware | ||
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| ipc | ||
| kernel | ||
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| .cocciconfig | -rw-r--r-- | 59 bytes |
| .get_maintainer.ignore | -rw-r--r-- | 31 bytes |
| .gitattributes | -rw-r--r-- | 30 bytes |
| .gitignore | -rw-r--r-- | 1.3 KB |
| .mailmap | -rw-r--r-- | 8.1 KB |
| COPYING | -rw-r--r-- | 18.3 KB |
| CREDITS | -rw-r--r-- | 96.2 KB |
| Kbuild | -rw-r--r-- | 2.2 KB |
| Kconfig | -rw-r--r-- | 252 bytes |
| MAINTAINERS | -rw-r--r-- | 410.5 KB |
| Makefile | -rw-r--r-- | 58.8 KB |
| README | -rw-r--r-- | 722 bytes |
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