Revision 5846a73f26a1efa45e2c2edd36aa2ed0a6ad380a authored by Navare, Manasi D on 17 July 2017, 22:05:22 UTC, committed by Daniel Vetter on 27 July 2017, 20:07:22 UTC
The condition for setting the Loadgen Select bit of
PORT_TX_DW4 register during DDI Vswing Sequence should be
Bit rate <=6 GHz whereas the existing code checks only
Bit Rate < 6GHz. This patch fixes this condition.
While at it also remove the redundant paranthesis.
Fixes: cf54ca8bc567 ("drm/i915/cnl: Implement voltage swing sequence.")
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1500329122-32662-1-git-send-email-manasi.d.navare@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit a8e45a1c42d11597e975f3e5f2fe182f90cdaa7f)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
1 parent 283d686
| File | Mode | Size |
|---|---|---|
| 40x_mmu.c | -rw-r--r-- | 4.4 KB |
| 44x_mmu.c | -rw-r--r-- | 6.6 KB |
| 8xx_mmu.c | -rw-r--r-- | 4.7 KB |
| Makefile | -rw-r--r-- | 1.9 KB |
| copro_fault.c | -rw-r--r-- | 4.0 KB |
| dma-noncoherent.c | -rw-r--r-- | 10.5 KB |
| dump_hashpagetable.c | -rw-r--r-- | 13.0 KB |
| dump_linuxpagetables.c | -rw-r--r-- | 12.2 KB |
| fault.c | -rw-r--r-- | 16.1 KB |
| fsl_booke_mmu.c | -rw-r--r-- | 8.7 KB |
| hash64_4k.c | -rw-r--r-- | 3.7 KB |
| hash64_64k.c | -rw-r--r-- | 9.1 KB |
| hash_low_32.S | -rw-r--r-- | 19.1 KB |
| hash_native_64.c | -rw-r--r-- | 20.8 KB |
| hash_utils_64.c | -rw-r--r-- | 49.1 KB |
| highmem.c | -rw-r--r-- | 2.2 KB |
| hugepage-hash64.c | -rw-r--r-- | 5.1 KB |
| hugetlbpage-book3e.c | -rw-r--r-- | 4.2 KB |
| hugetlbpage-hash64.c | -rw-r--r-- | 3.4 KB |
| hugetlbpage-radix.c | -rw-r--r-- | 2.3 KB |
| hugetlbpage.c | -rw-r--r-- | 25.9 KB |
| icswx.c | -rw-r--r-- | 7.9 KB |
| icswx.h | -rw-r--r-- | 2.0 KB |
| icswx_pid.c | -rw-r--r-- | 1.8 KB |
| init-common.c | -rw-r--r-- | 3.2 KB |
| init_32.c | -rw-r--r-- | 4.7 KB |
| init_64.c | -rw-r--r-- | 12.3 KB |
| mem.c | -rw-r--r-- | 15.3 KB |
| mmap.c | -rw-r--r-- | 6.1 KB |
| mmu_context_book3s64.c | -rw-r--r-- | 6.1 KB |
| mmu_context_hash32.c | -rw-r--r-- | 3.4 KB |
| mmu_context_iommu.c | -rw-r--r-- | 8.8 KB |
| mmu_context_nohash.c | -rw-r--r-- | 12.9 KB |
| mmu_decl.h | -rw-r--r-- | 4.6 KB |
| numa.c | -rw-r--r-- | 38.6 KB |
| pgtable-book3e.c | -rw-r--r-- | 3.2 KB |
| pgtable-book3s64.c | -rw-r--r-- | 4.1 KB |
| pgtable-hash64.c | -rw-r--r-- | 14.3 KB |
| pgtable-radix.c | -rw-r--r-- | 21.2 KB |
| pgtable.c | -rw-r--r-- | 7.2 KB |
| pgtable_32.c | -rw-r--r-- | 9.1 KB |
| pgtable_64.c | -rw-r--r-- | 12.6 KB |
| ppc_mmu_32.c | -rw-r--r-- | 8.4 KB |
| slb.c | -rw-r--r-- | 10.6 KB |
| slb_low.S | -rw-r--r-- | 8.7 KB |
| slice.c | -rw-r--r-- | 21.6 KB |
| subpage-prot.c | -rw-r--r-- | 6.4 KB |
| tlb-radix.c | -rw-r--r-- | 11.7 KB |
| tlb_hash32.c | -rw-r--r-- | 4.2 KB |
| tlb_hash64.c | -rw-r--r-- | 7.5 KB |
| tlb_low_64e.S | -rw-r--r-- | 36.8 KB |
| tlb_nohash.c | -rw-r--r-- | 19.8 KB |
| tlb_nohash_low.S | -rw-r--r-- | 10.1 KB |
| vphn.c | -rw-r--r-- | 2.0 KB |
| vphn.h | -rw-r--r-- | 489 bytes |
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