Revision 5846a73f26a1efa45e2c2edd36aa2ed0a6ad380a authored by Navare, Manasi D on 17 July 2017, 22:05:22 UTC, committed by Daniel Vetter on 27 July 2017, 20:07:22 UTC
The condition for setting the Loadgen Select bit of
PORT_TX_DW4 register during DDI Vswing Sequence should be
Bit rate <=6 GHz whereas the existing code checks only
Bit Rate < 6GHz. This patch fixes this condition.
While at it also remove the redundant paranthesis.
Fixes: cf54ca8bc567 ("drm/i915/cnl: Implement voltage swing sequence.")
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1500329122-32662-1-git-send-email-manasi.d.navare@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit a8e45a1c42d11597e975f3e5f2fe182f90cdaa7f)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
1 parent 283d686
| File | Mode | Size |
|---|---|---|
| amcc | ||
| bcm | ||
| caam | ||
| cavium | ||
| ccp | ||
| chelsio | ||
| inside-secure | ||
| marvell | ||
| mediatek | ||
| nx | ||
| qat | ||
| qce | ||
| rockchip | ||
| stm32 | ||
| sunxi-ss | ||
| ux500 | ||
| virtio | ||
| vmx | ||
| Kconfig | -rw-r--r-- | 20.3 KB |
| Makefile | -rw-r--r-- | 2.0 KB |
| atmel-aes-regs.h | -rw-r--r-- | 3.0 KB |
| atmel-aes.c | -rw-r--r-- | 68.4 KB |
| atmel-authenc.h | -rw-r--r-- | 2.2 KB |
| atmel-sha-regs.h | -rw-r--r-- | 2.3 KB |
| atmel-sha.c | -rw-r--r-- | 71.7 KB |
| atmel-tdes-regs.h | -rw-r--r-- | 2.6 KB |
| atmel-tdes.c | -rw-r--r-- | 37.7 KB |
| bfin_crc.c | -rw-r--r-- | 18.4 KB |
| bfin_crc.h | -rw-r--r-- | 3.8 KB |
| exynos-rng.c | -rw-r--r-- | 9.1 KB |
| geode-aes.c | -rw-r--r-- | 13.5 KB |
| geode-aes.h | -rw-r--r-- | 1.5 KB |
| hifn_795x.c | -rw-r--r-- | 74.9 KB |
| img-hash.c | -rw-r--r-- | 27.4 KB |
| ixp4xx_crypto.c | -rw-r--r-- | 36.4 KB |
| mv_cesa.c | -rw-r--r-- | 29.4 KB |
| mv_cesa.h | -rw-r--r-- | 3.9 KB |
| mxc-scc.c | -rw-r--r-- | 19.0 KB |
| mxs-dcp.c | -rw-r--r-- | 26.5 KB |
| n2_asm.S | -rw-r--r-- | 1.7 KB |
| n2_core.c | -rw-r--r-- | 51.6 KB |
| n2_core.h | -rw-r--r-- | 6.1 KB |
| omap-aes-gcm.c | -rw-r--r-- | 9.8 KB |
| omap-aes.c | -rw-r--r-- | 29.2 KB |
| omap-aes.h | -rw-r--r-- | 5.7 KB |
| omap-crypto.c | -rw-r--r-- | 4.0 KB |
| omap-crypto.h | -rw-r--r-- | 1.0 KB |
| omap-des.c | -rw-r--r-- | 27.1 KB |
| omap-sham.c | -rw-r--r-- | 52.2 KB |
| padlock-aes.c | -rw-r--r-- | 14.6 KB |
| padlock-sha.c | -rw-r--r-- | 15.4 KB |
| picoxcell_crypto.c | -rw-r--r-- | 50.6 KB |
| picoxcell_crypto_regs.h | -rw-r--r-- | 5.1 KB |
| s5p-sss.c | -rw-r--r-- | 23.6 KB |
| sahara.c | -rw-r--r-- | 40.4 KB |
| talitos.c | -rw-r--r-- | 95.9 KB |
| talitos.h | -rw-r--r-- | 15.3 KB |
Computing file changes ...
