Revision 5846a73f26a1efa45e2c2edd36aa2ed0a6ad380a authored by Navare, Manasi D on 17 July 2017, 22:05:22 UTC, committed by Daniel Vetter on 27 July 2017, 20:07:22 UTC
The condition for setting the Loadgen Select bit of PORT_TX_DW4 register during DDI Vswing Sequence should be Bit rate <=6 GHz whereas the existing code checks only Bit Rate < 6GHz. This patch fixes this condition. While at it also remove the redundant paranthesis. Fixes: cf54ca8bc567 ("drm/i915/cnl: Implement voltage swing sequence.") Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1500329122-32662-1-git-send-email-manasi.d.navare@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit a8e45a1c42d11597e975f3e5f2fe182f90cdaa7f) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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File | Mode | Size |
---|---|---|
Kconfig | -rw-r--r-- | 368 bytes |
Makefile | -rw-r--r-- | 156 bytes |
cpt_common.h | -rw-r--r-- | 6.0 KB |
cpt_hw_types.h | -rw-r--r-- | 20.3 KB |
cptpf.h | -rw-r--r-- | 1.4 KB |
cptpf_main.c | -rw-r--r-- | 16.6 KB |
cptpf_mbox.c | -rw-r--r-- | 4.5 KB |
cptvf.h | -rw-r--r-- | 3.8 KB |
cptvf_algs.c | -rw-r--r-- | 13.0 KB |
cptvf_algs.h | -rw-r--r-- | 2.1 KB |
cptvf_main.c | -rw-r--r-- | 21.3 KB |
cptvf_mbox.c | -rw-r--r-- | 4.8 KB |
cptvf_reqmanager.c | -rw-r--r-- | 15.4 KB |
request_manager.h | -rw-r--r-- | 2.6 KB |
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