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swh:1:snp:49cd9498d6cccc5e78252c27dcb645bcf7bf0c91
Revision 5878fc936aebf592cca418ca50773cd578f7daf4 authored by Kevin Cernekee on 23 November 2010, 18:26:44 UTC, committed by Ralf Baechle on 16 December 2010, 18:10:58 UTC 
MIPS: Fix CP0 COUNTER clockevent race
 
Consider the following test case:

write_c0_compare(read_c0_count());

Even if the counter doesn't increment during execution, this might not
generate an interrupt until the counter wraps around.  The CPU may
perform the comparison each time CP0 COUNT increments, not when CP0
COMPARE is written.

If mips_next_event() is called with a very small delta, and CP0 COUNT
increments during the calculation of "cnt += delta", it is possible
that CP0 COMPARE will be written with the current value of CP0 COUNT.
If this is detected, the function should return -ETIME, to indicate
that the interrupt might not have actually gotten scheduled.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1836/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
1 parent 190fca3
History
Tip revision: 644e9524388a5dbc6d4f58c492ee9ef7bd4ddf4d authored by Linus Torvalds on 26 November 2022, 02:02:49 UTC
Merge tag 'for-v6.1-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply
Tip revision: 644e952
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