Revision 5a2913aadabc4711e98fb48d56e5c5f5728bbc33 authored by Le Ma on 07 November 2023, 10:10:29 UTC, committed by Alex Deucher on 09 November 2023, 22:00:55 UTC
The DS clock may exceed the limit as sclk dfll divider is 16
to target freq.

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent 4eaa007
History
File Mode Size
Makefile -rw-r--r-- 361 bytes
compat.c -rw-r--r-- 2.2 KB
ipc_sysctl.c -rw-r--r-- 7.3 KB
mq_sysctl.c -rw-r--r-- 3.0 KB
mqueue.c -rw-r--r-- 43.6 KB
msg.c -rw-r--r-- 32.3 KB
msgutil.c -rw-r--r-- 3.6 KB
namespace.c -rw-r--r-- 5.8 KB
sem.c -rw-r--r-- 63.1 KB
shm.c -rw-r--r-- 45.1 KB
syscall.c -rw-r--r-- 5.1 KB
util.c -rw-r--r-- 24.2 KB
util.h -rw-r--r-- 8.8 KB

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