Revision 5d1d150d7d775db1dccb4dc4676075d456dea392 authored by Doug Anderson on 28 August 2014, 23:43:48 UTC, committed by Mark Brown on 29 August 2014, 11:07:38 UTC
If our client is requesting a clock that is above the maximum clock
then the following division will result in 0:
  rs->max_freq / rs->speed

We'll then program 0 into the SPI_BAUDR register.  The Rockchip TRM
says: "If the value is 0, the serial output clock (sclk_out) is
disabled."

It's much better to end up with the fastest possible clock rather than
a clock that is off, so enforce a minimum value.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
1 parent 0ac7a49
History
File Mode Size
boot
configs
include
kernel
lib
mm
oprofile
plat-arcfpga
plat-tb10x
Kbuild -rw-r--r-- 30 bytes
Kconfig -rw-r--r-- 10.0 KB
Kconfig.debug -rw-r--r-- 922 bytes
Makefile -rw-r--r-- 4.3 KB

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