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Revision 61bf318eac2c13356f7bd1c6a05421ef504ccc8a authored by Sergei Trofimovich on 13 March 2021, 05:08:27 UTC, committed by Linus Torvalds on 13 March 2021, 19:27:31 UTC 
ia64: fix ptrace(PTRACE_SYSCALL_INFO_EXIT) sign
 
In https://bugs.gentoo.org/769614 Dmitry noticed that
`ptrace(PTRACE_GET_SYSCALL_INFO)` does not return error sign properly.

The bug is in mismatch between get/set errors:

static inline long syscall_get_error(struct task_struct *task,
                                     struct pt_regs *regs)
{
        return regs->r10 == -1 ? regs->r8:0;
}

static inline long syscall_get_return_value(struct task_struct *task,
                                            struct pt_regs *regs)
{
        return regs->r8;
}

static inline void syscall_set_return_value(struct task_struct *task,
                                            struct pt_regs *regs,
                                            int error, long val)
{
        if (error) {
                /* error < 0, but ia64 uses > 0 return value */
                regs->r8 = -error;
                regs->r10 = -1;
        } else {
                regs->r8 = val;
                regs->r10 = 0;
        }
}

Tested on v5.10 on rx3600 machine (ia64 9040 CPU).

Link: https://lkml.kernel.org/r/20210221002554.333076-2-slyfox@gentoo.org
Link: https://bugs.gentoo.org/769614
Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
Reported-by: Dmitry V. Levin <ldv@altlinux.org>
Reviewed-by: Dmitry V. Levin <ldv@altlinux.org>
Cc: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Cc: Oleg Nesterov <oleg@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
1 parent 0ceb1ac
Raw File
Kconfig 
# SPDX-License-Identifier: GPL-2.0-only
menuconfig CXL_BUS
	tristate "CXL (Compute Express Link) Devices Support"
	depends on PCI
	help
	  CXL is a bus that is electrically compatible with PCI Express, but
	  layers three protocols on that signalling (CXL.io, CXL.cache, and
	  CXL.mem). The CXL.cache protocol allows devices to hold cachelines
	  locally, the CXL.mem protocol allows devices to be fully coherent
	  memory targets, the CXL.io protocol is equivalent to PCI Express.
	  Say 'y' to enable support for the configuration and management of
	  devices supporting these protocols.

if CXL_BUS

config CXL_MEM
	tristate "CXL.mem: Memory Devices"
	help
	  The CXL.mem protocol allows a device to act as a provider of
	  "System RAM" and/or "Persistent Memory" that is fully coherent
	  as if the memory was attached to the typical CPU memory
	  controller.

	  Say 'y/m' to enable a driver (named "cxl_mem.ko" when built as
	  a module) that will attach to CXL.mem devices for
	  configuration, provisioning, and health monitoring. This
	  driver is required for dynamic provisioning of CXL.mem
	  attached memory which is a prerequisite for persistent memory
	  support. Typically volatile memory is mapped by platform
	  firmware and included in the platform memory map, but in some
	  cases the OS is responsible for mapping that memory. See
	  Chapter 2.3 Type 3 CXL Device in the CXL 2.0 specification.

	  If unsure say 'm'.

config CXL_MEM_RAW_COMMANDS
	bool "RAW Command Interface for Memory Devices"
	depends on CXL_MEM
	help
	  Enable CXL RAW command interface.

	  The CXL driver ioctl interface may assign a kernel ioctl command
	  number for each specification defined opcode. At any given point in
	  time the number of opcodes that the specification defines and a device
	  may implement may exceed the kernel's set of associated ioctl function
	  numbers. The mismatch is either by omission, specification is too new,
	  or by design. When prototyping new hardware, or developing / debugging
	  the driver it is useful to be able to submit any possible command to
	  the hardware, even commands that may crash the kernel due to their
	  potential impact to memory currently in use by the kernel.

	  If developing CXL hardware or the driver say Y, otherwise say N.
endif
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