Revision 6697b2cf69d4363266ca47eaebc49ef13dabc1c9 authored by Dan Williams on 05 February 2016, 00:51:00 UTC, committed by Dan Williams on 19 February 2016, 19:47:26 UTC
ACPI 6.1 clarified that multi-interface dimms require multiple control region entries (DCRs) per dimm. Previously we were assuming that a control region is only present when block-data-windows are present. This implementation was done with an eye to be compatibility with the looser ACPI 6.0 interpretation of this table. 1/ When coalescing the memory device (MEMDEV) tables for a single dimm, coalesce on device_handle rather than control region index. 2/ Whenever we disocver a control region with non-zero block windows re-scan for block-data-window (BDW) entries. We may need to revisit this if a DIMM ever implements a format interface outside of blk or pmem, but that is not on the foreseeable horizon. Cc: <stable@vger.kernel.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
1 parent 18558ca
File | Mode | Size |
---|---|---|
arm_arch_timer.h | -rw-r--r-- | 2.2 KB |
arm_vgic.h | -rw-r--r-- | 10.1 KB |
iodev.h | -rw-r--r-- | 2.0 KB |
![swh spinner](/static/img/swh-spinner.gif)
Computing file changes ...